JP5232914B2 - マルチプロセッサにおけるデータパラレルコンピューティングのためのアプリケーションプログラミングインターフェイス - Google Patents
マルチプロセッサにおけるデータパラレルコンピューティングのためのアプリケーションプログラミングインターフェイス Download PDFInfo
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Description
101:ホストシステム
103:アプリケーション
105:計算アプリケーションライブラリー
107:計算コンパイラー
109:計算ランタイムレイヤ
111:計算プラットホームレイヤ
113:データバス
115:メディアプロセッサ(GPU)
117:中央プロセッサ(CPU)
201:コンピューティング装置
203、205:計算プロセッサ
209:スレッドN
211:プライベートメモリ1
213:スレッド1
215:データキャッシュ
217:コンピューティング装置メモリ
219、221:ローカル共有メモリ
301:ホストCPU
303:アプリケーション
305:プラットホームレイヤ
307:コンピューティング装置識別子
309:論理的コンピューティング装置
1200:コンピュータシステム
1203:バス
1205:マイクロプロセッサ
1207:ROM
1209:揮発性RAM
1211:不揮発性メモリ
1213:ディスプレイ装置
1217:入力/出力コントローラ
Claims (20)
- ホストプロセッサと、
前記ホストプロセッサに結合された1つ以上の計算ユニットと、
前記ホストプロセッサ及び前記1つ以上の計算ユニットの少なくとも1つに結合されたメモリと、
を備え、前記メモリには、パラレルコンピューティングプログラムが記憶され、このパラレルコンピューティングプログラムは、前記ホストプロセッサが、
処理要求に基づいて前記計算ユニットを選択すること、
データ処理タスクのためのソースコードに対応するプログラムオブジェクトを発生すること、
前記1つ以上の計算ユニットに対して前記プログラムオブジェクトから実行可能なコードを発生すること、及び
データ処理タスクを遂行するために前記1つ以上の計算ユニット間で同時に実行されるべき実行可能なコードをロードすること、
を遂行するために1つ以上のAPI(アプリケーションプログラミングインターフェイス)へのコールを含むものであり、
前記APIへのコールの少なくとも1つが、前記計算ユニットの選択のための処理要求を特定し、前記プログラムオブジェクトの発生のためのソースコードを特定し、前記実行可能なコードの発生のためのプログラムオブジェクトを特定する、
パラレルコンピューティングシステム。 - 前記プログラムオブジェクトは、前記ソースコードからコンパイルされたバイナリーコードを含み、このバイナリーコードは、前記1つ以上の計算ユニットのうちの少なくとも1つについての記述を含み、そして前記1つ以上の計算ユニットは、中央処理ユニット(CPU)又はグラフィック処理ユニット(GPU)を含む、請求項1に記載のシステム。
- 前記プログラムオブジェクトを発生することは、予めコンパイルされたライブラリーからバイナリーコードを検索することを含み、そのバイナリーコードは、前記実行可能なコードを含むものである、請求項2に記載のシステム。
- 前記実行可能なコードを発生することは、前記1つ以上の計算ユニットのうちの少なくとも1つにおいて前記実行可能なコードの1つを実行するスレッドの数を指定するために多次元値を含む1つ以上のコンパイルフラグに基づいて前記ソースコードを前記バイナリーコードへとコンパイルすることを含む、請求項2に記載のシステム。
- 前記実行可能なコードをロードすることは、
前記ソースコードでデータ処理タスクを具現化するファンクションを識別するファンクション名に関連したカーネルオブジェクトを発生することを含み、そのカーネルオブジェクトは、ファンクションの引数の記憶部を含み、
更に、前記1つ以上の計算ユニット間で前記実行可能なコードの実行をスケジューリングすることを含み、前記実行は、前記1つ以上の計算ユニットの少なくとも1つにおいて前記実行可能なコードの1つを同時に実行するためのスレッドグループにおけるスレッドの数を含む、請求項1に記載のシステム。 - 前記実行可能なコードをロードすることは、更に、前記引数の記憶部に対応するメモリに1つ以上のメモリオブジェクトを割り当てることを含む、請求項5に記載のシステム。
- 前記スケジューリングは、前記1つ以上の計算ユニットにおいて前記実行可能なコードをパラレルに実行するためのスレッドの合計数を決定することを含む、請求項5に記載のシステム。
- 前記決定することは、前記バイナリーコードを分析して、データ処理タスクを遂行するためのファンクションに対するリソース要求を決定することを含む、請求項7に記載のシステム。
- 前記決定することは、更に、前記1つ以上の計算ユニットのうちの少なくとも1つについてのランタイムリソース利用性に基づきスレッドグループにおけるスレッドの数を決定することを含む、請求項8に記載のシステム。
- 前記ロードすることは、更に、1つ以上のAPIへの1つ以上のコールに応答してスレッドグループにおけるスレッドの数を検索することを含む、請求項5に記載のシステム。
- ホストプロセッサが、
処理要求に基づいて前記ホストプロセッサに結合された1つ以上の計算ユニットを選択すること、
データ処理タスクのためのソースコードに対応するプログラムオブジェクトを発生すること、
前記ホストプロセッサに結合された1つ以上の計算ユニットに対して前記プログラムオブジェクトから実行可能なコードを発生すること、及び
データ処理タスクを遂行するために前記1つ以上の計算ユニット間で同時に実行されるべき実行可能なコードをロードすること、
を含む1つ以上のホストファンクションを遂行するための1つ以上のAPI(アプリケーションプログラミングインターフェイス)に対応するホストファンクショントークンと、 前記データ処理タスクのための前記ソースコードに対応するカーネルファンクショントークンと、
を含み、
前記処理要求、前記データ処理タスクのためのソースコード及び前記実行可能なコードの発生のためのプログラムオブジェクトが、前記1つ以上のAPIによって特定される、
複数のトークンを記憶するマシン読み取り可能な記憶媒体。 - 前記プログラムオブジェクトは、前記ソースコードからコンパイルされたバイナリーコードを含み、このバイナリーコードは、前記1つ以上の計算ユニットのうちの少なくとも1つについての記述を含む、請求項11に記載のマシン読み取り可能な記憶媒体。
- 前記プログラムオブジェクトを発生することは、予めコンパイルされたライブラリーからバイナリーコードを検索することを含み、そのバイナリーコードは、前記実行可能なコードを含むものである、請求項12に記載のマシン読み取り可能な記憶媒体。
- 前記実行可能なコードを発生することは、前記1つ以上の計算ユニットのうちの少なくとも1つにおいて前記実行可能なコードの1つを実行するスレッドの数を指定するために多次元値を含む1つ以上のコンパイルフラグに基づき前記ソースコードを前記バイナリーコードへとコンパイルすることを含む、請求項12に記載のマシン読み取り可能な記憶媒体。
- 前記実行可能なコードをロードすることは、
前記ソースコードでデータ処理タスクを具現化するファンクションを識別するファンクション名に関連したカーネルオブジェクトを発生することを含み、そのカーネルオブジェクトは、ファンクションの引数の記憶部を含み、
更に、前記1つ以上の計算ユニット間で前記実行可能なコードの実行をスケジューリングすることを含み、前記スケジューリングは、前記1つ以上の計算ユニットの少なくとも1つにおいて前記実行可能なコードの1つを同時に実行するためのスレッドグループにおけるスレッドの数を含む、請求項11に記載のマシン読み取り可能な記憶媒体。 - 前記実行可能なコードをロードすることは、更に、前記引数の記憶部に対するメモリに1つ以上のメモリオブジェクトを割り当てることを含む、請求項15に記載のマシン読み取り可能な記憶媒体。
- 前記スケジューリングは、前記1つ以上の計算ユニットにおいて前記実行可能なコードをパラレルに実行するためのスレッドの合計数を決定することを含む、請求項15に記載のマシン読み取り可能な記憶媒体。
- 前記決定することは、前記バイナリーコードを分析して、データ処理タスクを遂行するためのファンクションに対するリソース要求を決定することを含む、請求項17に記載のマシン読み取り可能な記憶媒体。
- 前記決定することは、更に、前記1つ以上の計算ユニットのうちの少なくとも1つについてのランタイムリソース利用性に基づきスレッドグループにおけるスレッドの数を決定することを含む、請求項18に記載のマシン読み取り可能な記憶媒体。
- 前記スケジュールされた実行が完了したかどうか指示する状態値を含むイベントオブジェクトを発生すること、及び
前記1つ以上のAPIへの1つ以上のコールに応答して前記スケジュールされた実行に対する状態値を検索すること、
を更に備えた請求項15に記載のマシン読み取り可能な記憶媒体。
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US12/264,896 US8286198B2 (en) | 2008-06-06 | 2008-11-04 | Application programming interfaces for data parallel computing on multiple processors |
PCT/US2009/041152 WO2009148714A1 (en) | 2008-06-06 | 2009-04-20 | Application programming interfaces for data parallel computing on multiple processors |
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EP (1) | EP2304563B1 (ja) |
JP (1) | JP5232914B2 (ja) |
KR (1) | KR101239025B1 (ja) |
CN (2) | CN105159761B (ja) |
WO (1) | WO2009148714A1 (ja) |
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EP2304563B1 (en) | 2020-05-06 |
US20130081066A1 (en) | 2013-03-28 |
US20170075730A1 (en) | 2017-03-16 |
EP2304563A1 (en) | 2011-04-06 |
US8806513B2 (en) | 2014-08-12 |
US20160188371A1 (en) | 2016-06-30 |
KR20110019775A (ko) | 2011-02-28 |
CN102099788B (zh) | 2015-05-13 |
US10067797B2 (en) | 2018-09-04 |
US20090307699A1 (en) | 2009-12-10 |
US8286198B2 (en) | 2012-10-09 |
WO2009148714A1 (en) | 2009-12-10 |
CN102099788A (zh) | 2011-06-15 |
KR101239025B1 (ko) | 2013-03-04 |
JP2011523141A (ja) | 2011-08-04 |
US20140237457A1 (en) | 2014-08-21 |
CN105159761B (zh) | 2019-01-15 |
US9250697B2 (en) | 2016-02-02 |
US9477525B2 (en) | 2016-10-25 |
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