JP5228406B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a field effect transistor using a semiconductor dispersion film such as a semiconductor carbon nanotube and a semiconductor nanowire and an organic semiconductor in a channel portion and a manufacturing method thereof.

  Field effect transistors are used as important elements that support the current electronics industry, as represented by MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) used in integrated circuits (LSIs). MOSFETs use Si (silicon) as a semiconductor material, but in recent years field effect transistors using other semiconductor materials such as compound semiconductors such as GaAs and GaN, ZnO, organic semiconductors, and carbon nanotubes (CNT) have also appeared. . These manufacturing techniques include not only the method of forming a transistor structure by etching or film deposition using a crystal substrate like LSI, but also applying or printing a semiconductor material on an insulating substrate. Methods for forming transistor structures have also emerged.

In particular, field-effect transistors that are manufactured by a coating process using a single-walled carbon nanotube dispersion film as a semiconductor material have recently attracted attention. Such a field effect transistor is also called a thin film transistor (TFT) because a thin film is used for the channel of the transistor. Single-walled carbon nanotubes with semiconductor characteristics have high electron mobility and hole mobility of several thousand cm ² / Vs or more, and are chemically stable, so they have higher performance than organic semiconductors. It is expected to have stable characteristics. The “carbon nanotube dispersion film” used herein refers to “a dispersion film mainly composed of single-walled carbon nanotubes having semiconductor characteristics” unless otherwise specified. As field effect transistors using carbon nanotube dispersion films, there are reported examples such as Non-Patent Documents 1 to 4 and Patent Documents 1 and 2.

A structure of a transistor using a carbon nanotube dispersion film in a channel portion of a field effect transistor will be described with reference to FIGS. FIG. 8 is a schematic partial sectional view of a field effect transistor using a carbon nanotube dispersion film. A carbon nanotube dispersion film 2 as a semiconductor material is formed on an insulating substrate 1. A gate electrode 4 is formed on the dispersion film 2 via a gate insulating film 3, and a source electrode 5 and a drain electrode 6 are formed on both ends of the carbon nanotube dispersion film 2. For the substrate 1, a material is selected such that a leak current does not flow when a voltage is applied between the source electrode 5 and the drain electrode 6. For example, the substrate 1 may be a silicon substrate formed with a thick silicon oxide film (SiO ₂ ), glass, or plastic. The carbon nanotube dispersion film 2 is a film in which a large number of semiconductor carbon nanotubes are distributed in a network. Normally, carbon nanotubes having metal characteristics as well as semiconductor carbon nanotubes are mixed, but the ratio is 1/3 or less, and the length of one carbon nanotube is the length between the source electrode and the drain electrode. If it is made sufficiently short, the source electrode and the drain electrode are hardly short-circuited by direct connection between the metal nanotubes. Therefore, a change in the number of electrons or holes in the semiconductor carbon nanotube due to a voltage applied to the gate electrode causes a change in conductivity between the source and the drain (change in current), thereby realizing a transistor operation. As the gate insulating film 3, an SiO ₂ film, a SiN _x film, a polyimide film or the like having excellent insulating properties is used. Also, the source / drain electrodes have a relatively low contact resistance with the semiconductor carbon nanotubes, such as aluminum (Al) for n-type semiconductor carbon nanotubes, and gold (Au) or platinum for p-type semiconductor nanotubes. (Pt) or the like is used. The gate electrode may be any metal, but is selected to control the threshold voltage of the transistor, and aluminum (Al), gold (Au), or the like is used.

When a transistor using a carbon nanotube dispersion film is produced by a printing / coating method, the following steps are performed. A dispersion containing carbon nanotubes is dropped or sprayed on a part of the substrate 1 and then dried to form a carbon nanotube dispersion film 2. Thereafter, for example, polyimide is applied to a part of the carbon nanotube dispersion film 2 and dried and cured to form the gate insulating film 3. Further, for example, Al is vapor-deposited on a part of the gate insulating film 3 using a metal mask to form a gate electrode 4. Similarly, Au is vapor-deposited on a part of the carbon nanotube dispersion film 2 using a metal mask. A source electrode 5 and a drain electrode 6 are formed. Thus, a field effect transistor can be manufactured by a simple method.
E. S. Snow, J.A. P. Novak, P.A. M.M. Campbell, D.C. Park, Applied Physics Letters, 82, 2145, 2003. E. Artukovic, M.M. Kaempgen, D.M. S. Hecht, S.M. Roth, G.G. Gruner, Nano Letters, 5, 757, 2005 S. -H. Hur, O .; O. Park, J.M. A. Rogers, Applied Physics Letters, (Applied Physics Letters), 86, 243502, 2005. T.A. Takenobua, T .; Takahashi, T .; Kanbara, K .; Tsukagoshi, Y .; Aoyagi, Y. et al. Iwasa, Applied Physics Letters 88, 33511, 2006 JP 2005-150410 A JP 2006-73774 A

  A conventional field effect transistor using a carbon nanotube dispersion film has a simple structure and can be manufactured by a simple method, so it can be said to be an attractive device, but it has a structure that allows fine adjustment of transistor characteristics. There is a problem that is not. For example, there is a problem that it is difficult to achieve both high performance characteristics important for device characteristics and high breakdown voltage. Taking advantage of the high mobility characteristics of carbon nanotubes and aiming for high performance characteristics, it is necessary to keep the contact resistance with the source electrode sufficiently low. For this reduction, it is effective to use carbon nanotubes with a small band gap. is there. However, when such a carbon nanotube with a small band gap is used for a channel, avalanche breakdown is likely to occur due to application of a large drain voltage, and the breakdown voltage of the transistor is lowered.

  An object of the present invention is to provide a structure of a field-effect transistor capable of finely adjusting transistor characteristics, such as achieving high-performance transistor characteristics while keeping source contact resistance low, and at the same time realizing high breakdown voltage, and a method for manufacturing the same. Is to provide.

  In order to solve the above problems, a field effect transistor according to the present invention includes at least two subdivided channel regions in which a channel region between a source and a drain is connected in series, and includes at least two subdivided channel regions. The semiconductor materials are characterized by having different band gaps.

  According to this configuration, the channel region can be subdivided to freely set the band gap size of the channel region between the source and drain, and the threshold voltage, on-current, off-current, subthreshold characteristic, break The degree of freedom in designing parameters important for transistor characteristics such as down voltage is dramatically increased.

  In the present invention, it is desirable that the band gap of the semiconductor material in the drain end channel region in the subdivided channel region is larger than that in the source end channel region. Thereby, the source resistance including the contact resistance with the source electrode can be lowered and a high breakdown voltage can be realized.

  In the present invention, it is preferable that the semiconductor material in the drain region connected to the drain electrode has a smaller band gap than the semiconductor material in the segmented channel region at the drain end. Thereby, the contact resistance on the drain side can also be lowered.

  In the present invention, it is desirable that the difference in band gap between adjacent subdivided channel regions is equal to or less than the thermal energy of the operating temperature. In general, if there is a band gap difference between adjacent regions, a potential barrier is created and electrons and holes cannot be overcome, but if this band gap difference is less than the thermal energy at the operating temperature, electrons Since the holes and holes also have thermal energy, the potential barrier has almost no influence.

  In the present invention, it is desirable that the semiconductor material of the segmented channel region is made of carbon nanotubes. By using a carbon nanotube with high mobility, a high-performance field-effect transistor having a high operation speed can be realized.

  A method for manufacturing a field effect transistor according to the present invention includes a step of forming a segmented channel region by applying a semiconductor material.

  According to this manufacturing method, semiconductor materials having different band gaps can be attached to adjacent locations on the substrate, and the segmented channel region and the channel region as a whole can be easily formed.

  In the manufacturing method of the present invention, it is desirable that the semiconductor material forming the segmented channel region is made of a dispersion containing carbon nanotubes. Thereby, it becomes easy to uniformly distribute the carbon nanotubes in the segmented channel region, and the characteristics can be made uniform.

  According to the structure and the manufacturing method of the semiconductor device of the present invention described above, the contact resistance and breakdown voltage can be achieved, for example, a high breakdown voltage can be realized at the same time as obtaining high performance transistor characteristics by suppressing the source contact resistance. , The design freedom of parameters important for transistor characteristics such as threshold voltage, on-current, off-current, and subthreshold characteristics is greatly increased.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(Embodiment 1)
FIG. 1 is a partial cross-sectional view schematically showing a configuration of a semiconductor device according to Embodiment 1 of the present invention. The semiconductor device according to Embodiment 1 will be described using a carbon nanotube dispersion film as a semiconductor in a channel portion.

  The semiconductor device according to the first embodiment of the present invention includes a source region 21 made of a semiconductor carbon nanotube dispersion film, a drain region 22 made of a semiconductor carbon nanotube dispersion film, and semiconductor carbons having different band gaps on an insulating substrate 1. A channel region 23 composed of a plurality of subdivided channel regions including at least a source end subdivided channel region 231 and a drain end subdivided channel region 232 is formed, and a gate region is formed on the channel region 23. A source electrode 5 and a drain electrode 6 are formed on both ends of the gate electrode 4, the source region 21 and the drain region 22 with the insulating film 3 interposed therebetween.

The substrate 1 may be any material as long as no leakage current flows when a voltage is applied between the source electrode 5 and the drain electrode 6. For example, the substrate 1 may be a thick silicon on a Si substrate. There are those in which an oxide film (SiO ₂ ) is formed, glass and plastic. In particular, thin glass or plastic can be used as a substrate to be bent.

  In general, single-walled carbon nanotubes having semiconductor characteristics have a narrower band gap as the diameter increases, but by using carbon nanotubes having a diameter of about 0.6 nm to about 2 nm, the band gap can be reduced from about 1.5 eV. It can be changed to about 0.4 eV. For this reason, by controlling the diameter of the carbon nanotube to grow, semiconductor carbon nanotubes having different band gaps can be obtained, and a carbon nanotube dispersion film having different band gaps can be produced. For example, carbon nanotubes with a diameter of about 1.3 nm (band gap of about 0.7 eV) sold on HiPco, one of the laser ablation methods, are also available, and vapor phase growth using a catalyst. Carbon nanotubes having a diameter of about 0.8 nm (with a band gap of about 1.1 eV) are being sold as grown by CoMoCAT, which is one of the methods (CVD method). These can be changed in diameter by changing the particle size and growth conditions of the catalyst.

  Thus, for example, a narrow band gap carbon nanotube (band gap of about 0.7 eV) grown by HiPco is used as the source region 21 and the source end subdivided channel region 231, and the drain region 22 and the drain end subdivided channel region 232 are used. By using a wide-gap carbon nanotube (band gap of about 1.1 eV) dispersion film grown with CoMoCAT, the channel region 23 can be obtained from the source of the present invention in which the source-end subdivided channel 231 and the drain-end subdivided channel 232 are used. A structure up to the drain can be formed. FIG. 2A shows an n-type semiconductor formed by attaching potassium (K) to the carbon nanotube dispersion film in the source region 21 and the drain region 22, and the carbon nanotubes in the source end segmented channel region 231 and the drain end segmented channel region 232. 2 shows a band structure from a source to a drain when oxygen (O) is adsorbed on a dispersion film to form a p-type semiconductor. In the carbon nanotube dispersion film, there are tunnel barriers and metal carbon nanotube portions between the carbon nanotubes, but they are omitted in the band structure diagram because they have a small effect on the element operation. Since the band gap on the source side is narrow, the contact resistance of the source region 21 and the parasitic resistance of the source end channel 231 can be kept low. Further, since the drain side band gap is large, the breakdown voltage can be kept high. In this way, it is possible to increase the degree of design freedom that cannot be achieved with the conventional structure having a uniform band gap.

  Note that there is a conduction band energy difference between the source-end subdivided channel region 231 and the drain-end channel subdivided channel region 232, which inhibits the travel of carriers (electrons) as a potential barrier. When operating with a low drain voltage, it is desirable to make it as small as possible. From such a viewpoint, as shown in FIG. 2B, a segmented channel region whose band gap changes little by little is provided between the source end segmented channel region 231 and the drain end segmented channel region 232. It is desirable. This can be realized by using a semiconductor carbon nanotube dispersion film whose band gap is controlled. Ideally, it is desirable that the difference in band gap between adjacent subdivided channel regions be equal to or less than the thermal energy of the operating temperature. In this case, carriers (electrons) can travel with little influence from the band gap difference. When a high drain voltage is applied and used, the potential barrier due to the band gap difference is equivalently lowered, and therefore it is not necessarily required to be equal to or lower than the thermal energy at the operating temperature.

As the gate insulating film 3, an SiO ₂ film, a SiN _x film, a polyimide film or the like having excellent insulating properties can be used. Of course, the present invention is not limited to these materials, and various insulating materials such as an oxide film, an organic film, and a wide band semiconductor having excellent insulating properties can be used. The thickness of the gate insulating film 3 is determined by an operating voltage and a desired withstand voltage. For example, when the operating voltage is about 5 V, the thickness of the gate insulating film 3 may be about 100 nm.

  The source / drain electrodes have a relatively low contact resistance with the semiconductor carbon nanotubes, such as aluminum (Al) for n-type semiconductor carbon nanotubes, and gold (Au) or platinum (Pt) for p-type semiconductor nanotubes. ) Etc. are available.

  The gate electrode may be any material having good conductivity, such as a metal material such as aluminum (Al) or gold (Au), or a low-resistance semiconductor material, but in order to control the threshold voltage of the transistor. It is desirable to choose.

  The manufacture of the semiconductor device of this embodiment using the carbon nanotube dispersion film will be described with reference to the schematic process cross-sectional view of FIG.

  A dispersion of carbon nanotubes corresponding to the source region 21, the drain region 22, and the plurality of subdivided channel regions is prepared. The carbon nanotubes are not particularly limited in length, but those having a length of 1 μm or less are desirable for ease of handling and dispersion. The dispersion may be anything such as water-based or alcohol-based one in which carbon nanotubes are dispersed, but is preferably one that evaporates at a relatively low temperature, such as an organic solvent. Further, it is desirable that the substrate 1 has a small contact angle with the dispersion liquid and has good compatibility. First, as shown in FIG. 3A, a carbon nanotube dispersion film of each region is formed on the substrate 1 by the following process. A dispersion containing carbon nanotubes forming the source region 21 is dropped on the substrate 1 heated moderately, and simultaneously with the dropping, the solvent is evaporated to form a carbon nanotube dispersion film of the source region 21. The drain region 22 and the segmented channel region 23 are subsequently formed in the same process. There is no particular need to define the order, but it is necessary to pay attention to the substrate temperature and the dropping time so that adjacent carbon nanotube dispersion films do not mix with each other.

  Next, as illustrated in FIG. 3B, an insulating film is formed over the channel region 23. The gate insulating film 3 can be formed by vapor deposition, sputtering, vapor phase growth, coating, or the like, but vapor deposition or sputtering that has good controllability of film thickness and can be formed at a relatively low temperature is desirable. For example, SiN is selected to improve moisture resistance, and the gate insulating film 3 is formed by sputtering through a metal mask that defines the gate insulating film region.

  Finally, the gate electrode 4, the source electrode 5, and the drain electrode 6 are formed. Al is deposited on a part of the gate insulating film 3 through, for example, a metal mask to form the gate electrode 4. Similarly, Au is vapor-deposited on part of the carbon source region 21 and the drain region 22 using, for example, a metal mask to form the source electrode 5 and the drain electrode 6. These electrodes can also be formed by sputtering, vapor phase growth, or coating.

  Through these manufacturing steps, the semiconductor device of the present invention is completed. Of course, it is desirable to form a protective film such as SiN or an organic film that prevents permeation of water and oxygen after this.

  Although the size of the semiconductor device is not particularly specified, a semiconductor device having a gate length of about 100 μm and a width of about 1 mm can be easily manufactured by such a process. Of course, if the accuracy of the coating apparatus when forming the channel region 23 is improved, the size can be further reduced.

  According to the first embodiment, the channel region 23 can be subdivided to change the band gap of the semiconductor, and transistor characteristics such as source resistance, breakdown voltage, threshold voltage, on-current, off-current, and subthreshold characteristics can be obtained. This has the effect of dramatically increasing the design freedom of important parameters.

(Embodiment 2)
A semiconductor device according to Embodiment 2 of the present invention will be described with reference to the drawings. FIG. 4 is a partial cross-sectional view schematically showing the configuration of the semiconductor device according to the second embodiment of the present invention.

  In the semiconductor device according to the second embodiment, a source contact region 210 is provided in a part of the source region 21 in contact with the source electrode 5, and a drain contact region 220 is provided in a part of the drain region 22 in contact with the drain electrode 6. Other configurations are the same as those of the first embodiment. The semiconductor device according to the second embodiment will be described using a carbon nanotube dispersion film for the semiconductor of the channel portion as in the first embodiment.

  The source contact region 210 is made of a carbon nanotube dispersion film having a smaller band gap than the carbon nanotube dispersion film of the source region 21 in order to reduce the contact resistance with the source electrode 5. For example, when the band gap of the carbon nanotube in the source region 21 is 0.7 eV, this structure can be realized by using a carbon nanotube with a band gap of 0.4 eV in the source contact region 210.

  The drain contact region 220 is made of a carbon nanotube dispersion film having a smaller band gap than the carbon nanotube dispersion film of the drain region 22 in order to reduce the contact resistance with the drain electrode 6. For example, when the band gap of the carbon nanotube in the drain region 22 is 1.1 eV, this structure can be realized by using a carbon nanotube with a band gap of 0.4 eV in the drain contact region 220.

  With these structures, the source contact resistance and the drain contact resistance can be reduced as compared with the first embodiment, and the characteristics of the transistor represented by the transconductance can be improved.

  According to the second embodiment, the design freedom of parameters important for transistor characteristics such as source resistance, breakdown voltage, threshold voltage, on-current, off-current, and subthreshold characteristics is dramatically increased, and at the same time Performance improvement is possible.

(Embodiment 3)
A semiconductor device according to Embodiment 3 of the present invention will be described with reference to the drawings. FIG. 5 is a partial cross-sectional view schematically showing a configuration of a semiconductor device according to Embodiment 3 of the present invention.

  The semiconductor device according to the third embodiment is the same as that of the second embodiment except that the source electrode 5 and the drain electrode 6 are arranged on the substrate.

  In the manufacturing method of the structure of Embodiment 3, the source electrode 5 and the drain electrode 6 are formed in advance before forming the source region 21, the source contact region 210, the drain region 22, the drain contact region 220, and the channel region 23. I can keep it. For this reason, high temperature processing (for example, 400 ° C. or more) in an oxygen atmosphere for the electrode, which cannot be performed after the formation of the carbon nanotube, is possible.

(Embodiment 4)
A semiconductor device according to Embodiment 4 of the present invention will be described with reference to the drawings. FIG. 6 is a partial cross-sectional view schematically showing a configuration of a semiconductor device according to Embodiment 4 of the present invention.

  The semiconductor device according to the fourth embodiment is the same as that of the third embodiment except that the gate electrode 4 and the gate insulating film 3 are arranged below the channel region 23.

  In the method of manufacturing the structure according to the fourth embodiment, the gate insulating film 3 that is effective for high-temperature annealing to obtain a high-quality film can be formed before the channel region 23 is formed, and the transistor has excellent stability. Easy to get.

  Thus, according to the semiconductor device of the present invention, the degree of freedom in design is greatly increased. Although the description has been made using the carbon nanotube dispersion film for the semiconductor, the present invention does not limit the channel material to the carbon nanotube, and any material can be used as long as the semiconductor channel can be formed by coating or printing and the band gap can be controlled. It is obvious that the present invention can be applied to any material, and may be a mixed crystal semiconductor such as an organic semiconductor, fullerene, silicon germanium (SiGe), a compound semiconductor, or an oxide semiconductor. Moreover, even if it is a nanowire structure, a polycrystal, and an amorphous as a kind of crystal | crystallization, it is applicable.

  When the band gap of these semiconductors can be controlled very finely and the channel is further subdivided, a band structure as shown in FIG. 7 can be realized in a pseudo manner, and the design freedom is high.

  In each of the above-described embodiments, only an n-type channel transistor is shown. However, it is obvious that the present invention can be applied to a p-type channel transistor. It is also possible to configure a circuit by integrating n-type channel and p-type channel transistors on the same substrate. In addition, by using an element structure optimal for each circuit operation, it is easy to suppress power consumption and improve the operation speed.

It is the fragmentary sectional view which showed typically the structure of the semiconductor device which concerns on Embodiment 1 of this invention. It is the schematic diagram which showed the band structure at the time of the thermal equilibrium of the semiconductor material between the source-drain of the semiconductor device which concerns on Embodiment 1 of this invention. It is process sectional drawing which showed typically the manufacturing method of the semiconductor device which concerns on Embodiment 1 of this invention. (A) A step of applying a semiconductor material to a plurality of regions on a substrate (B) A step of applying a gate insulating film on the channel region (C) A step of applying a source electrode, a drain electrode, and a gate electrode It is the fragmentary sectional view which showed typically the structure of the semiconductor device which concerns on Embodiment 2 of this invention. It is the fragmentary sectional view which showed typically the structure of the semiconductor device which concerns on Embodiment 3 of this invention. It is the fragmentary sectional view which showed typically the structure of the semiconductor device which concerns on Embodiment 4 of this invention. It is the schematic diagram which showed the equivalent band structure at the time of the thermal equilibrium of the semiconductor material between the source and drain obtained when a channel area | region is subdivided by application of this invention. It is the fragmentary sectional view which showed the structure of the semiconductor device typically.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Substrate 2 Semiconductor material 3 Gate insulating film 4 Gate electrode 5 Source electrode 6 Drain electrode 21 Source region 22 Drain region 23 Channel region 210 Source contact region 220 Drain contact region 231 Source end segmented channel region 232 Drain end segmented channel region CB Conduction Band Ef Fermi Level VB Valence Band

Claims (6)

The channel region between the source and drain is composed of at least two or more subdivided channel regions connected in series, and the band gap of the semiconductor material of at least two subdivided channel regions is different ,
A field effect transistor, characterized in that the band gap of the semiconductor material in the segmented channel region at the drain end is arranged to be larger than the semiconductor material in the segmented channel region at the source end . Field effect transistor of the mounting serial to claim 1, characterized in that the semiconductor material of the drain region connected to the drain electrode has a smaller band gap than the semiconductor material of the subdivision channel region at the drain end. The field effect transistor according to claim 1 or claim 2 difference in band gap of the subdivision channel region adjacent to said that it is below the thermal energy of the operating temperature. The field effect transistor according to any one of claims 1 to 3 , wherein the semiconductor material of the subdivided channel region is made of carbon nanotubes.   5. A method of manufacturing a field effect transistor according to claim 1, wherein the segmented channel region of the field effect transistor according to any one of claims 1 to 4 is formed by applying a semiconductor material. 6. The method of manufacturing a field effect transistor according to claim 5, wherein the semiconductor material forming the subdivided channel region is made of a dispersion containing carbon nanotubes.

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