JP5222821B2 - Electronic circuit equipment - Google Patents

Description

  The present invention relates to an electronic circuit device, and more particularly to an electronic circuit device such as a DC / DC converter that achieves miniaturization and high efficiency.

  DC / DC converters such as step-up converters are required to be smaller, have higher output, and have higher efficiency. To achieve this, components can be mounted on a single module, switching speed can be increased, Furthermore, a low breakdown voltage semiconductor element is employed. In order to increase the switching speed and employ a low breakdown voltage semiconductor element, it is essential to reduce the inductance of the circuit, and it is also important to reduce the inductance of the wiring in the electronic component.

  In order to realize such a problem, a first bus bar extends along an upper surface portion that electrically connects electrodes at the upper ends of a plurality of capacitors and a side surface on one side of the plurality of capacitors. And a second bus bar is a bottom surface that electrically connects the electrodes at the lower ends of the plurality of capacitors. A second side surface portion that is arranged in parallel with the first side surface portion along the side surface on one side of the plurality of capacitors, and a second side portion that is drawn from an end surface of the second side surface portion. The second electrode lead-out portion is led out from the end surface of the second side surface portion on the same side as the end surface from which the first electrode lead-out portion is led out from the first side surface portion. There was a capacitor module as described above (see Patent Document 1).

JP 2007-242860 A

  In order to reduce the inductance of the entire DC / DC converter, it is conceivable to reduce the inductance of the electronic component itself. However, considering the electrical insulation and the clearance between the components, the length of the circuit becomes long, and the DC / Inductance of the entire DC converter may not be effectively reduced. In such a case, even if the inductance of the electronic component itself is lowered, the inductance of the entire circuit is not lowered and the effect is low.

  Therefore, it is necessary to arrange electronic components so that the length of the circuit wiring is as short as possible. However, if the number of components is large, the electrical insulation distance and the clearance between components must be increased, and the length of the circuit wiring becomes longer. In addition, large electronic components such as smoothing capacitors require space to fix the components, so increasing the number of components requires space for mounting other components, which increases the length of circuit wiring. As a result, not only the inductance is increased, but also the DC / DC converter is enlarged.

  In order to solve such problems, modularizing electronic components is an effective means, but if it is necessary to further reduce the inductance of the wiring, simply modularizing the electronic components together It is insufficient. In the above Patent Document 1, the inductance is reduced by using a parallel plate as the conductor portions of the capacitors arranged in parallel, but the inductance in the wiring connecting the capacitor module and the semiconductor element is not taken into consideration. It was. Further, in Patent Document 1, there is one capacitor module in the boost converter connected in parallel to the battery, and the voltage is boosted by one capacitor module connected in parallel. When there are a plurality of capacitor modules connected in parallel, reduction of wiring inductance between the plurality of capacitors and the semiconductor element has not been considered at all.

  The present invention has been made to solve the above-described problems. Even when a plurality of capacitor modules are connected in parallel to the battery, the inductance of the entire apparatus can be reduced, and the size and the production cost can be reduced. An object of the present invention is to provide an electronic circuit device having a low level.

  The DC / DC converter according to the present invention includes a first to a fourth semiconductor element connected in series with a voltage of a DC power supply via a reactor, and two capacitors connected in parallel to the semiconductor element. The voltage is boosted between the output terminals, the first conductor portion connecting one of the two capacitors and the positive side of the first semiconductor element, the other capacitor and the first semiconductor element The second conductor portion connecting to the negative electrode side is formed so as to be parallel to each other, the third conductor portion connecting one capacitor and the negative electrode side of the fourth semiconductor element, and the other capacitor The fourth conductor portion connecting the positive electrode side of the fourth semiconductor element is formed so as to be parallel to each other.

  According to the DC / DC converter according to the present invention, the first to fourth semiconductor elements connected in series with the voltage of the DC power supply via the reactor, and the two capacitors connected in parallel to the semiconductor element. A first conductor portion connecting one of the two capacitors and the positive electrode side of the first semiconductor element, and the other capacitor and the first semiconductor. The second conductor portion connecting the negative electrode side of the element is formed to be parallel to each other, the third conductor portion connecting one capacitor and the negative electrode side of the fourth semiconductor element, and the other conductor portion Since the capacitor and the fourth conductor portion connecting the positive electrode side of the fourth semiconductor element are formed in parallel to each other, the wiring inductance of the device can be reduced.

1 is a circuit diagram showing a DC / DC converter according to Embodiment 1 of the present invention. FIG. It is a circuit diagram (a) and (b) which show the state through which current flows at the time of voltage boosting operation. It is a circuit diagram (a) and (b) which show the state through which current flows at the time of voltage boosting operation. It is a figure (a) and (b) which show a switching waveform of each switching element. 1 is a perspective view showing an electronic circuit device according to Embodiment 1 of the present invention. It is a top view which shows the electronic circuit apparatus by Embodiment 1 of this invention. It is a circuit diagram which shows the DC / DC converter as an electronic circuit apparatus by Embodiment 2 of this invention. It is a perspective view which shows the electronic circuit apparatus by Embodiment 2 of this invention. It is a disassembled perspective view which shows the capacitor | condenser module in the electronic circuit apparatus by Embodiment 3 of this invention. It is a perspective view which shows the capacitor | condenser module in the electronic circuit device by Embodiment 3 of this invention. It is a perspective view (a) and (b) which shows a capacitor module by Embodiment 4 of this invention. It is a perspective view which shows a circuit apparatus. It is a perspective view which shows a circuit apparatus.

Embodiment 1 FIG.
Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram showing a DC / DC converter according to Embodiment 1 of the present invention. In the figure, a DC / DC converter according to the present invention has two capacitors 1 and 2, a semiconductor element 3 a (first semiconductor element S 1, hereinafter abbreviated as semiconductor element S 1), and a semiconductor element 3 b (second semiconductor element). S2 (hereinafter abbreviated as semiconductor element S2), semiconductor element 4b (third semiconductor element S3, hereinafter abbreviated as semiconductor element S3) and semiconductor element 4a (fourth semiconductor element S4, hereinafter abbreviated as semiconductor element S4). ing. Capacitor 1 and capacitor 2 may have the same capacity or may be different. By installing a plurality of capacitors in parallel in this way, the frequency of the current flowing through the reactor can be increased, thereby reducing the size of the reactor.

  The capacitor 1 is connected to the positive electrode side of the semiconductor element S1 and the negative electrode side of the semiconductor element S4, the capacitor 2 is connected to the negative electrode side of the semiconductor element S1 and the positive electrode side of the semiconductor element S4, and the capacitor 1 and the capacitor 2 are one capacitor module. It is contained in. Conductor portion 6 (first conductor portion) for connecting capacitor 1 to the positive electrode side of semiconductor element S1 and conductor portion 7 (second conductor portion) for connecting capacitor 2 to the negative electrode side of semiconductor element S1 Are formed of flat plates that are parallel to each other, and a conductor portion 8 (third conductor portion) for connecting the capacitor 1 to the negative electrode side of the semiconductor element S4 and a capacitor 2 to the positive electrode side of the semiconductor element S4. The conductor portion 9 (fourth conductor portion) for this purpose is formed of flat plates that are parallel to each other.

  In the circuit diagram of FIG. 1, a portion indicated by H is a portion in which the conductor portions 8 and 9 are formed of flat plates parallel to each other. The voltage applied to the capacitor 2 is twice the voltage applied to the capacitor 1. Further, a DC power source 17 is connected via a reactor 14 between the negative electrode side of the first semiconductor element S1 and the positive electrode side of the second semiconductor element S2. With such a circuit, a voltage obtained by boosting the voltage of the DC power supply 17 between the output terminals P and Q can be obtained.

  At least one of the semiconductor elements S1 and S4 needs to be a switching element, and one may be a diode. Examples of switching elements include MOSFETs and IGBTs. Further, in order to use the DC / DC converter for high power, the capacitor 1 and the capacitor 2 are not surface-mounted products but are formed by large capacitors.

  2 and 3 are circuit diagrams showing a state of current flow during the boosting operation, and FIG. 4 is a diagram showing switching waveforms of the respective switching elements. In the figure, switching elements are employed as the semiconductor element S1, the semiconductor element S2, the semiconductor element S3, and the semiconductor element S4. However, when no regenerative operation is required, diodes are employed as the semiconductor element S3 and the semiconductor element S4. Also good.

  When boosting, there are the following four patterns of operations depending on the switching operation of the semiconductor element S1, the semiconductor element S2, the semiconductor element S3, and the semiconductor element S4. These four patterns of circuit operations are defined as operations 1 to 4. First, in operation 1, as shown in FIG. 2A, the semiconductor element S1 and the semiconductor element S2 are turned on, the semiconductor element S3 and the semiconductor element S4 are turned off, and the power supply 17 → reactor 14 → semiconductor element S2 → semiconductor element. A loop of S1 → power source 17 is formed, and energy is accumulated in the reactor 14.

  Next, as shown in FIG. 2B, in the operation 2, the semiconductor element S1 and the semiconductor element S3 are turned on, the semiconductor element S2 and the semiconductor element S4 are turned off, and the power source 17 → reactor 14 → semiconductor element S3 (diode side). ) → capacitor 1 → semiconductor element S1 → power source 17, and the capacitor 1 is charged, and the reactor 14 stores energy from the power source 17 and releases energy to the capacitor 1.

  Next, as shown in FIG. 3A, in operation 3, the semiconductor element S2 and the semiconductor element S4 are turned on, the semiconductor element S1 and the semiconductor element S3 are turned off, and the power supply 17 → reactor 14 → semiconductor element S2 → capacitor. 1 → semiconductor element S4 (diode side) → capacitor 2 → power source 17 is looped, energy is accumulated in capacitor 1, energy is accumulated and released in capacitor 2, and energy is accumulated in reactor 14. And released.

  Next, as shown in FIG. 3B, in the operation 4, the semiconductor element S1 and the semiconductor element S2 are turned off, the semiconductor element S3 and the semiconductor element S4 are turned on, and the power supply 17 → reactor 14 → semiconductor element S3 (diode side). ) → Semiconductor element S4 (diode side) → Capacitor 2 → Power supply 17 is looped, and energy is accumulated and released in the capacitor 2. When the step-up ratio is twice or more, as shown in FIG. 4A, operation 1 → operation 2 → operation 1 → operation 3 is repeated. When the step-up ratio is 1 to 2, as shown in FIG. 4B, operation 2 → operation 4 → operation 3 → operation 4 is repeated.

  Next, at the time of regeneration (during step-down), the following operations 5 to 8 are performed. That is, in the operation 5, when the semiconductor element S1, the semiconductor element S2, the semiconductor element S3, and the semiconductor element S4 are turned off, the reactor 14 → the power source 17 → the semiconductor element S1 (diode side) → the semiconductor element S2 (diode side) → reactor. 14 is formed, the energy of the reactor 14 moves to the power source 17, and the power source 17 is charged. In the operation 6, the semiconductor element S3 is turned on, the semiconductor element S1, the semiconductor element S2, and the semiconductor element S4 are turned off, and the capacitor 1 → the semiconductor element S3 → the reactor 14 → the power supply 17 → the semiconductor element S1 (diode side) → the capacitor 1 In the reactor 14, when the voltage applied to the capacitor 1 is smaller than the voltage of the power supply 17 in the reactor 14, energy from the capacitor 1 is accumulated and the voltage applied to the capacitor 1 is larger than the voltage of the power supply 17. Releases energy.

  In operation 7, the semiconductor element S4 is turned on, the semiconductor element S1, the semiconductor element S2, and the semiconductor element S3 are turned off. The capacitor 2 → the semiconductor element S4 → the capacitor 1 → the semiconductor element S2 (diode side) → the reactor 14 → the power supply 17 → A circuit loop is formed in the capacitor 2. The capacitor 2 is discharged and the capacitor 1 is charged. In the reactor 14, the difference between the voltage V 2 applied to the capacitor 2 and the voltage V 1 applied to the capacitor 1 (V 2 −V 1) Discharging or charging is performed in relation to the voltage V17. That is, the battery is charged when (V2-V1)> V17, and discharged when (V2-V1) <V17.

  In the operation 8, the semiconductor element S1 and the semiconductor element S2 are turned off, the semiconductor element S3 and the semiconductor element S4 are turned on, and a loop is formed in the capacitor 2 → the semiconductor element S4 → the semiconductor element S3 → the reactor 14 → the power supply 17 → the capacitor 2. The energy is accumulated in the reactor 14. When the step-down ratio is twice or more, the operation 5 → operation 6 → operation 5 → operation 7 is repeated. Further, when the step-down ratio is 1 to 2, the operation 8 → operation 6 → operation 8 → operation 7 is repeated.

  The inductance reduction effect changes so that the current increases in the conductors 6, 7, 8, and 9 in the transient state in which the switching mode changes from the operation 1 to the operation 3 at the time of boosting. At that time, the conductor 6 and the conductor 7 will be described as an example. In the conductor 6, a current flows from the semiconductor element S2 toward the capacitor 1, and in the conductor 7, the current flows from the capacitor 2 toward the semiconductor element S1. Since the conductor 7 and the conductor 7 are configured as flat plates parallel to each other, the directions of the current flowing through the conductor 6 and the conductor 7 are reversed, the change in the magnetic field created by the current flowing through each is canceled, and the current change occurs. Since the inductance value of the circuit loop (semiconductor element S1 → capacitor 1 → semiconductor element S4 → capacitor 2 → semiconductor element S1) is reduced and the current during the transient is reduced, the surge voltage can be reduced.

  In a transient state in which the switching mode changes from operation 3 to operation 1, the conductors 6, 7, 8, and 9 change so that the current decreases. In this case, the conductor 6 and the conductor 7 will be described as an example. In the conductor 6, the current flowing from the semiconductor element S2 toward the capacitor 1 decreases, and in the conductor 7, the current flowing from the capacitor 2 toward the semiconductor element S1 decreases. Since the conductor 6 and the conductor 7 are configured as flat plates parallel to each other, the direction of the current flowing through the conductor 6 and the conductor 7 is reversed, and the change in the magnetic field generated by the current flowing through each of the conductors 6 and 7 is cancelled. Since the inductance value of the circuit loop (semiconductor element S1-> capacitor 1-> semiconductor element S4-> capacitor 2-> semiconductor element S1) is reduced and the transient current is reduced, the surge voltage can be reduced.

  Similarly, currents flow in the opposite directions in the conductors 8 and 9, and the inductance value of the circuit loop (semiconductor element S 1 → capacitor 1 → semiconductor element S 4 → capacitor 2 → semiconductor element S 1) having a current change becomes small and transient Since the current at the time is reduced, the surge voltage can be reduced.

  In a transient state in which the switching mode changes from operation 2 to operation 4, the conductors 6 and 8 change so that the current decreases, and the conductors 7 and 9 change so that the current increases. In this case, the conductor 6 and the conductor 7 will be described as an example. In the conductor 6, the current flowing from the capacitor 1 toward the semiconductor element S1 decreases, and in the conductor 7, the current flowing from the capacitor 2 toward the semiconductor element S1 increases. To do.

  Since the conductors 6 and 7 are configured as flat plates parallel to each other, the currents flow in the conductors 6 and 7 in the same direction, but currents in opposite ways flow, and the currents flowing in each of them. The direction of the magnetic field generated by the circuit is the same, but since the current change is reversed, the circuit loop (semiconductor element S1 → capacitor 1 → semiconductor element S4 → capacitor 2 → semiconductor element in which the change in the magnetic field is canceled and the current change occurs) Since the inductance value of S1) is reduced and the transient current is reduced, the surge voltage can be reduced.

  Further, when the switching mode is changed from the operation 4 to the operation 2, the conductors 6 and 8 are changed so that the current is increased, and the conductors 7 and 9 are changed so that the current is decreased. In this case, the conductor 6 and the conductor 7 will be described as an example. In the conductor 6, a current flows from the capacitor 1 toward the semiconductor element S1, and in the conductor 7 flows from the capacitor 2 toward the semiconductor element S1. Since the conductor 6 and the conductor 7 are configured as flat plates parallel to each other, the current flows in the same direction in the conductor 6 and the conductor 7 but in the opposite manner. The direction of the magnetic field to be created is the same, but the change of the current is reversed, so that the change of the magnetic field is canceled and the current change occurs in the circuit loop (semiconductor element S1 → capacitor 1 → semiconductor element S4 → capacitor 2 → semiconductor element Since the inductance value of S1) is reduced and the transient current is reduced, the surge voltage can be reduced.

  Similarly, the currents of the conductors 8 and 9 are also reversed in the opposite manner, so that the circuit loop (semiconductor element S1 → capacitor 1 → semiconductor element S4 → capacitor 2 → semiconductor element S1) in which the current changes occurs. Since the inductance value is reduced and the current during the transient is reduced, the surge voltage can be reduced. It should be noted that during regeneration, the direction of current is all reversed from that during boosting, and the operational effects are the same as those described in the boosting operation.

  5 is a perspective view showing a capacitor module and a conductor part in the electronic circuit device having the circuit configuration shown in FIG. 1, and FIG. 6 is a plan view showing a device containing the capacitor module, the conductor part, and the semiconductor element in the electronic circuit device. It is. FIG. 5 shows a state in which the capacitor 1 and the capacitor 2 are accommodated in the same capacitor module 5 and modularized. In the present invention, as shown in FIGS. 5 and 6, a plurality of capacitor elements constituting the capacitor 1 and the capacitor 2 are arranged in the same direction (X direction), and the capacitor elements constituting the capacitor 1 and the capacitor 2 are arranged. (Not shown) is housed in the capacitor module 5 in an electrically insulated state.

  The conductor part 6 and the conductor part 7 of the capacitor 1 and the capacitor 2 are formed by insert molding while maintaining an insulation distance between the conductor parts 6 and 7 by an insulator. Further, the conductor part 8 and the conductor part 9 are formed. Is formed by insert molding while maintaining an insulation distance between the conductor portions 8 and 9 by an insulator.

  In the first embodiment, as shown in FIG. 6, the resin-molded device 15 is used by modularizing the semiconductor element S1 and the semiconductor element S2, and the semiconductor element S3 and the semiconductor element S4. The devices 15 are arranged in a straight line, and the capacitors 1 and 2 are arranged on the conductor portion side of the device 15. By arranging the components in this way, the conductor portion 6 and the conductor portion 7 are formed in a parallel plate shape and wired, and the conductor portion 8 and the conductor portion 9 are formed in a parallel plate shape and wired. The inductance is reduced.

  The conductor part of the capacitor 1 is connected to the positive electrode side of the semiconductor element S1 and the negative electrode side of the semiconductor element S4, and the conductor part of the capacitor 2 is connected to the negative electrode side of the semiconductor element S1 and the positive electrode side of the semiconductor element S4. If the present invention is applied to a circuit configuration in which the conductor portion of the capacitor is connected to the same semiconductor element, the inductance of the entire circuit can be reduced as compared with the prior art, and the transient current during switching of the semiconductor element can be reduced. As the surge voltage decreases, a low breakdown voltage semiconductor element can be used, and the switching loss can be further reduced, so that the energy consumption can be reduced.

  Furthermore, since the transient current at the time of switching is small, noise due to surge is small even when the frequency of switching is increased, so that the frequency of the DC / DC converter can be increased. Since electronic components (passive components) can be reduced in size as the frequency increases, high-efficiency and small-sized DC / DC converters can be realized by increasing the frequency of the DC / DC converter.

  In the above description, the DC / DC converter has been described. On the other hand, the DC / DC converter using the chopper principle has a large reactor, which is a problem in reducing the size and weight. Therefore, by adopting the circuit configuration as shown in the present invention in the chopper circuit, it is possible to reduce the inductance of the circuit and further reduce the size of the reactor of the power converter by increasing the frequency.

  As shown in FIGS. 5 and 6, the capacitor 1 and the capacitor 2 are accommodated in one module 5, and the conductor portion 6 and the conductor portion 7, and the conductor portion 8 and the conductor portion 9 extending from the capacitor 1 and the capacitor 2. Since a parallel flat plate is used, a parallel flat plate can be formed with a bus bar having a large plate thickness. In addition, since the parallel flat plate has high mechanical strength, the conductor portion 6, the conductor portion 7, the conductor portion 8, and the conductor portion 9 can also be used as capacitor fixing points, and even if the capacitor fixing points are reduced, vibration resistance is also achieved. Sex can be secured.

  Furthermore, the bus bar constituting the conductor portion 6, the conductor portion 7, the conductor portion 8, and the conductor portion 9 is insert-molded into a parallel plate shape, the conductor portion is attached to the capacitor element, and the capacitor is modularized. Since a parallel plate can be attached, productivity can be improved and cost can be reduced.

  In addition, since the inductance due to the circuit wiring can be ignored in the parallel plate wiring section, it is desirable to use the parallel plate as close as possible to the connection portion with the semiconductor element. In addition, the smaller the distance between the conductor parts between the conductor part 6 and the conductor part 7 and the distance between the conductor parts between the conductor part 8 and the conductor part 9, the magnetic fields generated from the conductor parts interfere with each other. The effect of canceling the inductance is increased.

  FIG. 5 shows a case where the insulating layer between the conductor part 6 and the conductor part 7 and the insulating layer between the conductor part 8 and the conductor part 9 are formed with the same width as the conductor part. When used for applications of V or higher, it is preferable that the insulating portion projects in the width direction from the conductor portion, and the creeping insulation distance between the conductor portions is ensured.

Embodiment 2. FIG.
7 is a circuit diagram showing a DC / DC converter as an electronic circuit device according to Embodiment 2 of the present invention, and FIG. 8 is a perspective view showing a capacitor module and a conductor portion in the electronic circuit device. In the present embodiment, the conductor portion 6 and the conductor portion 7 and the conductor portion 8 and the conductor portion 9 shown in the first embodiment are configured by flat plates that are parallel to each other, and further, a conductor that connects the semiconductor element S2 and the semiconductor element S3. 16 is also formed of a flat plate parallel to the conductor portion 6 and the conductor portion 7, and is formed of a flat plate parallel to the conductor portion 8 and the conductor portion 9.

  In the circuit configuration as shown in the present invention, it is necessary to reduce the circuit inductance between conductor portions of different capacitors and different semiconductor elements as a particular situation of the circuit configuration. In such a case, as in the conventional example, if it is intended to reduce the inductance of a single capacitor, it is necessary to dispose each semiconductor element and each capacitor in the vicinity.

  On the other hand, in this embodiment, the conductors 6 and 7 that are arranged in parallel, and the conductors 16 that connect the semiconductor elements S2 and S3 to the conductors 8 and 9 are arranged in parallel. Thus, the inductance is intended to be reduced. By configuring in this manner, there is an effect of reducing inductance in the same way in the operation 1 → operation 2, operation 2 → operation 1, operation 3 → operation 4, and operation 4 → operation 3 described in the first embodiment. Since an increase in inductance value can be suppressed even if different semiconductor elements are arranged apart from different capacitors, the surge voltage can be reduced even if different semiconductor elements are arranged apart from different capacitors.

  If the surge voltage can be reduced, a low breakdown voltage semiconductor element can be used, switching loss can be reduced, and the efficiency of the circuit device can be increased. Furthermore, since the transient current at the time of switching is small, noise due to surge can be reduced even if the frequency of switching is increased, so that the frequency of the DC / DC converter can be increased. Since electronic components (passive components) can be miniaturized at higher frequencies, a smaller DC / DC converter can be provided by increasing the frequency of the DC / DC converter.

  The principle of inductance reduction in the transition period of the operation 1 → operation 3, operation 3 → operation 1, operation 2 → operation 4, and operation 4 → operation 2 is the same as that described in the first embodiment. Here, only operation 1 → operation 2, operation 2 → operation 1, operation 3 → operation 4, and operation 4 → operation 3 will be described. In a transient state in which the switching mode changes from operation 1 to operation 2 during boosting, the current flowing through the conductor 16 decreases, the current flows from the reactor 14 toward the semiconductor element S2, and the current flowing through the conductor 6 and the conductor 8 increases. A current flows from the semiconductor element S3 through the capacitor 1 toward the semiconductor element S1.

  At this time, as shown in FIG. 7, the conductor 16 is formed in a flat plate parallel to the conductors 6 and 8, so that the direction of the magnetic field generated by the current flowing through each of the conductors 16 is the same. Since the inductance value of the circuit loop (semiconductor element S3 → capacitor 1 → semiconductor element S2 → semiconductor element S3) in which the change in the magnetic field is canceled and the current change occurs is reduced, the current during the transient is reduced, so the surge voltage is reduced. Can be small.

  In a transient state in which the switching mode changes from operation 2 to operation 1, the current flowing through the conductor 16 increases, the current flows from the reactor 14 toward the semiconductor element S2, the current flowing through the conductor 6 and the conductor 8 decreases, and the semiconductor element A current flows from S3 through the capacitor 1 toward the semiconductor element S1. At this time, as shown in FIG. 7, by forming the conductor 16 on a flat plate parallel to the conductors 6 and 8, the direction of the magnetic field generated by the current flowing through each of the conductors 16 is the same, but the method of changing the current is reversed. Therefore, the inductance value of the circuit loop (semiconductor element S3 → capacitor 1 → semiconductor element S2 → semiconductor element S3) in which the change in the magnetic field is canceled and the current change occurs is reduced, and the current at the time of transient is reduced. Can be reduced.

  In a transient state in which the switching mode changes from operation 3 to operation 4, the circuit loop in which the current changes is semiconductor element S3 → capacitor 1 → semiconductor element S2 → semiconductor element S3. In this circuit loop, the current flowing through the conductor 16 decreases, the current flows from the reactor 14 toward the semiconductor element S2, and the current flowing through the conductor 6 and the conductor 8 decreases, and the semiconductor element S2 passes through the capacitor 1 and passes through the semiconductor. A current flows in the direction of the element S3. At this time, as shown in FIG. 7, by forming the conductor 16 in a flat plate parallel to the conductor 6 and the conductor 8, the directions of the currents flowing through the conductor 6 and the conductor 16 are opposite to each other, and currents flowing through the conductors 16 are generated. Since the change in the magnetic field is canceled out, the inductance value of the circuit loop (semiconductor element S3 → capacitor 1 → semiconductor element S2 → semiconductor element S3) in which the current change occurs is reduced, and the current during the transient is reduced. The voltage can be reduced.

  In a transient state in which the switching mode changes from operation 4 to operation 3, the circuit loop in which the current changes is semiconductor element S3 → capacitor 1 → semiconductor element S2 → semiconductor element S3. In this circuit loop, the current flowing through the conductor 16 increases, the current flows from the reactor 14 toward the semiconductor element S2, the current flowing through the conductor 6 and the conductor 8 increases, and the semiconductor element passes through the capacitor 1 from the semiconductor element S2. A current flows in the direction of S3. At this time, as shown in FIG. 7, the conductor 16 is formed in a flat plate parallel to the conductors 6 and 8, so that the direction of the current flowing through the conductor 6 and the conductor 16 is reversed, and the magnetic field generated by the current flowing through each of them. Since the change in current is canceled out, the inductance value of the circuit loop (semiconductor element S3 → capacitor 1 → semiconductor element S2 → semiconductor element S3) in which the current change occurs becomes small, and the current at the time of transient becomes small. Can be reduced. It should be noted that during regeneration, the direction of current is all reversed from that during boosting, and the operational effects are the same as those described in the boosting operation.

  The conductor part of the capacitor 1 is connected to the positive electrode side of the semiconductor element S1 and the negative electrode side of the semiconductor element S4, and the conductor part of the capacitor 2 is connected to the negative electrode side of the semiconductor element S1 and the positive electrode side of the semiconductor element S4. If the present invention is applied to a circuit configuration in which the conductor portion of the capacitor is connected to the same semiconductor element, there is no problem even if the semiconductor elements are arranged apart from each other. For example, when the device 15 generates a large amount of heat and thermal interference with the capacitor becomes a problem, since the inductance hardly increases even if the distance between the device 15 and the capacitor is large, thermal interference can be effectively avoided. Furthermore, since it is not necessary to unnecessarily increase the size of the cooler, the cooler can be reduced in size and weight.

Embodiment 3 FIG.
9 is an exploded perspective view showing a capacitor module in an electronic circuit device according to Embodiment 3 of the present invention, and FIG. 10 is a perspective view of the same. A single multilayer printed circuit board 12 in which the wiring patterns of the conductor part 6, the conductor part 7, the conductor part 8, the conductor part 9, and the conductor 16 shown in the first and second embodiments are arranged in parallel is prepared. The mounting conductor portion 13 attached to is soldered to the multilayer printed circuit board 12.

  In FIG. 10, the shape of the attachment conductor part 13 at the time of flowing a large current is shown. In order to flow a large current, the mounting conductor portion 13 is formed in an L shape, and the space between the capacitor module 5 and the printed board 12 of the capacitor is filled with a resin (not shown) in order to improve vibration resistance. . By using the multilayer printed circuit board 12 as a flat plate parallel to each other in this way, the parallel flat plate can be easily attached and the parallel flat plate can be produced at a low cost.

  By making the shape of the attachment conductor portion 13 L-shaped, the contact area with the wiring pattern on the multilayer printed circuit board 12 can be increased, and the multilayer printed circuit board 12 and the attachment conductor portion 13 The heat generated at the connecting portion can be dispersed. In particular, when a cooler (not shown) is brought into contact with the lower surface of the multilayer printed circuit board 12, it is possible to dissipate heat generated at the connection portion with the capacitor or the multilayer printed circuit board 12 from the L-shaped attachment conductor section 13. .

  That is, the heat generated by the capacitor is radiated to the multilayer printed circuit board 12 through the L-shaped portion of the attachment conductor portion 13 and is radiated from the multilayer printed circuit board 12 to a cooler (not shown). Further, the space between the capacitor module 5 and the multilayer printed circuit board 12 is filled with a resin (not shown), so that not only vibration resistance is improved, but also generated at the connection portion between the multilayer printed circuit board 12 and the mounting conductor portion 13. Therefore, the reliability of the connection portion between the multilayer printed circuit board 12 and the mounting conductor portion 13 is also improved. Furthermore, wirings other than the conductor portions 6 to 9 and the conductor 16 can be formed on the multilayer printed circuit board 12, and the wiring space can be effectively used, so that the DC / DC converter can be reduced in size. Furthermore, since the multilayer printed circuit board 12 is easily available in a short period of time, the amount of inventory can be reduced and the production cost can be reduced.

Embodiment 4 FIG.
11 (a) and 11 (b) are perspective views showing a capacitor element forming a capacitor module according to Embodiment 4 of the present invention, and FIGS. 12 and 13 are perspective views showing a capacitor module and a conductor portion in an electronic circuit device. is there. In the present embodiment, the height from the bottom surface of the capacitor module 5 of the connection portion between the capacitor 1 and the capacitor 2 and the conductor portions 6 to 9 is the same. FIGS. 11A and 11B show an example in which the shape and the number of capacitor elements 11 having the same capacity are changed.

  Capacitors 1 and 2 having different capacities are composed of film capacitors. Since the capacitance of the film capacitor is determined by the total area of the film in the capacitor if the material and thickness of the film used are the same, as shown in FIGS. 11 (a) and 11 (b), the capacitor element 11 has Capacitors with the same capacity can be made by changing the flatness, number, and number of turns in one capacitor element. By changing the flatness, number, and number of turns in one capacitor element, the shape of the capacitor module Can be changed. In FIGS. 11A and 11B, the capacitor element shown in FIG. 11A and the capacitor shown in FIG. The elements have the same capacitance.

  When the capacitors 1 and 2 having different capacities are modularized into the same capacitor module 5, the film width L is made the same, and the flatness, the number and the number of turns of the capacitor elements in the capacitors 1 and 2 are changed, so that different capacities are obtained. Capacitor 1 and capacitor 2 are formed. Further, since the film width L is the same, the heights of the capacitor 1 and the capacitor 2 are the same as shown in FIG. 13, and the heights of the respective conductor portions 6 to 9 connected to the capacitor module 5 from the bottom surface are made uniform. Can do. The parallel plates 6 to 9 and the capacitor element 11 are connected on the upper surface side A or the lower surface side B of the capacitor module 5. 12 and 13 show an example of connection on the lower surface side B. FIG.

  By using films having the same width L in this way, the heights of the capacitor 1 and the capacitor 2 are the same, the connection positions of the parallel plates 6 to 9 can be aligned, and the structure of the parallel plates 6 to 9 is simple. Therefore, the shapes of the parallel plates 6 to 9 can be simplified, can be easily processed, and the cost can be reduced. Further, by making the film width L the same, it is possible to purchase a large amount of films, and as a result, it is possible to keep the manufacturing cost low.

  In FIG. 5, since the heights of the capacitor 1 and the capacitor 2 are different, it is impossible to align the positions of the conductor portions to be connected from the bottom surface of the capacitor module 5, but in this embodiment, in FIGS. As shown, since the heights of the capacitor 1 and the capacitor 2 are the same, the heights of the conductor portions can be made uniform. By aligning the heights of the respective conductor portions in this way, the connection terminals in the capacitor element 11 and the connection wiring portions from the parallel plates 6 to 9 can be shortened as much as possible, and the inductance of the circuit can be further reduced. Further, since the parallel plates 6 to 9 and the capacitor element 11 are connected on the upper surface side A or the lower surface side B of the capacitor module 5, the upper surface side of the capacitor module 5, which is a connection portion between the parallel plates 6 to 9 and the capacitor element 11. If a radiator is installed on A or the lower surface B, the heat generated by the capacitors 1 and 2 can be easily dissipated.

1, 2 capacitors, 3a-4b semiconductor elements, 5 capacitor modules,
6-9 conductor parts, 12 printed circuit boards, 14 reactors, 16 conductors, 17 power supplies.

Claims (7)

  DC / DC for boosting the voltage of a DC power source between output terminals by first to fourth semiconductor elements connected in series via a reactor and two capacitors connected in parallel to the semiconductor elements A first conductor portion connecting one of the two capacitors and the positive electrode side of the first semiconductor element; a second capacitor; and a negative electrode side of the first semiconductor element; And a second conductor portion that connects the first capacitor and a third conductor portion that connects the one capacitor and the negative electrode side of the fourth semiconductor element, and the other capacitor, An electronic circuit device, wherein the fourth conductor portion connecting the positive electrode side of the fourth semiconductor element is formed in parallel to each other.   The conductor connecting the second semiconductor element and the third semiconductor element is formed so as to be parallel to the first conductor part and the third conductor part. The DC / DC converter according to 1.   3. The DC / DC converter according to claim 1, wherein the two capacitors are accommodated in one capacitor module.   3. The DC / DC according to claim 2, wherein the conductor and the first to fourth conductor portions are formed of flat plates parallel to each other, and the flat plates are insert-molded while maintaining an insulation distance. converter.   5. The DC / DC according to claim 1, wherein the two capacitors are configured to have the same height by configuring the two capacitors with capacitor elements having the same width. 6. DC converter.   3. The DC / DC according to claim 2, wherein the conductor and the first to fourth conductor portions are formed by wiring patterns that are parallel to each other, and the wiring patterns are arranged on a single printed circuit board. converter.   7. The DC / DC converter according to claim 6, wherein a space between the two capacitors and the printed board is filled with resin.

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