JP5201659B2 - Method for manufacturing bypass diode for solar cell - Google Patents

Description

The present invention relates to a method of manufacturing a solar cell bypass diodes, in particular, to a method for manufacturing a solar cell bypass diode that is mounted on an artificial satellite or space station or the like.

  Solar cells are used as power sources for artificial satellites and space stations. This solar battery cell is desirably lightweight, and a single crystal silicon solar battery cell having a thickness of about 0.1 mm, a compound solar cell having a thickness of 0.05 mm or less, and the like have been used in recent years. A plurality of solar cells are connected in series and parallel to constitute a solar cell module. A solar cell module is configured by connecting a plurality of solar cells in series and parallel, but when the solar cells connected in series are partially shaded, the solar cells that are shaded Voltage is applied in the opposite direction, and the output of the solar cell module decreases. In the case of compound solar cells, the reverse breakdown voltage is low, and there is a risk of cell failure when reverse voltage is applied. To prevent this, a bypass diode is connected in parallel to each solar cell. There is a need.

  FIG. 15 shows an example of a conventional bypass diode. FIG. 15A is a plan view of a conventional bypass diode, and FIG. 15B is a side sectional view of the conventional bypass diode. The bypass diode 100 has conventionally formed a pn junction by diffusing an impurity having a conductivity type opposite to that of the silicon substrate 101 on one surface of the single crystal silicon substrate 101 to form a diffusion layer 102, for example. The p-type electrode 103 and the n-type electrode 104 are formed on both sides of the silicon substrate 101, respectively. The bypass diode described in Patent Document 1 has a configuration in which a p-electrode and an n-electrode are formed on both sides of such a silicon substrate, respectively. In order to reduce the weight of the solar cell module, it is possible to reduce the weight of components such as solar cells, bypass diodes and wiring materials, and to reduce the amount of adhesive used to bond these components to the substrate. is important.

Compound solar cells have been developed in which the electrodes of both electrodes of the solar cells are arranged on the light receiving surface side so that the cells can be easily connected. When such a solar battery cell and a conventional bypass diode are connected, the configuration is as shown in FIG. FIG. 16 is a plan view showing a connection example of a conventional solar cell bypass diode and solar cell. In FIG. 16, the connection between the solar cells 105 can be made only on one side by the interconnector 106, but when connecting the bypass diode 107 and the solar cell 105, one-side welding X was performed. Then, the other side (back side) welding Y was performed by reversing.
JP-A-6-53377

  When connecting the conventional bypass diode 107 and the solar battery cell 105, after welding X on one side, it was reversed and welding Y on the other side (back side) was performed. In addition, there is a problem that cracking occurs when the solar battery cell 105 and the bypass diode 107 are handled. In addition, the thickness of the interconnector on the back surface side of the diode increases the amount of adhesive to be attached to the substrate, which increases the mass of the solar cell module. Further, although a very thin compound type solar cell has been developed, it has been very difficult to make the bypass diode thin. This is because the structure of the bypass diode requires that the silicon substrate be thin at the first stage of the process. For example, even if a diode with a thickness of 0.05 mm or less is produced, cracks frequently occur during manufacturing, resulting in a very poor yield. It is to become.

  The present invention has been made in order to solve the above-described problems, and has a thin and lightweight bypass diode for solar cells and a bypass diode for solar cells with less handling work for connection between the solar cells and the bypass diode. It aims at providing the manufacturing method of.

  In order to solve the above problems, a bypass diode for a solar cell according to the present invention includes a pn junction diode formed on the main surface of a semiconductor substrate, and a p electrode of a pn junction diode formed on the main surface of the semiconductor substrate. And an n electrode.

  In one embodiment of the present invention, a back electrode is formed on the surface opposite to the surface where the main surface is formed, and a diffusion layer is formed on the surface opposite to the main surface. The configuration in which the back electrode is formed on the diffusion layer and the shapes of the p electrode and the n electrode of the pn junction diode are each comb-shaped, and both electrodes are alternately arranged.

  The method of manufacturing a bypass diode for a solar cell according to the present invention includes a step of forming a diffusion layer on a main surface of a semiconductor substrate, forming a p-electrode and an n-electrode of a pn junction diode on the main surface, and A step of forming a cutting groove; a step of attaching a support base to the main surface; and a step of removing a part of the semiconductor substrate from a surface opposite to the main surface to make a thin plate.

  According to the present invention, since the p electrode and the n electrode of the diode are formed on the same main surface of the semiconductor substrate on which the pn junction diode is formed, the welding process on the back surface side of the bypass diode becomes unnecessary. The connection between the solar battery cell and the bypass diode is easy, the increase in the amount of adhesive used when the interconnector is attached to the substrate can be suppressed, and the mass of the solar battery module can be reduced. Further, it is possible to form a bypass diode having a small thickness without causing a decrease in yield in the manufacturing process.

(Embodiment 1)
Embodiment 1 of the present invention will be described below. FIG. 1A is a plan view of a bypass diode according to Embodiment 1 of the present invention, and FIG. 1B is a side sectional view of the bypass diode. FIG. 2 is a plan view showing a connection example between the bypass diode and the solar battery cell according to the first embodiment of the present invention. In FIG. 1, a p-electrode 2 and an n-electrode 3 of a diode are formed on the same main surface of a semiconductor substrate 1 such as a single crystal silicon substrate on which a pn junction diode 1a is formed, and a bypass diode 4 for a solar cell. Is configured. In a semiconductor substrate 1 such as a single crystal silicon substrate, a pn junction diode 1a is formed by diffusing an impurity having a conductivity type opposite to that of the silicon substrate to form a diffusion layer 1b in a part of one surface. Yes.

  When the solar cell bypass diode 4 having such a structure is used, in FIG. 2, the connection between the solar cells 5 adjacent to each other can be made only on one surface by the interconnector 6, and the bypass diode. 4 and the p-electrode 5a and the n-electrode 5b of the solar battery cell 5 can be connected only by welding X on the same one surface using the interconnector 7.

  Next, the manufacturing process of the bypass diode according to the first embodiment of the present invention will be described with reference to FIGS. 3 to 8 are schematic cross-sectional views in each manufacturing process of the bypass diode of the first embodiment. First, a silicon substrate 10 to be a semiconductor substrate 1 obtained by slicing an ingot of silicon crystal has a damaged layer near the surface when slicing. Therefore, the damaged layer is etched using an acidic or alkaline solution and the silicon substrate 10 is etched to a desired thickness. Here, the silicon substrate 10 may be n-type or p-type, and the size and thickness of the silicon substrate 10 are not limited. Here, for convenience, the following description will be given using the n-type silicon substrate 10. However, when the p-type silicon substrate 10 is used, the p + layer that will be described below is an n + layer and the n + layer is a p + layer. . However, the diffusion conditions and the like are different.

  Next, as shown in FIG. 3, the silicon substrate 10 is put into a quartz furnace heated to 1000 ° C. to 1200 ° C., and an oxide film 11 is formed on the silicon substrate 10 by oxygen or water vapor. Next, as shown in FIG. 4, only the desired shape 12 of the oxide film 11 formed on the silicon substrate 10 is removed to form the p + layer. Next, as shown in FIG. 5, the silicon substrate 10 is put into a quartz furnace heated to about 800 ° C. to 1100 ° C., and a gas containing boron is flowed to form a p + layer 13. Next, as shown in FIG. 6, the silicon substrate 10 is put into a quartz furnace heated to 900 ° C. to 1200 ° C., an oxide film 14 is formed on the silicon substrate 10 with oxygen and water vapor, and drive-in is performed. . At this time, the temperature of the quartz furnace is preferably higher than the temperature at the time of diffusion. Next, in order to make electrical connection between the p + layer 13 on the surface of the silicon substrate 10 and the silicon substrate 10, the oxide film 14 on the silicon substrate 10 is removed into a desired pattern shape 15 as shown in FIG. .

  Next, as shown in FIG. 8, a p-electrode 2 and an n-electrode 3 are formed on the surface of the silicon substrate 10. Here, as an electrode material of the p electrode 2 and the n electrode 3, it is preferable to use a highly conductive material such as silver or aluminum. Further, as means for forming the p electrode 2 and the n electrode 3, for example, means such as vapor deposition of an electrode material by electron beam heating in high vacuum, screen printing of a paste containing the electrode material, or plating of the electrode material can be used. . Furthermore, in order to obtain good ohmic contact between the silicon substrate 10 and the p-electrode 2 and the n-electrode 3, it is preferable that a heat treatment at 400 ° C. to 500 ° C. is performed after the electrode material is attached to the silicon substrate 10. Next, the silicon substrate 10 is cut using a dicing saw to complete the bypass diode 4. Laser or the like may be used as means for cutting the silicon substrate 10.

  Next, a modification of the bypass diode according to the first embodiment of the present invention will be described with reference to FIG. FIG. 9 is a sectional view of a bypass diode according to a modification of the first embodiment of the present invention. The same components as those of the bypass diode according to the first embodiment of the present invention are denoted by the same reference numerals and description thereof is omitted. In FIG. 9, ohmic contact between the n electrode 3 and the silicon substrate 10 is improved by providing the n + layer 16 on the silicon substrate 10 located below the n electrode 3. As a condition for forming the n + layer 16, a diffusion layer of the n + layer 16 is formed by introducing a gas containing phosphorus into a quartz furnace heated to about 700 to 900 ° C.

(Embodiment 2)
The second embodiment of the present invention will be described below. FIG. 10 is a plan view of the bypass diode according to the second embodiment of the present invention. In the bypass diode 20 of the second embodiment, the p-electrode 21 and the n-electrode 22 which are both electrodes of the diode are respectively formed in a comb shape on the semiconductor substrate 1, and the electrodes 21 and 22 are alternately arranged. Has been placed. By alternately arranging the electrodes 21 and 22, the bypass diode 20 having good forward characteristics can be manufactured.

(Embodiment 3)
The third embodiment of the present invention will be described below. FIG. 11 is a cross-sectional view of the bypass diode according to the third embodiment of the present invention. In the case of the bypass diode according to the first embodiment of the present invention, when the thickness of the semiconductor substrate 1 is reduced, the series resistance component due to the semiconductor substrate 1 increases, and thus the forward characteristics tend to increase. The bypass diode 30 according to the third embodiment is an improvement of this point. The same components as those of the bypass diode according to the first embodiment of the present invention are denoted by the same reference numerals and description thereof is omitted. In FIG. 11, a back electrode 31 is provided on the back side of a silicon substrate 10 that becomes the semiconductor substrate 1. By providing the back surface electrode 31 on the back surface side of the silicon substrate 10, it is possible to reduce the increase in series resistance of the silicon substrate 10 by the back surface electrode 31.

  As the electrode formation conditions for the back electrode 31, it is preferable to use a highly conductive material such as silver or aluminum, as with the electrodes 2 and 3 on the front surface side. Further, as the means for forming the back electrode 31, for example, means such as vapor deposition of an electrode material by electron beam heating in high vacuum, screen printing of a paste containing the electrode material, or plating of the electrode material can be used. Furthermore, in order to obtain good ohmic contact between the silicon substrate 10 and the back electrode 31, it is preferable that a heat treatment at 400 ° C. to 500 ° C. is performed after the electrode material is attached to the silicon substrate 10. This heat treatment can be performed simultaneously after forming the back electrode 31 on the back side after forming the electrode on the front side.

  Next, a modification of the bypass diode 30 according to the third embodiment of the present invention will be described with reference to FIG. FIG. 12 is a cross-sectional view of a bypass diode 40 according to a modification of the third embodiment of the present invention. The same components as those of the bypass diode 30 according to the third embodiment of the present invention are denoted by the same reference numerals, and the description thereof is omitted. In FIG. 12, an n + layer 16 is provided on the silicon substrate 10 located below the n electrode 3 and an n + layer 41 is provided on the back side of the silicon substrate 10, thereby providing ohmic contact between the back electrode 31 and the silicon substrate 10. Has improved. The n + layer 41 can be formed simultaneously by removing the oxide film 14 on the back surface side when forming the n + layer 16 on the front surface side.

(Embodiment 4)
As Embodiment 4 of this invention, one Embodiment of the manufacturing method of the bypass diode for solar cells of this invention is described using FIG. FIG. 13 is a cross-sectional view of bypass diode 50 according to the fourth embodiment of the present invention. FIG. 14 is an explanatory diagram of the manufacturing process of the bypass diode 50 of the fourth embodiment. A manufacturing method for manufacturing a thinner bypass diode according to this embodiment will be described. The same components as those of the bypass diode according to the first embodiment of the present invention are denoted by the same reference numerals and description thereof is omitted. In the fourth embodiment, after the p-electrode 2 and the n-electrode 3 are formed on the surface side of the silicon substrate 10, the cutting groove 51 is formed in the silicon substrate 10 using a dicing saw. At this time, the cutting groove 51 is deeper than the desired thickness of the bypass diode 50 and shallower than the thickness of the silicon substrate 10.

  Next, as shown in FIG. 14, the silicon substrate 10 is attached to the support base 52 using an adhesive 53. Next, the silicon substrate 10 is polished to a desired thickness by using a wafer grinder from the back side opposite to the support base 52 to reduce the thickness of the silicon substrate 10. Thereafter, the diode chip constituting the bypass diode 50 is separated from the support base 52 to complete the chip of the bypass diode 50. Further, the silicon substrate 10 may be thinned by etching with a chemical instead of polishing with a wafer grinder. By thinning in this way at the end of the manufacturing process, the bypass diode 50 having a thickness of 0.05 mm or less can be manufactured without a decrease in yield in the manufacturing process.

  As described above, the bypass diode in each embodiment of the present invention can suppress an increase in the amount of adhesive used due to the influence of the interconnector on the back side of the diode by forming an electrode on one side of the semiconductor substrate. And the mass of the solar cell module can be reduced. In addition, the solar cell and the bypass diode can be easily connected to each other as compared with the conventional example, and the adhesive on the substrate can be reduced by eliminating the unevenness caused by the interconnector. By alternately arranging both diffusion layers and both electrodes installed on one side of the semiconductor substrate, a bypass diode with better forward characteristics can be produced. Further, by disposing the back electrode on the substrate surface opposite to the both electrodes of the semiconductor substrate, it is possible to manufacture a bypass diode with good forward characteristics. The manufacturing method in each embodiment of the present invention facilitates the production of a thin diode.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

(A) The top view of the bypass diode of Embodiment 1 of this invention, (b) The sectional side view of the bypass diode. It is a top view which shows the example of a connection of the bypass diode of Embodiment 1 of this invention, and a photovoltaic cell. FIG. 6 is a schematic cross-sectional view in the manufacturing process of the bypass diode of the first embodiment. FIG. 6 is a schematic cross-sectional view in the manufacturing process of the bypass diode of the first embodiment. FIG. 6 is a schematic cross-sectional view in the manufacturing process of the bypass diode of the first embodiment. FIG. 6 is a schematic cross-sectional view in the manufacturing process of the bypass diode of the first embodiment. FIG. 6 is a schematic cross-sectional view in the manufacturing process of the bypass diode of the first embodiment. FIG. 6 is a schematic cross-sectional view in the manufacturing process of the bypass diode of the first embodiment. It is sectional drawing of the bypass diode of the modification of Embodiment 1 of this invention. It is a top view of the bypass diode of Embodiment 2 of the present invention. It is sectional drawing of the bypass diode of Embodiment 3 of this invention. It is sectional drawing of the bypass diode of the modification of Embodiment 3 of this invention. It is sectional drawing of the bypass diode of Embodiment 4 of this invention. It is explanatory drawing of the manufacturing process of the bypass diode of the same Embodiment 4. (A) The top view of the conventional bypass diode, (b) It is a sectional side view of the conventional bypass diode. It is a top view which shows the example of a connection of the bypass diode for conventional photovoltaic cells, and a photovoltaic cell.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 1, 1a pn junction diode, 1b Diffusion layer, 2 p electrode, 3 n electrode, 4, 20, 30, 40, 50 Bypass diode, 5 Solar cell, 10 Silicon substrate, 11 Oxide film, 13 p + layer , 16 n + layer, 51 cutting groove, 52 support base.

Claims (4)

A semiconductor substrate;
A pn junction diode formed on the main surface of the semiconductor substrate;
A method for manufacturing a bypass diode for a solar cell, comprising a p-electrode and an n-electrode of the pn junction diode formed on the main surface of the semiconductor substrate ,
Forming a diffusion layer on the main surface of the semiconductor substrate, and forming the p electrode and the n electrode of the pn junction diode on the main surface;
Forming a cutting groove from the main surface on which the p electrode and the n electrode of the pn junction diode are formed;
Attaching a support base to the main surface of the pn junction diode;
And a step of removing a part of the semiconductor substrate from a surface opposite to the main surface of the pn junction diode to make a thin plate . The bypass diode for a solar battery cell according to claim 1 , further comprising a step of forming a back electrode on a surface opposite to the main surface on which the p electrode and the n electrode of the pn junction diode are formed. Manufacturing method . 2. The method of claim 1 , further comprising: forming a diffusion layer on a surface opposite to the main surface on which the p electrode and the n electrode of the pn junction diode are formed, and forming a back electrode on the diffusion layer. The manufacturing method of the bypass diode for photovoltaic cells of description. The shape of the p electrode and the n electrode of the pn junction diode, respectively formed in the comb, the p electrode and n electrode arranged alternately, bypass solar cell according to claim 1 Diode manufacturing method .

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