JP5195375B2 - Battery pack capacity adjustment device - Google Patents

Description

  The present invention relates to an assembled battery capacity adjusting device for equalizing the capacity of unit batteries which are one or a plurality of adjacent battery cells constituting an assembled battery as a series connection body of a plurality of battery cells.

  An example of this type of capacity adjustment device is described in Patent Document 1 below. Here, each of the plurality of battery cells constituting the assembled battery is grouped into separate blocks, and the voltage variation of the battery cells in the block is a dedicated discharge that discharges the high voltage cells based on the size comparison. Provide a circuit. Moreover, in order to reduce the voltage variation between blocks, the voltage of a block is detected and the process which discharges a block with a high voltage based on this detection result is performed.

  Here, in the voltage variation reducing process, as shown in FIG. 15, when the voltage variation reducing process of the battery cells in the block is performed after the block voltage variation reducing process, excessive discharge of the battery cells is performed. May be made. In FIG. 15, it is assumed that an assembled battery is configured by including two blocks each including four battery cells, and the voltage of each battery cell is shown by a bar graph and the average voltage of the battery cells in the block is 1 This is indicated by a dotted line. As shown in the figure, in this case, there may occur a situation where the battery cell having the lowest voltage is further discharged by the process for reducing the voltage variation between the blocks.

Therefore, conventionally, for example, as shown in Patent Document 2 below, it has been proposed to perform the process of reducing the voltage variation between the blocks after the process of reducing the voltage variation between the battery cells in the block. Thereby, it is possible to avoid the occurrence of the excessive discharge.
JP 2006-50785 A JP 2006-50716 A

  By the way, in the technique of the said patent document 2, completion of the reduction process of the voltage dispersion | variation between the battery cells in a block is judged by the time of this reduction process. That is, the process waits for a time period during which it is assumed that the voltages of the battery cells in the block can be sufficiently equalized, and then performs a process of reducing the voltage variation between the blocks. In this case, if the process for reducing the voltage variation between the blocks is started in a state where the voltage variation in the block is not actually reduced, the above-described problem that the battery cells are excessively discharged may occur. For this reason, it is desired that the waiting time be set with a margin. However, in this case, there is a risk of waiting for an unnecessarily long time before performing the process for reducing the voltage variation between the blocks, thereby reducing the time required for the process for reducing the voltage variation of the battery cells of the assembled battery. May be prolonged.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a unit battery which is one or a plurality of adjacent battery cells constituting an assembled battery as a series connection body of a plurality of battery cells. An object of the present invention is to provide a battery pack capacity adjustment device that can reduce voltage variation more quickly.

  Hereinafter, means for solving the above-described problems and the operation and effects thereof will be described.

1st invention is the capacity adjustment apparatus of the assembled battery which equalizes the capacity | capacitance of the unit battery which is one or several adjacent battery cells which comprise the assembled battery as a series connection body of several battery cells, and adjoins. and block equalizing means for reducing the voltage variation by discharging the ones for each plurality of the unit batteries having high voltages of the unit cells in the block that are grouped as respective separate block, the block Determining means for determining whether or not the process for reducing voltage variation by the in-block equalizing means has been completed based on at least one of the electric potential and current of the electric path connected to the unit battery, and the determining means When it is determined that the voltage variation reduction process by the block equalization means has been completed, the high voltage of the blocks constituting the assembled battery is discharged. Characterized in that it comprises a block-to-block equalization means for performing processing to reduce the voltage variation between.

  When the discharge process is performed by the in-block equalizing means, the voltage between the unit cells varies, and the discharge current flows through at least one of the unit cells. In the above invention, in view of this point, by referring to at least one of the electric potential and current of the electric path connected to the unit battery, it is possible to quickly determine whether or not the voltage variation reducing process by the in-block equalizing means has been completed. Judgment can be made with certainty. For this reason, after the voltage variation reducing process by the intra-block equalizing means is actually completed, it is possible to quickly shift to the voltage variation reducing process by the inter-block equalizing means.

In a second aspect based on the first aspect , the determination means determines whether or not the voltage variation reduction processing by the intra-block equalization means has been completed with the potentials at both ends of the block as inputs. Features.

  The determination means may determine whether or not the voltage variation reduction processing by the intra-block equalization means has been completed using an electrical path connected to both ends of the block as an input line.

According to a third invention, in the first or second invention, the determining means is based on a change in voltage of the unit cell in the block to be equalized by the intra-block equalizing means. It is characterized in that it is determined whether or not the process for reducing voltage variation by means of is completed.

  When voltage variation reduction processing is actually performed by the in-block equalizing means, at least one unit battery is discharged, and the voltage decreases. On the other hand, when the voltage variation reduction process is completed, none of the unit cells is discharged, and the voltage is considered to be maintained. In the above invention, in view of this point, it is possible to appropriately determine whether or not the voltage variation reduction processing by the block equalization means has been completed based on whether or not the voltage of the unit cells in the block has changed.

According to a fourth aspect of the present invention, in any one of the first to third aspects, the determination unit is configured such that a change in a detected voltage value of a block to be equalized by the intra-block equalization unit is equal to or less than a predetermined value. Based on this, it is determined that the reduction process has been completed.

  When voltage variation reduction processing is actually performed by the in-block equalizing means, at least one unit battery is discharged, and the voltage decreases. For this reason, the voltage of a block will also fall. On the other hand, when the voltage variation reduction process is completed, none of the unit batteries are discharged and the voltage is maintained, so that the block voltage is considered not to change. In the above invention, in view of this point, it is possible to appropriately determine whether or not the voltage variation reduction processing by the intra-block equalizing means has been completed based on whether or not the block voltage has changed.

According to a fifth invention, in the first or second invention, the in-block equalizing means is configured to use a unit cell having a high voltage by using an electrical path connected to both ends of the unit cell in the target block as an input line. It is a means to discharge, The said judgment means is a means to judge the presence or absence of execution of the discharge process by the said block equalization means, It is characterized by the above-mentioned.

  In the above invention, paying attention to the fact that the equalizing means in the block discharges the unit battery having a high voltage, whether or not the process for reducing the voltage variation of the unit cells in the block has been completed based on the presence or absence of the discharge process. Can be determined.

In a sixth aspect based on the first , second or fifth aspect , the intra-block equalizing means includes a discharge circuit connected in parallel to each unit cell, the unit cell and the corresponding discharge circuit. Output means for outputting a signal according to the open / close state of the loop circuit, and the determination means includes, for all unit batteries in the block to be determined, a loop circuit including the unit battery and the corresponding discharge circuit. Based on the fact that the output means outputs a signal indicating that an open loop has been established, it is determined that the voltage variation reduction processing by the intra-block equalization means has been completed.

  When the process for reducing the voltage variation of the unit cells in the block is completed, the discharge process using the discharge circuit is not performed. Therefore, it is considered that all the loop circuits are opened. In the above invention, in view of this point, it is possible to appropriately determine whether or not the voltage variation reduction processing by the block equalization means has been completed.

In a seventh invention according to any one of the first to sixth inventions, the inter-block equalization means performs a process of reducing voltage variation by the intra-block equalization means for all the blocks constituting the assembled battery. When the process is completed, a process for reducing variations in voltage between blocks constituting the assembled battery is performed.

According to an eighth invention, in any one of the first to sixth inventions, the inter-block equalizing means is configured to equalize within a block with respect to a predetermined plurality of blocks smaller than the total number of blocks constituting the assembled battery. When the voltage variation reducing process by the conversion unit is completed, the process for reducing the voltage variation between these blocks is performed only between the blocks for which the reduction process has been completed.

  For some blocks, the minimum block voltage at the time when the voltage variation reducing process in the block is completed is equal to or higher than the minimum block voltage when the voltage variation reducing process is completed for all the unit cells constituting the assembled battery. . For this reason, when the voltage variation reduction process in the block is completed in a plurality of blocks, the unit cell is not excessively discharged even if the block voltage variation reduction process is performed between them. In the above invention, by paying attention to this point, it is possible to quickly start the process of reducing the voltage variation between the blocks, and further reduce the time required for the process of reducing the voltage dispersion of the unit cells constituting the assembled battery. be able to.

According to a ninth invention, in any one of the first to sixth inventions, the inter-block equalizing means includes the intra-block equalizing means for a predetermined number of blocks smaller than the total number of blocks constituting the assembled battery. When the voltage variation reduction process is completed, the voltage of the block for which the reduction process has been completed is discharged to the target value determined from the minimum value of the voltage of the blocks constituting the assembled battery.

  The minimum value of the block voltage at the time when the voltage variation reduction processing of the unit batteries constituting the assembled battery is completed is equal to or less than the minimum value of the current block voltage. For this reason, the voltage of the block for which the voltage variation reduction processing has been completed by the block equalization means is equal to or lower than the current block voltage minimum value by the time when the voltage variation reduction processing of the unit battery constituting the assembled battery is completed. It is thought to be discharged. In the above invention, by paying attention to this point, it is possible to quickly start the process of reducing the voltage variation between the blocks, and further reduce the time required for the process of reducing the voltage dispersion of the unit cells constituting the assembled battery. be able to.

According to a tenth aspect of the present invention, in any one of the first to ninth aspects of the present invention, the apparatus further comprises detection means for detecting the voltage of the block, and the execution of the block voltage variation reduction processing by the inter-block equalization means When the block voltage detected by the detecting means does not change, the apparatus further comprises an abnormality determining means for determining that an abnormality has occurred in at least one of the inter-block equalizing means and the detecting means.

  It is considered that the block voltage is lowered during the execution command of the block voltage variation reduction process because the block charge is discharged. For this reason, when the block voltage does not decrease, it can be determined that an abnormality has occurred in the inter-block equalizing means.

An eleventh invention according to any one of the first to tenth inventions, further comprising a detecting means for detecting the voltage of the block, wherein the equalizing means in the block is a discharge circuit connected in parallel to the unit cells. And a signal indicating that at least one loop circuit is closed by the output means. The output means outputs a signal corresponding to the open / closed state of a loop circuit including the unit battery and the corresponding discharge circuit. If the block voltage detected by the detection means does not change despite the fact that the output is output, the abnormality determination determines that there is an abnormality in at least one of the intra-block equalization means, the output means, and the detection means The apparatus further comprises means.

  When the loop circuit is in a closed state, the unit battery constituting the loop circuit is discharged, so that the voltage of the unit battery is lowered, and thus the block voltage including the unit battery is considered to be lowered. On the other hand, if the block voltage does not change in spite of the closed state, it is considered that an abnormality has occurred in the block equalization means, the output means, and the detection means.

A twelfth invention according to any one of the first to eleventh inventions, further comprising detecting means for detecting the voltage of the block, wherein the in-block equalizing means is a discharge circuit connected in parallel to the unit cells. And an output means for outputting a signal corresponding to an open / closed state of a loop circuit including the unit battery and the corresponding discharge circuit, and a signal to the effect that all of the loop circuit is opened by the output means Is output and the block voltage detected by the detecting means changes even though the block voltage variation reducing process by the inter-block equalizing means is not being executed, the intra-block equalizing means and the output means And an abnormality determination means for determining that at least one of the detection means is abnormal.

  When all of the loop circuits are in the open state and the process of reducing the block voltage variation by the inter-block equalizing means is not being executed, the discharge process of the unit battery is not performed, so the voltage of the unit battery does not decrease. It is considered that the block voltage does not change. For this reason, if the block voltage changes under these circumstances, it is considered that there is an abnormality in the block voltage detection means, output means, and in-block equalization means.

(First embodiment)
Hereinafter, a first embodiment in which an assembled battery capacity adjusting device according to the present invention is applied to an assembled battery capacity adjusting device mounted on a hybrid vehicle will be described with reference to the drawings.

  FIG. 1 shows a system configuration according to the present embodiment.

  The assembled battery 10 is configured as a series connection body of a plurality of (here, m × n) lithium secondary batteries (battery cells C11 to Cnm). The assembled battery 10 is a power supply means for the in-vehicle power generation device. The assembled battery 10 includes a power conversion circuit connected to an in-vehicle motor as an in-vehicle power generation device via the main relays 12 and 14, and power conversion for stepping down the voltage of the assembled battery 10 and outputting it to the low-voltage battery 20. It can be connected to the circuit.

  On the other hand, the capacity adjustment apparatus according to the present embodiment uses “m (≧ 2)” battery cells C11 to C1m,..., Cn1 to Cnm as one block, and selectively selects voltages at both ends of each block. A voltage detector 16 for detection is provided. As the voltage detector 16, for example, a flying capacitor, a multiplexer that selectively connects both ends of the battery cells Ci1 to Cim (i = 1 to n) of each block, and a voltage at both ends of the flying capacitor are detected. What is necessary is just to comprise with a differential amplifier circuit.

  The block voltage detected by the voltage detector 16 is input to a microcomputer (microcomputer 18). The microcomputer 18 is driven by being supplied with electric power from the low-voltage battery 20 via the start switch 22 and has a function of monitoring and controlling the state of the assembled battery 10.

  The capacity adjustment device further includes equalization units U1 to Un that reduce voltage variations in the block. Each of these equalization units Ui (i = 1 to n) includes terminals T1 to T3. Here, the terminal T3 of the equalizing unit Ui on the high potential side and the terminal T1 of the equalizing unit U (i + 1) on the low potential side are connected to each other, and the terminal T1 of the equalizing unit U1 having the highest potential is Connected to the power supply, the terminal T3 of the equalizing unit Un having the lowest potential is grounded via the collector and emitter of an NPN bipolar transistor (switching element 24). Then, when the switching element 24 is turned on by the microcomputer 18, the equalization processing in the block by the equalization units U1 to Un is prohibited. On the other hand, a discharge signal is input from the microcomputer 18 to each terminal T2 of the equalization units U1 to Un, thereby instructing discharge of all cells in the block.

  FIG. 2A shows a circuit configuration of the equalization unit Ui. This figure shows an example in which the number of battery cells in each block is “4”.

  As shown in the figure, series connection bodies of resistors R1 to R4 and NPN bipolar transistors (discharge switches SW1 to SW4) are connected in parallel to the battery cells Ci1 to Ci4 constituting the block. The outputs of the OR circuits OR1 to OR4 are applied to the conduction control terminals (bases) of the discharge switches SW1 to SW4. As a result, the logical sum circuits OR1 to OR4 output a logic “H” signal, so that the discharge switches SW1 to SW4 are turned on, via the discharge circuit including the resistors R1 to R4 and the discharge switches SW1 to SW4. Battery cells Ci1-Ci4 are discharged.

  Each of the OR circuits OR1 to OR4 is a two-input circuit, and the terminal T2 is connected to one terminal thereof. As a result, by inputting a logic “H” signal via the terminal T2, all the discharge switches SW1 to SW4 are turned on, and all the battery cells Ci1 to Ci4 in the block are discharged. On the other hand, a battery cell having a higher voltage among the battery cells Ci1 to Ci4 in the block is connected to the other terminals of the OR circuits OR1 to OR4 in order to reduce variations in voltage of the battery cells Ci1 to Ci4 in the block. A signal for discharging is input. This is realized by a circuit described below.

  At both ends of the block (both ends of the series connection body of battery cells Ci1 to Ci4), a series connection body of resistors 31 to 34 equal in number to the number of battery cells constituting the block is connected in parallel. These resistors 31 to 34 are set to have the same resistance value. For this reason, the potential of the connection point of the resistors 31 to 34 is the connection point potential between the battery cells in the block (battery cells Ci2, Ci3, Ci4) that is assumed when the voltages of the battery cells Ci1 to Ci4 in the block are equal. Positive electrode potential).

  The connection point potential between the battery cells in the block (the positive potential of the battery cells Ci2, Ci3, Ci4) and the potential at the connection point of the corresponding resistors 31-34 are respectively the cell terminal C of the comparison circuit CMP and the divided voltage. Input to terminal R. The comparison circuit CMP includes a high voltage terminal H and a low voltage terminal L as output terminals. Then, as shown in FIG. 2B, when the potential of the cell terminal C is higher than the potential of the voltage dividing terminal R by a predetermined value Δ or more, the high voltage terminal H becomes logic “H”, and the cell terminal C Is lower than the potential of the voltage dividing terminal R by a predetermined value Δ or more, the low voltage terminal L becomes logic “L”.

  The output voltage of the low voltage terminal L having the highest potential in the comparison circuit CMP is applied to the OR circuit OR1 having the highest potential, and the output voltage of the high voltage terminal H having the lowest potential is the logical sum of the lowest potential. Applied to circuit OR4. Further, the output voltage of the logic circuit LC is applied to the intermediate OR circuits OR2 and OR3.

  The logic circuit LC receives the signals of a pair of adjacent comparison circuits CMP as inputs and generates an output signal. FIG. 2C shows a circuit configuration of the logic circuit LC. As illustrated, the logic circuit LC includes a logic inverting circuit 40 that logically inverts an output signal of the low voltage terminal L of the high potential side comparison circuit CMP, and an output of the low voltage terminal L of the low potential side comparison circuit CMP. A logical product circuit for generating a logical product signal of the signal and the output voltage of the logical inversion circuit. Further, a logic inversion circuit 44 that logically inverts the output signal of the high voltage terminal L of the comparison circuit CMP on the low potential side, an output signal of the high voltage terminal H of the comparison circuit CMP on the high potential side, and an output voltage of the logic inversion circuit 44. And a logical product circuit 46 for generating a logical product signal. Further, an OR circuit 48 for generating an OR signal of the output signals of these AND circuits 42 and 46 is provided.

  According to such a configuration, the logic circuit LC has the potential of the cell terminal C of the comparison circuit CMP on the low potential side higher than the potential of the voltage dividing terminal R by a predetermined value and the potential of the cell terminal C of the comparison circuit CMP on the high potential side. Becomes “H” when the voltage is not higher than the potential of the voltage dividing terminal R by a predetermined value or more. Further, the logic circuit LC is configured such that the potential of the cell terminal C of the comparison circuit CMP on the low potential side is not lower than the potential of the voltage dividing terminal R by a predetermined value or more, and the potential of the cell terminal C of the comparison circuit CMP on the high potential side is When the potential is lower than the potential of the voltage dividing terminal R by a predetermined level, the logic level is “H”.

  According to the equalization unit Ui having such a configuration, based on the comparison between the divided voltage value by the resistors 31 to 34 and the corresponding positive electrode potential without detecting the absolute value of the voltage of the battery cells Ci1 to Ci4 in the block. A cell having a high voltage can be selectively discharged.

  The terminals of the OR circuits OR1 to OR4 for inputting discharge commands for reducing the voltage variation in the block are connected to the negative side of the block through the diodes D1 to D4 and the phototransistor of the photocoupler PC, respectively. . In the photocoupler PC, a photodiode is connected between the terminal T1 and the terminal T3. Therefore, when the switching element 24 shown in FIG. 1 is turned on, the potentials of the terminals of the OR circuits OR1 to OR4 are forcibly set to logic “L”, and equalization within the block is performed. Processing is prohibited.

  By using the equalization unit Ui, the block not only reduces the voltage variation of the battery cells Ci1 to Ci4 in the block but also outputs a command signal to the terminal T2 of the equalization unit Ui corresponding to the high voltage block. It is also possible to reduce the voltage variation between them. At this time, when reducing the voltage variation of the battery cells in the block after reducing the variation of the block voltage, the problem as shown in FIG. 15 occurs. Therefore, in the present embodiment, after the voltage variation reducing process of the battery cells Ci1 to Ci4 in the block is completed, a process for reducing the voltage variation between the blocks is performed.

  FIG. 3 shows a procedure for determining whether or not the voltage variation reducing process in the block according to the present embodiment has been completed. This process is repeatedly executed by the microcomputer 18 at a predetermined cycle, for example.

  In this series of processing, first, in step S10, the block number is set to “1”. Here, the block number may be defined by attaching a smaller number in order from the block on the high potential side. In step S12, the previous block voltage Bi detected by the voltage detector 16 shown in FIG. 1 is set as the block voltage Bi0. In subsequent step S14, it is determined whether or not the state in which the previous block voltage Bi0 and the current block voltage Bi are equal continues for a predetermined period. This process is for determining whether or not the voltage variation reducing process of the battery cells Ci1 to Ci4 in the i-th block has been completed. That is, when the equalization unit Ui performs a process for reducing the voltage variation of the battery cells Ci1 to Ci4 in the block, it is considered that at least one battery cell is discharged, so that the block voltage also decreases. For this reason, if the block voltage does not change, none of the battery cells are discharged, and it is considered that the voltage equalization processing of the battery cells in the block has been completed.

  If an affirmative determination is made in step S14, the intra-block equalization completion flag Fi is set to “1” in step S16, and if a negative determination is made, the intra-block equalization completion flag Fi is set to “0” in step S18. When the processes of steps S16 and S18 are completed, the block number is increased by “1” in step S20. In step S22, it is determined whether or not the block number “i” is larger than the total number n of blocks. This process is for determining whether or not the equalization process has been completed for all blocks. If it is determined that the total number of blocks is less than n, the process returns to step S12. On the other hand, when it is determined that the total number is larger than n, the series of processes is temporarily terminated.

  FIG. 4 exemplifies a determination mode of completion of the process for reducing the voltage variation in the block. In FIG. 4, for convenience, the number of blocks is “3”, and the number of battery cells in the blocks is “4”. As shown in FIGS. 4B and 4C, since the voltage of the block 3 does not change, it can be determined that the process for reducing the voltage variation of the battery cells in the block 3 has been completed.

  FIG. 5 shows a procedure for the process of reducing the voltage variation of each of the battery cells C11 to Cnm of the assembled battery 10 according to the present embodiment. This process is repeated and executed by the microcomputer 18 at a predetermined cycle, for example.

In this series of processing, first, in step S30, it is determined whether or not the equalization execution condition is satisfied. Here, it is determined whether or not the current flowing through the assembled battery 10 is under a situation that is assumed to be equal to or lower than an upper limit value that does not cause voltage variation due to internal resistance. Specifically, for example, it may be determined whether or not at least one of the following conditions is satisfied.
a. Condition that the start switch 22 of the in-vehicle control device (microcomputer 18) is turned off: In this case, it is considered that the charge / discharge current of the assembled battery 10 will be very small or zero after that, so this condition may be adopted.
b. Main relays 12 and 14 off: When the main relays 12 and 14 are off, power is not exchanged between the assembled battery 10 and the power conversion circuit, so this may be adopted as a condition.
c. Condition that the detected value of the current flowing through the assembled battery 10 is equal to or less than the threshold value: Here, it is desirable to set the threshold value to be equal to or less than the upper limit value that does not make voltage variation due to internal resistance noticeable.

  If it is determined in step S30 that the execution condition is satisfied, it is determined in step S32 whether or not the process for reducing the voltage variation of the battery cells in the block has been completed. This process is a process for determining whether or not all of the intra-block equalization completion flags F1 to Fn are set to “1” in the process shown in FIG. If a negative determination is made in step S32, in step S34, the equalization units U1 to Un cause the voltage variation in the block to be reduced.

  On the other hand, if an affirmative determination is made in step S32, it is determined in step S36 whether or not the block equalization processing has been completed. This process determines whether or not the variation in the block voltage detected by the voltage detector 16 has become equal to or less than a predetermined value. If a negative determination is made in step S36, block equalization processing is performed in step S38. This process can be performed by outputting an all-cell discharge command signal to the terminal T2 of the equalization unit Ui corresponding to the high voltage block based on the detection result of the voltage detector 16.

  When the processes of steps S34 and S38 are completed, when a negative determination is made at step S30, and when an affirmative determination is made at step S36, the series of processes is temporarily ended.

  According to the embodiment described in detail above, the following effects can be obtained.

  (1) It is determined whether or not the process for reducing the voltage variation in the block has been completed based on the potential of the electrical path connected to the battery cell in the block. Reduction processing was performed. Thus, by using the potential of the electrical path connected to the battery cells in the block, it is possible to quickly and reliably determine whether or not the process for reducing the voltage variation in the block has been completed. For this reason, after the voltage variation reducing process in the block is actually completed, it is possible to quickly shift to the voltage variation reducing process between the blocks.

  (2) Based on the change in the detected voltage value of the block being equal to or less than a predetermined value, it is determined that the process for reducing the voltage variation in the block has been completed. Thereby, it is possible to appropriately determine whether or not the process for reducing the voltage variation in the block is completed.

(Second Embodiment)
Hereinafter, the second embodiment will be described with reference to the drawings with a focus on differences from the first embodiment.

  FIG. 6 shows a circuit configuration of the equalization unit Ui according to the present embodiment. In FIG. 6, members corresponding to those shown in FIG. 2 are given the same reference numerals for convenience.

  As shown in the figure, in this embodiment, among the OR circuits OR1 to OR4, the voltage of the terminal to which the discharge command signal for reducing the voltage variation in the block is input is input, and these OR signals are input. Is provided. The output signal of the OR circuit 50 is used as the in-block discharge signal BDS. This in-block discharge signal becomes logic “H” when a battery cell having a high voltage is discharged in order to reduce the voltage variation in the block, while the discharge for reducing the voltage variation in the block determines which battery. Logic “L” if not done for cell.

  FIG. 7 shows a procedure for determining whether or not the voltage variation reducing process in the block according to the present embodiment has been completed. This process is repeatedly executed by the microcomputer 18 at a predetermined cycle, for example. In FIG. 7, processes corresponding to the processes shown in FIG. 3 are given the same step numbers for convenience.

  In this series of processing, instead of step S14 shown in FIG. 3, the in-block discharge signal BDS output from the equalization unit Ui corresponding to the i-th block becomes logic “L” in step S14a. Based on this, the value of the in-block equalization completion flag Fi is determined.

  According to the present embodiment described above, in addition to the effect (1) of the first embodiment, the following effect can be obtained.

  (3) By using the in-block discharge signal BDS, it is possible to appropriately determine whether or not the processing for reducing the voltage variation in the block has been completed.

(Third embodiment)
Hereinafter, the third embodiment will be described with reference to the drawings with a focus on differences from the first embodiment.

  FIG. 8 shows a procedure for the process of reducing the voltage variation of each of the battery cells C11 to Cnm of the assembled battery 10 according to the present embodiment. This process is repeated and executed by the microcomputer 18 at a predetermined cycle, for example.

  In this series of processing, first, in step S40, it is determined whether or not the execution condition of the voltage variation reduction processing is satisfied. This execution condition is the same as the condition in step S30 of FIG. If it is determined that the execution condition is satisfied, the block number “i” is set to “1” in step S42, and the minimum value Bmin of the block voltage is set to the maximum value MAX assumed as the block voltage. Set. In a succeeding step S44, it is determined whether or not the intra-block equalization completion flag Fi of the i-th block is “1”. If an affirmative determination is made in step S44, in step S46, the i-th block is added to the voltage variation reduction processing target (equalization target block) between the blocks.

  In a succeeding step S48, it is determined whether or not the i-th block voltage Bi is smaller than the minimum value Bmin. If a positive determination is made in step S48, the minimum value Bmin is set as the block voltage Bi in step S50. This process is for specifying the minimum voltage of the equalization target blocks. When the process of step S50 is completed or when a negative determination is made in steps S44 and S48, the process proceeds to step S52. In step S52, it is determined whether or not the block number “i” is equal to or greater than the total number n of blocks. If a negative determination is made, the block number “i” is increased by “1” in step S54, and then the process returns to step S44.

  On the other hand, when an affirmative determination is made in step S52, it is determined in step S56 whether the number of equalization target blocks is “2” or more. This process is for determining whether or not to start a process for reducing voltage variations between equalization target blocks. If a positive determination is made in step S56, the voltage of the equalization target block is controlled to the minimum value Bmin in step S58. This process is based on the voltage detection result by the voltage detector 16 for the equalization target block, and discharges all the cells using the equalization unit Ui for those whose voltage is larger than the minimum value Bmin. Good.

  When the process of step S58 is completed or when a negative determination is made in steps S40 and S56, this series of processes is temporarily terminated.

  FIG. 9 illustrates a voltage variation reduction processing mode according to this embodiment. Also in FIG. 9, the number of blocks is “3”, and the number of battery cells in the block is “4”.

  As shown in FIG. 9A, when the process of reducing the voltage variation between the battery cells inside the blocks 2 and 3 has been completed, the voltage variation between the battery cells inside the block 1 is not yet achieved. Even if the reduction process is not completed, the process for reducing the voltage variation between the blocks 2 and 3 is executed. After that, as shown in FIG. 9B, when the voltage variation reduction processing between the battery cells in the block 1 is completed, the voltage variation reduction processing of the blocks 1 to 3 is started. Here, the final block voltage after completion of equalization is equal to or lower than the minimum voltage of these blocks when the process of reducing the voltage variation between the battery cells in the two or more blocks is completed. For this reason, according to the said process, the reduction process of the voltage variation between blocks can be started rapidly, without performing excessive discharge.

  In FIG. 10, the simulation result of the equalization process concerning this embodiment and the equalization process of the said patent document 2 is contrasted and shown. In FIG. 10, the number of blocks is “3”, and the number of battery cells in the block is “2”. In this simulation, the voltage is reduced by “0.1 V” by discharging during one step.

  As shown in the figure, when the process of reducing the voltage variation within the block is performed for a certain period of time as in the conventional method, the process of reducing the voltage dispersion between the blocks is started promptly when the voltage variation of the block is reduced. Can not be done, and equalization will be prolonged. On the other hand, according to this embodiment, the process for reducing the voltage variation between the blocks can be started quickly, and the equalization process can be completed quickly.

  According to this embodiment described above, the following effects can be obtained in addition to the effects of the first embodiment.

  (4) When the process for reducing the voltage variation in the block is completed for two or more blocks, the process for reducing the voltage variation between these blocks is performed only between the blocks for which the reduction process is completed. Thereby, the process for reducing the voltage variation between the blocks can be quickly started, and as a result, the time required for the process for reducing the voltage variation of the unit batteries constituting the assembled battery can be further shortened.

(Fourth embodiment)
Hereinafter, the fourth embodiment will be described with reference to the drawings with a focus on differences from the first embodiment.

  FIG. 11 shows the procedure of the process for reducing the voltage variation of each of the battery cells C11 to Cnm of the assembled battery 10 according to this embodiment. This process is repeated and executed by the microcomputer 18 at a predetermined cycle, for example. In FIG. 11, processes corresponding to the processes shown in FIG. 8 are given the same reference numerals for convenience.

  In this series of processing, when a negative determination is made in step S44, the process proceeds to step S48 to specify the minimum voltage of all the blocks constituting the assembled battery 10 as the minimum value Bmin. If there is at least one block (equalization target block) for which the process for reducing voltage variation in the block has been completed, this is controlled to the minimum value Bmin (step S58a).

  FIG. 12 shows a voltage variation reduction processing mode according to this embodiment. As shown in FIG. 12, the discharge processing of all the battery cells in the block from the block (here, blocks 1 and 3) in which the voltage variation reduction processing in the block has been completed using the minimum value Bmin of the block voltage as a target value. I do. Here, the voltage of each block when the voltage variation reducing process of the assembled battery 10 is completed should be equal to or less than the minimum value Bmin. For this reason, even if such a process is performed, excessive discharge can be avoided.

  FIG. 13 shows a comparison between simulation results of the equalization process according to the present embodiment, the equalization process according to the third embodiment, and the equalization process described in Patent Document 2. Also in FIG. 13, the number of blocks is “3”, and the number of battery cells in the block is “2”. In this simulation as well, the voltage is reduced by “0.1 V” by discharging for one step.

  As shown in the figure, in the present embodiment, the discharge process in units of blocks can be started more quickly than in the previous fourth embodiment, so that the time required for the equalization process can be further shortened.

  According to this embodiment described above, the following effects can be obtained in addition to the effects of the first embodiment.

  (5) The discharge control from the block in which the voltage variation reduction process in the block was completed to the minimum value Bmin of the voltage of the block constituting the assembled battery 10 was performed. Thereby, the time required for the process of reducing the voltage variation of the unit batteries constituting the assembled battery 10 can be further shortened.

(Fifth embodiment)
Hereinafter, the fifth embodiment will be described with reference to the drawings with a focus on differences from the second embodiment.

  In the present embodiment, a diagnosis process for the presence / absence of an abnormality in the capacity adjusting device is also performed.

  FIG. 14 shows the principle of abnormality diagnosis according to this embodiment.

  As shown in the figure, in the present embodiment, the interblock discharge signal output from the microcomputer 18 to the terminals T2 of the equalization units U1 to Un, the intrablock discharge signal BDS, and the detected value of the block voltage by the voltage detector 16 are illustrated. Based on the above, the presence or absence of abnormality is determined.

  Specifically, when the block voltage does not change even though the inter-block discharge signal is off and the intra-block discharge signal BDS is on, the discharge switches SW1 to SW4 and the resistors R1 to R4 are turned on. Disconnection of the discharge circuit provided, abnormality of the voltage detector 16, abnormal output of the in-block discharge signal (abnormal output of the prohibition signal of the equalizing discharge process by the switching element 24), abnormalities in which the discharge switches SW1 to SW4 are always open ( It is determined that at least one of (open adhesion abnormality) has occurred. That is, when the in-block discharge signal BDS is on, at least one battery cell Cij should be discharged, and the block voltage including this should decrease. Nevertheless, the block voltage does not decrease. It is considered that at least one of the abnormality in the block voltage detection system and the abnormality in the discharge processing system has occurred.

  In contrast, when the block voltage changes when the inter-block discharge signal is off and the intra-block discharge signal BDS is on, or when the inter-block discharge signal is off and the intra-block discharge signal BDS is off If the block voltage does not change when it is, it is determined that it is normal.

  If the block voltage changes even though the inter-block discharge signal is off and the intra-block discharge signal BDS is off, the voltage detector 16 is abnormal and the intra-block discharge signal BDS is abnormal. Then, it is determined that at least one of the abnormalities in which the discharge switches SW1 to SW4 are normally closed (closed fixing abnormality) has occurred. That is, when both of the above are off, since the battery cells Cij should not be discharged, the block voltage should not change. Nevertheless, it is considered that the block voltage changes at least one of whether there is an abnormality in the block voltage detection system or an abnormality in the discharge processing system.

  Further, when the block voltage does not change even though the inter-block discharge signal is on and the intra-block discharge signal BDS is off, the discharge circuit includes the discharge switches SW1 to SW4 and the resistors R1 to R4. It is determined that at least one of the disconnection, the abnormality of the voltage detector 16, the abnormality in which the discharge switches SW1 to SW4 are normally open (open fixation abnormality), and the output abnormality of the inter-block discharge signal has occurred. That is, when the inter-block discharge signal is on, the block voltage should be lowered because the block should be discharged. Nevertheless, the block voltage does not decrease. It is considered that at least one of the abnormality in the block voltage detection system and the abnormality in the discharge processing system has occurred.

  On the other hand, when the block voltage changes when the inter-block discharge signal is on and the intra-block discharge signal BDS is off, it is determined that it is normal.

(Other embodiments)
Each of the above embodiments may be modified as follows.

  The previous third and fourth embodiments may be modified according to the modification of the second embodiment with respect to the first embodiment.

  In the previous third embodiment, when the voltage variation reduction processing within a block is completed for two or more blocks, the voltage variation reduction processing between the blocks is performed for these blocks, but this is not restrictive. . For example, when the voltage variation reducing process in the block is completed for three or more blocks, the voltage variation reducing process between the blocks may be performed on these blocks.

  In the previous fourth embodiment, when the voltage variation reduction processing within one block is completed for one or more blocks, the voltage variation reduction processing between the blocks is performed for these, but this is not restrictive. . For example, when the voltage variation reducing process in the block is completed for two or more blocks, the voltage variation reducing process between the blocks may be performed on these blocks.

  In the fifth embodiment, for example, for the discharge processing of a specific block or a battery cell in the specific block, when it is determined that the voltage detector 16 is not abnormal due to a decrease in the block voltage, another block Even when it is determined that there is an abnormality during the discharge process, the possibility of abnormality of the voltage detector 16 may be excluded.

  The determination means for determining whether or not the process for reducing the voltage variation of the battery cells in the block has been completed is not limited to those exemplified in the above embodiments. For example, there may be provided means for detecting the voltage of each battery cell, and means for making the above determination based on the degree of variation quantified from the detected value of the voltage of each battery cell. Further, for example, there may be provided means for detecting the change amount of the voltage of each battery cell, and means for making the above determination based on the detected value of each change amount.

  The means for outputting a signal corresponding to the open / close state of a loop circuit configured to include a discharge circuit connected in parallel to the battery cell Cij and the battery cell Cij is not limited to that shown in FIG. For example, it may be a means for outputting a logical sum signal of the output signals of the logical sum circuits OR1 to OR4.

  The means for determining whether or not the discharge process is performed by the equalization unit Ui is not limited to that shown in FIG. For example, it may be a means for making the above determination based on the detected value of the current flowing through the discharge resistors R1 to R4 and the discharge switches SW1 to SW4. Here, when the detected current value is not zero, it is possible to obtain information that the voltage is high, and as a result, it is possible to determine that the voltage variation reducing process in the block is not yet completed.

  -The block equalization means for reducing the voltage variation between the blocks is not limited to those exemplified in the above embodiments. For example, what is described in the said patent document 1 may be used. Further, for example, the equalization means between blocks may be configured by including the comparison circuit CMP, the logic circuit LC, the discharge resistors R1 to R4, the discharge switches SW1 to SW4, and the like, as in the circuit for equalization within the block. .

  In each of the above embodiments, the means (microcomputer 18) for instructing the execution of the equalization processing within the blocks and the equalization processing between the blocks is provided in the in-vehicle low-voltage system insulated from the in-vehicle high-voltage system. Not exclusively.

  The number of battery cells Cij constituting the block is not limited to four, and may be any number of two or more.

  In each of the above embodiments, the present invention is applied to equalize the voltages of the battery cells Cij constituting the assembled battery 10, but the present invention is not limited to this. For example, a plurality of adjacent battery cells may be used as unit batteries, and the present invention may be applied to equalize the voltages of these unit batteries.

  The battery cell is not limited to a lithium secondary battery but may be a nickel hydride secondary battery, for example.

  In each of the above-described embodiments, the present invention is applied to the assembled battery mounted on the hybrid vehicle. However, the present invention is not limited thereto, and may be applied to, for example, a battery mounted on an electric vehicle.

The system configuration figure of a 1st embodiment. The circuit diagram which shows the circuit structure of the equalization unit concerning the embodiment. 6 is a flowchart showing a procedure of determination processing for determining whether or not equalization is completed in a block according to the embodiment; The figure which shows the judgment aspect of the presence or absence of the completion of equalization in the block of the embodiment. The flowchart which shows the procedure of the equalization discharge process concerning the embodiment. The circuit diagram which shows the circuit structure of the equalization unit concerning 2nd Embodiment. 6 is a flowchart showing a procedure of determination processing for determining whether or not equalization is completed in a block according to the embodiment; The flowchart which shows the procedure of the equalization discharge process concerning 3rd Embodiment. The figure which shows the effect of the same embodiment. The figure which shows the effect of the same embodiment. The flowchart which shows the procedure of the equalization discharge process concerning 4th Embodiment. The figure which shows the effect of the same embodiment. The figure which shows the effect of the same embodiment. The figure which shows the abnormality diagnosis process aspect of 5th Embodiment. The figure which shows the problem of a prior art.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Battery pack, 18 ... Microcomputer, U1-Un ... Equalization unit, C11-Cnm ... Battery cell.

Claims (15)

In an assembled battery capacity adjusting device for equalizing the capacity of unit batteries which are one or a plurality of adjacent battery cells constituting an assembled battery as a series connection body of a plurality of battery cells,
And block equalizing means for reducing the voltage variation by discharging the ones for each plurality of the unit batteries adjacent high voltage among the unit cells in the block that are grouped as respective separate blocks,
A determination means for determining whether or not the process for reducing voltage variation by the equalization means in the block is completed based on at least one of a potential and a current of an electrical path connected to the unit battery in the block;
When it is determined by the determining means that the voltage variation reducing process by the intra-block equalizing means has been completed, the voltage variation is reduced by discharging the high voltage block among the blocks constituting the assembled battery. Means for equalizing between blocks ,
Detecting means for detecting the voltage of the block;
If the block voltage detected by the detection unit does not change during the execution command of the block voltage variation reduction process by the inter-block equalization unit, an abnormality has occurred in at least one of the inter-block equalization unit and the detection unit. An abnormality judging means for judging that there is,
A capacity adjustment device for a battery pack, comprising: Before Symbol block equalizing means comprises said a discharge circuit connected in parallel to each unit cell, and output means for outputting a signal corresponding to the opening and closing state of the loop circuit including the discharge circuit, wherein the unit batteries and the corresponding ,
If the block voltage detected by the detection means does not change despite the output means outputting a signal indicating that at least one loop circuit is closed, the intra-block equalization means, output means and a battery pack capacity adjusting device according to claim 1, further comprising an abnormality determining means for determining that at least one is wrong the detecting means. In an assembled battery capacity adjusting device for equalizing the capacity of unit batteries which are one or a plurality of adjacent battery cells constituting an assembled battery as a series connection body of a plurality of battery cells,
In-block equalization means for reducing voltage variation by discharging high voltage among unit cells in a block grouped as separate blocks for each of a plurality of adjacent unit cells,
A determination means for determining whether or not the process for reducing voltage variation by the equalization means in the block is completed based on at least one of a potential and a current of an electrical path connected to the unit battery in the block;
When it is determined by the determining means that the voltage variation reducing process by the intra-block equalizing means has been completed, the voltage variation is reduced by discharging the high voltage block among the blocks constituting the assembled battery. Means for equalizing between blocks,
Detecting means for detecting the voltage of the block,
The in-block equalization means includes a discharge circuit connected in parallel to each unit battery, and an output means for outputting a signal corresponding to the open / close state of a loop circuit including the unit battery and the corresponding discharge circuit,
If the block voltage detected by the detection means does not change despite the output means outputting a signal indicating that at least one loop circuit is closed, the intra-block equalization means, An assembled battery capacity adjusting apparatus, further comprising: an abnormality determining means for determining that at least one of the output means and the detecting means is abnormal. Before Symbol block equalizing means comprises said a discharge circuit connected in parallel to each unit cell, and output means for outputting a signal corresponding to the opening and closing state of the loop circuit including the discharge circuit, wherein the unit batteries and the corresponding ,
Detected by the detecting means even though the output means outputs a signal indicating that all of the loop circuit is in an open state and the block voltage variation reducing process is not being executed by the inter-block equalizing means. when the block voltages change to be, the block equalizing means, according to claim 1 to 3, characterized by further comprising an abnormality judging means for judging that there is abnormality in at least one of said output means and said detecting means The capacity adjustment apparatus of the assembled battery of any one of Claims. In an assembled battery capacity adjusting device for equalizing the capacity of unit batteries which are one or a plurality of adjacent battery cells constituting an assembled battery as a series connection body of a plurality of battery cells,
In-block equalization means for reducing voltage variation by discharging high voltage among unit cells in a block grouped as separate blocks for each of a plurality of adjacent unit cells,
A determination means for determining whether or not the process for reducing voltage variation by the equalization means in the block is completed based on at least one of a potential and a current of an electrical path connected to the unit battery in the block;
When it is determined by the determining means that the voltage variation reducing process by the intra-block equalizing means has been completed, the voltage variation is reduced by discharging the high voltage block among the blocks constituting the assembled battery. Means for equalizing between blocks,
Detecting means for detecting the voltage of the block,
The in-block equalization means includes a discharge circuit connected in parallel to each unit battery, and an output means for outputting a signal corresponding to the open / close state of a loop circuit including the unit battery and the corresponding discharge circuit,
Detected by the detecting means even though the output means outputs a signal indicating that all of the loop circuit is in an open state and the block voltage variation reducing process is not being executed by the inter-block equalizing means. The battery pack capacity adjustment device further comprising: an abnormality determination unit that determines that at least one of the intra-block equalization unit, the output unit, and the detection unit is abnormal when the block voltage to be changed changes . The inter-block equalizing unit reduces the voltage variation between the blocks constituting the assembled battery when the voltage variation reducing process by the intra-block equalizing unit is completed for all the blocks constituting the assembled battery. The assembled battery capacity adjusting device according to any one of claims 1 to 5 , characterized in that the processing is performed. The inter-block equalization means performs the reduction process when the voltage variation reduction process by the intra-block equalization means is completed for a predetermined plurality of blocks smaller than the total number of blocks constituting the assembled battery. The assembled battery capacity adjusting device according to any one of claims 1 to 5 , wherein a process of reducing a variation in voltage between these blocks is performed only between completed blocks. In an assembled battery capacity adjusting device for equalizing the capacity of unit batteries which are one or a plurality of adjacent battery cells constituting an assembled battery as a series connection body of a plurality of battery cells,
In-block equalization means for reducing voltage variation by discharging high voltage among unit cells in a block grouped as separate blocks for each of a plurality of adjacent unit cells,
A determination means for determining whether or not the process for reducing voltage variation by the equalization means in the block is completed based on at least one of a potential and a current of an electrical path connected to the unit battery in the block;
When it is determined by the determining means that the voltage variation reducing process by the intra-block equalizing means has been completed, the voltage variation is reduced by discharging the high voltage block among the blocks constituting the assembled battery. And a block equalizing means for performing
The inter-block equalization means performs the reduction process when the voltage variation reduction process by the intra-block equalization means is completed for a predetermined plurality of blocks smaller than the total number of blocks constituting the assembled battery. A battery pack capacity adjustment device that performs a process of reducing variations in voltage between these blocks only between completed blocks. The inter-block equalization means completes the reduction process when the voltage variation reduction process by the intra-block equalization means is completed for a predetermined number of blocks smaller than the total number of blocks constituting the assembled battery. battery pack capacity adjustment apparatus according to any one of claims 1 to 5, characterized in that discharging the voltage of the block to the target value determined from the minimum value of the voltage of the block constituting the battery pack. In an assembled battery capacity adjusting device for equalizing the capacity of unit batteries which are one or a plurality of adjacent battery cells constituting an assembled battery as a series connection body of a plurality of battery cells,
In-block equalization means for reducing voltage variation by discharging high voltage among unit cells in a block grouped as separate blocks for each of a plurality of adjacent unit cells,
A determination means for determining whether or not the process for reducing voltage variation by the equalization means in the block is completed based on at least one of a potential and a current of an electrical path connected to the unit battery in the block;
When it is determined by the determining means that the voltage variation reducing process by the intra-block equalizing means has been completed, the voltage variation is reduced by discharging the high voltage block among the blocks constituting the assembled battery. And a block equalizing means for performing
The inter-block equalization means completes the reduction process when the voltage variation reduction process by the intra-block equalization means is completed for a predetermined number of blocks smaller than the total number of blocks constituting the assembled battery. An assembled battery capacity adjusting device, wherein the block voltage is discharged to a target value determined from a minimum voltage value of the blocks constituting the assembled battery. Said determining means is input with the potential across the block, any one of claims 1 to 10, characterized in that determining whether reduction processing of the voltage variation by the block equalizing means has completed 1 The capacity adjustment apparatus of the assembled battery as described in the item . The determining means determines whether or not the voltage variation reducing process by the intra-block equalizing means is completed based on a change in the voltage of the unit battery in the block to be equalized by the intra-block equalizing means. The capacity adjustment apparatus for an assembled battery according to any one of claims 1 to 11, wherein 2. The determination unit according to claim 1, wherein the determination unit determines that the reduction process has been completed based on a change in a detected voltage value of a block to be equalized by the equalization unit within a block being equal to or less than a predetermined value. battery pack capacity adjustment apparatus according to any one of 1-12. The in-block equalizing means is means for discharging a unit battery having a high voltage using an electric path connected to both ends of the unit battery in the target block as an input line,
The assembled battery capacity adjustment apparatus according to any one of claims 1 to 11, wherein the determination unit is a unit that determines whether or not the discharge process is performed by the intra-block equalization unit. The in-block equalization means includes a discharge circuit connected in parallel to each unit battery, and an output means for outputting a signal corresponding to the open / close state of a loop circuit including the unit battery and the corresponding discharge circuit,
The determination means outputs, from the output means, a signal indicating that the loop circuit including the unit battery and the corresponding discharge circuit has been opened for all the unit batteries in the block to be determined. 15. The battery pack capacity adjustment device according to claim 1, wherein it is determined that the voltage variation reduction processing by the intra-block equalizing means has been completed based on the above.

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