JP5182252B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a semiconductor device including a bipolar transistor and a manufacturing method thereof.

  2. Description of the Related Art Conventionally, a bipolar transistor has been developed in which a base extraction layer and a substrate portion serving as a collector are electrically connected directly.

  In recent years, in order to meet the demand for further miniaturization and higher performance of bipolar transistors, a method of forming the base material by non-selective epitaxial growth using SiGe and / or SiGeC as a base material has been devised. Yes.

  In addition, a SiGe-HBT (heterojunction bipolar transistor) manufacturing method is generally a method in which a SiGe epitaxial film is grown on a Si substrate and polycrystalline SiGe is grown on an insulating film by a non-selective epitaxial method. It has been adopted.

Japanese Patent Laid-Open No. 5-62991 Japanese Patent Laid-Open No. 10-125691 JP-A-11-126781

  However, if a non-selective epitaxial growth method is used when forming the base of the bipolar transistor, the connection with the emitter becomes unstable, and a serious problem that the transistor does not function may occur. In such a case, the reliability is lowered.

  In SiGe-HBT, SiGe on the insulating film is used as a lead-out wiring to the base electrode. However, the film thickness is insufficient and the resistance cannot be lowered under normal growth conditions. For this reason, in the portion where the base electrode is formed, it is necessary to reduce the resistance by stacking the SiGe with a Si film or the like. For this reason, a manufacturing process will increase.

  The present invention has been made in view of such a problem, and even if a semiconductor layer is formed by a non-selective epitaxial method, a semiconductor that can reliably connect an emitter and a base to ensure high reliability. A first object is to provide a device and a method for manufacturing the same, and a second object is to provide a semiconductor device and a method for manufacturing the same that can manufacture a device having a low base resistance with a small number of steps.

  As a result of intensive studies, the inventor of the present application has difficulty in controlling the thickness of the polycrystalline film of the base leading layer and the thickness of the single crystal layer of the base layer independently of each other in the conventional manufacturing method. For this reason, it has been found that the polycrystalline film of the base lead layer is too thick causing the connection between the base and the emitter to become unstable. That is, in the conventional method, as shown in FIG. 1, the collector 102 is formed on the surface of the semiconductor substrate 101, and then the insulating film 103 and the polycrystalline silicon film 106 are formed, and the base opening is formed in these, A base layer 109 that also serves as a base lead layer is formed in the inside, but the thickness of the side wall portion of the base layer 109 (thickness in the direction perpendicular to the wall surface) becomes too large. At the time of formation, a sufficient opening is not formed in the insulating film 113a which is the material, and the base layer 109 and the emitter 114 are not connected.

  The present inventor found the cause of the problems of the prior art, and as a result of further diligent investigation, as a result of using SiGe or the like for the base layer and epitaxially growing it, the film forming temperature and the source It has been conceived that the growth rate at the bottom and sides of the semiconductor layer grown in the base opening can be controlled independently of each other by adjusting the gas amount and the like.

  The inventors of the present application have come up with the following aspects of the invention based on these views.

The first method for manufacturing a semiconductor device according to the present invention is directed to a method for manufacturing a semiconductor device including a bipolar transistor. In this manufacturing method, first, a collector is formed on the surface of a semiconductor substrate, an insulating film is formed on the semiconductor substrate, and then a conductive film is formed on the insulating film. However, either the collector formation or the insulating film formation may be performed first. Next, an opening exposing at least a part of the collector is formed in the insulating film and the conductive film, and the collector and the conductive film are connected in the opening by non-selective epitaxial growth. A semiconductor film of at least one film selected from the group consisting of a crystal film and a SiGeC mixed crystal film is formed. Next, an emitter is formed on the semiconductor film. When forming the semiconductor film, the portion of the semiconductor film that contacts the collector is single crystal, the portion that contacts the conductive film is polycrystalline, and the thickness of the semiconductor film at the portion that contacts the conductive film is The thickness of the portion of the semiconductor film in contact with the collector is 1 to 2 times the film thickness. Further, when forming the semiconductor film, the growth rate of the polycrystal is set to 1.8 times or less of the growth rate of the single crystal.

The second method for manufacturing a semiconductor device according to the present invention is directed to a method for manufacturing a semiconductor device including a bipolar transistor. In this manufacturing method, first, a collector is formed on the surface of a semiconductor substrate, and an insulating film having an opening formed in a portion aligned with the collector is formed on the semiconductor substrate. Then, the non-selective epitaxial growth, said to contact the opening in the collector, a base made of a single crystal, a film of one layer with a thick base contact layer than the base thickness on the insulating film A semiconductor film is formed, and an emitter is formed on the base of the semiconductor film.

  According to the present invention, in the semiconductor film, the portion in contact with the collector is single crystal, the portion in contact with the conductive film is polycrystalline, and the thickness of the portion in contact with the conductive film is 1 to 1 of the thickness of the portion in contact with the collector. By doubling, even if the type of the substrate changes and the shape or area of the base changes, the connection between the base and the emitter can be reliably ensured. Accordingly, transistor characteristics can be stabilized and variations in characteristics can be reduced.

  Similarly, with respect to the semiconductor film, the portion in contact with the collector is made of a single crystal, and the film thickness of the portion on the insulating film is made of one layer thicker than the thickness of the portion in contact with the collector, so that the resistance in the base lead layer is increased. It is possible to reduce the number of manufacturing steps while keeping the value low.

It is sectional drawing which shows the semiconductor device provided with the conventional bipolar transistor. It is a graph which shows the relationship between the position in a bipolar transistor, energy, and Ge density | concentration. It is a graph which shows the relationship between the Ge density | concentration of an epitaxial film, and the ratio of a growth rate when changing the growth temperature of an epitaxial film. When changing the flow rate of SiH _4, it is a graph showing the relationship between the Ge concentration and the ratio of the growth rate of the epitaxial film. It is sectional drawing which shows the manufacturing method of the bipolar transistor (semiconductor device) which concerns on the 1st Embodiment of this invention. Similarly, it is sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on the 1st Embodiment of this invention, and is a figure which shows the next process of the process shown in FIG. Similarly, it is sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on the 1st Embodiment of this invention, and is a figure which shows the next process of the process shown in FIG. Similarly, it is sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on the 1st Embodiment of this invention, and is a figure which shows the next process of the process shown in FIG. Similarly, it is sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on the 1st Embodiment of this invention, and is a figure which shows the next process of the process shown in FIG. Similarly, it is sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on the 1st Embodiment of this invention, and is a figure which shows the next process of the process shown in FIG. Similarly, it is sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on the 1st Embodiment of this invention, and is a figure which shows the next process of the process shown in FIG. Similarly, it is sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on the 1st Embodiment of this invention, and is a figure which shows the next process of the process shown in FIG. Similarly, it is sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on the 1st Embodiment of this invention, and is a figure which shows the next process of the process shown in FIG. Similarly, it is a cross-sectional view showing the method for manufacturing the bipolar transistor according to the first exemplary embodiment of the present invention, and is a diagram showing a step subsequent to the step shown in FIG. Similarly, it is sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on the 1st Embodiment of this invention, and is a figure which shows the next | following process of the process shown in FIG. Similarly, it is sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on the 1st Embodiment of this invention, and is a figure which shows the next process of the process shown in FIG. It is sectional drawing which shows the manufacturing method of the bipolar transistor (semiconductor device) which concerns on the 2nd Embodiment of this invention. Similarly, it is sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on the 2nd Embodiment of this invention, and is a figure which shows the next process of the process shown in FIG. Similarly, it is sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on the 2nd Embodiment of this invention, and is a figure which shows the next process of the process shown in FIG. Similarly, it is sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on the 2nd Embodiment of this invention, and is a figure which shows the next process of the process shown in FIG. Similarly, it is sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on the 2nd Embodiment of this invention, and is a figure which shows the next process of the process shown in FIG.

  Hereinafter, a semiconductor device and a manufacturing method thereof according to embodiments of the present invention will be specifically described with reference to the accompanying drawings.

-Basic principle of the present invention-
First, the basic principle of the present invention will be described. Non-selective epitaxial growth is a method in which a single crystal semiconductor substrate such as a Si substrate is provided with a region where the surface is exposed and a region where the surface is not exposed using an insulating film or the like, so that the surface of the semiconductor substrate is exposed. In this method, a single crystal film is grown in a region where the surface of the semiconductor substrate is not exposed, and a polycrystalline or amorphous film is grown in a region where the surface of the semiconductor substrate is not exposed.

  On the other hand, the selective epitaxial growth method is a method in which a single crystal film is grown only in a region where the surface of a single crystal semiconductor substrate such as a Si substrate is exposed, and in a region where the surface of the semiconductor substrate is not exposed. A method in which a film is not grown.

  Here, regarding the non-selective epitaxial growth conditions targeted by the present invention, a condition for growing a polycrystalline film and a condition for growing an amorphous film in a region where a semiconductor substrate such as a Si substrate is not exposed. The difference will be described. Here, for convenience, a method of growing a Si film on a single crystal Si substrate by non-selective epitaxial growth will be described as an example.

  When a polycrystalline film grows on an insulating film having no crystal information (amorphous), first, crystal nuclei serving as nuclei of crystal information are formed on the insulating film. Thereafter, a large number of crystal grains are formed based on this crystal nucleus, and a polycrystalline film grows. The mechanism by which crystal nuclei are formed is not clear, but in order for crystal nuclei to grow, it is necessary to migrate sufficiently on the insulating film after the deposited species have jumped onto the insulating film.

  On the other hand, when an amorphous film grows on an insulating film (amorphous) having no crystal information, the amorphous film grows disorderly, so that the formation of crystal nuclei is not required. For this reason, the deposited species grows without migration or desorption on the insulating film.

  In general, the rate-determining step of crystal growth in the thermal CVD (Chemical Vapor Deposition) method is classified into two, ie, reaction rate-limiting and supply rate-limiting.

  Then, under the reaction rate control, when growing a polycrystalline film, the growth temperature may be raised, and when growing an amorphous film, the growth temperature may be lowered.

On the other hand, under a supply rate-limiting condition, it is possible to select whether to grow a polycrystalline film or an amorphous film by controlling the amount of the raw material. Specifically, when growing a polycrystalline film, the amount of Si as a raw material is reduced, and when growing an amorphous film, the amount of Si may be increased. For example, SiH ₄ may be used as a raw material when growing a polycrystalline film, and Si ₂ H ₆ may be used when growing an amorphous film.

  However, since non-selective epitaxial growth is based on the premise that a single crystal film is grown on a Si substrate, the growth is higher than that of growing a polycrystalline film or an amorphous film on an insulating film alone. The range of conditions will be limited.

  In the above description, non-selective epitaxial growth of Si is taken as an example, but in the case of a SiGe mixed crystal, it is possible to selectively grow a polycrystalline film and an amorphous film by substantially the same method. It is. However, in the case of SiGe, it is generally known that the temperature for crystallization is lowered by adding Ge to Si, and the conditions for the temperature and gas pressure for polycrystallization are the same as non-selective epitaxial growth of Si. So, strictly speaking, it is different.

  In general, in a batch growth apparatus, growth is often performed under reaction-controlled conditions from the viewpoint of film thickness uniformity at the position in the furnace. On the other hand, in a single wafer growth apparatus, from the viewpoint of throughput, growth is often performed under supply-limited conditions.

  Here, in the non-selective epitaxial growth method, it is theoretically difficult to form an epitaxial film (single crystal film) and an amorphous film at the same time under a reaction-controlled condition. On the other hand, under a supply rate-limiting condition, an epitaxial film (single crystal film) and an amorphous film can be formed simultaneously by selecting growth conditions. Therefore, the present invention exerts its effect when an epitaxial film (single crystal film) and a polycrystalline film or an amorphous film are grown simultaneously by a non-selective epitaxial growth method under supply-limited conditions.

  In SiGe-HBT, the base layer is formed of a SiGe mixed crystal. At this time, for the purpose of accelerating the traveling speed of electrons in the base layer by continuously changing the band gap, the base layer is made to have a gradient in the Ge concentration as shown in FIGS. There are many cases to design.

In general, the SiH ₄ gas and the GeH ₄ gas are controlled when the Ge concentration of the base layer is inclined by controlling the flow rate ratio of the Ge source gas and the Si source gas from the gas supply unit of the CVD thin film apparatus. Is called.

  While such a base layer is being formed, the inventor of the present application formed a SiGe epitaxial film (single crystal film) as a base layer by non-selective epitaxial growth as a result of intensive studies as described above. At the same time, when a polycrystalline film or an amorphous film is formed on the insulating film, the conditions such as the Ge profile, growth temperature, source gas flow rate, etc. of the SiGe epitaxial film serving as the base layer are controlled. It has been found that the growth rate and film quality (polycrystalline or amorphous) of the film formed in (1) can be controlled independently of the growth rate and film quality of the epitaxial film.

FIG. 3 is a graph showing the relationship between the Ge concentration of the epitaxial film and the growth rate ratio when the growth temperature of the epitaxial film is changed. FIG. 4 is a graph showing the relationship between the flow rate of SiH ₄ . It is a graph which shows the relationship between Ge density | concentration of an epitaxial film, and ratio of a growth rate. Here, the ratio of the growth rates in FIGS. 3 and 4 indicates the ratio between the growth rate of the polycrystalline film or the amorphous film and the growth rate of the epitaxial film. The GeH ₄ flow rate is changed so as to change. Further, the polycrystalline film and the amorphous film grew on the upper side of the broken line in FIGS. 3 and 4, and only the polycrystalline film grew on the lower side.

As can be seen from FIGS. 3 and 4, the growth rate of the polycrystalline film or the amorphous film can be independently changed by changing the growth temperature or the amount of source gas (SiH ₄ ). In particular, when an amorphous film is grown, it can be seen that the growth rate ratio with respect to the growth rate of the epitaxial film can be increased. The epitaxial film grew as a single crystal within the range shown in FIGS.

That is, as shown in FIG. 3, as the growth temperature is lowered, the desorption of the deposited species is suppressed, the adsorption reaction is promoted, and the growth rate of the polycrystalline film or the amorphous film on the insulating film is increased. did. Further, as shown in FIG. 4, as the flow rate of the source gas (SiH ₄ ) increases, the desorption of the deposited species is suppressed and the adsorption reaction is promoted, so that a polycrystalline film or an amorphous film on the insulating film is obtained. The growth rate of increased. Further, according to FIGS. 3 and 4, the polycrystalline film can be grown without growing the amorphous portion by setting the growth rate of the polycrystal to 1.8 times or less of the growth rate of the single crystal. Is possible.

  The present invention has been made on the basis of such earnest research and experimental results, and is directed to a semiconductor device including a bipolar transistor in which a base, an emitter, and a collector are formed on a semiconductor substrate.

-Specific embodiment of the present invention-
Next, specific embodiments of the present invention will be described with reference to the accompanying drawings.

(First embodiment)
First, a first embodiment of the present invention will be described. In the first embodiment, an npn-type bipolar transistor is illustrated, and its configuration will be described together with a manufacturing method for convenience. 5 to 16 are cross-sectional views showing a method of manufacturing a bipolar transistor (semiconductor device) according to the first embodiment of the present invention in the order of steps.

To manufacture this bipolar transistor, first, as shown in FIG. 5, an n-type impurity, here phosphorus, is dosed in a region where a collector of the surface layer of a semiconductor substrate 1 such as a p-type silicon substrate is to be formed. Ions are implanted under the conditions of 1 × 10 ¹⁴ / cm ² and acceleration energy of 300 keV to form the n ⁺ diffusion region 2. This n ⁺ diffusion region 2 functions as a collector.

  Subsequently, the field oxide film 3 is formed in the element isolation region of the semiconductor substrate 1 by a so-called LOCOS method to partition the active region 4.

Thereafter, as shown in FIG. 6, a silicon oxide film 5 is formed on the entire surface by CVD. The thickness of the silicon oxide film 5 is, for example, 30 nm to 100 nm. Note that the field oxide film 3 and the silicon oxide film 5 may be formed before the n ⁺ diffusion region 2 is formed.

  Next, as shown in FIG. 7, after the polycrystalline silicon film 6 is formed on the silicon oxide film 5 by, for example, the CVD method, the silicon oxide film 7 is further formed thereon by, for example, the CVD method. The thickness of the silicon oxide film 7 is, for example, 300 nm to 700 nm.

Subsequently, as shown in FIG. 8, a region where a base of a multilayer film composed of the silicon oxide film 5, the polycrystalline silicon film 6 and the silicon oxide film 7 is to be formed is processed by photolithography and subsequent dry etching, and n ^A pattern of the base opening 8 exposing a part of the surface of the diffusion region 2 is formed. The polycrystalline silicon film 6 becomes a lead layer of a base layer formed in a later process.

  Thereafter, as shown in FIG. 9, a semiconductor film, here, a SiGe film 9 is grown and formed on the entire surface of the silicon oxide film 7 so as to cover the inner wall of the base opening 8 by a reduced pressure non-selective epitaxial growth method. The thickness of the SiGe film 9 is about 80 nm, for example.

As film forming conditions at this time, based on FIGS. 3 and 4, the bottom 9a covering the exposed surface of the n ⁺ diffusion region 2 is made of a single crystal in the base opening 8, and other portions such as the side wall 9b are used. The film forming conditions are selected such that the portion becomes polycrystalline and the thickness of the side wall 9b is 1.5 times or less the thickness of the bottom 9a. That is, the condition below the broken line in FIGS. 3 and 4 is selected. Here, the film thickness of the side wall portion 9 b is not the thickness in the direction perpendicular to the surface of the semiconductor substrate 1 but the thickness in the direction perpendicular to the side surface of the base opening 8.

An example of conditions for film formation by such non-selective epitaxial growth is shown below. For example, in the case of a low pressure CVD method, monosilane (SiH ₄ ), hydrogen (H ₂ ), diborane (B ₂ H ₆ ), and germane (GeH ₄ ) are used as source gases. At this time, the flow rates of SiH ₄ and H ₂ are, for example, 20 sccm and 20 slm, respectively. Further, when the Ge concentration in the SiGe film 9 is 15 atomic%, for example, the pressure of the film forming atmosphere is 1.067 × 10 ⁴ Pa (80 Torr), the growth temperature is 650 ° C., and the bottom portion 9a made of a single crystal. Is set to 10 nm / min. At this time, the flow rate of diborane is set to 75 sccm so that the boron concentration in the SiGe film 9 is about 7 × 10 ¹⁹ atoms / cm ³ , for example, and the flow rate of Germane is set to 35 sccm, for example.

  In the above example, the growth rate of the bottom portion 9a is 10 nm / min. However, it is desirable to select the growth rate as appropriate according to the Ge content (Ge concentration) in the SiGe film 9.

In the above example, the SiGe film 9 is formed, but instead of this film, a single layer film of SiGeC film or a stacked film of SiGeC film and SiGe film may be formed. When forming a SiGeC film, monomethylsilane (SiH ₃ CH ₃ ) may be further used as a source gas. In the case of forming a laminated film, it is preferable to form a SiGeC film on the SiGe film. Further, in addition to the SiGe film 9 and the like, a GaAs film or an InP film may be formed through a predetermined base film.

  After the SiGe film 9 is formed, as shown in FIG. 10, a photoresist 11 serving as a mask material is applied to the entire surface with a film thickness that fills the base opening 8.

  Next, as shown in FIG. 11, the entire surface of the photoresist 11 is anisotropically etched to leave the photoresist 11 only at a predetermined depth of the base opening 8.

  Next, as shown in FIG. 12, the SiGe film 9 is anisotropically etched by using the photoresist 11 as a mask, so that the SiGe film 9 remains in the base opening 9 only at the same depth as the photoresist 11. Then, other parts of the SiGe film 9 are removed. That is, only the bottom part 9a and the side wall part 9b of the SiGe film 9 are left. As a result, a base 12 is formed in which a flat bottom portion 9a made of a single crystal and a side wall portion 9b made of a polycrystal perpendicular to the bottom portion 9a are integrated. The base 12 is electrically connected to the base lead layer 10 formed from the polycrystalline silicon film 6 by patterning through the side wall 9b.

  Then, as shown in FIG. 13, the photoresist 11 is removed by ashing or the like.

  Subsequently, as shown in FIG. 14, a silicon oxide film is deposited on the entire surface by the CVD method, and the entire surface is anisotropically etched (etched back) to expose the surface of the central portion of the bottom portion 9a of the base 12. Then, a sidewall 13 covering the peripheral portion of the bottom portion 9a, the sidewall portion 9b, and the side surface of the silicon oxide film 7 is formed. The shape of the side wall 13 is, for example, a shape that opens a portion of the base opening 8 of the base 12 in a tapered shape.

  Thereafter, as shown in FIG. 15, an n-type polycrystalline silicon film or an amorphous silicon film is deposited on the entire surface by the CVD method, and this is processed by photolithography and subsequent dry etching, and at the bottom, the bottom 9a of the base 12 is formed. Is formed. At this time, a part of n-type impurities contained in the n-type polycrystalline silicon film or the amorphous silicon film is diffused into the surface layer of the bottom portion 9a of the base 12 by the action of heat and the subsequent heat treatment. A shallow junction 15 is formed. This provides a more reliable connection between the base 12 and the emitter 14.

  Thereafter, as shown in FIG. 16, the interlayer insulating film 16 is formed, the contact hole 17 is formed, the collector electrode 18c, the emitter electrode 18e and the base electrode 18b are formed, and a wiring layer (not shown) is formed. Then, the bipolar transistor of this embodiment is completed.

  As described above, according to the present embodiment, when forming the SiGe film 9, the film thickness of the side wall 9b is set to about 1.5 times the film thickness of the bottom 9a by controlling the film forming conditions. Therefore, even if the width of the base opening 8 or the film thickness of the sidewall 13 varies, it is possible to ensure the electrical connection between the base and the emitter. As a result, transistor characteristics such as driving speed and high-frequency characteristics can be improved, the emitter can be further reduced, and a highly reliable bipolar transistor can be realized.

  If the thickness of the side wall 9b is less than 1 times the thickness of the bottom 9a, the resistance at the side wall 9b increases, and the transistor characteristics deteriorate. On the other hand, if the thickness of the side wall portion 9b exceeds twice the thickness of the bottom portion 9a, the width of the base opening 8 becomes narrow, and the base and the emitter may not be connected. Therefore, in the first embodiment, the thickness of the side wall portion 9b needs to be 1 to 2 times, for example, 1.5 times the thickness of the bottom portion 9a.

(Second Embodiment)
Next, a second embodiment of the present invention will be described. In the second embodiment, an npn-type bipolar transistor is illustrated and its configuration will be described together with a manufacturing method for convenience. 17 to 21 are cross-sectional views showing a method of manufacturing a bipolar transistor (semiconductor device) according to the second embodiment of the present invention in the order of steps.

In order to manufacture this bipolar transistor, first, as shown in FIG. 17, an n-type impurity, here phosphorus, is dosed in a region where a collector of a surface layer of a semiconductor substrate 1 such as a p-type silicon substrate is to be formed. Ions are implanted under the conditions of 1 × 10 ¹⁴ / cm ² and acceleration energy of 300 keV to form the n ⁺ diffusion region 2. This n ⁺ diffusion region 2 functions as a collector. The region where ion implantation is performed is, for example, a region where an element active region is to be provided.

  Subsequently, the field oxide film 3 is formed in the element isolation region of the semiconductor substrate 1 by a so-called LOCOS method to partition the active region 4. In the present embodiment, the opening of the field oxide film 3 becomes the base opening 8.

  After that, as shown in FIG. 18, a semiconductor film, here, a SiGe film 9 is grown and formed in the base opening 8 and the entire surface of the field oxide film 3 by a reduced pressure non-selective epitaxial growth method.

As film forming conditions at this time, based on FIGS. 3 and 4, the bottom 9a covering the exposed surface of the n ⁺ diffusion region 2 is made of a single crystal in the base opening 8, and the other part is polycrystalline. The film forming conditions are selected so that the film thickness becomes amorphous and the film thickness of the portion on the field insulating film 3 is at least twice the film thickness of the bottom 9a. That is, the condition is selected so as to include the condition above the broken line in FIGS. In the present embodiment, the bottom portion 9a functions as a base, and other portions function as a base lead layer.

  Since the amorphous portion of the SiGe film 9 is polycrystallized by the subsequent heat treatment, the portion other than the bottom portion 9a of the SiGe film 9 is amorphous with the polycrystalline portion immediately after the formation of the SiGe film 9. In the end, it is composed of one layer of a polycrystalline film.

An example of conditions for film formation by such non-selective epitaxial growth is shown below. For example, in the case of the low pressure CVD method, monosilane (SiH ₄ ), hydrogen (H ₂ ), diborane (B ₂ H ₆ ), and germane (GeH ₄ ) are used as the source gas. At this time, the flow rates of SiH ₄ and H ₂ are, for example, 200 sccm and 20 slm, respectively. Further, when the Ge concentration in the SiGe film 9 is 15 atomic%, for example, the pressure of the film forming atmosphere is 1.067 × 10 ⁴ Pa (80 Torr), the growth temperature is 600 ° C., and the bottom portion 9a made of a single crystal. Is set to 10 nm / min. At this time, the flow rate of diborane is set to 200 sccm so that the boron concentration in the SiGe film 9 is about 7 × 10 ¹⁹ atoms / cm ³ , for example, and the flow rate of germane is set to 160 sccm, for example.

  In the above example, the growth rate of the bottom portion 9a is 10 nm / min. However, it is desirable to select the growth rate as appropriate according to the Ge content (Ge concentration) in the SiGe film 9.

In the above example, the SiGe film 9 is formed. However, similarly to the first embodiment, instead of this film, a single layer film of SiGeC film or a stacked film of SiGeC film and SiGe film is formed. May be. When forming a SiGeC film, monomethylsilane (SiH ₃ CH ₃ ) may be further used as a source gas. In the case of forming a laminated film, it is preferable to form a SiGeC film on the SiGe film. Further, in addition to the SiGe film 9 and the like, a GaAs film or an InP film may be formed through a predetermined base film.

  After the SiGe film 9 is formed, as shown in FIG. 19, a silicon oxide film 13a is deposited on the entire surface by the CVD method. After patterning by the photolithography technique, the opening is anisotropically etched (etched back). As a result, the surface of the central portion of the bottom portion 9a is exposed, and the sidewall 13 covering the other portion of the SiGe film 9 is formed. The shape of the sidewall 13 is, for example, a shape that opens a portion of the base opening 8 of the bottom portion 9a in a tapered shape.

  Subsequently, as shown in FIG. 20, an n-type polycrystalline silicon film or an amorphous silicon film is deposited on the entire surface by a CVD method, which is processed by photolithography and subsequent dry etching, and connected to the bottom 9a at the bottom. The emitter 14 to be formed is formed. At this time, due to the action of heat at the time of depositing the n-type polycrystalline silicon film or the amorphous silicon film and the subsequent heat treatment, a part of the n-type impurity contained therein is diffused into the surface layer of the bottom portion 9a, and the shallow junction is formed. 15 is formed. As a result, a more reliable connection between the bottom 9a functioning as a base and the emitter 14 is achieved.

  Thereafter, as shown in FIG. 21, the interlayer insulating film 16 is formed, the contact hole 17 is formed, the collector electrode 18c, the emitter electrode 18e and the base electrode 18b are formed, and a wiring layer (not shown) is formed. Then, the bipolar transistor of this embodiment is completed.

  In the conventional SiGe-HBT manufacturing method, as described above, since only the film formed by non-selective epitaxial growth has insufficient film thickness of the polycrystalline film functioning as the base extraction layer, the polycrystalline film is grown. After opening a region for growing a single crystal film functioning as a base, a single crystal base layer is formed by non-selective epitaxial growth, and at the same time, a polycrystalline film functioning as a base lead layer is stacked.

  On the other hand, according to the present embodiment, as shown in FIG. 18, the bottom portion 9a made of a single crystal functioning as a base and a polycrystalline film functioning as a base lead layer can be formed by a single non-selective epitaxial growth. . Therefore, it is possible to realize a bipolar transistor with high reliability equivalent to that of the prior art while shortening at least three steps of growing a polycrystalline film and photolithography (photoresist formation, patterning, and photoresist removal). .

In the first and second embodiments, an npn bipolar transistor is illustrated, but the present invention is not limited to this, and all the n-type and p-type constituent parts described above are included. A pnp bipolar transistor can also be realized by forming it in a reverse conductivity type. Furthermore, by using the manufacturing method of the present invention, it is also possible to realize a low power consumption Bi-CMOS transistor and a bipolar IC having a high-speed transistor with a thin base film thickness.
In the first embodiment, an aluminum film may be formed instead of the polycrystalline silicon film 6. Further, in either of the first and second embodiments, a silicon nitride film may be formed instead of the silicon oxide film 7 or 13a.

  Hereinafter, various aspects of the present invention will be collectively described as supplementary notes.

(Appendix 1)
A semiconductor substrate with a collector formed on the surface;
An insulating film formed on the semiconductor substrate and having an opening formed in a portion matching the collector;
A conductive film formed on the insulating film;
The portion formed in the opening and in contact with the collector is made of single crystal, the portion in contact with the conductive film is made of polycrystal, and the thickness of the portion in contact with the conductive film is equal to the thickness of the portion in contact with the collector. A semiconductor film that is 1 to 2 times;
An emitter formed on the semiconductor film;
A semiconductor device comprising:

(Appendix 2)
A semiconductor substrate with a collector formed on the surface;
An insulating film formed on the semiconductor substrate and having an opening formed in a portion matching the collector;
The portion formed in the opening and on the insulating film and in contact with the collector is made of a single crystal, and the thickness of the portion on the insulating film is made of a single layer thicker than the thickness of the portion in contact with the collector. A semiconductor film;
An emitter formed on a portion of the semiconductor film in contact with the collector;
A semiconductor device comprising:

(Appendix 3)
The semiconductor device according to appendix 2, wherein the semiconductor film contains an amorphous portion.

(Appendix 4)
4. The semiconductor device according to claim 1, wherein the semiconductor film is made of at least one film selected from the group consisting of a SiGe mixed crystal film and a SiGeC mixed crystal film.

(Appendix 5)
The semiconductor device according to appendix 1 or 4, wherein the conductive film is one kind of film selected from the group consisting of a polycrystalline silicon film and an aluminum film.

(Appendix 6)
6. The semiconductor device according to any one of appendices 1 to 5, wherein the insulating film is a silicon oxide film.

(Appendix 7)
7. The semiconductor device according to appendix 1, 4, 5, or 6, further comprising a second insulating film that insulates between the conductive film and the emitter.

(Appendix 8)
The semiconductor device according to any one of appendices 2 to 6, further comprising a second insulating film that insulates a portion of the semiconductor film on the insulating film and the emitter.

(Appendix 9)
The semiconductor device according to appendix 7 or 8, wherein the second insulating film is one kind of film selected from the group consisting of a silicon oxide film and a silicon nitride film.

(Appendix 10)
A method of manufacturing a semiconductor device including a bipolar transistor,
Forming a collector on the surface of the semiconductor substrate, and forming an insulating film on the semiconductor substrate;
Forming a conductive film on the insulating film;
Forming an opening exposing at least a part of the collector in the insulating film and the conductive film;
Forming a semiconductor film connected to the collector and the conductive film in the opening by non-selective epitaxial growth;
Forming an emitter on the semiconductor film;
Have
In the step of forming the semiconductor film,
The portion of the semiconductor film that contacts the collector is a single crystal, the portion that contacts the conductive film is polycrystalline,
A method of manufacturing a semiconductor device, wherein a thickness of a portion in contact with the conductive film is 1 to 2 times a thickness of a portion in contact with the collector.

(Appendix 11)
11. The method of manufacturing a semiconductor device according to appendix 10, wherein in the step of forming the semiconductor film, the growth rate of the polycrystal is set to 1.8 times or less of the growth rate of the single crystal.

(Appendix 12)
A method of manufacturing a semiconductor device including a bipolar transistor,
Forming a collector on the surface of the semiconductor substrate;
Forming an insulating film having an opening formed in a portion matching the collector on the semiconductor substrate;
By non-selective epitaxial growth, the portion in contact with the collector in the opening and on the insulating film functions as a base made of a single crystal, and the thickness of the portion on the insulating film is larger than the thickness of the portion in contact with the collector. Forming a semiconductor film composed of a single thick film;
Forming an emitter on a portion of the semiconductor film in contact with the collector;
A method for manufacturing a semiconductor device, comprising:

(Appendix 13)
14. The method of manufacturing a semiconductor device according to appendix 12, wherein in the step of forming the semiconductor film, an amorphous portion is included in the semiconductor film.

(Appendix 14)
14. The manufacturing method of a semiconductor device according to any one of appendices 10 to 13, wherein at least one film selected from the group consisting of a SiGe mixed crystal film and a SiGeC mixed crystal film is formed as the semiconductor film. Method.

(Appendix 15)
15. The method of manufacturing a semiconductor device according to appendix 10, 11 or 14, wherein as the conductive film, one kind of film selected from the group consisting of a polycrystalline silicon film and an aluminum film is formed.

(Appendix 16)
16. The method of manufacturing a semiconductor device according to any one of appendices 10 to 15, wherein a silicon oxide film is formed as the insulating film.

(Appendix 17)
17. The method for manufacturing a semiconductor device according to appendix 10, 11, 14, 15 or 16, further comprising a step of forming a second insulating film that insulates between the conductive film and the emitter.

(Appendix 18)
17. The semiconductor device according to claim 12, further comprising a step of forming a second insulating film that insulates a portion of the semiconductor film on the insulating film and the emitter. Production method.

(Appendix 19)
19. The method of manufacturing a semiconductor device according to appendix 17 or 18, wherein one kind of film selected from the group consisting of a silicon oxide film and a silicon nitride film is formed as the second insulating film.

DESCRIPTION OF SYMBOLS 1; Semiconductor substrate 2; N ^<+> diffused region 3; Field oxide film 4; Active region 5; Silicon oxide film 6; Polycrystalline silicon film 7; Silicon oxide film 8; Base opening 9; SiGe film 9a; Part 10; base lead layer 11; photoresist 12; base 13: sidewall 14; emitter 15;

Claims (8)

A semiconductor substrate with a collector formed on the surface;
An insulating film formed on the semiconductor substrate and having an opening formed in a portion matching the collector;
Is formed in the opening and the insulating film, and into contact with the collector in the opening, a semiconductor having a base ing from a single crystal, and a thicker base lead layer wherein the base thickness on the insulating film A membrane,
An emitter formed on the base of the semiconductor film;
A semiconductor device comprising:   The semiconductor device according to claim 1, wherein the semiconductor film contains an amorphous portion.   The semiconductor device according to claim 1, wherein the semiconductor film is made of at least one film selected from the group consisting of a SiGe mixed crystal film and a SiGeC mixed crystal film. A method of manufacturing a semiconductor device including a bipolar transistor,
Forming a collector on the surface of the semiconductor substrate, and forming an insulating film on the semiconductor substrate;
Forming a conductive film on the insulating film;
Forming an opening exposing at least a part of the collector in the insulating film and the conductive film;
Forming a semiconductor film of at least one film selected from the group consisting of a SiGe mixed crystal film and a SiGeC mixed crystal film , connected to the collector and the conductive film by non-selective epitaxial growth;
Forming an emitter on the semiconductor film;
Have
In the step of forming the semiconductor film,
The portion of the semiconductor film that contacts the collector is a single crystal, the portion that contacts the conductive film is polycrystalline,
The thickness of the semiconductor film in the portion in contact with the conductive film is set to 1 to 2 times the thickness of the semiconductor film in the portion in contact with the collector,
A method of manufacturing a semiconductor device, wherein in the step of forming the semiconductor film, the growth rate of the polycrystal is set to 1.8 times or less of the growth rate of the single crystal. A method of manufacturing a semiconductor device including a bipolar transistor,
Forming a collector on the surface of the semiconductor substrate;
Forming an insulating film having an opening formed in a portion matching the collector on the semiconductor substrate;
The non-selective epitaxial growth, said to contact the opening in the collector, a base made of a single crystal, semiconductor film made of the film of one layer with a thick base contact layer than the base thickness on the insulating film Forming a step;
Forming an emitter on the base of the semiconductor film;
A method for manufacturing a semiconductor device, comprising:   6. The method of manufacturing a semiconductor device according to claim 5, wherein in the step of forming the semiconductor film, an amorphous portion is contained in the semiconductor film. 7. The method of manufacturing a semiconductor device according to claim 5 , wherein at least one film selected from the group consisting of a SiGe mixed crystal film and a SiGeC mixed crystal film is formed as the semiconductor film. 5. The method of manufacturing a semiconductor device according to claim 4, wherein one type of film selected from the group consisting of a polycrystalline silicon film and an aluminum film is formed as the conductive film.

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