JP2002026027A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device and its manufacturing method which forms an SiGe epitaxial growth layer for base regions on a silicon substrate and a polycrystalline SiGe film for outer base electrodes on an insulation (silicon oxide) film at the same time. SOLUTION: The method of forming an SiGe film 103 on a semiconductor substrate 111 having an insulation film for element isolating regions, etc., comprises a step for forming a thin Si film 102 on the semiconductor substrate, depositing an SiGe film thereon, a step for epitaxially growing a single crystal Si film 121 and an SiGe film 132 on the semiconductor substrate surface, and a step for forming polycrystalline Si film 122 and an SiGe film 133 on the insulation film. Since the Si film is previously formed on the insulation film, the polycrystalline SiGe film is formed with a high adhesion also on the insulation film. Bipolar transistors are formed, each having a base region made from the SiGe/Si single crystal layer and an outer base electrode made from the SiGe/Si polycrystalline film.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to forming a SiGe film which is advantageous for high-speed operation with a sufficiently small connection resistance, which is advantageous in electrical characteristics such as noise figure. The present invention relates to a method for forming a base region.

[0002]

2. Description of the Related Art In recent years, the base region of a bipolar element and C
A device that realizes high speed and high integration by forming a shallow junction by using a low-temperature epitaxial growth method in a device active region such as a source / drain region and a channel region of a MOS element has been proposed and is in the process of being put into practical use. A conventional bipolar transistor having such a structure and a method of manufacturing the same will be described. 10 to 13 are cross-sectional views showing a manufacturing process of a conventional bipolar transistor, and FIG. 9 is a cross-sectional view of a bipolar transistor formed by the manufacturing method. As shown in FIG. 9, the semiconductor substrate 11 is made of a p-type silicon substrate, and has an n-type impurity diffusion region 12 (n-well) having a high impurity concentration, an n ⁻ impurity diffusion region 13 formed in the impurity diffusion region 12, and And a high-concentration impurity diffusion region 131. Semiconductor substrate 1
A trench is formed in the main surface of the semiconductor device 1, and an element isolation region 10 is formed by filling an insulator such as SiO ₂ .
The surface of the element formation region surrounded by the element isolation region on the main surface of the semiconductor substrate 11 is exposed. This semiconductor substrate 1
A bipolar transistor is formed in 1. First, the impurity diffusion region 13 and the high-concentration impurity diffusion region 131 constitute a collector region.

An element isolation region 10 and an impurity diffusion region 13
The semiconductor layer 2 is formed thereon. Element isolation region 1
A polycrystalline silicon layer 22 is formed on 0 and a single crystal silicon layer 21 is formed on the impurity diffusion region 13, and these constitute the semiconductor layer 2. The single crystal silicon layer 21
A base region is formed, and an n-type emitter region 9 is formed on its surface.
Are formed. The polycrystalline silicon layer 22 forms an external base electrode. The semiconductor substrate 11 is covered with an insulating film 5 such as a silicon nitride film, and further covered with an insulating film 14 such as a silicon oxide film. Contact holes are respectively formed in the insulating films 5 and 14 such that the polycrystalline silicon layer 22, the emitter region 9 and the high-concentration impurity diffusion region 131 are exposed. An external base electrode 8 of polycrystalline silicon is formed in the contact hole where the emitter region 9 is exposed, and an emitter metal electrode 15 is formed thereon. The base metal electrode 16 is formed in the contact hole where the polycrystalline silicon layer 22 of the external base electrode is exposed. The collector metal electrode 17 is formed in the contact hole where the high concentration impurity diffusion region 131 is exposed.

Next, a method of manufacturing the bipolar transistor shown in FIG. 9 will be described. First, a p-type silicon semiconductor layer 2 containing boron (B) is formed on a semiconductor substrate 11 by epitaxial growth. By this epitaxial growth, a p-type single crystal silicon base region 21 is formed on the element formation region, and a p-type polycrystalline silicon layer 22 is formed on the insulating film of the element isolation region 10. This silicon semiconductor layer 2 is patterned into a predetermined shape (FIG. 10). Then, a silicon nitride film (Si ₃ N ₄ ) 5 is deposited on the semiconductor substrate 11 so as to cover the silicon semiconductor layer 2 (FIG. 11). RIE (Reactive Ion) is applied to the single crystal silicon layer (base region) 21 of the silicon nitride film 5.
The opening 6 is formed by anisotropic etching such as etching. At this time, the single crystal silicon layer 21 in the base region is exposed at the bottom of the opening 6 (FIG. 12). Next, a polycrystalline silicon film is deposited on the entire surface of the silicon nitride film 5, and arsenic (As) is ion-implanted into the polycrystalline silicon film.

An arsenic in the polycrystalline silicon film is further diffused into the base region 21 of the semiconductor layer 2 by applying a heating step, and an n-type emitter region 9 is formed in the diffused portion. Further R
The polycrystalline silicon film is patterned by anisotropic etching such as IE to form an emitter extraction electrode 8 (FIG. 13). Next, an interlayer insulating film 14 such as a silicon oxide film is formed on the emitter extraction electrode 8 and the silicon nitride film 5.
Is deposited, and a contact hole is opened in the interlayer insulating film 14 to expose the emitter lead-out electrode 8. Then, an emitter metal electrode 15 made of aluminum or the like electrically connected to the emitter extraction electrode 8 is formed. At this time,
Contact holes are also formed in the polycrystalline silicon layer 22 of the external base electrode and the silicon nitride film 5 on the high-concentration impurity diffusion region 131, and the polycrystalline silicon layer 2 of the external base electrode is formed.
The base metal electrode 16 and the collector metal electrode 17 electrically connected to the second and high concentration impurity diffusion regions 131 are formed (FIG. 9).

[0006]

As described above, in the conventional manufacturing method, the base region of the single-crystal silicon layer and the external base electrode of the polycrystalline silicon layer are composed of a single-crystal region and a polycrystalline region. Since it is formed in one step, there is almost no connection resistance between both regions, which is very advantageous in terms of electrical characteristics such as noise figure. Further, in order to further increase the speed, the base region is changed from a Si film to a SiGe film.
Heterojunction bipolar transistors are being developed. However, when the SiGe film is epitaxially grown in the same manufacturing process as that of the Si bipolar transistor, a SiGe growth film (single crystal) is easily formed on the silicon substrate, but the selectivity is high with respect to the silicon oxide film. Therefore, a polycrystalline SiGe film is not formed (even if formed, a non-uniform film is formed, so that the film does not play a role). Accordingly, since an external base electrode on the element isolation region is not formed by this method, an external base electrode for electrically connecting the base metal electrode and the base region cannot be formed.

As described above, when a SiGe epitaxial growth layer serving as a base region is formed on a silicon semiconductor substrate, a contrivance is made to simultaneously form a polycrystalline SiGe film serving as an external base electrode on an insulating film (silicon oxide film). I had to. The present invention has been made in view of such circumstances, and when a SiGe epitaxial growth layer serving as a base region is formed on a silicon semiconductor substrate, a plurality of external base electrodes also serve as external base electrodes on an insulating film (silicon oxide film) at the same time. Provided are a method of manufacturing a semiconductor device for forming a crystalline SiGe film and a semiconductor device.

[0008]

SUMMARY OF THE INVENTION The present invention relates to a method of forming a SiGe film on a semiconductor substrate having an insulating film embedded or formed on the surface of a silicon substrate as an element isolation region or the like. Thin Si on top
It is characterized in that a film is formed and a SiGe film is deposited thereon. A single-crystal Si film and Si
A Ge film is epitaxially grown, and a polycrystalline S
An i film and a SiGe film are formed. Since the Si film is formed on the insulating film in advance, the polycrystalline SiGe film is also formed on the insulating film with high adhesion. If a single-crystal SiGe / Si epitaxial growth layer formed in this way is used as a base region and a polycrystalline SiGe / Si film on an insulating film is used as an external base electrode to form a SiGe hetero-coupled bipolar transistor, the base region and the metal electrode are connected. This is very advantageous in terms of electrical characteristics such as noise figure since there is almost no connection resistance with the external base electrode. To enable high-speed operation, change the base region from Si film to SiGe film,
It is necessary to increase the moving speed of electrons in the base region,
According to the present invention, there is provided a SiGe heterojunction bipolar transistor which has little connection resistance between a base region and an external base electrode following the base region and is very advantageous in electrical characteristics such as noise figure.

That is, a semiconductor device according to the present invention comprises a silicon semiconductor substrate, an insulating film selectively embedded in the semiconductor substrate main surface, and a semiconductor substrate formed on the semiconductor substrate main surface and the insulating film. A semiconductor layer composed of an underlying Si layer directly formed on the main surface and the insulating film and an SiGe layer formed on the underlying Si layer, wherein the semiconductor layer is formed on the main surface of the semiconductor substrate. The region formed is a single crystal layer, and the region formed on the insulating film is a polycrystalline layer. A bipolar transistor is formed on the semiconductor substrate, the bipolar transistor has a collector region of a first conductivity type, the single crystal layer is used as a base region of a second conductivity type, and a surface region of the base region of the second conductivity type is formed. May have a first conductivity type emitter region, and the polycrystalline layer may be used as an external base electrode. The thickness of the underlying Si layer with respect to the thickness of the semiconductor layer may be 10 to 20%. When the base Si layer is thin, the external base electrode is not formed uniformly, and when the base Si layer is thick, the resistance becomes high, and high-speed operation of the transistor cannot be expected. Therefore, the above range is appropriate. The Ge content in the SiGe layer may be 15 atomic% or less.

According to the method of manufacturing a semiconductor device of the present invention, a step of forming an insulating film selectively embedded in a main surface of a silicon semiconductor substrate, a step of forming a base Si layer on the main surface of the semiconductor substrate and the insulating film, and Forming a semiconductor layer on which a SiGe layer is sequentially laminated, wherein the semiconductor layer is a single crystal layer in a region formed on the main surface of the semiconductor substrate;
The region formed on the insulating film is a polycrystalline layer. The laminated underlying Si layer and SiG
The e layer may be formed continuously in the same processing apparatus. In the step of forming the semiconductor layer, the SiGe layer may be formed by supplying a gas containing SiH ₄ to form the base Si layer and further supplying a GeH ₄ gas after a lapse of a predetermined time.

[0011]

Embodiments of the present invention will be described below with reference to the drawings. First, referring to FIG. 1 to FIG.
An example will be described. 6 and 7 are a cross-sectional view and a plan view of a semiconductor device (bipolar transistor), and FIGS. 2 to 5 are process cross-sectional views illustrating a method for manufacturing the semiconductor device. As shown in FIG. 6 and FIG.
Reference numeral 1 denotes a p-type silicon substrate, and an n-type impurity diffusion region 112 (n-well) and an n-type
^- impurity diffusion region 113 and the high concentration impurity diffusion regions 13
And 1. A trench (STI: Shallow Trench Isolation) is formed in the main surface of the semiconductor substrate 111, and an element such as SiO ₂ is filled in the trench to form an element isolation region 110. The present invention does not limit the structure of the element isolation region to STI. LOCOS
It is also possible to use a silicon oxide film or the like by a (LOCal Oxidation of Silicon) method.

The surface of the element forming region surrounded by the element isolation region on the main surface of the semiconductor substrate 111 is exposed. A bipolar transistor is formed on the semiconductor substrate 111. First, the impurity diffusion region 113 and the high concentration impurity diffusion region 131 constitute a collector region. And
On the element isolation region 110 and the impurity diffusion region 113, a semiconductor layer in which the Si film 102 and the SiGe film 103 are stacked is formed. A polycrystalline Si film 122 is formed on the element isolation region 110, and a single crystal Si film is formed on the impurity diffusion region 113.
A film 121 is formed, and these constitute the Si film 102. On the polycrystalline Si film 122, polycrystalline SiG
The single-crystal SiG is formed on the e-film 133 and the single-crystal Si film 121.
e films 132 are formed, and these are the SiGe films 10
3. The single-crystal Si film 121 and the single-crystal SiGe film 132 thereon form a base region,
An n-type emitter region 109 is formed on the surface. Then, the polycrystalline Si film 122 and the polycrystalline S
The iGe film 133 forms an external base electrode. The semiconductor substrate 111 has an insulating film 105 such as a silicon nitride film.
, And further covered by an insulating film 114 such as a silicon oxide film.

In the insulating films 105 and 114, contact holes are respectively formed so that the polycrystalline SiGe film 133, the emitter region 109 and the high-concentration impurity diffusion region 131 are exposed. An emitter lead-out electrode 108 of polycrystalline silicon is formed in the contact hole where the emitter region 109 is exposed, and an emitter metal electrode 115 of Al or the like is formed thereon. A base metal electrode 116 of Al or the like is formed in the contact hole where the polycrystalline SiGe film 133 constituting the external base electrode is exposed. Then, a collector metal electrode 117 of Al or the like is provided in the contact hole where the high-concentration impurity diffusion region 131 is exposed.
Are formed.

Next, a method of manufacturing the bipolar transistor shown in FIGS. 6 and 7 will be described. Semiconductor layers 102 and 103 containing boron (B) are formed on a semiconductor substrate 111 by an epitaxial growth method. First, by this epitaxial growth method, a film thickness of 10
A p-type single-crystal Si film 121 serving as a base region having a thickness of about 10 nm is grown, and a p-type polycrystalline Si film 122 having a thickness of about 10 nm is formed on the insulating film (silicon oxide film) in the element isolation region 110.
Is formed (FIG. 1). Subsequently, a film thickness of 50 to 1 is formed on the p-type single crystal Si film 121 by this epitaxial growth method.
A p-type single crystal SiGe film 132 of about 00 nm is grown,
The thickness is 50 to 100 nm on the p-type polycrystalline Si film 122.
About p-type polycrystalline SiGe film 133 is formed (FIG. 2). Next, the semiconductor layers 102 and 103 are patterned into a predetermined shape so as to cover the base region and the element isolation region. Then, a silicon nitride film (Si) is formed so as to cover the patterned semiconductor layers 102 and 103.
The insulating film 105 made of ₃ N ₄₎ is deposited on the semiconductor substrate 111 (FIG. 3). Single-crystal SiG of the insulating film 105
The opening 106 is formed in the e film 132 by anisotropic etching such as RIE (Reactive Ion Etching).
At this time, a single-crystal SiGe film 132 serving as a base region is exposed at the bottom of the opening 106 (FIG. 4).

Next, a polycrystalline silicon film is deposited on the entire surface of the insulating film 105, and arsenic (As) is deposited on the polycrystalline silicon film.
Is ion-implanted. By further applying a heating step, arsenic in the polycrystalline silicon film is diffused into the single-crystal SiGe film 132,
An n-type emitter region 109 is formed in the diffused portion. Further, the polycrystalline silicon film is patterned by anisotropic etching such as RIE to form an emitter extraction electrode 10.
8 (FIG. 5). Next, the emitter extraction electrode 1
08 and the insulating film 105, an interlayer insulating film 114 such as a silicon oxide film is deposited, and a contact hole is opened in the interlayer insulating film 114 to expose the emitter lead-out electrode 108. Then, an emitter metal electrode 115 of Al or the like electrically connected to the emitter extraction electrode 108 is formed. At this time, a contact hole is also formed in the insulating film 105 on the polycrystalline SiGe film 133 and the high-concentration impurity diffusion region 131, and a material such as Al electrically connected to the polycrystalline SiGe film 133 and the high-concentration impurity diffusion region 131 is formed. A base metal electrode 116 and a collector metal electrode 117 such as Al are formed (FIGS. 6 and 7).

Next, a method of growing a semiconductor layer made of SiGe / Si on a semiconductor substrate will be described with reference to FIG. FIG. 8 is a characteristic diagram showing the relationship between the reaction gas supply amount and the reaction time supplied to the reaction processing chamber in which the semiconductor substrate is mounted, and the vertical axis indicates the flow rate of the gas supplied to the reaction processing chamber. , And the horizontal axis represents the reaction time (minutes). This embodiment is characterized in that two different types of semiconductor layer components are continuously laminated in one reaction chamber. Two semiconductor layers are formed on the semiconductor substrate by an epitaxial growth method (see FIG. 6). First, a silicon semiconductor substrate is placed on a support in a reaction processing chamber. The reaction processing chamber is closed, and first, silane (SiH ₄ ) gas is supplied at time A, and a constant flow rate (v1) is kept flowing until the reaction is completed. SiH ₄ gas is converted into Si by a reaction represented by the following formula (1).
The film accumulates. At this time, impurities such as boron are
When diffusing into a film, for example, a predetermined amount of B ₂ H ₆ gas is supplied for a short time.

SiH ₄ → Si + 2H ₂ (1) During the time t until time B, the thickness of the Si film becomes about 10 nm. Here, the formation of the Si film is completed. By this epitaxial growth method, a film thickness of 10 n is formed on the element formation region.
A p-type single crystal Si film serving as a base region of about m is grown,
Continuing with this, a film thickness of 10 nm
A degree of p-type polycrystalline Si film is formed. Subsequently, a SiGe film is deposited by this epitaxial growth method. That is, at time B, the GeH ₄ gas is supplied along with the supply of the SiH ₄ gas, and a constant flow rate (v2) is kept flowing until the reaction is completed. SiH ₄ gas and GeH ₄
By supplying the gas, the SiGe film is deposited as shown in the following equation (2). At this time, impurities such as boron are
When diffusing into the e film, for example, a predetermined amount of B ₂ H ₆ gas is supplied for a short time. Growth rate is about 30 nm / min
(Actually, when the supply amount of GeH ₄ is changed, the growth rate also changes.) Therefore, the formation time of the Si film is about 20 seconds, and the formation time of the SiGe film is about 2 to 3 minutes. The growth conditions at this time are as follows:
0 ° C., pressure 10 torr, SiH ₄ gas flow rate 200
The cm ³ and GeH ₄ gas flow rates are variable depending on the desired composition.

[0018] _{SiH 4 + GeH 4 → SiGe +} 4H 2 ··· (2) SiGe is, in fact, represented by Si _1-x Ge _x. In the present invention, x is suitably 0.15 or less. And
It is possible to set the value of x to a predetermined value by appropriately setting the flow rate ratio (v2 / v1) (x = v2 / (v
1 + v2), 1−x = v1 / (v1 + v2)). In this manner, a p-type single-crystal SiGe film having a thickness of about 50 to 100 nm is grown on the p-type single-crystal Si film under (underlying) the semiconductor layer, and the p-type polycrystalline S
A p-type polycrystalline S having a thickness of about 50 to 100 nm is formed on the i-film.
An iGe film is formed. The single crystal SiGe film thickness represents the base width. In the base region, it is necessary to reduce the thickness of the SiGe film in order to shorten the base traveling time (that is, increase the speed). However, when the thickness is reduced, the withstand voltage between C and E decreases. The two have a trade-off relationship, and the film thickness is set to 50 to 100 nm in order to obtain an appropriate relationship. As described above, as in the embodiment, the single-crystal Si film and the SiGe film are epitaxially grown on the silicon substrate surface, and the polycrystalline Si film and the SiGe film are formed on the insulating film. Since the Si film is formed on the insulating film in advance, the polycrystalline Si
The Ge film is also formed on the insulating film with high adhesion.

[0019]

As described above, according to the present invention, a single crystal Si film and a SiGe film are epitaxially grown on a silicon substrate surface, and a polycrystalline Si film and a SiGe film are formed on an insulating film. Since a Si film is previously formed on the insulating film as a base film, the polycrystalline SiGe film is also formed on the insulating film with high adhesion. The single crystal S thus formed
using the iGe / Si epitaxial growth layer as a base region,
If a SiGe heterojunction bipolar transistor having a polycrystalline SiGe / Si film on an insulating film as an external base electrode is formed, there is almost no connection resistance between the base region and the external base electrode connected to the metal electrode, and the noise factor and the like are reduced. It is very advantageous in characteristics. According to the present invention, the connection resistance between the base region and the external base electrode following the base region is reduced, so that the transistor can operate at high speed and the area of the element region can be reduced. A low-power, low-power-consumption bipolar transistor can be formed.

[Brief description of the drawings]

FIG. 1 is a process sectional view illustrating a method for manufacturing a semiconductor device of the present invention.

FIG. 2 is a process sectional view illustrating the method for manufacturing the semiconductor device of the present invention.

FIG. 3 is a process sectional view illustrating the method for manufacturing the semiconductor device of the present invention.

FIG. 4 is a process sectional view illustrating the method for manufacturing the semiconductor device of the present invention.

FIG. 5 is a process sectional view illustrating the method for manufacturing the semiconductor device of the present invention.

FIG. 6 is a cross-sectional view of a semiconductor device of the present invention.

FIG. 7 is a plan view of the semiconductor device shown in FIG. 6;

FIG. 8 is a characteristic diagram illustrating a relationship between a supply amount of a reaction gas supplied to a reaction processing chamber in which a semiconductor substrate is placed and a reaction time.

FIG. 9 is a process sectional view illustrating a conventional method for manufacturing a semiconductor device.

FIG. 10 is a process sectional view illustrating a conventional method for manufacturing a semiconductor device.

FIG. 11 is a process sectional view showing a conventional method for manufacturing a semiconductor device.

FIG. 12 is a process sectional view showing a conventional method for manufacturing a semiconductor device.

FIG. 13 is a process sectional view showing a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

2 ... silicon semiconductor layer, 5 ... silicon nitride film, 6, 106 ... opening, 8, 108 ... emitter extraction electrode, 9, 109 ... emitter region,
10, 110... Element isolation region, 11, 111.
..Semiconductor substrate, 12, 112... N-type impurity diffusion region (n-well), 13, 113... N ^- impurity diffusion region, 14, 114.
..Emitter metal electrodes, 16, 116... Base metal electrodes, 17, 117... Collector metal electrodes, 21.
・ Single-crystal silicon layer, 22 ・ ・ ・ Polycrystalline silicon layer, 102 ・ ・ ・ Si film (semiconductor layer), 103 ・ ・ ・
SiGe film (semiconductor layer), 105 ... insulating film, 12
1 ... single-crystal Si film, 122 ... polycrystalline Si film,
131: high-concentration impurity diffusion region; 132: single-crystal SiGe film; 133: polycrystalline SiGe film.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 29/417 F term (Reference) 4M104 AA01 BB01 BB02 BB36 CC01 DD06 DD08 DD16 DD17 DD43 DD50 GG06 HH09 HH16 5F003 AP07 BA13 BA27 BA97 BB02 BB04 BB05 BB06 BB07 BC08 BE07 BF06 BH06 BH18 BM01 BP31 BP34 BP93 5F045 AB01 AB02 AB32 AB33 AC01 AD10 AD11 AE23 AF03 CA02 DB03 EE12 HA12 HA15 HA16 HA20 HA22

Claims (7)

[Claims] A silicon semiconductor substrate; an insulating film selectively embedded in the semiconductor substrate main surface; and a silicon semiconductor substrate formed on the semiconductor substrate main surface and the insulating film. Base S directly formed
an i-layer and a semiconductor layer composed of a SiGe layer formed on the underlying Si layer, wherein the semiconductor layer has a region formed on the main surface of the semiconductor substrate in a single-crystal layer and on the insulating film. A region formed in the semiconductor device is a polycrystalline layer. 2. A bipolar transistor is formed on the semiconductor substrate, and the bipolar transistor has a first
A conductive type collector region, wherein the single crystal layer is used as a second conductive type base region, a first conductive type emitter region is provided in a surface region of the second conductive type base region, and the polycrystalline layer is 2. The semiconductor device according to claim 1, wherein the semiconductor device is used as an external base electrode. 3. The underlayer S with respect to the thickness of the semiconductor layer.
3. The semiconductor device according to claim 1, wherein the thickness of the i-layer is 10 to 20%. 4. The Ge content in the SiGe layer is 15
4. The semiconductor device according to claim 1, wherein the concentration is at most atomic%. 5. A step of forming an insulating film selectively buried in a main surface of a silicon semiconductor substrate, and a base Si layer and an SiGe layer are sequentially laminated on the main surface of the semiconductor substrate and the insulating film. Forming a semiconductor layer, wherein the semiconductor layer is a region formed on the main surface of the semiconductor substrate is a single crystal layer, and a region formed on the insulating film is a polycrystalline layer. Manufacturing method of a semiconductor device. 6. The stacked underlayer Si layer and SiGe
6. The method according to claim 5, wherein the layers are continuously formed in the same processing apparatus. 7. The method according to claim 7, wherein the step of forming the semiconductor layer comprises SiH
₄ is supplied to form the base Si layer. After a predetermined time has passed, a GeH ₄ gas is further supplied to supply the SiGe.
The method for manufacturing a semiconductor device according to claim 5, wherein a layer is formed.