JP5179597B2 - 構成の仮想トポロジの変化 - Google Patents

構成の仮想トポロジの変化 Download PDF

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Publication number
JP5179597B2
JP5179597B2 JP2010541797A JP2010541797A JP5179597B2 JP 5179597 B2 JP5179597 B2 JP 5179597B2 JP 2010541797 A JP2010541797 A JP 2010541797A JP 2010541797 A JP2010541797 A JP 2010541797A JP 5179597 B2 JP5179597 B2 JP 5179597B2
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guest
cpu
processor
topology
configuration
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Japanese (ja)
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JP2011509478A5 (enExample
JP2011509478A (ja
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ゲイニー、チャールズ
ファレル、マーク
クバラ、ジェフリー
シュミット、ドナルド
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International Business Machines Corp
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International Business Machines Corp
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G06F9/5077—Logical partitioning of resources; Management or configuration of virtualized resources
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating
    • G06F9/44505—Configuring for program initiating, e.g. using registry, configuration files

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Executing Machine-Instructions (AREA)
  • Multi Processors (AREA)
  • Variable-Direction Aerials And Aerial Arrays (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
  • Hardware Redundancy (AREA)
  • Filters And Equalizers (AREA)
JP2010541797A 2008-01-11 2009-01-12 構成の仮想トポロジの変化 Active JP5179597B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/972,766 2008-01-11
US11/972,766 US7739434B2 (en) 2008-01-11 2008-01-11 Performing a configuration virtual topology change and instruction therefore
PCT/EP2009/050251 WO2009087233A1 (en) 2008-01-11 2009-01-12 Performing a configuration virtual topology change

Publications (3)

Publication Number Publication Date
JP2011509478A JP2011509478A (ja) 2011-03-24
JP2011509478A5 JP2011509478A5 (enExample) 2012-08-02
JP5179597B2 true JP5179597B2 (ja) 2013-04-10

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JP2010541797A Active JP5179597B2 (ja) 2008-01-11 2009-01-12 構成の仮想トポロジの変化

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US (8) US7739434B2 (enExample)
EP (1) EP2223203B1 (enExample)
JP (1) JP5179597B2 (enExample)
KR (1) KR101221252B1 (enExample)
CN (1) CN101911012B (enExample)
AT (1) ATE546774T1 (enExample)
CY (1) CY1112504T1 (enExample)
DK (1) DK2223203T3 (enExample)
ES (1) ES2379575T3 (enExample)
PL (1) PL2223203T3 (enExample)
PT (1) PT2223203E (enExample)
SI (1) SI2223203T1 (enExample)
WO (1) WO2009087233A1 (enExample)

Families Citing this family (55)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7734895B1 (en) * 2005-04-28 2010-06-08 Massachusetts Institute Of Technology Configuring sets of processor cores for processing instructions
US7739434B2 (en) 2008-01-11 2010-06-15 International Business Machines Corporation Performing a configuration virtual topology change and instruction therefore
US8527988B1 (en) * 2009-07-31 2013-09-03 Hewlett-Packard Development Company, L.P. Proximity mapping of virtual-machine threads to processors
US8464030B2 (en) * 2010-04-09 2013-06-11 International Business Machines Corporation Instruction cracking and issue shortening based on instruction base fields, index fields, operand fields, and various other instruction text bits
US8949499B2 (en) 2010-06-24 2015-02-03 International Business Machines Corporation Using a PCI standard hot plug controller to modify the hierarchy of a distributed switch
US8271710B2 (en) * 2010-06-24 2012-09-18 International Business Machines Corporation Moving ownership of a device between compute elements
CN103080912B (zh) 2010-08-26 2015-11-25 飞思卡尔半导体公司 微处理器系统及用于其上的存储器管理单元和管理方法
JP5354108B2 (ja) * 2010-09-01 2013-11-27 富士通株式会社 情報処理プログラム、情報処理装置及び情報処理方法
US9646278B2 (en) 2011-07-14 2017-05-09 International Business Machines Corporation Decomposing a process model in an enterprise intelligence (‘EI’) framework
US9659266B2 (en) 2011-07-14 2017-05-23 International Business Machines Corporation Enterprise intelligence (‘EI’) management in an EI framework
US9639815B2 (en) 2011-07-14 2017-05-02 International Business Machines Corporation Managing processes in an enterprise intelligence (‘EI’) assembly of an EI framework
US8566345B2 (en) 2011-07-14 2013-10-22 International Business Machines Corporation Enterprise intelligence (‘EI’) reporting in an EI framework
US8881100B2 (en) * 2011-09-07 2014-11-04 International Business Machines Corporation Automated generation of bridging code to augment a legacy application using an object-oriented language
US9069598B2 (en) * 2012-01-06 2015-06-30 International Business Machines Corporation Providing logical partions with hardware-thread specific information reflective of exclusive use of a processor core
US8918885B2 (en) * 2012-02-09 2014-12-23 International Business Machines Corporation Automatic discovery of system integrity exposures in system code
US9715383B2 (en) 2012-03-15 2017-07-25 International Business Machines Corporation Vector find element equal instruction
US9454367B2 (en) 2012-03-15 2016-09-27 International Business Machines Corporation Finding the length of a set of character data having a termination character
US9588762B2 (en) 2012-03-15 2017-03-07 International Business Machines Corporation Vector find element not equal instruction
US9459868B2 (en) 2012-03-15 2016-10-04 International Business Machines Corporation Instruction to load data up to a dynamically determined memory boundary
US9459867B2 (en) 2012-03-15 2016-10-04 International Business Machines Corporation Instruction to load data up to a specified memory boundary indicated by the instruction
US9459864B2 (en) 2012-03-15 2016-10-04 International Business Machines Corporation Vector string range compare
US9268566B2 (en) 2012-03-15 2016-02-23 International Business Machines Corporation Character data match determination by loading registers at most up to memory block boundary and comparing
US9280347B2 (en) 2012-03-15 2016-03-08 International Business Machines Corporation Transforming non-contiguous instruction specifiers to contiguous instruction specifiers
US9454366B2 (en) 2012-03-15 2016-09-27 International Business Machines Corporation Copying character data having a termination character from one memory location to another
US9710266B2 (en) 2012-03-15 2017-07-18 International Business Machines Corporation Instruction to compute the distance to a specified memory boundary
US9256344B1 (en) 2013-03-15 2016-02-09 Ca, Inc. Software management software
US9208193B1 (en) 2013-03-15 2015-12-08 Ca, Inc. Problem management software
US9116597B1 (en) 2013-03-15 2015-08-25 Ca, Inc. Information management software
CN103530191B (zh) * 2013-10-18 2017-09-12 杭州华为数字技术有限公司 热点识别处理方法及装置
EP2899652B1 (de) * 2014-01-22 2024-03-13 dSPACE GmbH Verfahren zur Einsatzoptimierung programmierbarer Logikbausteine in Steuerungsgeräten für Fahrzeuge
US9916185B2 (en) 2014-03-18 2018-03-13 International Business Machines Corporation Managing processing associated with selected architectural facilities
US9582295B2 (en) 2014-03-18 2017-02-28 International Business Machines Corporation Architectural mode configuration
US9588774B2 (en) 2014-03-18 2017-03-07 International Business Machines Corporation Common boot sequence for control utility able to be initialized in multiple architectures
US9772867B2 (en) 2014-03-27 2017-09-26 International Business Machines Corporation Control area for managing multiple threads in a computer
US9213569B2 (en) 2014-03-27 2015-12-15 International Business Machines Corporation Exiting multiple threads in a computer
US9223574B2 (en) 2014-03-27 2015-12-29 International Business Machines Corporation Start virtual execution instruction for dispatching multiple threads in a computer
US9218185B2 (en) * 2014-03-27 2015-12-22 International Business Machines Corporation Multithreading capability information retrieval
US9195493B2 (en) 2014-03-27 2015-11-24 International Business Machines Corporation Dispatching multiple threads in a computer
US20160055579A1 (en) 2014-08-22 2016-02-25 Vmware, Inc. Decreasing time to market of a pre-configured hyper-converged computing device
CN104539684B (zh) * 2014-12-23 2018-07-06 广州亦云信息技术有限公司 一种用户机器资源抽取整合方法及系统
US10853104B2 (en) * 2015-02-27 2020-12-01 Plasma Business Intelligence, Inc. Virtual environment for simulating a real-world environment with a large number of virtual and real connected devices
US9465664B1 (en) * 2015-09-09 2016-10-11 Honeywell International Inc. Systems and methods for allocation of environmentally regulated slack
FR3041788B1 (fr) 2015-09-30 2018-02-02 Zcost Management Procede de controle de la capacite d'utilisation d'un systeme partitionne de traitement de donnees.
US10680852B2 (en) * 2016-07-14 2020-06-09 Hewlett Packard Enterprise Development Lp Configuration of a managed device
US10693732B2 (en) 2016-08-03 2020-06-23 Oracle International Corporation Transforming data based on a virtual topology
US10389628B2 (en) 2016-09-02 2019-08-20 Oracle International Corporation Exposing a subset of hosts on an overlay network to components external to the overlay network without exposing another subset of hosts on the overlay network
US10802835B2 (en) * 2016-12-15 2020-10-13 Nutanix, Inc. Rule-based data protection
US10291507B2 (en) 2017-02-13 2019-05-14 Oracle International Corporation Implementing a virtual tap in a virtual topology
US10462013B2 (en) * 2017-02-13 2019-10-29 Oracle International Corporation Implementing a single-addressable virtual topology element in a virtual topology
CN107301034A (zh) * 2017-08-09 2017-10-27 葛松芬 一种并行处理器阵列结构
DE102018131613A1 (de) * 2018-04-10 2019-10-10 Infineon Technologies Ag Fehlererkennung mittels Gruppenfehler
US11256531B2 (en) * 2019-06-20 2022-02-22 International Business Machines Corporation Isolating physical processors during optimization of VM placement
CN112748960B (zh) * 2019-10-30 2025-02-25 腾讯科技（深圳）有限公司 一种进程控制方法、装置、电子设备及存储介质
CN113867791B (zh) * 2020-06-30 2023-09-26 上海寒武纪信息科技有限公司 一种计算装置、芯片、板卡、电子设备和计算方法
US11782872B2 (en) 2022-03-07 2023-10-10 International Business Machines Corporation Distribution of over-configured logical processors

Family Cites Families (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US585994A (en) * 1897-07-06 Administrator of alexander
US3825895A (en) 1973-05-14 1974-07-23 Amdahl Corp Operand comparator
US3982229A (en) 1975-01-08 1976-09-21 Bell Telephone Laboratories, Incorporated Combinational logic arrangement
US4713750A (en) 1983-03-31 1987-12-15 Fairchild Camera & Instrument Corporation Microprocessor with compact mapped programmable logic array
US4569016A (en) 1983-06-30 1986-02-04 International Business Machines Corporation Mechanism for implementing one machine cycle executable mask and rotate instructions in a primitive instruction set computing system
US4578750A (en) 1983-08-24 1986-03-25 Amdahl Corporation Code determination using half-adder based operand comparator
US5113523A (en) 1985-05-06 1992-05-12 Ncube Corporation High performance computer system
JPS6382513A (ja) 1986-09-26 1988-04-13 Toshiba Corp バレルシフタ
US5859994A (en) 1992-08-10 1999-01-12 Intel Corporation Apparatus and method for modifying instruction length decoding in a computer processor
WO1994027215A1 (en) * 1993-05-07 1994-11-24 Apple Computer, Inc. Method for decoding guest instructions for a host computer
US6067613A (en) 1993-11-30 2000-05-23 Texas Instruments Incorporated Rotation register for orthogonal data transformation
US5551013A (en) * 1994-06-03 1996-08-27 International Business Machines Corporation Multiprocessor for hardware emulation
US5748950A (en) 1994-09-20 1998-05-05 Intel Corporation Method and apparatus for providing an optimized compare-and-branch instruction
EP0730220A3 (en) 1995-03-03 1997-01-08 Hal Computer Systems Inc Method and device for quickly executing branch instructions
US5632028A (en) 1995-03-03 1997-05-20 Hal Computer Systems, Inc. Hardware support for fast software emulation of unimplemented instructions
US5732242A (en) 1995-03-24 1998-03-24 Silicon Graphics, Inc. Consistently specifying way destinations through prefetching hints
US5790825A (en) * 1995-11-08 1998-08-04 Apple Computer, Inc. Method for emulating guest instructions on a host computer through dynamic recompilation of host instructions
JP3790607B2 (ja) 1997-06-16 2006-06-28 松下電器産業株式会社 Ｖｌｉｗプロセッサ
US6223256B1 (en) 1997-07-22 2001-04-24 Hewlett-Packard Company Computer cache memory with classes and dynamic selection of replacement algorithms
US6112293A (en) 1997-11-17 2000-08-29 Advanced Micro Devices, Inc. Processor configured to generate lookahead results from operand collapse unit and for inhibiting receipt/execution of the first instruction based on the lookahead result
US6009261A (en) * 1997-12-16 1999-12-28 International Business Machines Corporation Preprocessing of stored target routines for emulating incompatible instructions on a target processor
US6308255B1 (en) * 1998-05-26 2001-10-23 Advanced Micro Devices, Inc. Symmetrical multiprocessing bus and chipset used for coprocessor support allowing non-native code to run in a system
US6463582B1 (en) * 1998-10-21 2002-10-08 Fujitsu Limited Dynamic optimizing object code translator for architecture emulation and dynamic optimizing object code translation method
AU774397B2 (en) 1999-06-30 2004-06-24 Mochida Pharmaceutical Co., Ltd. Tricyclic compounds having spiro union
WO2001023974A2 (en) * 1999-09-28 2001-04-05 International Business Machines Corporation Workload management in a computing environment
US6446197B1 (en) 1999-10-01 2002-09-03 Hitachi, Ltd. Two modes for executing branch instructions of different lengths and use of branch control instruction and register set loaded with target instructions
US6763327B1 (en) 2000-02-17 2004-07-13 Tensilica, Inc. Abstraction of configurable processor functionality for operating systems portability
US6738895B1 (en) 2000-08-31 2004-05-18 Micron Technology, Inc. Method and system for substantially registerless processing
US7165101B2 (en) 2001-12-03 2007-01-16 Sun Microsystems, Inc. Transparent optimization of network traffic in distributed systems
US7493480B2 (en) 2002-07-18 2009-02-17 International Business Machines Corporation Method and apparatus for prefetching branch history information
US7140021B2 (en) * 2002-09-13 2006-11-21 Microsoft Corporation Dynamic TCP partitioning
US7337442B2 (en) 2002-12-03 2008-02-26 Microsoft Corporation Methods and systems for cooperative scheduling of hardware resource elements
WO2005022384A1 (en) 2003-08-28 2005-03-10 Mips Technologies, Inc. Apparatus, method, and instruction for initiation of concurrent instruction streams in a multithreading microprocessor
US8621458B2 (en) 2004-12-21 2013-12-31 Microsoft Corporation Systems and methods for exposing processor topology for virtual machines
US8335810B2 (en) 2006-01-31 2012-12-18 Qualcomm Incorporated Register-based shifts for a unidirectional rotator
US7693811B2 (en) 2006-02-28 2010-04-06 International Business Machines Corporation Generating unique identifiers for logical partitions
US8352950B2 (en) * 2008-01-11 2013-01-08 International Business Machines Corporation Algorithm to share physical processors to maximize processor cache usage and topologies
US7739434B2 (en) * 2008-01-11 2010-06-15 International Business Machines Corporation Performing a configuration virtual topology change and instruction therefore
US7734900B2 (en) 2008-01-11 2010-06-08 International Business Machines Corporation Computer configuration virtual topology discovery and instruction therefore
WO2010023974A1 (ja) * 2008-08-27 2010-03-04 独立行政法人農業生物資源研究所 広範な病害抵抗性を付与するイネ遺伝子

Also Published As

Publication number Publication date
US20130024659A1 (en) 2013-01-24
US20190317828A1 (en) 2019-10-17
US8301815B2 (en) 2012-10-30
EP2223203A1 (en) 2010-09-01
DK2223203T3 (da) 2012-04-02
US8819320B2 (en) 2014-08-26
US8015335B2 (en) 2011-09-06
CN101911012A (zh) 2010-12-08
US10055261B2 (en) 2018-08-21
KR101221252B1 (ko) 2013-01-14
SI2223203T1 (sl) 2012-05-31
CY1112504T1 (el) 2015-12-09
JP2011509478A (ja) 2011-03-24
US10621007B2 (en) 2020-04-14
US20110283280A1 (en) 2011-11-17
PT2223203E (pt) 2012-03-29
US10372505B2 (en) 2019-08-06
EP2223203B1 (en) 2012-02-22
US10061623B2 (en) 2018-08-28
ATE546774T1 (de) 2012-03-15
US7739434B2 (en) 2010-06-15
US20100095033A1 (en) 2010-04-15
US20180107495A9 (en) 2018-04-19
ES2379575T3 (es) 2012-04-27
WO2009087233A9 (en) 2009-09-24
KR20100106449A (ko) 2010-10-01
WO2009087233A1 (en) 2009-07-16
US20090182915A1 (en) 2009-07-16
PL2223203T3 (pl) 2012-07-31
US20170308392A1 (en) 2017-10-26
US20140337602A1 (en) 2014-11-13
CN101911012B (zh) 2013-07-24
US20190004867A1 (en) 2019-01-03

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