JP5171725B2 - Hall element manufacturing method and hall element - Google Patents

Description

  The present invention relates to a method of manufacturing a Hall element using a semiconductor single crystal material. More specifically, the present invention improves the material efficiency of the semiconductor single crystal material and further stabilizes the electrical connection between the Hall element and the electrode. It is about technology.

  The Hall element is a magnetic sensor that is formed of a semiconductor thin film having a thickness of several μm and converts the electric field or magnetic field into an electric signal by using the Hall effect and outputs the electric signal. Usually, the semiconductor thin film is made of InSb or InAs. It is used.

  There are several known manufacturing methods. For example, in the invention described in Patent Document 1, first, as shown in FIG. 2A, a silicon wafer 26 is used as a support, and the silicon wafer 26 is used. A thin insulating layer 28 of silicon dioxide is formed by performing an oxidation treatment on one surface side. Then, a semiconductor thin film 30 is formed on the insulating layer 28.

  Next, as shown in FIG. 2B, an element 32 is formed on the semiconductor thin film 30 by photolithography or the like, and an ohmic electrode 34 used as an input electrode and an output electrode is formed around the element 32.

Then, as shown in FIG. 2c, an insulating film 36 covering the element 32 and the ohmic electrode 34 is formed by Si ₃ N ₄ (silicon nitride) or the like, and then, on the insulating film 36 as shown in FIG. 2d. The element substrate 38 is bonded through the adhesive layer 40.

  Next, as shown in FIG. 2e, the silicon wafer 26 is removed by etching to expose the insulating layer 28. Then, the insulating layer 28 is etched, and as shown in FIG. Open.

  Thereafter, as shown in FIG. 2 g, the electrode terminal 44 of the ohmic electrode 34 is formed so as to fill the hole 42, and the insulating film 46 is formed on the remaining insulating layer 28. After conducting the electrical characteristic test, as a final step, dicing is performed at the position of the alternate long and short dash line 48 to obtain individual Hall elements.

  According to this manufacturing method, since the insulating layer 28 of silicon dioxide is formed on the silicon wafer 26 by surface oxidation, an insulating film that is thin but dense and has excellent insulating performance can be obtained. Overall thinning and high sensitivity can be achieved.

Japanese Patent No. 3161610

  However, in the above prior art, when the element 32 is formed by patterning the semiconductor thin film 30 on the insulating layer 28, it is necessary to secure a formation region of the ohmic electrode 34 around the element 32. Can not be formed. Further, there is a problem that the semiconductor material to be removed by patterning increases, and the material efficiency of the semiconductor material to be used is not good.

  In addition, it is necessary to coat the adhesive layer 40 thickly to cover the unevenness of the element, and as a result, the magnetic resistance of the magnetic circuit including the Hall element increases and the element sensitivity decreases. is there.

  In addition, when the element 32 is formed by photolithography or the like, the end face of the element 32 may be reversely tapered. If the ohmic electrode 34 is formed in this state, the ohmic electrode 34 is cut at the edge of the element 32. In other words, so-called electrode breakage may occur.

  In addition, as shown in FIG. 2g, when individual Hall elements are cut out by dicing, the thick laminate including the adhesive layer 40 is diced, so that there is a problem that the life of the dicing blade is shortened.

  Therefore, the object of the present invention is to increase the degree of integration of elements in manufacturing the Hall element, improve the material efficiency of the semiconductor single crystal material, and make the electrical connection between the element and the electrode highly reliable, Another object is to extend the life of the dicing blade.

  In order to solve the above-described problems, the Hall element manufacturing method of the present invention includes stacking a layer of a semiconductor single crystal material used as a Hall element via a peelable adhesive layer on one side of a manufacturing support substrate. Polishing the layer of the semiconductor single crystal material to form a semiconductor single crystal thin film, separating the semiconductor single crystal thin film into individual elements to form a plurality of chips, and from the mother core substrate to the above An insulating layer is formed on a core substrate previously cut to the size of the Hall element, and an electrode portion including a pair of input electrodes and output electrodes is formed on the insulating layer using a conductive adhesive. And a step of peeling the chip from the adhesive layer and mounting the chip on the electrode part.

  According to a preferred aspect of the present invention, after the chip is mounted on the electrode portion, a protective film is formed on the mounting surface side.

  Moreover, InSb or InAs is preferably employed as the semiconductor single crystal material. The core substrate is made of a magnetic material.

  The present invention also includes a Hall element manufactured by the above manufacturing method.

  According to the present invention, the Hall element chip is formed to be peelable from the semiconductor single crystal thin film on the manufacturing support substrate side, and in a separate process, on the core substrate previously cut to the size of the Hall element. An insulating layer is formed, an electrode portion including a pair of input electrodes and an output electrode is formed on the insulating layer using a conductive adhesive, and the chip peeled off from the support substrate is used as the electrode portion of the core substrate. As a result, it is possible to improve the material efficiency of the semiconductor single crystal material and obtain more chips.

  Further, by using a conductive adhesive, the chip transfer process can be simplified. In other words, by using a silk-printed conductive adhesive, the two processes of bonding and electrode formation can be combined into one and the magnetic resistance of the magnetic circuit including the Hall element can be made small, so a highly sensitive Hall element is produced. be able to.

  Further, since the chip is mounted on the electrode portion made of a conductive adhesive formed in advance, it is possible to eliminate the disconnection of the electrode.

  Moreover, even if the substrate is diced, it is possible to extend the life of the dicing blade because only the mother core substrate to which no adhesive or the like is applied is diced.

The typical sectional view for explaining the manufacturing method of the Hall element of the present invention. The typical sectional view for explaining the manufacturing method of the Hall element of the present invention. The typical sectional view for explaining the manufacturing method of the Hall element of the present invention. The typical perspective view for demonstrating the manufacturing method of the Hall element of this invention. The typical perspective view for demonstrating the manufacturing method of the Hall element of this invention. The typical sectional view for explaining the manufacturing method of the Hall element of the present invention. Typical sectional drawing for demonstrating the manufacturing method of the Hall element by a prior art. Typical sectional drawing for demonstrating the manufacturing method of the Hall element by a prior art. Typical sectional drawing for demonstrating the manufacturing method of the Hall element by a prior art. Typical sectional drawing for demonstrating the manufacturing method of the Hall element by a prior art. Typical sectional drawing for demonstrating the manufacturing method of the Hall element by a prior art. Typical sectional drawing for demonstrating the manufacturing method of the Hall element by a prior art. Typical sectional drawing for demonstrating the manufacturing method of the Hall element by a prior art.

  Next, an embodiment of the present invention will be described with reference to FIGS. 1a to 1f, but the present invention is not limited to this.

  First, as shown in FIG. 1 a, an adhesive layer 12 is formed by applying a peelable adhesive to one side of a manufacturing support substrate 11, and a semiconductor single crystal material is formed on the adhesive layer 12. Layer 13 is laminated.

  An example of the peelable adhesive is WaferBOND (trade name) manufactured by Nissan Chemical Co., Ltd. In order to obtain high sensitivity, InSb (indium antimony), InAs (indium arsenic), or the like is preferably used as the semiconductor single crystal material.

  In this embodiment, the semiconductor single crystal material is layered in advance on the adhesive layer 12, but the semiconductor single crystal material layer 13 may be stacked on the adhesive layer 12 by sputtering or the like.

  Next, as shown in FIG. 1b, the laminated semiconductor single crystal material layer 13 is uniformly polished to form a semiconductor single crystal thin film 14 of, for example, 5 μm or less.

  Then, as shown in FIG. 1c, the semiconductor single crystal thin film 14 is patterned by photolithography or the like to form a Hall element chip 14a. The chip 14a is easily peeled off from the support substrate 11 and can be transported as a single unit.

  In this case, since it is not necessary to secure an electrode formation region around the chip 14a, more chips 14a can be obtained from the semiconductor single crystal thin film 14. That is, the material efficiency of the semiconductor single crystal material to be used can be improved.

  In addition, there is a method of patterning the semiconductor single crystal material layer 13 and separating it into a plurality of chips 14a, and then polishing to make a thin film. However, this may cause dripping due to polishing at the edge portion. It is preferable to perform the polishing first.

  Next, referring to FIG. 1d, as a separate process, an insulating layer 22 is formed on a core substrate 21 that has been cut in advance to the size of the Hall element from a mother core substrate (not shown) by dicing, An electrode portion 25 including a pair of input electrodes 23 and 23 and output electrodes 24 and 24 is formed by silk printing or the like with a conductive adhesive.

  When the core substrate 21 is cut out from the mother core substrate, since the insulating layer and the adhesive layer are not formed on the mother core substrate, dicing can be easily performed, and the life of the dicing blade can be extended.

  Then, as shown in FIG. 1 e, the chip 14 a peeled from the support substrate 11 is mounted on the electrode portion 25. That is, the chip 14a is fitted into the space surrounded by the input electrodes 23, 23 and the output electrodes 24, 24, and the chip 14a is electrically and mechanically connected to the input electrodes 23, 23 and the output electrodes 24, 24. Connect to. Thereby, the target Hall element 10 is formed.

  According to this manufacturing method, even if the end surface of the chip 14a has a reverse taper surface due to patterning, the conductive adhesive is deformed so as to conform to it, so that no electrode breakage or the like occurs. High reliability is obtained for electrical and mechanical connections. Rather, when the tip 14a is fitted between the electrodes 23, 23; 24, 24, it can be said that the end surface of the tip 14a is preferably an inversely tapered surface.

Preferably, after inspecting the electrical characteristics of the Hall element 10, as shown in FIG. 1f, the chip 14a and the electrode portion are made of SiO ₂ (silicon dioxide), Si ₃ N ₄ (silicon nitride) or the like as a final process. A protective film 31 is formed on 25.

  When the Hall element 10 is used, a lead wire (not shown) is connected to the input electrodes 23 and 23 and the output electrodes 24 and 24, so that a region where the protective film 31 is not formed is provided. The protective film 31 may be formed after connecting lead wires to the output electrodes 24 and 24.

DESCRIPTION OF SYMBOLS 10 Hall element 11 Manufacturing support substrate 12 Adhesive layer 13 Layer of semiconductor single crystal material 14 Semiconductor single crystal thin film 14a Chip 21 Core substrate 22 Insulating layer 23 Input electrode 24 Output electrode 25 Electrode portion 31 Protective film

Claims (5)

In the Hall element manufacturing method,
A step of laminating a layer of a semiconductor single crystal material used as a Hall element via a peelable adhesive layer on one surface side of a support substrate in production;
Polishing the layer of the semiconductor single crystal material to form a semiconductor single crystal thin film;
Separating the semiconductor single crystal thin film into individual elements to form a plurality of chips;
An electrode including an insulating layer formed on a core substrate cut in advance from the mother core substrate to the size of the Hall element, and a pair of input electrodes and output electrodes using a conductive adhesive on the insulating layer. Forming a part;
And a step of peeling the chip from the adhesive layer and mounting the chip on the electrode part.   The method for manufacturing a Hall element according to claim 1, wherein after the chip is mounted on the electrode portion, a protective film is formed on the mounting surface side.   3. The Hall element manufacturing method according to claim 1, wherein InSb or InAs is used as the semiconductor single crystal material.   4. The Hall element manufacturing method according to claim 1, wherein the core substrate is made of a magnetic material.   A Hall element manufactured by the Hall element manufacturing method according to claim 1.

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