JP5149023B2 - Switching power supply circuit - Google Patents

Description

  The present invention relates to a switching power supply circuit, and more particularly to a switching power supply circuit that generates a DC voltage from a commercial AC power supply used in an AC adapter, LED lighting, and the like.

  The switching power supply circuit is mounted on a system that needs to generate a DC voltage from a commercial AC power supply such as an AC adapter or LED lighting.

  As an example of a conventional switching power supply circuit, there is a switching power supply disclosed in Patent Document 1 below. FIG. 12 shows a circuit diagram of a switching power supply disclosed in Patent Document 1 below.

  The switching power supply circuit shown in FIG. 12 includes a transformer T1 having a primary winding N1, a secondary winding N2, and a tertiary winding N3, a DC power supply E1, two resistors R7 and R8, and a constant voltage diode ZD2. Two transistors TR3 and TR4, a capacitor C1, a diode D1, and a control circuit B1 for controlling switching of the transistor TR3 are configured, and a load R0 is connected to both ends of the secondary winding N2.

  In this power supply circuit, the control circuit B1 is disposed on the primary side, and is activated until the transistor TR3 operates and the power consumption of the control circuit B1 is supplied from the tertiary winding N3 of the transformer T1 via the diode D1. During the period, the starting voltage is supplied to the control circuit B1 from the constant voltage circuit composed of the resistor R7, the constant voltage diode ZD2, the resistor R8, the transistor TR4, and the capacitor C1 from the DC power supply E1 having a high voltage, and the consumption of the control circuit B1 Electricity is covered. Here, during the start-up period, the consumption current of the control circuit B1 and the charging current of the capacitor C1 flow through the resistor R8 and the transistor TR4 simultaneously.

  For this reason, when the voltage is applied to the capacitor C1 from the tertiary winding N3 of the transformer T1 via the diode D1 after startup, and the voltage of the capacitor C1 becomes higher than the voltage of the constant voltage diode ZD2, the transistor TR4 is turned off. Thus, the current flowing through the resistor R8 and the transistor TR4 is cut off.

  As another example of a conventional switching power supply circuit, there is a switching power supply (DC-DC converter) disclosed in Patent Document 2 below. FIG. 13 shows a circuit diagram of a switching power supply disclosed in Patent Document 2 below.

  The switching power supply circuit shown in FIG. 13 is a general flyback converter circuit 40, a switching transistor Tr0 connected to a primary winding of a transformer T constituting the converter circuit 40, and a switching drive of the transistor Tr0. A switch drive circuit 30 (corresponding to the control circuit B1 of the switching power supply circuit shown in FIG. 12), a switching circuit 50 that supplies the switch drive circuit 30 with a starting voltage supplied from the input DC voltage Vin of the converter circuit 40, and a converter circuit The diode D 2 is configured to supply a power supply voltage from the 40 output DC voltage Vout to the switch drive circuit 30.

  The switching circuit 50 includes three transistors Tr1, Tr2, Tr3, four resistors R2, R3, R4, R5, and a capacitor C4. In the switching circuit 50 having such a configuration, in the start-up period until the output DC voltage Vout of the converter circuit 40 reaches the specified voltage, the transistor Tr2 is off and the transistor Tr3 is on, and the base current of the transistor Tr1 is the resistance R5. The transistor Tr1 is turned on. As a result, the input DC voltage Vin is supplied as a power supply voltage to the two inverters 31 and 32 of the switch drive circuit 30, and a pulse signal is supplied to the transistor Tr0, whereby the transistor Tr0 is repeatedly turned on and off.

  Thereafter, when the output DC voltage Vout of the converter circuit 40 reaches a specified voltage, the transistor Tr2 is turned on, the transistor Tr3 is turned off, and the base current path of the transistor Tr1 is opened, so that the transistor Tr1 is turned off. Thus, the two inverters 31 and 32 of the switch drive circuit 30 are supplied with the output DC voltage Vout of the converter circuit 40 via the diode D4 and the operation is maintained, and the pulse signal is continuously supplied to the transistor Tr0.

  In the switching power supply circuit shown in FIG. 13, the bipolar transistor Tr0 is used as a switching transistor. However, even if a MOS transistor is used, the same effect can be obtained.

Japanese Examined Patent Publication No. 4-65633 (Fig. 1) Japanese Patent No. 3811174 (FIG. 2)

  In the conventional switching power supply circuit shown in FIG. 12, a voltage obtained by subtracting the Zener voltage of the constant voltage diode ZD2 from the voltage of the DC power supply E1 is applied to the resistor R7 for supplying a bias current to the constant voltage diode ZD2. However, in a system using a commercial AC power supply, the voltage of the DC power supply E1 is 100 V or higher because it is a voltage obtained by rectifying the AC commercial power supply. On the other hand, a voltage of about several volts may be used to operate the control circuit B1, and since the Zener voltage of the constant voltage diode ZD2 is several volts, a voltage of about 100V is applied to the resistor R7. The resistor R7 has a restriction that a large-sized component must be used in order to ensure a withstand voltage.

  In addition, a constant voltage diode or the like is required to determine the voltage supplied to the control circuit B1 at the time of start-up, and reduction of the component size and the number of components is particularly demanded for an AC adapter that is required to be downsized.

  Further, it is necessary to flow a bias current through the constant voltage diode ZD2, and unnecessary current consumption occurs. Furthermore, a resistor R8 having a high withstand voltage for controlling the charging current of the capacitor C1 is necessary for the purpose of reducing the inrush current at the time of startup.

  In addition, since the starting circuit transistor TR4 and the switching transistor TR3 are not connected in a circuit, it is difficult to put them in one package, and as a result, there is a problem that the size of the switching power supply circuit becomes large. It was.

  In the conventional switching power supply circuit shown in FIG. 13, a voltage obtained by subtracting the base-emitter voltage of the transistor Tr3 from the input DC voltage Vin is applied to the resistor R4 for supplying the base current of the transistor Tr3. However, in a system using a commercial AC power supply, the voltage of the input DC voltage Vin becomes a voltage obtained by rectifying the AC commercial power supply, and thus becomes 100 V or more, while the voltage between the base and emitter of the transistor Tr3 is about 0. As a result, a voltage of about 100 V is applied to the resistor R4, and there is a restriction that a large-sized component must be used for the resistor R4 in order to ensure a withstand voltage.

  Further, since a voltage of about several volts is sufficient to operate the switch drive circuit 30, a voltage of about 100 V is applied between the collector and emitter of the transistor Tr1, so that the transistor Tr1 ensures a withstand voltage. Large parts must be used. Furthermore, large-sized parts must be used in order to ensure a breakdown voltage of about 100 V between the collector and emitter of the transistor Tr3.

  In this conventional switching power supply circuit, when the switch drive circuit 30 is activated and the output DC voltage Vout of the converter circuit 40 is generated, the transistor Tr2 is turned on, and the base current of the transistor Tr3 is reduced, whereby the transistor Tr3 is turned on. The switching circuit 50 is turned off to stop, but a plurality of transistors and resistors are required, and in the AC adapter that is required to be downsized, the reduction of the component size and the number of components has been a particular problem.

  Further, in order to stop the transistor Tr3, it is necessary to turn on the transistor Tr2. Therefore, it is necessary to flow the base current of the transistor Tr2 and the collector current of the transistor Tr2, and unnecessary current consumption occurs.

  Furthermore, since the transistor of the switching circuit 50 and the switching transistor Tr0 are not connected in a circuit, it is difficult to put them in one package, and as a result, the size of the switching power supply circuit becomes large. was there.

  The present invention has been made in view of the problems in the above-described conventional switching power supply circuit, and its purpose is to supply a starting voltage generated from an input DC voltage to a control circuit that controls on / off of the switching transistor. In the circuit, the present invention is to provide a switching power supply circuit in which the number of components is reduced, the circuit size is reduced, and the current consumption is reduced.

  In order to achieve the above object, a switching power supply circuit according to the present invention includes a transformer having a primary winding, a secondary winding, and a tertiary winding, and a second rectifying / smoothing connected between both ends of the secondary winding. A circuit, a first rectifying and smoothing circuit connected between both ends of the tertiary winding, a first terminal connected to one end of the primary winding, a second terminal connected to a ground potential, and the primary A first transistor for switching on / off of a current flowing through the winding, and a control pulse for connecting a power supply terminal to the output of the first rectifying and smoothing circuit and controlling on / off of the first transistor in accordance with a terminal voltage of the power supply terminal A control circuit that outputs the control pulse to a control terminal that controls ON / OFF between the first and second terminals of the first transistor, and a drain that is either one of both ends of the primary winding. Connect and connect Scan connects directly or via a diode to the power supply terminal of the control circuit, the first feature that the gate is provided with a second transistor of the depletion type MOSFET connected to the ground potential.

  In the switching power supply circuit according to the present invention, in addition to the first feature, an input DC voltage input to the other end of the primary winding is changed in voltage value through the second transistor, A voltage applied to the power supply terminal of the control circuit, and a voltage at which the second transistor is pinched off from a voltage in an initial state before the input DC voltage is input to the other end of the primary winding. The oscillation of the control pulse of the control circuit is stopped until the voltage reaches the voltage at which the power supply terminal reaches a voltage at which the second transistor is pinched off. The second feature is that oscillation starts.

  According to the switching power supply circuit of the first or second feature, there is one starter circuit that supplies a starter voltage generated from an input DC voltage to a control circuit that controls on / off of the first transistor that is a switching transistor. Since it is composed of only the second transistor made up of a depletion type MOSFET, the number of parts of the startup circuit can be reduced, the circuit size can be reduced, and the current consumption can be reduced. That is, since the second transistor is a depletion type MOSFET, the source potential of the second transistor is higher than the ground potential of the control circuit by the pinch-off voltage of the second transistor, and the pinch-off voltage (the source of the second transistor is the control circuit). Or a voltage obtained by subtracting the forward junction bias of the diode from the pinch-off voltage (when the source of the second transistor is connected to the power supply terminal of the control circuit via the diode). Even if the input DC voltage applied to the other power supply terminal and input to the other end of the primary winding rises, the terminal voltage of the power supply terminal of the control circuit is clamped to a constant voltage. Therefore, it becomes possible to set the constant voltage or a value near the constant voltage as a constant starting voltage of the control circuit. As a result, in a conventional switching power supply circuit, the constant voltage is supplied to the control circuit without using a constant voltage diode or a high withstand voltage resistor that supplies a bias current to the constant voltage diode, which is necessary for determining a constant voltage starting voltage. The starting voltage can be supplied.

  In particular, according to the switching power supply circuit of the second feature, since the constant voltage applied to the power supply terminal of the control circuit becomes the start-up voltage, the control circuit starts oscillation of the control pulse, and the first rectification smoothing When the voltage supply from the circuit side to the power supply terminal is started, the second transistor is pinched off, and the current supply from the second transistor to the control circuit is cut off. Therefore, the second transistor is an activation circuit that supplies an activation voltage to the control circuit. Current consumption can be completely cut off, and power consumption can be reduced.

  Here, when the starting voltage is slightly lower than the constant voltage, the control circuit starts oscillation of the control pulse before the terminal voltage of the power supply terminal reaches the constant voltage, and drives the switching operation of the first transistor, Since the voltage supply from the first rectifying / smoothing circuit side to the power supply terminal starts, the second transistor does not temporarily pinch off until the terminal voltage reaches the constant voltage, and passes through the second transistor which is the starting circuit. However, a reduction in the number of parts of the start-up circuit and a reduction in circuit size are achieved in the same manner.

  Further, when the starting voltage is slightly lower than the above-mentioned constant voltage, the switching of the first transistor is performed when the drain of the second transistor is connected to one end of the primary winding, like the first terminal of the first transistor. Even if the operation is turned off, a current path that passes through the second transistor is generated. Therefore, the switching efficiency is temporarily lowered until the terminal voltage reaches the constant voltage. Therefore, the constant voltage is preferably the starting voltage.

  In the switching power supply circuit according to the present invention, in addition to the first or second feature, the first terminal of the first transistor is connected to one end of the primary winding, and the second transistor The drain of the second transistor is connected to the other end of the primary winding, the source of the second transistor is connected to the power supply terminal of the control circuit directly or via a diode, and the back gate of the second transistor is the source It is the third feature that it is connected.

  According to the switching power supply circuit of the third feature, as soon as the input DC voltage input to the other end of the primary winding rises, the second transistor, which is a starting circuit for supplying a starting voltage to the control circuit, starts operating. Therefore, the startup time until the control circuit starts oscillation of the control pulse is shortened. Further, during the switching operation in which the control circuit starts oscillation of the control pulse and the first transistor repeatedly turns on and off, the first transistor and the second transistor are separated from each other. A current does not flow backward from the power supply terminal to the drain of the first transistor, or a leakage current from the drain of the first transistor to the power supply terminal of the control circuit does not occur when the first transistor is turned off. For this reason, it is not always necessary to provide a backflow prevention diode between the second transistor and the power supply terminal of the control circuit, and the number of components constituting the starting circuit can be reduced.

  In addition to the first or second feature, the switching power supply circuit according to the present invention further includes the first terminal of the first transistor and the drain of the second transistor at one end of the primary winding. The fourth transistor is connected to each other, the source of the second transistor is connected to the power supply terminal of the control circuit via a diode, and the back gate of the second transistor is connected to the source of the second transistor. It is characterized by.

  In addition to the first or second feature, the switching power supply circuit according to the present invention further includes the first terminal of the first transistor and the drain of the second transistor at one end of the primary winding. A fifth feature is that the second transistors are connected to each other, the source of the second transistor is connected to the power supply terminal of the control circuit directly or via a diode, and the back gate of the second transistor is connected to the ground potential. And

  According to the switching power supply circuit of the fourth or fifth feature, when the input DC voltage input to the other end of the primary winding rises, the startup circuit supplies the startup voltage to the control circuit via the primary winding. Since the current is supplied to the second transistor, the start circuit operation starts slowly, and the inrush current at the start can be reduced.

  Here, in the switching power supply circuit having the fifth feature, in the switching operation in which the control circuit starts oscillating the control pulse and the first transistor repeatedly turns on and off, the first transistor is turned on, the drain of the second transistor, When the voltage between the sources is inverted, even if the second transistor is pinched off, the current flows back through the back gate of the second transistor because the back gate and the source of the second transistor are connected. Since the diode is provided between the source of the second transistor and the power supply terminal of the control circuit, the backflow can be prevented, and the normal switching operation of the first transistor is maintained.

  On the other hand, according to the switching power supply circuit of the fifth feature, since the back gate and the source of the second transistor are separated, the reverse flow does not occur, so that the source of the second transistor and the power supply terminal of the control circuit are not connected. It is not always necessary to provide a diode, and the number of parts constituting the starting circuit can be reduced.

  The switching power supply circuit according to the present invention is characterized in that, in addition to any of the first to fifth features, the first transistor and the second transistor are formed on the same semiconductor substrate. Features.

  According to the switching power supply circuit of the sixth feature, since the first transistor and the second transistor are formed on the same semiconductor substrate, they can be easily accommodated in one package, and the switching power supply circuit can be further downsized. I can plan.

  In addition to any of the first to sixth features, the switching power supply circuit according to the present invention further includes the first transistor, the first terminal being a drain, the second terminal being a source, and the control terminal being a A seventh feature is that the gate enhancement type MOSFET.

  According to the switching power supply circuit of the seventh feature, since the first transistor and the second transistor are the same MOSFET, it is easy to form on the same semiconductor substrate.

  In addition to the fourth feature described above, the switching power supply circuit according to the present invention is further an enhancement-type MOSFET in which the first transistor is a drain, the second terminal is a source, and the control terminal is a gate. And the gate of the second transistor, the source and back gate of the first transistor are connected to a ground potential, and the source of the first transistor and the source of the second transistor are formed in different wells on the same semiconductor substrate. The drain of the first transistor and the drain of the second transistor are formed in the same drift region on the same semiconductor substrate, and the second well forming the back gate of the second transistor is formed in the drift region. This is an eighth feature.

  In the switching power supply circuit according to the present invention, in addition to the eighth feature, the gate of the second transistor extends on a first well forming a back gate of the first transistor, and the first transistor A ninth feature is that the well and the gate of the second transistor are connected to the ground potential using the same contact material.

  In addition to the fifth feature, the switching power supply circuit according to the present invention is an enhancement-type MOSFET in which the first transistor is a drain, the second terminal is a source, and the control terminal is a gate. The gate and back gate of the second transistor, the source and back gate of the first transistor are connected to the ground potential, and the source of the first transistor and the source of the second transistor are in the same well on the same semiconductor substrate. A tenth feature is that the drain of the first transistor and the drain of the second transistor are formed in the same drift region on the same semiconductor substrate.

  In addition to the tenth feature, the switching power supply circuit according to the present invention further has an eleventh feature in which the well and the gate of the second transistor are connected to a ground potential using the same contact material. And

  According to the switching power supply circuit of the eighth to eleventh features, the first transistor and the second transistor can be formed compactly on the same semiconductor substrate, with the drains of both transistors in common. The first transistor and the second transistor in the switching power supply circuit of the fourth or fifth feature can be efficiently formed on the same semiconductor substrate with a small chip area, and can be more easily accommodated in one package.

  In particular, according to the switching power supply circuit of the ninth or eleventh feature, the first transistor and the second transistor can be efficiently formed on the same semiconductor substrate with a smaller chip area.

  Next, an embodiment of a switching power supply circuit according to the present invention will be described with reference to the drawings.

<First Embodiment>
As shown in FIG. 1, a switching power supply circuit 1 according to the first embodiment of the present invention (hereinafter simply referred to as “present circuit 1”) includes a primary winding N1, a secondary winding N2, and a tertiary winding. A transformer T1 having a winding N3, a first rectifying / smoothing circuit 6 connected between both ends of the tertiary winding N3, a second rectifying / smoothing circuit 7 connected between both ends of the secondary winding N2, and an enhancement type n-channel MOSFET A first transistor Q1, a second transistor Q2 of a depletion type n-channel MOSFET, and a control circuit B1 are included.

  The drain of the first transistor Q1 is connected to one end n11 of the primary winding N1, and the other end n12 of the primary winding N1 is an input terminal, which is connected to the output of the DC power supply E1, and the input DC voltage Vin Is input to the input terminal n12.

  The anode of the diode D2 is connected to one end n21 of the secondary winding N2, the one end of the capacitor C2 is connected to the cathode of the diode D2, and the other end of the capacitor C2 is connected to the other end n22 of the secondary winding N2. Thus, the second rectifying / smoothing circuit 7 is configured. A DC load R0 is connected to both ends of the capacitor C2, and the output DC voltage Vout rectified by the second rectifying and smoothing circuit 7 is output from one end of the capacitor C2 to the load R0.

  The anode of diode D1 is connected to one end n31 of tertiary winding N3, one end of capacitor C1 is connected to the cathode of diode D1, and the other end n32 of tertiary winding N3 and the other end of capacitor C1 are both grounded. Thus, the first rectifying / smoothing circuit 6 is configured. The cathode of the diode D1 is connected to the power supply terminal Bvcc of the control circuit B1.

  The first transistor Q1 is a high breakdown voltage MOSFET adapted to the voltage value of the input DC voltage Vin, the source is grounded, the gate is connected to the output terminal Bout of the control circuit B1, and the current flowing through the primary winding N1 is turned on / off. It functions as a switching element that switches.

  In the first embodiment, the second transistor Q2 is a high breakdown voltage MOSFET adapted to the voltage value of the input DC voltage Vin, the drain is connected to the other end n12 of the primary winding N1, and the source is the power supply of the control circuit B1. The source follower circuit is directly connected to the terminal Bvcc, the gate is grounded, and the back gate is connected to the source. The second transistor Q2 constitutes an activation circuit that generates the activation voltage of the constant voltage control circuit B1 from the input DC voltage Vin by one element.

  The control circuit B1 functions as a switching drive circuit that generates a control pulse for controlling on / off of the first transistor Q1 according to the terminal voltage VB of the power supply terminal Bvcc, and outputs the control pulse from the output terminal Bout to the gate of the first transistor Q1. The control circuit B1 has a function of stabilizing the output DC voltage Vout to a constant voltage by adjusting the on / off time ratio of the first transistor Q1 in accordance with the increase in the terminal voltage VB. As the control circuit B1, a known circuit configuration used in a conventional switching power supply circuit can be used. For example, a circuit configuration such as the switch drive circuit 30 disclosed in Patent Document 2 can be used.

  Next, the operation of the circuit 1 of the present invention will be described. First, when the input DC voltage Vin is generated in the DC power supply E1, the voltage Vin is applied to the drain of the second transistor Q2. When the voltage Vin is generated in the DC power supply E1, no charge is accumulated in the capacitor C1, and there is no electromotive force in the tertiary winding N3 of the transformer T1, so that the source potential of the second transistor Q2 is the first potential. The voltage is 0 V, which is the same as the gate potential of the two transistors Q2.

  Immediately after the voltage is generated in the DC power supply E1, since the second transistor Q2 is a depletion type MOSFET, a current flows through the drain-source resistance between the drain and source of the second transistor Q2, and the capacitor C1 is charged. The potential of one end of C1, the power supply terminal Bvcc of the control circuit, and the source of the second transistor Q2 increases at a rate of increase with the product of the drain-source resistance of the second transistor Q2 and the capacitance of the capacitor C1 as a time constant. start.

  Thereafter, when the source potential of the second transistor Q2 rises and the gate-source voltage of the second transistor Q2 becomes substantially equal to the pinch-off voltage of the second transistor Q2, a current flows between the drain and source of the second transistor Q2. Almost no longer flows, and the rise of the source potential of the second transistor Q2, that is, the potential of the power supply terminal Bvcc of the control circuit B1 connected to the source of the second transistor Q2, stops.

  At this time, the control circuit B1 starts operation, outputs a control pulse for switching to the gate of the first transistor Q1, starts the switching operation in which the first transistor Q1 is repeatedly turned on and off, and starts secondary from the primary winding N1. Electric power is transmitted to winding N2 and tertiary winding N3. Note that the first transistor Q1 is in an off state during the start-up period until the control circuit B1 starts operating.

  The output voltage of the secondary winding N2 is AC, and the voltage is rectified by the diode D2, smoothed by the capacitor C2, and output to the load R0 as the output DC voltage Vout.

  On the other hand, the output voltage of the tertiary winding N3 is an alternating current, and the voltage is rectified by the diode D1 to further charge the capacitor C1 from the start of start-up (at the end of the start-up period). Is applied to the power supply terminal Bvcc of the control circuit B1 and the source of the second transistor Q2. This DC voltage (the terminal voltage VB of the power supply terminal Bvcc) further increases the source potential of the second transistor Q2, and the second transistor The startup period during which the gate-source voltage of Q2 is set to be equal to or higher than the pinch-off voltage of the second transistor Q2, no current flows between the drain and source of the second transistor Q2, and the capacitor C1 is charged via the second transistor Q2. The operation inside stops completely.

  Thereafter, power is supplied from the tertiary winding N3 to the power supply terminal Bvcc of the control circuit B1 via the first rectifying / smoothing circuit 6, the control pulse output of the control circuit B1 is maintained, and the first transistor Q1 is switched. The operation is continued, and the output DC voltage Vout is output from the secondary winding N2 via the second rectifying and smoothing circuit 7.

  As described above, the terminal voltage VB of the power supply terminal Bvcc does not rise above the source potential defined by the pinch-off voltage of the second transistor Q2, and is maintained at a constant voltage. Therefore, the pinch-off voltage of the second transistor Q2 is adjusted. By setting the constant voltage to the terminal voltage VB (starting voltage) of the power supply terminal Bvcc at which the control circuit B1 starts its operation or a value close to the starting voltage or higher, the power supply terminal Bvcc of the control circuit B1 is in the starting period. Is supplied with a voltage via the second transistor Q2, and after starting is started, power for maintaining the output of the control pulse is supplied from the first rectifying and smoothing circuit 6.

Second Embodiment
A switching power supply circuit 2 according to the second embodiment of the present invention (hereinafter abbreviated as “the present invention circuit 2” as appropriate) includes a primary winding N1, a secondary winding N2, and a tertiary winding as shown in FIG. A transformer T1 having a winding N3, a first rectifying / smoothing circuit 6 connected between both ends of the tertiary winding N3, a second rectifying / smoothing circuit 7 connected between both ends of the secondary winding N2, and an enhancement type n-channel MOSFET A first transistor Q1, a second transistor Q2 of a depletion type n-channel MOSFET, a backflow prevention diode D3, and a control circuit B1 are included.

  The present invention circuit 2 includes a primary winding N1, a secondary winding N2, a tertiary winding N3, a first rectifying and smoothing circuit 6, a second rectifying and smoothing circuit 7, a first transistor Q1, a control circuit B1, and a direct current. The connection relationship between the power supplies E1 and the individual circuit configurations are the same as those of the circuit 1 of the first embodiment, but the first winding N1, the first transistor Q1, and the first circuit for the control circuit B1. The connection between the two transistors Q2 and the diode D3 is different from the circuit 1 of the present invention of the first embodiment. Hereinafter, the connection relationship between the second transistor Q2 and the diode D3 will be described, and overlapping description of the same parts as those of the circuit 1 of the first embodiment will be omitted.

  In the second embodiment, the second transistor Q2 has a drain connected to one end n11 of the primary winding N1, a source connected to the anode of the diode D3, a gate grounded, and a back gate connected to the source. Source follower circuit. The cathode of the diode D3 is connected to the power supply terminal Bvcc of the control circuit B1. The second transistor Q2 and the diode D3 form a starting circuit that generates a starting voltage for the constant voltage control circuit B1 from the input DC voltage Vin using two elements.

  Next, the operation of the circuit 2 of the present invention will be described. First, when the input DC voltage Vin is generated in the DC power supply E1, the voltage Vin is applied to the drain of the second transistor Q2 through the primary winding N1.

  When the inductance of the primary winding N1 is L1, the drain-source resistance of the second transistor Q2 is Rds, and the elapsed time after the voltage Vin is output to the DC power source E1, t is the drain-source of the second transistor Q2. The inter-voltage Vds is given by the following formula 1. As is clear from Equation 1, even when the input DC voltage Vin rises steeply, a voltage having a relatively gentle slope is applied between the drain and source of the second transistor Q2.

[Equation 1]
Vds = (Vin × Rds × t) / L1

  When the voltage Vin is generated in the DC power source E1 (t = 0), no charge is accumulated in the capacitor C1, and there is no electromotive force in the tertiary winding N3 of the transformer T1, so that the second transistor Q2 The source potential of is the same as the gate potential of the second transistor Q2 is 0V.

  Immediately after the voltage is generated in the DC power supply E1, the second transistor Q2 is a depletion type MOSFET, so that a current flows through the drain-source resistance between the drain and source of the second transistor Q2, and the capacitor C1 is charged through the diode D3. Then, the potential of one end of the capacitor C1, the power supply terminal Bvcc of the control circuit, and the source potential of the second transistor Q2 rise with the product of the drain-source resistance of the second transistor Q2 and the capacitance of the capacitor C1 as a time constant. Each begins to rise at speed.

  Thereafter, when the source potential of the second transistor Q2 rises and the gate-source voltage of the second transistor Q2 becomes substantially equal to the pinch-off voltage of the second transistor Q2, a current flows between the drain and source of the second transistor Q2. Almost no flow occurs, and the rise of the source potential of the second transistor Q2 and the potential of the power supply terminal Bvcc of the control circuit B1 connected to the source of the second transistor Q2 via the diode D3 stops. The potential of the power supply terminal Bvcc is a voltage value obtained by subtracting the forward junction voltage of the diode D3 from the pinch-off voltage of the second transistor Q2.

  At this time, the control circuit B1 starts operation, outputs a control pulse for switching to the gate of the first transistor Q1, starts the switching operation in which the first transistor Q1 is repeatedly turned on and off, and starts secondary from the primary winding N1. Electric power is transmitted to winding N2 and tertiary winding N3. Note that the first transistor Q1 is in an off state during the start-up period until the control circuit B1 starts operating.

  The output voltage of the secondary winding N2 is AC, and the voltage is rectified by the diode D2, smoothed by the capacitor C2, and output to the load R0 as the output DC voltage Vout.

  On the other hand, the output voltage of the tertiary winding N3 is an alternating current, and the voltage is rectified by the diode D1 to further charge the capacitor C1 from the start of start-up (at the end of the start-up period). The DC voltage (terminal voltage VB of the power supply terminal Bvcc) further increases the cathode potential of the diode D3, and forwards the voltage between the anode and the cathode of the diode D3. Under the junction voltage, no current flows through the diode D3 between the drain and source of the second transistor Q2, and the operation during the start-up period in which the capacitor C1 is charged through the second transistor Q2 and the diode D3 is completely stopped. To do.

  Thereafter, the power supply terminal Bvcc of the control circuit B1 is supplied with power from the tertiary winding N3 via the first rectifying / smoothing circuit 6, the output of the control pulse of the control circuit B1 is maintained, and the first transistor Q1 is switched. The output DC voltage Vout is output from the secondary winding N2 via the second rectifying and smoothing circuit 7. During the switching operation of the first transistor Q1, the drain potentials of the first transistor Q1 and the second transistor Q2 are reduced to a substantially ground potential when the first transistor Q1 is turned on, so that there is no backflow prevention diode D3. Since a current flows from the power supply terminal Bvcc of the control circuit B1 through the forward junction from the back gate to the drain of the second transistor Q2, the potential of the power supply terminal Bvcc is lowered and the stable operation is impaired. .

  As described above, the terminal voltage VB of the power supply terminal Bvcc does not rise above the voltage obtained by subtracting the forward junction voltage of the diode D3 from the source potential defined by the pinch-off voltage of the second transistor Q2, and is maintained at a constant voltage. By adjusting the pinch-off voltage of the second transistor Q2 and setting the constant voltage to the terminal voltage VB (starting voltage) of the power supply terminal Bvcc at which the control circuit B1 starts its operation or a value close to the starting voltage, the control is performed. A voltage is supplied to the power supply terminal Bvcc of the circuit B1 through the second transistor Q2 during the startup period, and power for maintaining the output of the control pulse is supplied from the first rectifying and smoothing circuit 6 after the start of startup. .

  FIG. 3 shows a result of simulating the change of the terminal voltage VB of the power supply terminal Bvcc in the circuit 2 of the present invention with respect to the elapsed time t after the voltage Vin is output to the DC power supply E1.

  As shown in FIG. 3, the elapsed time of 0.2 ms is a period in which the capacitor C1 is charged through the second transistor Q2 and the diode D3, and the terminal voltage VB of the power supply terminal Bvcc is from the pinch-off voltage of the second transistor Q2. The voltage rises to a voltage approximately equal to the voltage obtained by subtracting the forward junction voltage of the diode D3. The elapsed time from 0.2 ms to 1 ms is an initialization period of the control circuit B1, and the terminal voltage VB of the power supply terminal Bvcc is constant.

  Further, the elapsed time of 1 ms is a start-up time when the control circuit B1 starts to output a control pulse for switching to the gate of the first transistor Q1, and the first transistor Q1 starts a switching operation. During the period, a higher voltage is supplied from the tertiary winding N3 to the power supply terminal Bvcc via the first rectifying and smoothing circuit 6, and the second transistor Q2 is completely pinched off to stop its operation.

  In the second embodiment, the drain-source resistance when the second transistor Q2 is on is set to about five times the drain-source resistance when the first transistor Q1 is on. In the second embodiment, the circuit configuration is such that the drain of the second transistor Q2 is connected to one end n11 of the primary winding N1 and is connected to the drain of the first transistor Q1, and therefore, between the drain and source of the second transistor Q2. May cause a change in the current flowing through the primary winding N1, and power may be transmitted from the primary winding N1 to the secondary winding N2 and the tertiary winding N3. Therefore, in order to prevent the control circuit B1 from starting operation in an incomplete state before the switching operation of the first transistor Q1 starts due to the current change of the second transistor Q2, the current of the second transistor Q2 The driving ability is limited. However, since the setting of the drain-source resistance ratio when the second transistor Q2 and the first transistor Q1 are turned on changes depending on conditions such as the input DC voltage Vin, the output DC voltage Vout, the starting voltage of the control circuit B1, etc., It is not always necessary to set to about 5 times.

<Third Embodiment>
A switching power supply circuit 3 according to the third embodiment of the present invention (hereinafter, abbreviated as “present circuit 3” as appropriate) includes a primary winding N1, a secondary winding N2, and a tertiary winding as shown in FIG. A transformer T1 having a winding N3, a first rectifying / smoothing circuit 6 connected between both ends of the tertiary winding N3, a second rectifying / smoothing circuit 7 connected between both ends of the secondary winding N2, and an enhancement type n-channel MOSFET A first transistor Q1, a second transistor Q2 of a depletion type n-channel MOSFET, and a control circuit B1 are included.

  The present invention circuit 3 includes a primary winding N1, a secondary winding N2, a tertiary winding N3, a first rectifying / smoothing circuit 6, a second rectifying / smoothing circuit 7, a first transistor Q1, a control circuit B1, and a direct current. The connection relationship between the power supplies E1 and individual circuit configurations are the same as those of the circuit 1 of the first embodiment, but the connection of the second transistor Q2 to the primary winding N1 and the first transistor Q1 is different. Different from the circuit 1 of the present invention of the first embodiment. Hereinafter, the connection relationship of the second transistor Q2 will be described, and overlapping description of the same parts as those of the circuit 1 of the first embodiment will be omitted.

  In the third embodiment, the second transistor Q2 has a drain connected to one end n11 of the primary winding N1, a source directly connected to the power supply terminal Bvcc of the control circuit B1, and a gate and a back gate grounded. Source follower circuit. The second transistor Q2 constitutes an activation circuit that generates the activation voltage of the constant voltage control circuit B1 from the input DC voltage Vin by one element.

  Therefore, in the third embodiment, the drain of the second transistor Q2 is connected to one end n11 of the primary winding N1, and the back gate is grounded. Although different from the two-transistor Q2, the other circuit configuration is the same as the circuit 1 of the present invention of the first embodiment. In the third embodiment, the source of the second transistor Q2 is directly connected to the power supply terminal Bvcc of the control circuit B1 without going through the backflow prevention diode, and the back gate is grounded. The second circuit Q2 is different from the second transistor Q2 in the present invention circuit 2, but the other circuit configuration is the same as that of the present invention circuit 1 in the second embodiment. That is, in the third embodiment, in comparison with the second embodiment, the back gate of the second transistor Q2 is not connected to the source and is grounded in the same manner as the gate. The diode D3 for preventing the backflow that is required in the step 2 is not necessarily provided, and the number of parts of the starting circuit can be reduced.

  Next, the operation of the circuit 3 of the present invention will be described. First, when the input DC voltage Vin is generated in the DC power supply E1, the voltage Vin is applied to the drain of the second transistor Q2 through the primary winding N1.

  When the inductance of the primary winding N1 is L1, the drain-source resistance of the second transistor Q2 is Rds, and the elapsed time after the voltage Vin is output to the DC power source E1, t is the drain-source of the second transistor Q2. The inter-voltage Vds is given by the following formula 2 (the same as the formula 1 in the second embodiment). As is clear from Equation 2, even when the input DC voltage Vin rises steeply, a relatively gentle slope voltage is applied between the drain and source of the second transistor Q2.

[Equation 2]
Vds = (Vin × Rds × t) / L1

  When the voltage Vin is generated in the DC power source E1 (t = 0), no charge is accumulated in the capacitor C1, and there is no electromotive force in the tertiary winding N3 of the transformer T1, so that the second transistor Q2 The source potential of is the same as the gate potential of the second transistor Q2 is 0V.

  Immediately after the voltage is generated in the DC power supply E1, since the second transistor Q2 is a depletion type MOSFET, a current flows through the drain-source resistance between the drain and source of the second transistor Q2, and the capacitor C1 is charged. The potential of one end of C1, the power supply terminal Bvcc of the control circuit, and the source of the second transistor Q2 increases at a rate of increase with the product of the drain-source resistance of the second transistor Q2 and the capacitance of the capacitor C1 as a time constant. start.

  Thereafter, when the source potential of the second transistor Q2 rises and the gate-source voltage of the second transistor Q2 becomes substantially equal to the pinch-off voltage of the second transistor Q2, a current flows between the drain and source of the second transistor Q2. Almost no longer flows, and the rise of the source potential of the second transistor Q2, that is, the potential of the power supply terminal Bvcc of the control circuit B1 connected to the source of the second transistor Q2, stops.

  At this time, the control circuit B1 starts operation, outputs a control pulse for switching to the gate of the first transistor Q1, starts the switching operation in which the first transistor Q1 is repeatedly turned on and off, and starts secondary from the primary winding N1. Electric power is transmitted to winding N2 and tertiary winding N3. Note that the first transistor Q1 is in an off state during the start-up period until the control circuit B1 starts operating.

  The output voltage of the secondary winding N2 is AC, and the voltage is rectified by the diode D2, smoothed by the capacitor C2, and output to the load R0 as the output DC voltage Vout.

  On the other hand, the output voltage of the tertiary winding N3 is an alternating current, and the voltage is rectified by the diode D1 to further charge the capacitor C1 from the start of start-up (at the end of the start-up period). Is applied to the power supply terminal Bvcc of the control circuit B1 and the source of the second transistor Q2. This DC voltage (the terminal voltage VB of the power supply terminal Bvcc) further increases the source potential of the second transistor Q2, and the second transistor The startup period during which the gate-source voltage of Q2 is set to be equal to or higher than the pinch-off voltage of the second transistor Q2, no current flows between the drain and source of the second transistor Q2, and the capacitor C1 is charged via the second transistor Q2. The operation inside stops completely.

  Thereafter, the power supply terminal Bvcc of the control circuit B1 is supplied with power from the tertiary winding N3 via the first rectifying / smoothing circuit 6, the output of the control pulse of the control circuit B1 is maintained, and the first transistor Q1 is switched. The output DC voltage Vout is output from the secondary winding N2 via the second rectifying and smoothing circuit 7. During the switching operation of the first transistor Q1, when the first transistor Q1 is turned on, the drain potentials of the first transistor Q1 and the second transistor Q2 are reduced to substantially the ground potential, but between the back gate and the source of the second transistor Q2. Is in a reverse bias state, so that no current flows from the power supply terminal Bvcc of the control circuit B1 through the back gate of the second transistor Q2 without the backflow prevention diode, so that the potential of the power supply terminal Bvcc is The stable operation will not be lost.

  As described above, the terminal voltage VB of the power supply terminal Bvcc does not rise above the source potential defined by the pinch-off voltage of the second transistor Q2, and is maintained at a constant voltage. Therefore, the pinch-off voltage of the second transistor Q2 is adjusted. By setting the constant voltage to the terminal voltage VB (starting voltage) of the power supply terminal Bvcc at which the control circuit B1 starts its operation or a value close to the starting voltage or higher, the power supply terminal Bvcc of the control circuit B1 is in the starting period. Is supplied with a voltage via the second transistor Q2, and after starting is started, power for maintaining the output of the control pulse is supplied from the first rectifying and smoothing circuit 6.

<Fourth embodiment>
The switching power supply circuit 4 according to the fourth embodiment of the present invention (hereinafter, abbreviated as “the present invention circuit 4” as appropriate) has a circuit configuration of the present invention circuit 3 of the third embodiment as shown in FIG. In the fourth embodiment, the device structure of the first transistor Q1 and the second transistor Q2 when the first transistor Q1 and the second transistor Q2 are integrally formed on the same semiconductor substrate will be described. . In the circuit configuration of the inventive circuit 3 of the third embodiment, the back gates of the first transistor Q1 and the second transistor Q2 are connected in common to the source of the first transistor Q1 and the gate of the second transistor Q2. In addition, since each drain can be shared, the first transistor Q1 and the second transistor Q2 can be compactly integrated on the same semiconductor substrate as in the fourth embodiment.

  Hereinafter, device structures of the first transistor Q1 and the second transistor Q2 will be described with reference to FIGS. FIG. 5 is a plan view schematically showing a planar structure of the first transistor Q1 and the second transistor Q2, and FIG. 6A is a schematic sectional view taken along the line AA ′ in FIG. FIG. 6B is a cross-sectional view schematically showing a cross-sectional structure at the BB ′ cross section in FIG. 5. 7 to 9 are process cross-sectional views showing the process of forming the device structure of the first transistor Q1 and the second transistor Q2, and FIGS. 7A to 9A are cross-sectional views of FIG. FIG. 7B to FIG. 9B schematically show a cross-sectional structure in the middle of formation in the BB ′ cross section in FIG. 5. . In the plan view of FIG. 5, illustration of a drift region 11 and a p-type well 12 described later is omitted in order to avoid the complexity of the drawing.

  As shown in FIGS. 5 and 6, the first transistor Q <b> 1 includes an n-type impurity diffusion layer drift region 11 formed on the p-type silicon substrate 10 surface and a p-type impurity diffusion formed on the p-type silicon substrate 10 surface. The p-type well 12 of the layer, the drain region 13 of the n-type impurity diffusion layer formed in the n-type drift region 11, the first source region 14 of the n-type impurity diffusion layer formed on the surface of the p-type well 12, the p-type Near the drain region 13 between the drain region 13 and the first source region 14 on the surface of the drift region 11, and the p-type contact region 15 for supplying the potential of the p-type well 12 of the p-type impurity diffusion layer formed on the surface of the well 12. The first gate insulating film 17 is formed on the end of the field oxide film 16 formed on the first source region 14 side, the surface of the drift region 11 and the surface of the p-type well 12 of the first source region 14. Configured with a first gate electrode 18 is made of polycrystalline silicon film formed by.

  The second transistor Q2 includes a drift region 11, a p-type well 12, a drain region 13, a second source region 19 of an n-type impurity diffusion layer formed on the surface of the p-type well 12, and a drain region 13 on the surface of the drift region 11. And the second source region 19 side end of the field oxide film 16 formed near the drain region 13 between the second source region 19 and the surface of the drift region 11 and the surface of the p-type well 12 of the second source region 19. A second gate electrode 21 made of a polycrystalline silicon film formed via the gate insulating film 20 is provided. A depletion channel layer 22 is formed under the second gate insulating film 20 to make the second transistor Q2 a depletion type.

  Since the back gates of the first transistor Q1 and the second transistor Q2 are common, the p-type wells 12 forming the respective back gates are formed separately from each other in the AA ′ cross section. Are connected in an annular shape surrounding the outer periphery of the drift region 11. Further, since the drains of the first transistor Q1 and the second transistor Q2 are common, they share the same drain region 13 and the drift region 11 is also integrated.

  The respective surfaces of the drain region 13, the first source region 14, the second source region 19, the p-type contact region 15, the first gate electrode 18, and the second gate electrode 21 are electrically connected to each other. A contact 23 made of a metal material is provided. Here, in the fourth embodiment, since the source and back gate of the first transistor Q1 and the gate and back gate of the second transistor Q2 are grounded, the surfaces of the first source region 14 and the p-type contact region 15 are used. Are commonly connected by one contact 23a, and the second gate electrode 21 and the surface of the p-type contact region 15 are commonly connected by another contact 23b.

  Next, a process of forming the first transistor Q1 and the second transistor Q2 shown in FIGS. 5 and 6 will be described with reference to process cross-sectional views of FIGS.

As shown in FIG. 7, in order to form the n-type drift region 11 on the surface of the p-type silicon substrate 10, energy of 120 to 180 keV, 3 to 5 × 10 ¹² is selectively used using a resist pattern (not shown) as a mask. The n-type impurity phosphorus is introduced at a dose of ions / cm ³ . Thereafter, thermal diffusion is performed at 1200 ° C. for 8 to 12 hours to form the n-type drift region 11 having a concentration of 5 to 7 × 10 ¹⁵ ions / cm ³ and a diffusion depth of 6 to 9 μm. Note that the specific resistance of the p-type silicon substrate 10 is determined by the junction breakdown voltage, and is usually in the range of 40 to 150 Ωcm. Subsequently, the field oxide film 16 is formed to a thickness of 1000 to 1300 nm by a selective oxidation method.

Next, as shown in FIG. 8, in order to form the p-type well 12, an energy of 500 to 700 keV and an energy of 1 to 3 × 10 ¹³ ions / cm ³ are selectively used using a resist pattern (not shown) as a mask. Boron of p-type impurity is introduced at a dose. Thereafter, thermal diffusion is performed at 1150 ° C. for 4 to 6 hours to form a p-type well 12 having a concentration of 4 to 6 × 10 ¹⁶ ions / cm ³ and a diffusion depth of 1 to 1.5 μm. Subsequently, in order to form a depletion type transistor, an n type impurity phosphorus is introduced into the depletion channel region with an energy of 60 to 90 keV and a dose of 4 to 8 × 10 ¹¹ ions / cm ³ , thereby forming a depletion channel layer 22. .

Next, as shown in FIG. 9, in order to form a MOS transistor, a gate oxide film to be the first gate insulating film 17 and the second gate insulating film 20 is formed, and the first gate electrode 18 and the second gate electrode 21 are formed. A wiring layer of a polycrystalline silicon film is formed, and the drain region 13, the first source region 14, and the second source region 19 are formed with energy of 60 to 100 keV and a dose of ^{3 to} 5 × 10 ¹⁵ ions / cm ^3. It is formed by introducing n-type impurity arsenic. Subsequently, the p-type contact region 15 is formed by introducing BF2 which is a p-type impurity at an energy of 60 to 100 keV and a dose of ^{3 to} 5 × 10 ¹⁵ ions / cm ³ .

  Subsequently, a contact 23 is formed on each surface of the drain region 13, the first source region 14, the second source region 19, the p-type contact region 15, the first gate electrode 18, and the second gate electrode 21. The first transistor Q1 and the second transistor Q2 shown in FIG. 6 are completed.

<Fifth Embodiment>
The switching power supply circuit 5 according to the fifth embodiment of the present invention (hereinafter abbreviated as “the present invention circuit 5” as appropriate) has a circuit configuration of the present invention circuit 2 of the second embodiment as shown in FIG. In the fifth embodiment, the device structure of the first transistor Q1 and the second transistor Q2 when the first transistor Q1 and the second transistor Q2 are integrally formed on the same semiconductor substrate will be described. . In the circuit configuration of the circuit 2 of the present invention of the second embodiment, both the first transistor Q1 and the second transistor Q2 have a configuration in which the respective sources and back gates are connected, and the respective drains can be shared. As in the fifth embodiment, the first transistor Q1 and the second transistor Q2 can be compactly integrated on the same semiconductor substrate.

  Hereinafter, the device structure of the first transistor Q1 and the second transistor Q2 will be described with reference to FIGS. 10 and 11A and 11B. FIG. 10 is a plan view schematically showing the planar structure of the first transistor Q1 and the second transistor Q2, and FIG. 11A schematically shows the sectional structure at the AA ′ section in FIG. FIG. 11B is a cross-sectional view schematically showing a cross-sectional structure at the BB ′ cross section in FIG. 10. In the plan view of FIG. 10, the drift region 11, the p-type well 12, and the second p-type well 24, which will be described later, are omitted in order to avoid complexity of the drawing.

  As shown in FIGS. 10 and 11, the first transistor Q 1 includes a drift region 11 of an n-type impurity diffusion layer formed on the surface of the p-type silicon substrate 10 and a p-type impurity diffusion formed on the surface of the p-type silicon substrate 10. The p-type well 12 of the layer, the drain region 13 of the n-type impurity diffusion layer formed in the n-type drift region 11, the first source region 14 of the n-type impurity diffusion layer formed on the surface of the p-type well 12, the p-type Near the drain region 13 between the drain region 13 and the first source region 14 on the surface of the drift region 11, and the p-type contact region 15 for supplying the potential of the p-type well 12 of the p-type impurity diffusion layer formed on the surface of the well 12. The first gate insulating film 1 is formed on the end of the field oxide film 16 formed on the first source region 14 side, the surface of the drift region 11 and the surface of the p-type well 12 of the first source region 14. Configured with a first gate electrode 18 made of polycrystalline silicon film formed through.

  The second transistor Q2 includes the drift region 11, the second p-type well 24 of the p-type impurity diffusion layer formed on the surface of the drift region 11 in the drift region 11, the drain region 13, and the n formed on the surface of the second p-type well 24. The second source region 19 of the p-type impurity diffusion layer, the second p-type contact region 25 for supplying potential to the second p-type well 24 of the p-type impurity diffusion layer formed on the surface of the second p-type well 24, and the surface of the drift region 11 The second source region 19 side end of the field oxide film 16 formed near the drain region 13 between the drain region 13 and the second source region 19, the surface of the drift region 11 of the second source region 19, and the second p-type well 24. A second gate electrode 21 made of a polycrystalline silicon film formed on the surface via the second gate insulating film 20 is provided. A depletion channel layer 22 is formed under the second gate insulating film 20 to make the second transistor Q2 a depletion type.

  Since the back gates of the first transistor Q1 and the second transistor Q2 are electrically separated, the p-type well 12 and the second p-type well 24 forming the respective back gates are connected to each other via the n-type drift region 11. Are formed separately. Further, since the drains of the first transistor Q1 and the second transistor Q2 are common, they share the same drain region 13 and the drift region 11 is also integrated.

  On the respective surfaces of the drain region 13, the first source region 14, the second source region 19, the p-type contact region 15, the second p-type contact region 25, the first gate electrode 18, and the second gate electrode 21, A contact 23 made of a metal material for electrical connection is provided. Here, in the fifth embodiment, the source and back gate of the first transistor Q1 and the gate of the second transistor Q2 are commonly grounded, and the source and back gate of the second transistor Q2 are connected. The source region 14 and the surface of the p-type contact region 15 are commonly connected by one contact 23a, the surface of the second gate electrode 21 and the p-type contact region 15 are commonly connected by another one contact 23b, The surfaces of the second source region 19 and the second p-type contact region 25 are commonly connected by one contact 23c.

<Another embodiment>
Next, another embodiment of the devices 1 to 5 of the present invention will be described.

  <1> In the first, third, and fourth embodiments, after the control circuit B1 starts operation, the second power is supplied from the power supply terminal Bvcc to the drain of the first transistor Q1 (one end n11 of the primary winding N1). Since there is no risk of backflow through the transistor Q2, the source of the second transistor Q2 is directly connected to the power supply terminal Bvcc of the control circuit B1 without the backflow prevention diode D3. Even when connected via D3, the same operation can be realized by adjusting the pinch-off voltage of the second transistor Q2 in the same manner as the inventive device 2 of the second embodiment.

  <2> In the above embodiments, the DC power supply E1 connected to the input terminal of the other end n12 of the primary winding N1 is simply a DC power supply. However, when the DC power supply E1 is an external DC power supply, the present invention The devices 1 to 5 function as a DC-DC converter, and when the DC power source E1 is a rectifying / smoothing circuit that rectifies and smoothes commercial AC power and converts it to DC, the devices 1 to 5 of the present invention including the DC power source E1 are AC -Functions as a DC converter.

  <3> In the first embodiment, the configuration in which the back gate of the second transistor Q2 is connected to the source has been described. However, the back gate of the second transistor Q2 is shared with the back gate of the first transistor Q1, that is, Each source may be formed in a common well and grounded. However, in the first embodiment, since the drains of the first transistor Q1 and the second transistor Q2 are connected to different nodes, respectively, it is necessary to electrically isolate them, so that they are different from the second to fifth embodiments. The drift regions of both transistors Q1 and Q2 must also be separated.

  <4> In the third and fourth embodiments, the planar high-voltage MOSFET has been described as an example of the element structure of the first transistor Q1 and the second transistor Q2. However, the first transistor Q1 and the second transistor Q2 have the same structure. The element structure is not limited to the planar type high voltage MOSFET, and may be a vertical type high voltage MOSFET, for example. Furthermore, the first transistor Q1 may be a bipolar transistor instead of a MOSFET.

  The various manufacturing conditions in the process of forming the element structures of the first transistor Q1 and the second transistor Q2 exemplified in the third embodiment are examples, and are not limited to the manufacturing conditions.

  <5> In the third and fourth embodiments, the case where the first transistor Q1 and the second transistor Q2 are formed on the same semiconductor substrate has been described. However, the first transistor Q1 and the second transistor Q2 are each a single unit. An element may be used.

  Also in the first embodiment, it is preferable to form the first transistor Q1 and the second transistor Q2 on the same semiconductor substrate as in the third and fourth embodiments.

  Further, not only the first transistor Q1 and the second transistor Q2 are formed on the same semiconductor substrate, but also the control circuit B1 may be formed on the same semiconductor substrate as the first transistor Q1 and the second transistor Q2.

  <6> In each of the above embodiments, the first transistor Q1 and the second transistor Q2 have been described using n-channel MOSFETs. However, when the input DC voltage Vin is a negative voltage, the first transistor Q1 and the second transistor Q2 A p-channel MOSFET may be used as the two transistor Q2.

  The present invention can be used for a switching power supply circuit, and can be used for an AC adapter, LED lighting, and the like.

The circuit diagram which shows the circuit structure in 1st Embodiment of the switching power supply circuit which concerns on this invention The circuit diagram which shows the circuit structure in 2nd and 5th embodiment of the switching power supply circuit which concerns on this invention The figure which shows the simulation result of the time change of the terminal voltage of the power supply terminal of the control circuit at the time of operation | movement in 2nd Embodiment of the switching power supply circuit which concerns on this invention. The circuit diagram which shows the circuit structure in 3rd and 4th embodiment of the switching power supply circuit which concerns on this invention The top view which shows typically the planar structure of the 1st transistor and 2nd transistor in 4th Embodiment of the switching power supply circuit which concerns on this invention Sectional drawing which shows typically the cross-section of the 1st transistor and 2nd transistor in 4th Embodiment of the switching power supply circuit which concerns on this invention Process sectional drawing which shows the formation process of the 1st transistor and 2nd transistor in 4th Embodiment of the switching power supply circuit which concerns on this invention Process sectional drawing which shows the formation process of the 1st transistor and 2nd transistor in 4th Embodiment of the switching power supply circuit which concerns on this invention Process sectional drawing which shows the formation process of the 1st transistor and 2nd transistor in 4th Embodiment of the switching power supply circuit which concerns on this invention The top view which shows typically the planar structure of the 1st transistor and 2nd transistor in 5th Embodiment of the switching power supply circuit which concerns on this invention Sectional drawing which shows typically the cross-section of the 1st transistor and 2nd transistor in 5th Embodiment of the switching power supply circuit which concerns on this invention Circuit diagram showing a circuit configuration example of a conventional switching power supply circuit Circuit diagram showing another circuit configuration example of a conventional switching power supply circuit

Explanation of symbols

1 to 5: switching power supply circuit 6: first rectifying / smoothing circuit 7: second rectifying / smoothing circuit 10: p-type silicon substrate (semiconductor substrate)
11: n-type drift region 12: p-type well 13: drain region 14: first source region 15: p-type contact region 16: field oxide film 17: first gate insulating film 18: first gate electrode 19: second source Region 20: Second gate insulating film 21: Second gate electrode 22: Depletion channel layer 23: Contact 23a: Contact between first source region and p-type contact region 23b: Contact between second gate electrode and p-type contact region 23c: Contact between second source region and second p-type contact region 24: second p-type well 25: second p-type contact region B1: control circuit Bvcc: power supply terminal of control circuit Bout: output terminal of control circuit C1, C2: capacitor D1, D2: Diode D3: Backflow prevention diode E1 DC power supply N1: primary winding N2: secondary winding N3: tertiary winding n11: one end of the primary winding n12: other end of the primary winding n21: one end of the secondary winding n22: 2 The other end of the next winding n31: One end of the tertiary winding n32: The other end of the tertiary winding Q1: First transistor Q2: Second transistor R0: DC load T1: Transformer VB: Power supply terminal of the control circuit Voltage Vin: Input DC voltage Vout: Output DC voltage

Claims (10)

A transformer having a primary winding, a secondary winding and a tertiary winding;
A first rectifying / smoothing circuit connected between both ends of the tertiary winding;
A second rectifying / smoothing circuit connected between both ends of the secondary winding;
A first transistor having a first terminal connected to one end of the primary winding, a second terminal connected to a ground potential, and switching on and off of a current flowing through the primary winding;
A power supply terminal is connected to the output of the first rectifying and smoothing circuit, and a control pulse for controlling on / off of the first transistor is generated according to a terminal voltage of the power supply terminal, and the first and second of the first transistor are generated. A control circuit that outputs the control pulse to a control terminal that controls on / off between the terminals;
A depletion type MOSFET having a drain connected to one of both ends of the primary winding, a source connected to the power supply terminal of the control circuit directly or via a diode, and a gate connected to the ground potential. name includes a second transistor, the is,
An input DC voltage input to the other end of the primary winding is applied to the power supply terminal of the control circuit with a voltage value changing via the second transistor,
Until the terminal voltage of the power supply terminal reaches the voltage at which the second transistor is pinched off from the initial voltage before the input DC voltage is input to the other end of the primary winding, The oscillation of the control pulse is stopped,
The terminal voltage of the power supply terminals, said the second transistor reaches a voltage pinched off, switching power supply circuit, characterized that you start oscillation of the control pulse of the control circuit. The first terminal of the first transistor is connected to one end of the primary winding;
The drain of the second transistor is connected to the other end of the primary winding;
The source of the second transistor is connected to the power supply terminal of the control circuit directly or via a diode;
The switching power supply circuit according to claim 1, wherein a back gate of the second transistor is connected to a source. The first terminal of the first transistor and the drain of the second transistor are respectively connected to one end of the primary winding;
A source of the second transistor is connected to the power supply terminal of the control circuit via a diode;
The switching power supply circuit according to claim 1, wherein a back gate of the second transistor is connected to a source of the second transistor. The first terminal of the first transistor and the drain of the second transistor are respectively connected to one end of the primary winding;
The source of the second transistor is connected to the power supply terminal of the control circuit directly or via a diode;
2. The switching power supply circuit according to claim 1, wherein a back gate of the second transistor is connected to a ground potential. The switching power supply circuit according to any one of claims 1 to 4 , wherein the first transistor and the second transistor are formed on the same semiconductor substrate. Said first transistor, said first terminal is a drain, the second terminal is a source, the switching of any one of claim 1 to 5, wherein the control terminal is characterized in that an enhancement type MOSFET gate Power supply circuit. The first transistor is an enhancement type MOSFET in which the first terminal is a drain, the second terminal is a source, and the control terminal is a gate.
The gate of the second transistor and the source and back gate of the first transistor are connected to a ground potential;
The source of the first transistor and the source of the second transistor are formed in different wells on the same semiconductor substrate;
The drain of the first transistor and the drain of the second transistor are formed in the same drift region on the same semiconductor substrate;
4. The switching power supply circuit according to claim 3 , wherein a second well forming a back gate of the second transistor is formed in the drift region. 5. The gate of the second transistor extends over the first well forming the back gate of the first transistor, and the gate of the first well and the second transistor is connected to the ground potential using the same contact material. The switching power supply circuit according to claim 7 , wherein: The first transistor is an enhancement type MOSFET in which the first terminal is a drain, the second terminal is a source, and the control terminal is a gate.
The gate and back gate of the second transistor and the source and back gate of the first transistor are connected to a ground potential;
The source of the first transistor and the source of the second transistor are formed in the same well on the same semiconductor substrate;
5. The switching power supply circuit according to claim 4 , wherein the drain of the first transistor and the drain of the second transistor are formed in the same drift region on the same semiconductor substrate. The switching power supply circuit according to claim 9 , wherein the well and the gate of the second transistor are connected to a ground potential using the same contact material.

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