JP5130142B2 - Inverter generator - Google Patents

Description

  The present invention relates to an inverter generator, and more particularly to an inverter generator that includes a power generation unit that is driven by an engine and that effectively controls an output voltage when a low power factor load such as a mercury lamp is connected. .

By converting the alternating current output from the power generation unit driven by the engine into direct current and driving the switching element based on the PWM signal generated using the reference sine wave of the target output voltage waveform and the carrier Inverter generators that convert the direct current into alternating current of a predetermined frequency (commercial frequency) and output the same are well known, and examples thereof include the technology described in Patent Document 1 below.
JP-A-4-355672

  Among the loads connected to the inverter generator according to Patent Document 1, there is a low power factor load such as a mercury lamp. Since such a load has a low power factor until the current is stabilized, the inrush current at the start-up is large, and the output of the generator is often overloaded. As a result, there is an inconvenience that the number of low power factor loads that can be started at the rated output is smaller than when driving after the current is stabilized.

  Accordingly, an object of the present invention is to solve the above-described problems and to provide an inverter generator in which the number that can be started at the rated output is increased as much as possible even when a low power factor load is connected.

  In order to solve the above-described problem, in claim 1, a power generation unit driven by an engine, a converter that converts alternating current output from the power generation unit into direct current, and a switching element are provided. The switching element is driven on the basis of an inverter that converts the output direct current into alternating current and outputs, and a PWM signal generated using a reference sine wave of a target output voltage waveform and a carrier, and is output from the inverter Inverter generator comprising inverter driving means for converting alternating current into alternating current of a predetermined frequency, wherein said inverter driving means comprises voltage / current detection means for detecting an alternating voltage and current output from said inverter, Low power factor load determining means for determining whether or not the connected load is a low power factor load based on the detected voltage and current is provided. Both the load if it is determined that the low power factor load, after the output voltage is reduced a predetermined amount, gradually constructed as to return to the output voltage.

  In the inverter generator according to claim 2, the low power factor load determination means is configured so that an effective value of the detected current exceeds a maximum current by a predetermined amount, and from a phase difference between the detected voltage and current. When the calculated power factor is less than a predetermined value, the load is determined to be a low power factor load.

  In the inverter generator according to claim 1, the AC voltage and current output from the inverter are detected, and whether or not the connected load is a low power factor load based on the detected voltage and current. In addition, when the load is determined to be a low power factor load, the output voltage is reduced by a predetermined amount and then gradually returned to the output voltage. Therefore, even when a low power factor load is connected. The number that can be started at the rated output can be increased as much as possible.

  In other words, the output AC power is represented by the product of voltage and current (and power factor), but the output voltage is reduced by a predetermined amount at start-up, and then gradually returned to the output voltage. By setting the fixed amount to an appropriate value, for example, when the current increases at the time of start-up, the voltage can be reduced by an amount corresponding to the increased current at the time of start-up. Further, the power factor increases as the current stabilizes, and the current also decreases accordingly. Therefore, by gradually returning to the output voltage after that, the voltage can be smoothly returned to the intended value.

  In the inverter generator according to claim 2, the effective value of the detected current exceeds the maximum current by a predetermined amount, and the power factor calculated from the phase difference between the detected voltage and current is less than a predetermined value. At this time, since the load is determined to be a low power factor load, in addition to the above-described effects, it can be reliably determined whether or not the load is a low power factor load that needs to limit the output voltage.

  The best mode for carrying out an inverter generator according to the present invention will be described below with reference to the accompanying drawings.

  FIG. 1 is a block diagram generally showing an inverter generator according to an embodiment of the present invention.

  In FIG. 1, the code | symbol 10 shows an inverter generator and the generator 10 is provided with the engine (internal combustion engine) 12, and has a rated output of about 3 kW (30 A at AC 100V). The engine 12 is an air-cooled engine and is a spark ignition type, and its throttle valve 12a is opened and closed by a throttle motor (actuator) 12b comprising a stepping motor and is started by a recoil starter (not shown).

  A circular stator (not shown) is fixed near the cylinder head of the engine 12, and there are three-phase output windings (main windings) composed of U, V, and W phases that constitute the engine power generation unit 14. 14a and three single-phase windings 14b, 14c, and 14d are wound.

  A rotor (not shown) that also serves as a flywheel of the engine 12 is arranged outside the stator, and a permanent magnet (not shown) is attached in the radial direction so as to face the winding 14a and the like. A plurality of pairs are attached while alternating the magnetized magnetic poles.

  By rotating the permanent magnet of the rotor around the stator, three-phase (U, V, W-phase) AC power is output (generated) from the three-phase output winding 14a, and the single-phase output winding Single-phase AC power is output from 14b, 14c, and 14d.

  The three-phase AC power output (power generation) from the output winding 14a of the engine power generation unit 14 is input to the control board (print board) 16 via the U, V, and W terminals 14e, and the converter 20 mounted thereon. Is input. The converter 20 includes three thyristors (SCR) and three diodes DI that are bridge-connected, and converts the three-phase alternating current output from the engine power generation unit 14 into direct current by controlling the conduction angle of the thyristor. To do.

  An RCC (Ringing Choke Converter) power supply (DC stabilized power supply) 22 is connected to the positive and negative outputs of the converter 20, and the rectified DC power is supplied to the three thyristors as operating power. Supply. A smoothing capacitor 24 for smoothing the direct current output from the converter 20 is connected to the subsequent stage of the RCC power supply 22.

  An inverter 26 is connected to the subsequent stage of the smoothing capacitor 24. The inverter 26 includes a circuit in which four FETs (field effect transistors, switching elements) are bridge-connected, and is output from the converter 20 by controlling conduction / non-conduction of the four FETs as will be described later. Direct current is converted into alternating current of a predetermined frequency (specifically, a commercial frequency of 50 Hz or 60 Hz).

  The output of the inverter 26 is output from an output terminal 34 through a choke coil 30 composed of an LC filter for removing harmonics and a noise filter 32 for removing noise, and is supplied to an electric load 36 through a connector (not shown). It is made free.

  The control board 16 includes a CPU (Central Processing Unit) 40. The CPU 40 is composed of 32 bits, and controls the conduction angle of the thyristor of the converter 20 through a thyristor (SCR) driver (drive circuit) 40a, and controls conduction / non-conduction of the FET of the inverter 26 through a gate driver 40b. The operation of the throttle motor 12b is controlled via the motor driver 40c. The CPU 40 includes an EEPROM (nonvolatile memory) 40d.

  The output of the single-phase first output winding 14b is sent to the control board 16 via the sub terminals 14b1 and 14b2, and is input to the control power generation unit 14b3, where the operating power 5V of the CPU 40 is generated. The output of the sub terminal 14b1 is sent to the NE detection circuit 14b4, where it is converted into a pulse signal and sent to the CPU 40. The CPU 40 counts the output of the NE detection circuit 14b4 and detects the rotational speed NE of the engine 12.

  The output of the second output winding 14c is sent to the full-wave rectifier circuit 14c1, where it is full-wave rectified to generate an operating power source such as the throttle motor 12b. The output of the third output winding 14d is sent to the ignition circuit 12c of the engine 12 and used as an ignition power source for the spark plug 12d.

  The CPU 40 includes first and second voltage sensors 40e and 40f. The first voltage sensor 40e generates an output corresponding to the DC voltage output from the converter 20 at the subsequent stage of the RCC power supply 22, and the second voltage. The sensor 40 f generates an output corresponding to the AC voltage output from the inverter 26 at the subsequent stage of the inverter 26. The outputs of the first and second voltage sensors 40e and 40f are input to the CPU 40.

  Further, the CPU 40 includes a current sensor 40g, and the current sensor 40g generates an output corresponding to the current output from the inverter 26, in other words, when the electrical load 36 is connected.

  The output of the current sensor 40g is input to the CPU 40 and also input to the overcurrent limiter 40h. The overcurrent limiter 40h is composed of a logic circuit (hardware circuit) independent of the CPU 40. When the current detected by the current sensor 40g exceeds the allowable limit value, the output of the gate driver 40b is stopped and the output of the inverter 26 is stopped. Temporarily set to zero.

  The CPU 40 inputs the outputs of the first and second voltage sensors 40e and 40f and the current sensor 40g, and based on them, performs PWM control of the FET of the inverter 26, controls the operation of the throttle motor 12b, and further controls overcurrent. Restrict.

  FIG. 2 is a waveform diagram for explaining the PWM control performed by the CPU 40.

  The PWM control of the FET of the inverter 26 will be described with reference to FIG. 2. The CPU 40 has a reference sine wave at a predetermined frequency (that is, commercial frequency 50 Hz or 60 Hz) of a target AC output voltage waveform (indicated by a broken line below). The PWM signal (PWM waveform), that is, the duty ratio (= on time) according to PWM (Pulse Width Modulation) compared with a carrier (for example, 20 kHz carrier) by a comparator (not shown) based on the signal wave) (t / cycle T) A variable pulse train is generated and output via the gate driver 40b.

  In FIG. 2, the lower broken line shows the target output voltage waveform. The period T (step) of the PWM signal (PWM waveform) is actually much shorter, but is exaggerated in FIG. 2 for convenience of understanding.

  Further, the CPU 40 determines the opening degree of the throttle valve 12a so that the target rotational speed is determined according to the AC output determined by the electric load 36, and outputs the A-phase and B-phase output pulses of the throttle motor 12b. The calculated value is supplied from the output terminal 40c1 to the throttle motor 12b via the motor driver 40c, and its operation is controlled.

  Further, the CPU 40 executes output voltage limiting control for limiting the output voltage when a low power factor load is connected.

  FIG. 3 is a flowchart showing the operation of the CPU 40. The illustrated program is executed every control period (step) defined from the carrier frequency, more specifically, every 50 μsec, assuming that the frequency of the target output voltage waveform is 50 Hz, for example.

  In the following, based on the outputs of the second voltage sensor 40f and the current sensor 40g in S10, the AC voltage and current output from the inverter 26 (current that is passed through the electrical load 36 when the electrical load 36 is connected). ) Is detected.

  Next, in S12, the detected voltage and current phase difference θ is calculated, and in S14, the power factor cos θ is calculated from the calculated phase difference.

  Next, in S16, the output voltage limit amount α is read. This output voltage limit amount α is calculated as a negative value in a process executed in parallel with the flowchart of FIG. This will be described later.

  Next, the process proceeds to S18, where it is determined whether or not the read output voltage limit amount α is zero. When the result is negative, the process proceeds to S20 and the output voltage is calculated from the output voltage calculated by the PWM control described with reference to FIG. A limit amount α (negative value) is added to reduce the output voltage.

  That is, the PWM signal is corrected so that the target output voltage waveform in the PWM control described with reference to FIG. 2 becomes the calculated output voltage. On the other hand, when the result in S18 is affirmative, the process proceeds to S22, and the calculated output voltage is determined as it is as the output voltage.

  FIG. 4 is a flowchart showing the calculation process of the output voltage limit amount α described above. The illustrated program is executed every cycle longer than the flowchart of FIG. 3, for example, every 8 msec. In the following, a mercury lamp is taken as an example of a low power factor load.

  In the following, it is determined whether or not the flag F bit is set to 1 in S100. Since the initial value of the flag F bit is 0, it is naturally denied in the first program loop, and the process proceeds to S102. The effective value of the detected current is 108% of the maximum current planned for the inverter generator 10 ( A predetermined amount), that is, whether or not the maximum current is 1.08 or more. This specified amount is set to a value lower than the allowable limit value used in the overcurrent limiter 40h.

  When the result in S102 is negative, the subsequent processing is skipped. When the result is affirmative, the process proceeds to S104, and the power factor calculated in the flow chart of FIG. 3 is less than 0.5 (predetermined value) and the flow in FIG. -It is determined from the phase difference calculated in the chart whether or not it is in the late phase (the current is delayed from the voltage).

  When the result in S104 is negative, the subsequent processing is skipped. When the result is affirmative, the process proceeds to S106, where it is determined that the load (electric load) 36 is a mercury lamp (low power factor load), and the output voltage limit amount described above is determined. α is set to −10 (%, predetermined amount), the process proceeds to S108, the bit of the flag F is set to 1, and the program is temporarily terminated.

  Therefore, in the next and subsequent program loops, the result is affirmed in S100 and the process proceeds to S110. It is determined whether or not the effective value of the detected current is still 108% or more of the maximum current planned for the inverter generator 10, and Proceeding to S112, it is determined whether or not the effective value of the detected current is 2 (A) or more. 2 (A) means the minimum current planned for the output voltage limit control described above.

  If the result in S112 is affirmative, the process proceeds to S114, and 1/256 (%, positive value) is added to α to correct α by subtraction. When the result in S110 is negative, the program proceeds to S116, the output voltage limit amount α is set to zero, the program proceeds to S118, the flag F bit is reset to 0, and the program is terminated. The same applies when the result in S112 is negative.

  FIG. 5 is a time chart for explaining the processing of FIG. 3 and FIG.

  In the process of the flowchart of FIG. 3, the output voltage is corrected to be reduced by the output voltage limit amount α from the output voltage. In this process, the output voltage is α, in the PWM control shown in FIG. That is, it is reduced by 10%.

  When the first 8 msec elapses, thereafter, every time 8 msec elapses, α is added to −10 (%) by 1/256 (%) and gradually decreased and corrected, and the value is continuously subtracted from the output voltage.

  That is, the AC power output from the inverter generator 10 is represented by the product of voltage and current (and power factor), but the output voltage is reduced at a stroke by 10% of the output voltage limit amount α at the start, and then the reduction amount Is gradually increased to 1/256, so that the output voltage is gradually restored to the intended value.

  As is apparent from FIG. 5, the current supplied to the electrical load 36 decreases with time, corresponding to the output voltage being limited as described above. Thus, in this embodiment, the output voltage limit amount α is a value that is experimentally obtained and set so as to be an amount commensurate with the current that increases at startup, and thus increases the output voltage limit amount α. By setting the amount to match the current, the voltage was reduced by an amount corresponding to the increased current at startup.

  Next, as the current stabilizes, the power factor increases, and the current also decreases accordingly. Therefore, by gradually returning to the output voltage after that, the voltage can be smoothly returned to the intended value.

  The engine speed NE is relatively low while the mercury lamp is started and the power factor is low. However, as the power factor increases and approaches 1.0, the demand for the engine 12 increases, and thereafter It becomes constant.

  As described above, this embodiment includes the power generation unit 14 driven by the engine 12, the converter 20 that converts alternating current output from the power generation unit 14 into direct current, and a switching element (FET). An inverter 26 that converts the direct current output from the converter 20 into an alternating current and outputs the output, a reference sine wave of a target output voltage waveform and a PWM signal generated using a carrier, drives the switching element, In the inverter generator 10 having inverter drive means (CPU 40) for converting alternating current output from the inverter into alternating current of a predetermined frequency, the inverter drive means detects the alternating voltage and current output from the inverter 26. Voltage / current detection means (voltage sensor 40f, current sensor 40g, CPU 40, S10) and the detection And a low power factor load determining means (CPU 40, S100 to S106) for determining whether or not the connected load is a low power factor load based on the voltage and current applied, and the load is a low power factor load. If it is determined that the output voltage is reduced by a predetermined amount (output voltage limit amount) α and then gradually returned to the output voltage (CPU 40, S18 to S22), a low power factor load such as a mercury lamp When is connected, the number that can be started at the rated output can be increased as much as possible.

  In other words, the output AC power is represented by the product of voltage and current (and power factor), but the output voltage is reduced by a predetermined amount at start-up, and then gradually returned to the output voltage. By appropriately setting the fixed amount, for example, when the current increases at the time of startup, the voltage can be reduced by an amount corresponding to the increased current at the time of startup. Further, the power factor increases as the current stabilizes, and the current also decreases accordingly. Therefore, by gradually returning to the output voltage after that, the voltage can be smoothly returned to the intended value.

  Further, the low power factor load determination means has a predetermined power factor calculated from a phase difference between the detected voltage and current, and an effective value of the detected current exceeds a maximum amount by a predetermined amount (108%). When it is less than the value (0.5), the load is determined to be a low power factor load (CPU 40, S100 to S106). Therefore, in addition to the above effect, the output voltage needs to be limited. It is possible to reliably determine whether or not the power factor is loaded.

  In the above, a mercury lamp was cited as an example of a low power factor load. However, the present invention is not limited to this, such as a refrigerator, cooler, pump, etc., which has a low power factor until the current stabilizes and a large inrush current at startup. Anything can be used.

  Further, although the FET is used as the switching element of the inverter, the present invention is not limited thereto, and may be an IGBT (insulated gate bipolar transistor) or the like.

1 is a block diagram generally showing an inverter generator according to an embodiment of the present invention. It is a wave form diagram explaining the PWM control which CPU shown in FIG. 1 performs. 3 is a flowchart showing processing of output voltage restriction control performed by a CPU shown in FIG. 1. FIG. 4 is a flow chart showing output voltage limit amount calculation processing executed in parallel with the processing of the flow chart of FIG. 3. FIG. 5 is a time chart for explaining the processing of FIGS. 3 and 4. FIG.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 Inverter generator, 12 Engine (internal combustion engine), 12a Throttle valve, 12b Throttle motor, 14 Engine power generation part, 14a Three-phase output winding, 20 Converter, 26 Inverter, 36 Electric load, 40 CPU, 40a Thyristor (SCR) Driver, 40b Gate driver, 40c Motor driver, 40d EEPROM, 40e, 40f Voltage sensor, 40g Current sensor

Claims (2)

  A power generation unit driven by an engine; a converter that converts alternating current output from the power generation unit into direct current; a switching element; an inverter that converts direct current output from the converter into alternating current; and a target; An inverter driving means for driving the switching element based on a PWM signal generated using a reference sine wave of an output voltage waveform and a carrier, and converting alternating current output from the inverter into alternating current of a predetermined frequency. In the inverter generator, the inverter driving means includes a voltage / current detection means for detecting an AC voltage and current output from the inverter, and a load connected to the inverter based on the detected voltage and current. When it is determined that the load is a low power factor load while providing low power factor load determining means for determining whether the load is a load After the output voltage has been reduced a predetermined amount, gradually inverter generator, characterized in that to return to the output voltage.   When the effective value of the detected current exceeds the maximum current by a predetermined amount and the power factor calculated from the phase difference between the detected voltage and current is less than a predetermined value, The inverter generator according to claim 1, wherein the load is determined to be a low power factor load.

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