JP5097012B2 - Encoder signal processing circuit - Google Patents

Description

  The present invention relates to an encoder signal processing circuit for processing a signal from an encoder.

  The encoder generates at least two-phase periodic analog signals having different phases from each other in accordance with the displacement of the moving body. At least two-phase periodic analog signals output from the encoder are input to the encoder signal processing circuit. In this encoder signal processing circuit, each periodic analog signal is converted into a digital signal so that the displacement of the moving body can be counted by a subsequent counter, and processing for improving the resolution of the displacement is performed. After these processes are performed, the traveling direction, position, displacement, displacement speed, etc. of the moving body can be measured by counting the output from the encoder signal processing circuit with a counter (for example, Patent Document 1). reference).

  Here, the encoder proposed in Patent Document 1 will be briefly described with reference to FIG. FIG. 8 is a diagram illustrating a partial configuration of the encoder (rotation sensor) of Patent Document 1. In FIG. In FIG. 8, the rotation sensor A as an encoder includes an excitation wave generation unit 101, a resolver 102 excited by an excitation wave generated by the excitation wave generation unit 101, and an excitation wave component that is an output from the resolver 102. The output circuit 103 for amplifying the sine wave signal 112 and the cosine wave signal 113, and the microcomputer 104 for processing the output obtained from the output circuit 103 are provided.

In such a configuration, the output from the output circuit 103 is A / D converted by the A / D converter 118 inside the microcomputer 104. Based on the information obtained by the A / D conversion by the A / D converter 118, the calculation unit 117 calculates the rotation angle. In the calculation of the rotation angle, first, after determining the quadrant of the rotation angle, it is determined which side the rotation angle is on when the determined quadrant is further divided into two equal parts. The rotation angle can be calculated according to this determination result.
JP 2006-349591 A

  Here, in the technique of Patent Document 1, when the microcomputer 104 processes at least two-phase signals output from the resolver 102 (output circuit 103), the A / D converter 118 first performs A / D conversion, and then The rotation angle is calculated, and then the output process is performed in series. Also, when calculating the rotation angle, it is determined from the position of the region corresponding to the rotation angle which table of the sine wave pair angle or the cosine wave pair angle is used. Furthermore, since the value obtained from the sine wave and cosine wave is an angle, it is necessary to convert this angle into a signal for counting.

  In the configuration as described above, every time a motor such as a resolver rotates, a sine wave and a cosine wave are output for one cycle, and the moving speed of the periodic door of the vehicle is slow and the frequency of the periodic analog signal is relatively low. It can be applied in the case of frequency, and it is difficult to apply when it corresponds to a high-resolution encoder or when the periodic analog signal becomes a high frequency.

  The present invention has been made in view of the above circumstances, and is applicable to a high-resolution encoder and a high-frequency periodic analog signal, and has a small area, no signal adjustment, and can be configured at low cost. It is a problem to provide.

  To solve the above problems, the encoder signal processing circuit according to the first aspect of the present invention processes at least two-phase periodic analog signals that periodically change according to the relative displacement between the encoder scale and the encoder head. In the encoder signal processing circuit, based on a command to convert the at least two-phase periodic analog signals into digital signals, the signals at the same point in the at least two-phase periodic analog signals are held, and the held signals are An A / D converter for converting to a digital signal, and a command for converting the at least two-phase periodic analog signal to a digital signal to the A / D converter, and an output of the A / D converter A control unit that performs time-series processing in a predetermined process; and an output unit that outputs a result processed in the control unit. And wherein the door.

  According to the present invention, it is possible to provide an encoder signal processing circuit that can be applied to a high-resolution encoder and a high-frequency periodic analog signal and can be configured with a small area, no signal adjustment, and low cost.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[First Embodiment]
First, a first embodiment of the present invention will be described. FIG. 1 is a diagram showing a configuration of an encoder signal processing circuit according to a first embodiment of the present invention. In FIG. 1, an encoder signal processing circuit 20 is a circuit for processing at least two-phase, substantially sinusoidal periodic analog signals output from the encoder 10.

  The encoder 10 includes an encoder scale on which a pattern (an optical pattern, a magnetic pattern, an electrostatic pattern, etc.) having a predetermined period is formed, and an encoder head provided so as to be relatively displaceable with respect to the encoder scale. ing. The encoder head outputs two-phase sinusoidal periodic analog signals A and B shown in FIG. 2A in accordance with the relative displacement between the encoder head and the encoder scale. In FIG. 2A, the horizontal axis t represents time, and the vertical axis represents the voltage value of the periodic analog signal output from the encoder 10.

  Here, FIG. 2A shows an example in which the encoder head outputs two-phase periodic analog signals whose phases are different from each other by 90 degrees. However, a polyphase periodic analog signal having three or more phases may be output from the encoder head. For example, three-phase periodic analog signals whose phases are 120 degrees different from each other may be output. The waveform of the periodic analog signal output from the encoder head may not be a sine wave.

  As shown in FIG. 1, the A-phase signal 11 and the B-phase signal 12 output from the encoder head are input to the encoder signal processing circuit 20. The encoder signal processing circuit 20 includes an A / D conversion unit 21, a control unit 22, and an output unit 23. The A / D conversion unit 21, the control unit 22, and the output unit 23 are electrically connected. It is configured to be mixed with the member 24. The encoder signal processing circuit 20 including the electric member 24 can be configured using a one-chip microcomputer (hereinafter referred to as a microcomputer). By configuring the encoder signal processing circuit 20 with a microcomputer, the area occupied by the encoder signal processing circuit 20 can be reduced. Of course, it may be configured as a custom IC.

  The A / D converter 21 converts a periodic analog signal at the same time point in the A-phase signal 11 and the B-phase signal 12 input from the encoder head of the encoder 10 into a digital signal in accordance with a command from the controller 22.

  The control unit 22 instructs the A / D conversion unit 21 to start A / D conversion, and processes the output of the A / D conversion unit 21 in a predetermined process in a time series. As this predetermined process, for example, when one cycle of the A-phase signal and the B-phase signal is divided into N equal parts (20 equal parts in the figure) as shown in FIG. The process of determining which periodic area of the periodic analog signal each output of 21 corresponds to, the area corresponding to the output of the current A / D converter 21 and the previous A / D converter 21 The process etc. which calculate the displacement amount between the area | regions which output corresponds to are included. The division number N of the A phase signal and the B phase signal is not particularly limited as long as it is an integer of 2 or more.

  FIG. 2B shows an A / D conversion output value DA of the A phase signal 11 (for example, a value of 0 to 255 (FF) in the case of 8-bit A / D conversion) on the horizontal axis, and the B phase signal 12 It is the figure which showed the Lissajous figure represented when taking A / D conversion output value DB of the vertical axis | shaft. If each area | region of Fig.2 (a) is illustrated on the Lissajous figure of FIG.2 (b), it will represent as an area | region which divided | segmented 20 times of 1 round of a Lissajous figure. The state of FIG. 2B is stored in a storage unit (not shown) of the control unit 22 as a two-dimensional array, so that the A / D conversion output value DA of the A phase signal and the A / D conversion output of the B phase signal are stored. By using the value DB for array reading, it is possible to obtain a region corresponding to each A / D conversion output at the time when the A-phase signal 11 and the B-phase signal 12 are captured by the A / D conversion unit 21.

  The output unit 23 outputs the displacement amount output from the control unit 22 to the counter 30 via an output terminal provided in the electric member 24.

  The counter 30 counts the output from the output unit 23. Based on the count result, it is possible to measure the traveling direction, position, displacement, displacement speed, etc. of the moving body to which the encoder scale or encoder head of the encoder 10 is attached. In addition, although the counter is shown in FIG. 1, it may be other than the counter.

  The operation of the encoder signal processing circuit shown in FIG. 1 will be described below. In the present embodiment, the A / D converter 21 and the controller 22 are operated in parallel. The A / D conversion unit 21 performs A / D conversion only when receiving an A / D conversion command from the control unit 22, and the control unit 22 further performs the A / D conversion in the A / D conversion unit 21. When the conversion is completed, the next A / D conversion instruction is executed.

  FIG. 3A is a flowchart showing the operation of the A / D conversion unit 21, and FIG. 3B is a flowchart showing the operation of the control unit 22.

  First, the control unit 22 issues an A / D conversion command to the A / D conversion unit 21 (step S31). The A / D converter 21 determines whether or not an A / D conversion command has been received (step S41), and waits until an A / D conversion command is received. When receiving the A / D conversion command, the A / D conversion unit 21 samples and holds the signal at the same point in the A-phase signal 11 and the B-phase signal 12 (step S42). After holding the signals at the same point in the A phase signal 11 and the B phase signal 12, the A / D converter 21 performs A / D conversion on the held A phase signal 11 and B phase signal 12 (step S43). . After the end of the A / D conversion, the A / D conversion unit 21 notifies the control unit 22 that the A / D conversion is completed (step S44). Thereafter, the process returns to step S41 and waits until the next A / D conversion command is issued.

  On the other hand, the control unit 22 that has issued an A / D conversion command to the A / D conversion unit 21 is a value output by the previous A / D conversion unit 21 while the A / D conversion unit 21 is processing. An output value conversion process for processing is performed (step S32). This output value conversion process will be exemplified. As described above, the A / D conversion outputs DA and DB of the A phase signal 11 and the B phase signal 12 output from the A / D conversion unit 21 are illustrated on the Lissajous figure as shown in FIG. can do. Therefore, by providing the state of FIG. 2 (b) as a two-dimensional array, the combination of DA and DB can be associated with each area shown in FIG. 2 (b). In this way, it is possible to obtain a region corresponding to each periodic analog signal when the A-phase signal 11 and the B-phase signal 12 are taken in the A / D converter 21. Thereafter, the amount of displacement between the region corresponding to the output of the A / D conversion unit 21 input to the control unit 21 and the region corresponding to the output of the previous A / D conversion unit 21 is Calculated.

  In such an output value conversion process, it is not necessary to perform multiplication / division, which is a time-consuming process. Although it takes some time, instead of providing an array for one period of the periodic analog signal, only a part of the periodic parts may be provided as an array. However, for example, in the case of an array of only the first quadrant, quadrant determination, conversion by sum subtraction of A phase A / D conversion output value and B phase A / D conversion output value to be substituted at the time of array reading, In addition, it is necessary to add processing such as addition of correction values so that the read array has the same value as the array for one period.

  After the output value conversion process, the control unit 22 causes the output unit 23 to execute the output control process (step S33). The output control process here is a process for outputting the displacement amount output from the control unit 22 from the output terminal. After the output control process, the control unit 22 determines whether or not the process of the A / D conversion unit 21 is completed, that is, whether or not the A / D conversion completion notification has been received from the A / D conversion unit 21 (step). S34). When the process of the A / D conversion unit 21 is not completed in the determination in step S34, the control unit 22 stands by while continuing the determination in step S34. On the other hand, when the processing of the A / D conversion unit 21 is completed in the determination in step S <b> 34, the control unit 22 issues the next A / D conversion command to the A / D conversion unit 21.

  FIG. 4 is a diagram illustrating a specific example of the processing of FIG. Here, FIG. 4 shows a case where the output unit 23 outputs a digital signal in a format intended for counting by the counter 30 based on the A-phase signal 11 and the B-phase signal 12 output from the encoder 10. ing.

  As described above, the A-phase signal 11 and the B-phase signal 12 as shown in FIG. 4A are input from the encoder 10 to the encoder signal processing circuit 20. When the frequency band of each periodic analog signal is a low-speed band, the two-phase A / D conversion outputs DA and DB have waveforms shown in FIG. In this case, the counter 30 can count the displacement amount at approximately equal intervals. On the other hand, the two-phase A / D conversion outputs DA and DB when the frequency band of each periodic analog signal is a high-speed band have the waveforms shown in FIG. That is, at the start of the period T1 in FIG. 4C, the control unit 22 performs an A / D conversion command, and then performs output value conversion processing using the previous A / D conversion output. Then, in the period T <b> 2 of FIG. 4C, the output control process is executed in the output unit 23, and the displacement amount counted in the counter 30 is output. In addition, the A / D conversion unit 21 performs A / D conversion in accordance with an A / D conversion command performed at the start of the period T1.

  For example, the signal at the time of region 1 shown in FIG. 4A is A / D converted in accordance with an A / D conversion command made at time A. The A / D converted value is processed in an output value conversion process following the A / D conversion instruction at time B. Then, it is output in an output control process following the output value conversion process. In response to the A / D conversion command at time B, A / D conversion is performed for the region 7. The A / D converted value is processed in an output value conversion process following the A / D conversion instruction at time C. Similarly to the areas 1 and 7, the A / D conversion outputs after the area 8 are processed in the output value conversion process at the next timing after the A / D conversion, and are output in the subsequent output control process.

  Here, the A-phase signal 11 and the B-phase signal 12 output from the encoder 10 often have a signal reference that is not the center voltage of a substantially sinusoidal signal. Therefore, a reference corresponding to each phase of the A phase and the B phase is detected by detecting a deviation of the signal reference from the center voltage of the substantially sinusoidal signal when the encoder 10 or the encoder signal processing circuit 20 is turned on. It is desirable to store the value as a value and shift the A / D conversion output value from the A / D conversion unit 21 based on the reference value.

  Hereinafter, the effect of this embodiment will be described. When the encoder signal processing circuit 20 is configured by a microcomputer, the A / D conversion speed is relatively slow and the processing needs to be performed serially by a program. Therefore, the periodic analog signal from the encoder 10 is processed. It takes time to output. In the present embodiment, parallel systems are operated in parallel, and A / D conversion is performed a minimum number of times, that is, as much as processing is possible in the control unit 22. Thereby, even when the frequency band of the periodic analog signal from the encoder 10 becomes high speed, the displacement amount between the current time and the previous time can be obtained efficiently.

  In addition, in this embodiment, the offset voltage adjustment and amplitude adjustment of the encoder signal (the offset voltage adjustment is possible, so the encoder signal can be processed without adjustment), etc., and the number of parts can be reduced. It is. As a result, it is possible to realize a small size almost equivalent to that of a dedicated encoder signal processing circuit that needs to be developed at a high cost. Further, adjustment is not required, and a general-purpose part can be used, so that it can be configured at a low price. Further, even when the output of the periodic analog signal for the encoder is a digital signal for the counter, the edge of the digital signal between the two phases that may occur when the resistance signal processing circuit for the encoder is used is overlapped. Because it is not reliable.

  Here, in the example of FIG. 1, the output unit 23 describes a configuration in which the processing result of the control unit 22 is simply output from the output terminal to the counter 30. On the other hand, as shown in FIG. 5, a storage unit 25 may be provided in the encoder signal processing circuit 20. In such a configuration, the output unit 23 adds and subtracts the displacement amount output from the control unit 22, and sequentially stores the addition and subtraction values in the storage unit 25. In this case, the addition side of the encoder signal (counter 30 or the like) reads out and uses the addition / subtraction value stored in the storage unit 25, so that it follows a periodic analog signal having a higher bandwidth than the configuration of FIG. It becomes possible.

  In addition, the processing of the control unit 22 and the processing of the A / D conversion unit 21 are not only parallel processing, but also part of the processing of the control unit 22, part of the processing of the output unit 23, or all processing are performed in parallel. If it is configured to process, it is possible to cope with a periodic analog signal having a higher bandwidth.

  Further, even if the displacement between the encoder head and the encoder scale on the Lissajous figure of FIG. 2B is not equal to the displacement, the data on the array is arranged so as to be equal, It is possible to make the displacement between the head and the encoder scale coincide with the displacement of the output signal of the encoder signal processing circuit.

[Second Embodiment]
Next, a second embodiment of the present invention will be described. FIG. 6 is a diagram illustrating a configuration of an encoder signal processing circuit according to the second embodiment. The encoder signal processing circuit 20 shown in FIG. 6 is the same as that of the first embodiment except that an error detection unit 22a is provided in the control unit 22. Therefore, in FIG. 6, the same components as those in FIGS. 1 and 5 are denoted by the same reference numerals as those in FIGS. 1 and 5, and the description thereof is omitted.

  Hereinafter, the operation of the error detection unit 22a will be described. As shown in FIG. 7, the area corresponding to the A / D conversion output values DA and DB obtained by the previous output value conversion process is the area 1, and the A / D obtained by the current output value conversion process is When the region corresponding to the D-converted output values DA and DB is the region 11, when obtaining the displacement amount, the displacement from the previous time to the current time is −10 or clockwise is shifted by +10. It becomes unknown. In such a case, the correct displacement direction cannot be obtained. If the absolute value of the displacement amount between the previous time and the current time obtained in the output value conversion process in the control unit 22 is greater than or equal to a predetermined value, the error detection unit 22a generates an error signal as detecting an error. Here, the value greater than or equal to a predetermined value is set so as to include at least half of the division number N.

  It should be noted that error generation may be performed in a plurality of stages so that only a warning signal is generated when the absolute value of the displacement is small, and an error signal is generated when the absolute value is large.

  According to the second embodiment described above, when the displacement direction of the encoder scale and the encoder head changes, the band is exceeded even if it is used to the limit of the band that the encoder signal processing circuit can follow. In some cases, an error signal is generated. For this reason, it becomes possible to improve the reliability with respect to the output of the encoder signal processing circuit.

  Although the present invention has been described above based on the embodiments, the present invention is not limited to the above-described embodiments, and various modifications and applications are naturally possible within the scope of the gist of the present invention.

  Further, the above-described embodiments include various stages of the invention, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent elements. For example, even if some configuration requirements are deleted from all the configuration requirements shown in the embodiment, the above-described problem can be solved, and this configuration requirement is deleted when the above-described effects can be obtained. The configuration can also be extracted as an invention.

It is a figure which shows the structure of the signal processing circuit for encoders concerning the 1st Embodiment of this invention. FIG. 2A is a diagram showing a two-phase periodic analog signal output from the encoder head, and FIG. 2B is a diagram showing a Lissajous figure. FIG. 3A is a flowchart showing the operation of the A / D conversion unit, and FIG. 3B is a flowchart showing the operation of the control unit. It is a figure which shows the specific example of the process of FIG. It is a figure shown about the modification of the 1st Embodiment of this invention. It is a figure which shows the structure of the signal processing circuit for encoders concerning the 2nd Embodiment of this invention. It is a figure shown about the example when a displacement amount cannot be calculated | required. It is a figure shown about the conventional signal processing circuit for encoders.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Encoder, 20 ... Signal processing circuit for encoder, 21 ... A / D conversion part, 22 ... Control part, 22a ... Error detection part, 23 ... Output part, 23 ... Control part, 24 ... Electric member, 25 ... Memory | storage part 30 ... Counter

Claims (7)

In an encoder signal processing circuit that processes at least two-phase periodic analog signals that periodically change according to the relative displacement between the encoder scale and the encoder head,
Based on the command for converting the at least two-phase periodic analog signal into a digital signal, the signal at the same point in the at least two-phase periodic analog signal is held, and the held signal is converted into a digital signal. A D conversion unit;
Instructing the A / D converter to convert the at least two-phase periodic analog signal into a digital signal, and controlling the output of the A / D converter in a predetermined process in time series And
An output unit for outputting a result processed in the control unit;
An encoder signal processing circuit comprising:   The predetermined step is to obtain a region to which the output of the A / D converter corresponds when one cycle of the periodic analog signal is equally divided into N (N is an integer of 2 or more) regions. And a step of obtaining a displacement amount between a region where the obtained output of the A / D conversion unit currently corresponds and a region where the output of the previous A / D conversion unit corresponded. The signal processing circuit for an encoder according to claim 1.   The predetermined step is based on a value corresponding to a periodic analog signal of each phase based on a result output from the A / D converter when obtaining a region corresponding to the output of the A / D converter. The encoder signal processing circuit according to claim 2, further comprising a step of setting the value.   In the predetermined step, a displacement amount between a region where the output of the A / D conversion unit currently corresponds and a region where the output of the previous A / D conversion unit corresponded is greater than or equal to a predetermined amount. 4. The encoder signal processing circuit according to claim 2, further comprising a step of generating an error signal.   The encoder signal processing circuit according to claim 4, wherein the predetermined value includes at least N / 2.   6. The output unit according to claim 1, wherein the output unit outputs the output processed by the control unit from an output terminal and / or stores the output processed by the control unit in a storage unit. The signal processing circuit for an encoder according to item 1.   The A / D conversion unit, the control unit, and the output unit are mounted on the same IC board or mounted in the same IC package. The signal processing circuit for an encoder according to item 1.

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