JP5077559B2 - Method for creating shot map and method for manufacturing semiconductor device - Google Patents

Description

  The present invention relates to a shot map creation method and a semiconductor device manufacturing method.

  In a photolithography process for manufacturing a semiconductor device, a pattern drawn on a reticle is transferred onto a wafer using an exposure apparatus such as a stepper. In the photolithography process, from the viewpoint of increasing the throughput and reducing the cost, a method of arranging shot regions so that the number of chips is maximized, that is, a method of creating a shot map is being studied.

For example, in Patent Document 1, in order to improve the throughput of the photolithography process, the shot sections arranged in a matrix are moved in the row or column direction in units of chip sections so as not to be missing in the exposure section. A method is disclosed for increasing the number of shot segments.
JP 2004-281434 A

  An object of the present invention is to provide a shot map creation method capable of improving the throughput of a photolithography process without reducing the reliability of a semiconductor device. Another object of the present invention is to provide a method for manufacturing a semiconductor device using the shot map created by the shot map creating method.

A method for creating a shot map according to the present invention includes:
A step of creating an initial shot map by arranging shot regions in which chip regions are arranged in a matrix, arranging a plurality of the shot regions as alignment regions in a matrix of rows and columns,
The alignment region is moved from the initial shot map, and a first row and a first column composed of the array of the shot region and the alignment region, and a second row and a second composed of the array of the shot region. Creating an alignment region correction shot map having:
Moving the second row from the alignment region correction shot map in the row direction of the chip region in units of a dimension in the row direction of the chip region to create a first shot map;
Moving the second column from the alignment region correction shot map in the column direction of the chip region in units of the column direction dimension of the chip region to create a second shot map;
Comparing the first shot map with the second shot map, obtaining a shot map having a larger number of effective chip regions arranged in an exposure region, and creating a modified shot map;
including.

  The method for creating a shot map according to the present invention can improve the throughput of the photolithography process without reducing the reliability of the semiconductor device.

In the method for creating a shot map according to the present invention,
The step of creating the alignment region correction shot map includes:
The alignment region can be moved so that the sum of the number of the first rows and the number of the first columns is minimized.

In the method for creating a shot map according to the present invention,
The step of creating the first shot map includes:
Each time the second row is moved, the number of the effective chip regions is calculated, and the second row is fixed at a position where the number of the effective chip regions is maximum,
The step of creating the second shot map includes:
Each time the second column is moved, the number of effective chip regions is calculated, and the second column can be fixed at a position where the number of effective chip regions is maximized.

In the method for creating a shot map according to the present invention,
The step of creating the first shot map includes:
After moving the second row, an additional shot area is arranged to be continuous with the second row,
The step of creating the second shot map includes:
After moving the second row, an additional shot area can be arranged so as to be continuous with the second row.

In the method for creating a shot map according to the present invention,
The step of creating the first shot map includes:
When having a plurality of shot maps having the same number of effective chip areas, the shot map having the smallest number of additional shot areas is acquired as the first shot map,
The step of creating the second shot map includes:
When there are a plurality of shot maps having the same number of effective chip areas, the shot map having the smallest number of additional shot areas can be acquired as the second shot map.

A method for manufacturing a semiconductor device according to the present invention includes:
The modified shot map created by the shot map creation method according to the present invention can be used.

  Preferred embodiments of the present invention will be described below with reference to the drawings.

1. Shot Map Creation Method FIG. 1 is a flowchart schematically showing a shot map creation method according to the present embodiment.

  As shown in FIG. 1, the shot map creation method according to this embodiment includes step S110 for creating an initial shot map, step S120 for creating an alignment region correction shot map, and step S130 for creating a first shot map. Step S140 for creating a second shot map and Step S150 for creating a modified shot map are included. Hereinafter, each step will be described.

(1) Step S110 for creating an initial shot map
FIG. 2 is a plan view schematically showing the initial shot map 110. FIG. 3 is a plan view schematically showing the shot region 20.

  In step S110, a plurality of shot areas 20 are arranged as shown in FIG. The shot area 20 can be automatically arranged by inputting the size of the shot area 20, the size of the chip area 10, the size of the wafer (not shown), and the like into a known shot map creation module, for example. it can. The shot regions 20 can be arranged in a matrix shape including, for example, nine rows (Y1 to Y9) and nine columns (X1 to X9), but the number of rows and columns is not particularly limited. The shot area 20 is arranged so that the center point 20a of the shot area is located in the exposure area 30 due to restrictions of an exposure apparatus such as a stepper. Therefore, for example, the shot region 20 is not arranged at the positions (X1, Y3), (X1, Y7), (X3, Y1), and the like. The above-mentioned position is set to the position (X1, Y1) in the lower left section of FIG. 2, the row direction (X direction) is specified in columns X1 to X9, and the column direction (Y direction) is specified in rows Y1 to Y1. Y9.

  As shown in FIG. 3, the shot area 20 includes a plurality of chip areas 10. The chip regions 10 can be arranged in a matrix composed of, for example, five rows and two columns, but the number of rows and columns is not particularly limited. The chip region 10 can have a dimension in the row direction (X direction) as Lx and a dimension in the column direction (Y direction) as Ly. The chip area 10 is constituted by, for example, a circuit pattern area 2 and a scribe line area 4 surrounding the circuit pattern area 2. The chip area 10 is an area defined by, for example, the center line 4a of the scribe line area. In the manufacturing process of the semiconductor device, the circuit pattern region 2 can be separated by cutting the wafer along the scribe line region 4 formed on the wafer by dicing, for example.

  As shown in FIG. 2, the chip area 10 is divided into an effective chip area 12 and an invalid chip area 14. The effective chip area 12 is a chip area that is arranged in the exposure area 30 without being divided by the exposure area 30. The invalid chip region 14 is a chip region divided by the exposure region 30 or a chip region disposed outside the exposure region 30.

  In step S110, a plurality of shot areas 20 are arranged as alignment areas 22 as shown in FIG. The alignment region 22 can be automatically arranged by, for example, a known shot map creation module. The number of alignment regions 22 is nine, for example, but the number is not particularly limited. The number of alignment regions 22 is determined by, for example, the standard of the semiconductor device manufacturing process. In a photolithography process, which is a manufacturing process of a semiconductor device, for example, alignment between a wafer and a reticle (not shown) can be performed using alignment marks in an alignment region 22 formed on the wafer. Therefore, the alignment region 22 is arranged so that the in-plane uniformity in the shot map is improved by, for example, a known shot map creation module.

  As described above, the initial shot map 110 shown in FIG. 2 can be created.

(2) Step S120 for creating an alignment region correction shot map
FIG. 4 is a plan view schematically showing the alignment region correction shot map 120.

  In step S120, the alignment region 22 is moved from the initial shot map 110 as shown in FIG. The movement of the alignment region 22 is performed by the first row 40 and the first column 50 including the arrangement of the shot region 20 and the alignment region 22, and the second row 42 and the second column 52 including the arrangement of the shot region 20. , Done to form. That is, the second row 42 and the second column 52 are rows and columns in which the alignment region 22 is not arranged. In the illustrated example, the rows Y 3, Y 5, Y 7 become the first row 40, and the other rows become the second row 42. In addition, the columns X2, X5, and X8 become the first column 50, and the other columns become the second column 52.

  The movement of the alignment region 22 is performed, for example, so that the sum of the number of the first rows 40 and the number of the first columns 50 is minimized (that is, the number of the second rows 42 and the second row 42 Done so that the sum with the number of columns 52 is maximized). In the illustrated example, the total number of the first rows 40 and the number of the first columns 50 is six.

  Specifically, in the illustrated example, the alignment shot region 22 is moved from the position (X3, Y3) of the initial shot map 110 to the position (X2, Y3), and from the position (X3, Y7) to the position (X2, Y7). Move, move from position (X5, Y2) to position (X5, Y3), move from position (X5, Y8) to position (X5, Y7), move from position (X7, Y3) to position (X8, Y3) To the position (X8, Y7) from the position (X7, Y7).

  When there are a plurality of arrangements in which the total of the number of the first rows 40 and the number of the first columns 50 is minimum, the alignment region 22 is moved in consideration of the in-plane uniformity in the shot map. can do. That is, even though the three alignment regions 22 arranged in the column X2 are arranged in the column X3 (not shown), for example, the sum of the number of the first rows 40 and the number of the first columns 50 is There will be six. However, considering the in-plane uniformity in the shot map, these three alignment regions 22 can be arranged in row X2 as shown in FIG.

  As described above, the alignment region correction shot map 120 shown in FIG. 4 can be created.

(3) Step S130 for creating the first shot map
5 to 7 are plan views schematically showing the creation process of the first shot map 130. FIG. 8 is a plan view schematically showing the first shot map 130.

  In step S130, as shown in FIG. 5, from the alignment region correction shot map 120, the second row 42 is set in the chip region 10 with the dimension Lx in the row direction (X direction) of the chip region 10 shown in FIG. Move in the row direction. The first row 40 in which the alignment region 22 is arranged is not moved.

  If the first row 40 is moved, the alignment mark of the alignment region 22 formed on the wafer is moved in the photolithography process, and the alignment between the wafer and the reticle may not be performed accurately. . In addition, for example, depending on the manufacturing process of the semiconductor device, a dimension inspection, a film thickness inspection, and the like are performed on the pattern of the alignment region 22 formed on the wafer. May not be performed accurately. Therefore, when a photolithography process is performed using a shot map in which the first row 40 is moved, a semiconductor device with low reliability may be manufactured. Therefore, only the second row 42 is moved.

  In the illustrated example, the second rows 42 are rows Y1, Y2, Y4, Y6, Y8, and Y9. Hereinafter, step S130 will be specifically described.

  (A) First, as shown in FIG. 5, the row Y1 is moved by a dimension of 1 × Lx in the X direction. By this movement, two new valid chip areas 12 (additional valid chip areas 13) can be acquired at the position (X7, Y1). Next, as shown in FIG. 6, the shot area 20 (additional shot area 21) is arranged so as to be continuous with the row Y1. The additional shot area 21 is arranged in an area extending over the position (X3, Y1) and the position (X4, Y1). Thereby, two additional effective chip regions 13 can be acquired at the position (X3, Y1). Even if the additional shot area 21 is further arranged in an area extending over the position (X2, Y1) and the position (X3, Y1), the number of additional effective chip areas 13 does not increase. Therefore, the additional shot area 21 is not arranged at this position. Therefore, the number of additional shot areas 21 arranged is one. Next, the number of additional effective chip regions 13 (or the number of effective chip regions 12) in the row Y1 is calculated. In the illustrated example, four additional effective chip areas 13 can be acquired. The same result can be obtained even if the row Y1 is moved by a dimension of 1 × Lx in the −X direction opposite to the X direction.

  (B) Next, as shown in FIG. 7, the row Y1 is moved by a dimension 2 × Lx in the X direction. By this movement, two additional effective chip regions 13 can be acquired at the position (X7, Y1). Next, the additional shot area 21 is arranged so as to be continuous with the row Y1. Two additional shot areas 21 can be arranged at a position (X3, Y1) and a position (X4, Y1). Thereby, two additional effective chip regions 13 can be acquired at the position (X3, Y1). Next, the number of additional effective chip regions 13 in the row Y1 is calculated. In the illustrated example, four additional effective chip regions 13 can be obtained.

  (C) Next, the number of additional effective chip regions 13 is compared between the case where the row Y1 is moved by dimension 1 × Lx (step (A)) and the case where the row Y1 is moved by dimension 2 × Lx (step (B)). To do. Then, the row Y1 is fixed in an arrangement in which the number of additional effective chip regions 13 is larger (that is, the number of effective chip regions 12 is larger). As described above, the number of additional effective chip regions 13 is four in both step (A) and step (B). When the number of additional effective chip areas 13 is the same as described above, the row Y1 is fixed in the arrangement in which the additional shot areas 21 are smaller. As described above, in the process (A), the number of additional shot areas 21 is one, whereas in the process (B), there are two. Therefore, the row Y1 is fixed in the arrangement of the step (A) shown in FIG.

  Although not shown, even if the row Y1 is moved by a dimension of 3 × Lx or more, the number of additional effective chip areas 13 is not larger than four, and the additional shot area 21 is larger than the case of moving the dimension 1 × Lx. The number of increases. Therefore, as described above, the row Y1 is fixed in an arrangement in which the dimension 1 × Lx is moved. Here, when the row Y1 is moved by a dimension of 2 × Lx or more, the center point 20a of the shot area, such as the shot area 20 arranged at the positions (X3, Y1) and (X7, Y1) shown in FIG. Is located outside the exposure region 30. Therefore, there are cases where the row Y1 cannot be moved by more than the dimension 2 × Lx.

  If the additional valid chip region 13 cannot be acquired even if the row Y1 is moved, the row Y1 is not moved and is fixed by the arrangement of the alignment region correction shot map 120.

  The steps (a), (b), and (c) described above are sequentially performed on the remaining second row 42 (rows Y2, Y4, Y6, Y8, and Y9). Since the additional effective chip area 13 cannot be acquired even if the lines Y2, Y4, Y6, Y8 are moved, these lines are fixed by the arrangement of the alignment area correction shot map 120. As shown in FIG. 8, four additional effective chip regions 13 can be acquired in the row Y9 by moving the dimension 1 × Lx as shown in FIG.

  As described above, the first shot map 130 shown in FIG. 8 can be created. In the first shot map 130, the number of additional effective chip regions 13 is eight. That is, in the first shot map 130, the number of effective chip regions 12 is increased by eight compared to the alignment region correction shot map 120.

(4) Step S140 for creating a second shot map
FIG. 9 is a plan view schematically showing the second shot map 140.

  In step S140, as shown in FIG. 9, from the alignment region correction shot map 120, the second column 52 is set with the dimension Ly in the column direction (Y direction) of the chip region 10 shown in FIG. Move in the column direction. In the illustrated example, the second column 52 is a column X1, X3, X4, X6, X7, X9. Step S140 basically has the same process as step S130 described above, although there are differences between rows and columns.

  That is, as shown in FIG. 9, four additional effective chip regions 13 can be obtained by moving the column X1 by dimension 2 × Lx in the Y direction and arranging the additional shot regions 21. Similarly, four additional effective chip regions 13 can be acquired for the columns X3, X7, and X9. As for the columns X4 and X6, the additional effective chip region 13 cannot be acquired even if it is moved, so that the alignment region correction shot map 120 is fixed.

  As described above, the second shot map 140 shown in FIG. 9 can be created. In the second shot map 140, the number of additional effective chip areas 13 is sixteen. That is, in the second shot map 140, the number of effective chip regions 12 is increased by 16 compared to the alignment region correction shot map 120.

(5) Step S150 for creating a modified shot map
FIG. 10 is a plan view schematically showing the modified shot map 150.

  In step S150, the first shot map 130 and the second shot map 140 are compared, and a shot map having a larger number of additional effective chip areas 13, that is, a larger number of effective chip areas 12, is obtained.

  As described above, in the first shot map 130, the number of effective chip regions 12 is increased by eight compared to the alignment region correction shot map 120. In the second shot map 140, the number of effective chip areas 12 is increased by sixteen. Therefore, in step S150, the second shot map 140 is acquired. That is, the modified shot map 150 becomes the second shot map 140.

  As described above, the modified shot map 150 shown in FIG. 10 can be created. In the modified shot map 150, the number of effective chip areas 12 is increased by 16 compared to the alignment area correction shot map 120.

  The shot map creation method according to the present embodiment has, for example, the following characteristics.

  In the shot map creation method according to the present embodiment, the first row 40 and the first column 50 in which the alignment region 22 is arranged are fixed, and the second row 42 and the second row in which the alignment region 22 is not arranged. Column 52 can be moved. Therefore, for example, the photolithography process and the inspection process can be performed with high accuracy, and the number of effective chip regions 12 can be increased. That is, it is possible to create a modified shot map 150 that can improve the throughput of the photolithography process without reducing the reliability of the semiconductor device.

  In the shot map creation method according to the present embodiment, the second row 42 and the second column 52 can be moved in units of dimensions in the row and column directions of the chip region 10. Therefore, the scribe line regions 4 shown in FIG. 2 do not deviate from each other and can be formed linearly. Therefore, even if the second row 42 and the second column 52 are moved, the circuit pattern region 2 can be separated by cutting the wafer along the scribe line region 4 formed on the wafer by dicing.

  In the shot map creation method according to the present embodiment, when the number of additional effective chip regions 13 is the same as a result of moving the second row 42 and the second column 52, the number of additional shot regions 21 is smaller. In the arrangement, the second row 42 and the second column 52 can be fixed. That is, when there are a plurality of shot maps having the same number of effective chip areas 12, the shot maps having the smallest number of additional shot areas 21 can be acquired as the first shot map 130 and the second shot map 140. Therefore, since the number of effective chip regions 12 can be increased efficiently, a modified shot map 150 that can improve the throughput of the photolithography process can be created.

2. Semiconductor Device Manufacturing Method A semiconductor device manufacturing method using a shot map created by a shot map creating method according to the present invention will be described.

  The semiconductor device manufacturing method according to the present embodiment can use the modified shot map 150 created by the shot map creation method according to the present invention in the photolithography process. As an exposure apparatus used in the photolithography process, for example, a known stepper can be used.

  In the method for manufacturing a semiconductor device, the semiconductor device can be manufactured with high throughput without deteriorating reliability.

  Although the embodiments of the present invention have been described in detail as described above, those skilled in the art will readily understand that many modifications are possible without substantially departing from the novel matters and effects of the present invention. Accordingly, all such modifications are intended to be included in the scope of the present invention.

5 is a flowchart schematically showing a shot map creation method according to the present embodiment. The top view which shows typically the shot map which concerns on this embodiment. The top view which shows typically the shot area | region which concerns on this embodiment. The top view which shows typically the shot map which concerns on this embodiment. The top view which shows typically the production process of the shot map which concerns on this embodiment. The top view which shows typically the production process of the shot map which concerns on this embodiment. The top view which shows typically the production process of the shot map which concerns on this embodiment. The top view which shows typically the shot map which concerns on this embodiment. The top view which shows typically the shot map which concerns on this embodiment. The top view which shows typically the shot map which concerns on this embodiment.

Explanation of symbols

2 Circuit pattern area, 4 Scribe line area, 4a Center line of scribe line area, 10 chip area, 12 valid chip area, 13 additional valid chip area, 14 invalid chip area, 20 shot area, 20a center point of shot area, 21 Additional shot region, 22 alignment region, 30 exposure region, 40 first row, 42 second row, 50 first column, 52 second column, 110 initial shot map, 120 alignment region correction shot map, 130 second 1 shot map, 140 2nd shot map, 150 modified shot map

Claims (5)

A step of creating an initial shot map by arranging shot regions in which chip regions are arranged in a matrix, arranging a plurality of the shot regions as alignment regions in a matrix of rows and columns,
The alignment region is moved from the initial shot map, and a first row and a first column composed of the array of the shot region and the alignment region, and a second row and a second composed of the array of the shot region. Creating an alignment region correction shot map having:
Moving the second row from the alignment region correction shot map in the row direction of the chip region in units of a dimension in the row direction of the chip region to create a first shot map;
Moving the second column from the alignment region correction shot map in the column direction of the chip region in units of the column direction dimension of the chip region to create a second shot map;
Comparing the first shot map with the second shot map, obtaining a shot map having a larger number of effective chip regions arranged in an exposure region, and creating a modified shot map;
Only including,
The step of creating the alignment region correction shot map includes:
A method for creating a shot map, wherein the alignment region is moved so that the sum of the number of the first rows and the number of the first columns is minimized. Oite to claim 1,
The step of creating the first shot map includes:
Each time the second row is moved, the number of the effective chip regions is calculated, and the second row is fixed at a position where the number of the effective chip regions is maximum,
The step of creating the second shot map includes:
A method for creating a shot map, wherein the number of effective chip regions is calculated each time the second column is moved, and the second column is fixed at a position where the number of effective chip regions is maximized. In claim 1 or 2 ,
The step of creating the first shot map includes:
After moving the second row, an additional shot area is arranged to be continuous with the second row,
The step of creating the second shot map includes:
A shot map creation method of arranging an additional shot area so as to be continuous with the second column after moving the second column. In claim 3 ,
The step of creating the first shot map includes:
When having a plurality of shot maps having the same number of effective chip areas, the shot map having the smallest number of additional shot areas is acquired as the first shot map,
The step of creating the second shot map includes:
A shot map creation method, wherein when there are a plurality of shot maps having the same number of effective chip areas, the shot map having the smallest number of additional shot areas is acquired as the second shot map. Using the modified shot map created by shot map generating method according to any one of claims 1 to 4, a method of manufacturing a semiconductor device.

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