JP5061687B2 - Photosensor, photosensor array, photosensor system, and drive control method for photosensor system - Google Patents

Description

  The present invention relates to a photosensor, a photosensor array configured by two-dimensionally arranging the photosensors, a photosensor system including such a photosensor array, and a drive control method for such a photosensor system.

  2. Description of the Related Art Conventionally, a structure having a photosensor array configured by arranging photoelectric conversion elements (photosensors) in a line shape or a matrix shape as an image reading device for reading a printed matter, a photograph, or a fine uneven shape such as a fingerprint. There are things. In general, a solid-state imaging device such as a CCD (Charge Coupled Device) is used as such a photosensor array.

  As is well known, a CCD has a configuration in which a plurality of photosensors such as photodiodes and thin film transistors (TFTs) are arranged, and an electron − generated according to the amount of light irradiated to the light receiving portion of each photosensor. The charge amount of the hole pair is detected by the horizontal scanning circuit and the vertical scanning circuit, and the brightness of the irradiation light is detected. In such a photosensor system using a CCD, it is necessary to individually provide a selection transistor for selecting each scanned photosensor. Therefore, when the number of pixels constituting the photosensor array is increased, Accordingly, there is a problem that the system itself increases in size.

  Therefore, in recent years, as a configuration for solving such a problem, a thin film transistor having a so-called double gate structure (hereinafter referred to as a “double gate type phototransistor”) in which the photosensor itself has a photosense function and a select transistor function. ")" Is applied to a photosensor system, and attempts are made to reduce the size of the system and increase the density of pixels. Such a photosensor system generally includes a double-gate phototransistor having a top gate electrode and a bottom gate electrode on one surface side of a glass substrate or the like in a matrix form to constitute a photosensor array, for example, glass Irradiation light is emitted from a light source provided on the other surface (back surface) side of the substrate, and an image pattern (for example, a finger) of a subject placed on one surface side (above the photosensor array) of the glass substrate The two-dimensional image is read by detecting reflected light corresponding to the fingerprint pattern of the image as light / dark information by a double gate type phototransistor.

  Here, the image reading operation by the photosensor array is performed for each double gate type in the charge accumulation period from the end of initialization by applying the reset pulse to the double gate type phototransistor for each row until the reading pulse is applied. A series of operation steps for detecting light / dark information by reading out the output voltage (drain voltage) corresponding to the accumulated amount of carriers (holes) accumulated in the phototransistor (reset operation → charge accumulation operation → precharge operation → readout) The subject image (two-dimensional image) is read by the operation. Such a series of operation steps is not limited to the case where the above-described double gate type phototransistor is used, and the same operation steps are used in a photosensor system using a known photodiode or phototransistor as a photosensor. Is executed.

  Further, specific configurations and operations of the above-described double-gate phototransistor and photosensor array will be described in detail in the embodiments of the invention described later.

  As described above, in the conventional photosensor system, as a subject image reading operation, a series of operation steps of reset operation → charge accumulation operation → precharge operation → reading operation is executed and controlled. When the above operation steps are applied to a photosensor array having a two-dimensional matrix composed of a plurality of rows, the above-mentioned series of steps is performed in one processing cycle for each row from the first row to the last row in order to scan one screen. As the number of rows in the photosensor array increases, the time required for reading the entire screen increases (scan time).

  Therefore, as a technique for solving such a problem, operation is performed at a predetermined delay time interval (specifically, time intervals at which the operation pulses do not overlap each other) in which the operation steps of each row do not affect each other. There is known a drive control method that shortens the reading time of the entire subject image by controlling the execution timing so that some of the steps overlap each other in time.

  However, in such a drive control method, the drain voltage of the photosensor at the time of the reset operation during the reading operation of the subject image differs depending on the image pattern of the subject image, and reading of the double gate type phototransistor between each row is performed. At the timing when the operation and the reset operation are performed in parallel, the drain voltage that is the target of the read operation affects the drain voltage of the photosensor that is the target of the reset operation. The drain voltage is not stabilized at a constant voltage, causing variations. Further, in the case where the first read operation is executed in the photosensor in the first row of the two-dimensional matrix, the precharge operation is the first operation in the photosensor in the row, and therefore, before the precharge operation. The drain voltage is in an indeterminate state.

  As a result, the state of each photosensor after the reset operation is not stabilized (uniformized), particularly due to internal and external factors such as manufacturing variations and usage environment of the element characteristics of the photosensor, The variation in the drain voltage read out during the read operation becomes more remarkable. Therefore, there is a problem that it is impossible to realize a good reading operation of the subject image.

  Therefore, in Patent Document 1, in a photosensor system including a photosensor array configured by two-dimensionally arranging double-gate phototransistors, each double-gate phototransistor 10 is reset before each double-gate phototransistor 10 is reset. By applying a precharge voltage to the drain line connected to the gate type phototransistor 10, the drain voltage at the start of the reset operation is normalized to a constant voltage, so that variations in the state of each photosensor after the reset operation can be reduced. A photo sensor system and a photo sensor drive control method in the photo sensor system that can satisfactorily read the subject image while suppressing the reading time of the entire subject image are proposed.

  FIGS. 8A and 8B are diagrams showing an operation concept at the time of resetting and precharging in the double gate type phototransistor disclosed in Patent Document 1. FIG.

In the reset operation, as shown in FIG. 8A, a pulse voltage (reset pulse; for example, high level of Vtg = + 15V) is applied to the top gate terminal (electrode) TG of the double gate type phototransistor 10; The carriers (here, holes) accumulated near the interface between the semiconductor layer 11 and the block insulating film 14 with the semiconductor layer 11 are emitted. Here, the switch SWpg is a switch that is turned on when the precharge pulse is applied as the first switching control signal. Further, the switch SW2 is configured such that the second switching control signal synchronized with the reset pulse is not applied to the precharge voltage Vpg side, which is the constant voltage, and the second switching control signal is applied when the second switching control signal is applied. This switch is switched to the specific voltage _VL side lower than the precharge voltage Vpg. A precharge pulse is applied immediately before or during the application of the reset pulse, so that the switch SWpg is turned on, and the switch SW2 is on the specific voltage _VL side in synchronization with the application of the reset pulse. The specific voltage V _L is applied to the drain terminal (electrode) D of the transistor 10.

  In the charge accumulation operation, by applying a low level (for example, Vtg = −15 V) bias voltage to the top gate terminal TG of the double gate type phototransistor 10, the reset operation is terminated, and the carrier accumulation operation (charge accumulation operation) The charge accumulation period due to) starts. During this charge accumulation period, electron-hole pairs are generated in the carrier generation region of the double-gate phototransistor 10 in accordance with the amount of light incident from the top gate electrode side, and holes are accumulated around the channel region.

  In the precharge operation, as shown in FIG. 8B, a precharge pulse is applied in parallel with the charge accumulation period, and the switch SWpg is turned on based on the precharge pulse. At this time, the switch SW2 is turned on. Since the voltage is on the precharge voltage Vpg side, the constant voltage (precharge voltage Vpg) is applied to the drain terminal D of the double gate type phototransistor 10 to hold the electric charge in the drain electrode.

Note that the left side of the two-dot chain line in FIGS. 8A and 8B is configured in a driver (hereinafter referred to as an LSI driver) formed as an LSI.
JP 2003-189182 A

In the photosensor system and the photosensor drive control method in the photosensor system disclosed in Patent Document 1, the voltage on the drain terminal D side (V1 point) of the double gate type phototransistor 10 is set to the constant during the reset operation. The charge is discharged by setting the voltage to a specific voltage _VL smaller than the precharge voltage Vpg which is a voltage.

  Therefore, in the method disclosed in Patent Document 1, a reset switch SW2 is required in the LSI driver (drain driver) for resetting and precharging, and a switching control signal for switching SW2 is required. For this purpose, a signal input terminal is also required.

  The area in which an LSI driver is arranged is limited, and it is desirable that the number of elements and the number of input terminals in the LSI driver be as small as possible.

  The present invention has been made in view of the above points. A photosensor capable of reducing the number of elements in an LSI driver and the number of input terminals of the LSI driver, and a photo configured by two-dimensionally arranging the photosensors. It is an object of the present invention to provide a sensor array, a photosensor system including such a photosensor array, and a drive control method for such a photosensor system.

In order to solve the above problems, the invention of claim 1 is a photosensor,
A source electrode and a drain electrode formed across a channel region made of a semiconductor layer, and a top gate electrode and a bottom gate electrode formed at least above and below the channel region via an insulating film, respectively, A double gate type phototransistor in which either one of the top gate electrode or the bottom gate electrode is used as a light irradiation side, and a charge corresponding to the amount of light irradiated from the light irradiation side is generated and accumulated in the channel region; ,
A discharge transistor for discharging the charge accumulated in the drain electrode by a signal connected to the top gate electrode of the double-gate phototransistor;
It is characterized by providing.

The invention of claim 2 is the photo sensor of the invention of claim 1,
The double gate type phototransistor is:
By applying a reset pulse during the reset period, the double gate phototransistor is initialized,
The bottom gate electrode is applied with a readout pulse during a readout period, and a voltage that changes according to the charge generated by the light applied to the double-gate phototransistor is applied from the drain electrode of the double-gate phototransistor. Output phototransistor,
The signal applied to the top gate electrode of the double gate type phototransistor is the reset pulse.

The invention of claim 3 is the photo sensor array,
A plurality of photosensors according to claim 1 or 2,
A top gate line and a bottom gate line extending by connecting the top gate electrode and the bottom gate electrode of each double-gate type phototransistor in the row direction;
A data line connecting the drain electrodes of the double gate phototransistors in the column direction;
A common line connecting the source electrodes of the double-gate phototransistors in the column direction;
A discharge line connecting the source electrodes of the respective discharge transistors in a column direction;
Comprising
When the reset pulse is applied to the top gate line during a reset period, the double gate phototransistors connected to the top gate line are initialized and the top gate line is connected to the top gate line. The drain electrode of the corresponding double gate type phototransistor is connected to the discharge line via each discharge transistor,
A read pulse is applied to the bottom gate line during a read period, and a voltage that changes in accordance with charges generated by light irradiated to each double-gate phototransistor connected to the bottom gate line is changed to the double voltage. The data is output from the data line connected to the gate type phototransistor.

In order to solve the above-mentioned problem, the invention of claim 4 is a photo sensor system,
A source electrode and a drain electrode formed across a channel region made of a semiconductor layer, and a top gate electrode and a bottom gate electrode formed at least above and below the channel region via an insulating film, respectively, A double gate type phototransistor in which either the top gate electrode or the bottom gate electrode is used as a light irradiation side, and charges corresponding to the amount of light irradiated from the light irradiation side are generated and accumulated in the channel region. A photosensor array comprising a plurality of photosensors;
Reset means for initializing the plurality of photosensors by applying a reset pulse to the plurality of photosensors of the photosensor array;
A discharge transistor for discharging the charge accumulated in the drain electrode by a signal applied to the top gate electrode of the double-gate phototransistor;
Precharge means for applying a precharge voltage to the plurality of photosensors based on a precharge pulse;
After completion of initialization of the plurality of photosensors by the reset means, a charge accumulation period for accumulating charges generated by irradiated light has elapsed, and the precharge operation for applying the precharge voltage has been completed. Read means for applying a read pulse to a plurality of photosensors;
An output means for reading out a voltage changed according to the charge accumulated in the charge accumulation period and outputting it as an output voltage with respect to the precharge voltage in a readout period in which the readout pulse is applied;
It is characterized by comprising.

The invention of claim 5 is the photosensor system of the invention of claim 4,
The gate electrode of the discharge transistor is connected to the top gate electrode of the double gate type phototransistor,
The drain electrode of the discharge transistor is connected to the drain electrode of the double gate phototransistor.

The invention of claim 6 is the photosensor system according to claim 4 or 5, wherein
It said reset means, wherein by applying the reset pulse to the top gate electrode of the double-gate photo transistor performs a reset operation for initializing the double-gate photo transistor, thereby turning on the discharge transistor And

The invention of claim 7 is the photosensor system according to any one of claims 4 to 6,
A predetermined discharge voltage lower than the precharge voltage is applied to the source electrode of the discharge transistor.

The invention of claim 8 is the photosensor system of the invention of claim 7,
The predetermined discharge voltage is set to a ground potential.

In order to solve the above problems, the invention of claim 9 is a drive control method of a photosensor system comprising a photosensor array comprising a plurality of phototransistors and a discharge transistor connected to each phototransistor,
A first step of initializing the plurality of phototransistors and applying the plurality of discharge transistors by applying a reset pulse;
After completion of initialization of the plurality of phototransistors in the first step, the plurality of phototransistors for which the charge accumulation period for accumulating charges generated by irradiated light has elapsed in the plurality of phototransistors. A second step of applying a read pulse and outputting a voltage due to the charge accumulated during the charge accumulation period as an output voltage;
It is characterized by having.

  According to the present invention, a transistor is provided separately from the photosensor, the gate electrode of the transistor is connected to the top gate electrode of the photosensor, and the reset operation is performed to automatically discharge the drain electrode. Therefore, a photosensor capable of reducing the number of elements in the LSI driver and the number of input terminals of the LSI driver, a photosensor array configured by two-dimensionally arranging the photosensors, and such a photosensor array It is possible to provide a photosensor system including the photosensor system and a drive control method for such a photosensor.

  The best mode for carrying out the present invention will be described below with reference to the drawings.

<Photo sensor>
First, an example of a photosensor applicable to a photosensor system according to an embodiment of the present invention will be described with reference to the drawings.

FIG. 1A is a cross-sectional structure diagram illustrating a schematic configuration of a double gate type phototransistor 10 which is one mode of a phototransistor used in a photosensor according to an embodiment of the present invention. As shown in the figure, the double gate type phototransistor 10 includes a semiconductor layer (channel layer) 11 such as amorphous silicon in which electron-hole pairs are generated when excitation light (here, visible light) is incident. In addition, n ⁺ silicon impurity layers 17 and 18 provided on both ends of the semiconductor layer 11 and chromium, chromium alloy, aluminum, aluminum alloy, etc. formed on the impurity layers 17 and 18 are visible. A transparent conductive material such as ITO formed by a source electrode 12 and a drain electrode 13 which are opaque to light, and a block insulating film 14 and an upper (top) gate insulating film 15 above (above the drawing) the semiconductor layer 11. And a top gate electrode 21 that is transparent to visible light, and a lower (bottom) gate insulating film 16 below the semiconductor layer 11 (downward in the drawing). And a bottom gate electrode 22 that is selected from chromium, chromium alloy, aluminum, aluminum alloy and the like and is opaque to visible light. The double-gate phototransistor 10 having such a configuration is formed on a transparent insulating substrate 19 such as a glass substrate.

  Here, the upper (top) gate insulating film 15, the block insulating film 14, the lower (bottom) gate insulating film 16, and the protective insulating film 20 provided on the top gate electrode 21 all excite the semiconductor layer 11. By being made of a material having a high transmittance with respect to visible light, for example, silicon nitride, silicon oxide, or the like, it has a structure that detects only light incident from above. That is, the double gate type phototransistor 10 includes an upper MOS transistor formed by the semiconductor layer 11, the source electrode 12, the drain electrode 13, and the top gate electrode 21, the semiconductor layer 11, the source, and the semiconductor layer 11 as a common channel region. A structure in which two MOS transistors including a lower MOS transistor formed by the electrode 12, the drain electrode 13, and the bottom gate electrode 22 are combined is formed on a transparent insulating substrate 19 such as a glass substrate.

  Such a double gate type phototransistor 10 is generally represented by an equivalent circuit as shown in FIG. Here, TG is a top gate terminal electrically connected to the top gate electrode 21, BG is a bottom gate terminal electrically connected to the bottom gate electrode 22, and S is a source electrically connected to the source electrode 12. A terminal D is a drain terminal electrically connected to the drain electrode 13.

FIG. 1C is an equivalent circuit diagram for explaining the configuration of the photosensor 30 applicable to the photosensor system according to one embodiment of the present invention. This photosensor 30 is one in which a discharge TFT (discharge means) 40 is connected in parallel to the double gate type phototransistor 10. That is, the gate terminal (electrode) of the discharge TFT 40 is connected to the top gate terminal TG of the double gate type phototransistor 10, and the drain terminal (electrode) of the discharge TFT 40 is connected to the drain terminal D of the double gate type phototransistor 10. The source terminal (electrode) DC of the discharge TFT 40 is connected to a specific voltage _VL lower than a precharge voltage Vpg described later. In practice, it is desirable to connect to the source terminal S of the double gate type phototransistor 10 as described later.

  The structure of the discharge TFT 40 is the same as the cross-sectional structure of the double gate phototransistor 10 shown in FIG. 1A, and therefore can be manufactured simultaneously with the double gate phototransistor 10 by the same manufacturing process. It has become. In this case, the gate electrode of the discharge TFT 40 is formed as the same wiring layer as the bottom gate electrode 22 of the double gate type phototransistor 10, and the wiring layer of the top gate electrode 21 of the double gate type phototransistor 10 through the via hole. Connected.

  Next, a method for controlling the driving of the photosensor 30 will be described with reference to the drawings. FIG. 2 is a timing chart showing an example of the drive control method, FIGS. 3 and 4 are operation conceptual diagrams of the photosensor 30, and FIG. 5 shows the light of the output voltage of the double gate type phototransistor 10. It is a figure which shows a response characteristic.

  First, in the reset operation, as shown in FIGS. 2 and 3A, a pulse voltage (reset pulse; for example, a high level of Vtg = + 15V) is applied to the top gate terminal TG of the double gate type phototransistor 10 as a bias voltage φT. ) And the carriers (here, holes) accumulated near the interface between the semiconductor layer 11 and the block insulating film 14 with the semiconductor layer 11 are released (reset period Trst).

  Here, the switch SWpg configured in the LSI driver is a switch that is turned on when the precharge pulse φpg is applied, and this precharge pulse φpg is applied immediately before or during the application of the reset pulse. It is to be applied. Thus, in the reset period Trst, the switch SWpg is OFF.

Further, the discharge TFT 40 is turned ON by applying the high level reset pulse to the top gate terminal TG of the double gate type phototransistor 10. As a result, as indicated by a broken arrow in FIG. 3A, a current flows from the drain terminal D side (V1 point) of the double gate type phototransistor 10 to the discharge potential V _L via the discharge TFT 40. The charge at the point V1 can be discharged to the discharge potential _VL . (As described later, the discharge potential V _L is preferably GND.)
Next, in the charge accumulation operation, as shown in FIGS. 2 and 3B, the reset operation is terminated by applying a low level (for example, Vtg = −15 V) bias voltage φT to the top gate terminal TG. Then, the charge accumulation period Ta by the carrier accumulation operation (charge accumulation operation) starts. Further, the discharge TFT 40 is automatically turned OFF by applying a low level reset pulse to the top gate terminal TG of the double gate type phototransistor 10.

  During this charge accumulation period Ta, electron-hole pairs are generated in the incident effective region of the semiconductor layer 11, that is, the carrier generation region, according to the amount of light incident from the top gate electrode 21 side. Holes are accumulated in the vicinity of the interface between the insulating film 14 and the semiconductor layer 11, that is, around the channel region.

  In the precharge operation, as shown in FIG. 2 and FIG. 3C, a precharge pulse φpg is applied in parallel with the charge accumulation period Ta, and the switch SWpg is turned on based on this, and the double A predetermined voltage (precharge voltage Vpg) is applied to the drain terminal D of the gate-type phototransistor 10 to hold the drain electrode 13 with charge (precharge period Tprch).

  Next, in the read operation, as shown in FIGS. 2 and 4A, after the precharge period Tprch has elapsed, the bias voltage φB is applied to the bottom gate terminal BG as a bias voltage of high level (for example, Vbg = + 15 V). By applying (read selection signal; hereinafter referred to as “read pulse”) (selected state), the double gate type phototransistor 10 is turned on (read period Tread).

  Here, in the read period Tread, carriers (holes) accumulated in the channel region work in the direction of relaxing Vtg (−15 V) applied to the reverse polarity top gate terminal TG, so that the bottom gate terminal BG An n channel is formed by Vbg (+15 V), and the voltage (drain voltage) VD of the drain terminal D gradually decreases with time from the precharge voltage Vpg as shown in FIG. 5A in accordance with the drain current. Show a tendency to

  That is, when the charge accumulation state in the charge accumulation period Ta is a bright state, as shown in FIG. 4A, carriers (holes) corresponding to the amount of incident light are captured in the channel region. The double gate type phototransistor 10 is turned on by the positive bias of the bottom gate terminal BG by the amount of the cancellation which acts to cancel the negative bias of the terminal TG. Then, according to the ON resistance corresponding to the incident light quantity, the drain voltage VD decreases as shown in FIG.

  On the other hand, when the charge accumulation state is dark and carriers (holes) are not accumulated in the channel region, as shown in FIG. 4B, by applying a negative bias to the top gate terminal TG, The positive bias of the gate terminal BG is canceled, the double gate type phototransistor 10 is turned off, and the drain voltage VD is held almost as it is as shown in FIG.

  Therefore, as shown in FIG. 5A, the tendency of the drain voltage VD to change is that the bias voltage is applied to the bottom gate terminal BG from the end of the reset operation by applying the reset pulse as the bias voltage φT to the top gate terminal TG. It is deeply related to the amount of light received during the time until the readout pulse is applied as φB (charge accumulation period Ta), and when there is a large amount of accumulated carriers (bright state), it tends to decrease sharply. When there are few carriers (dark state), there is a tendency to gradually decrease. For this reason, by detecting the drain voltage VD (= Vrd) after the elapse of a predetermined time from the start of the read period Tread, or by using the predetermined threshold voltage as a reference, the time until the voltage is detected is detected. Thus, the amount of light (irradiation light) incident on the double gate type phototransistor 10 is converted.

  In the timing chart shown in FIG. 2, a low level (for example, Vbg = 0 V) is applied to the bottom gate terminal BG as shown in FIGS. 4C and 4D after the precharge period Tprch has elapsed. When the state (non-selected state) is continued, the double gate type phototransistor 10 continues to be in the OFF state, and the drain voltage VD maintains a voltage approximate to the precharge voltage Vpg as shown in FIG. In this way, a selection function for switching the reading state of the double gate type phototransistor 10 between the selection state and the non-selection state is realized by the application state of the voltage to the bottom gate terminal BG.

As described above, in the photosensor 30 in which the double gate phototransistor 10 and the discharge TFT 40 are connected in parallel, and the gate terminal of the discharge TFT 40 and the top gate terminal TG of the double gate phototransistor 10 are connected in common, the reset is performed. During operation, the discharge TFT 40 is automatically turned on and discharged, and the V1 point can be set to the discharge potential _VL . Accordingly, the state of the photosensors 30 after the reset operation can be stabilized (uniformized), and even if a plurality of such photosensors 30 are arranged in a matrix, variations in the state of the photosensors 30 after the reset operation are prevented. This makes it possible to read the subject image satisfactorily while shortening the reading time of the entire subject image.

In the above description, during the reset operation, the charge at the point V1 is discharged to the specific voltage discharge potential _VL lower than the precharge voltage Vpg, and variation is suppressed.

  However, as a result of various experiments by the inventor of the present application, it has been found that it is preferable to use the ground potential (GND) for more effective suppression.

<Photo sensor system>
Next, a photosensor system according to an embodiment of the present invention including a photosensor array configured by two-dimensionally arranging the above-described photosensors 30 will be described with reference to the drawings. FIG. 6A is a schematic configuration diagram of a photosensor system including a photosensor array configured by two-dimensionally arranging photosensors 30.

  As shown in FIG. 6A, the photosensor system according to an embodiment of the present invention is roughly divided into a large number of photosensors 30 in, for example, a matrix of n rows × m columns (n and m are arbitrary natural numbers). The arranged photosensor array 100 and the top gate terminal TG (top gate electrode 21) and the bottom gate terminal BG (bottom gate electrode 22) of the double gate type phototransistor 10 of each photosensor 30 are connected in the row direction and extended. A top gate line 101 and a bottom gate line 102, a drain line (data line) 103 in which the drain terminals D (drain electrodes 13) of the double gate type phototransistors 10 of each photosensor 30 are connected in a column direction, and a source terminal S (Source electrode 12) is connected in the column direction and connected to the ground potential. Sline (common line) 104, top gate driver (reset means) 110 connected to top gate line 101, bottom gate driver (read means) 120 connected to bottom gate line 102, and drain line 103 And a column driver 131, a precharge switch 132 as the switch SWpg, and a drain driver (precharge means, output means) 130 as an LSI driver including an amplifier 133.

  Here, the top gate line 101 is integrally formed of a transparent conductive layer such as ITO together with the top gate electrode 21 shown in FIG. 1, and the bottom gate line 102, the drain line 103, and the source line 104 are respectively a bottom gate. The electrode 22, the source electrode 12, and the drain electrode 13 are integrally formed of the same excitation light with an opaque material. The source line 104 is connected to GND.

Here, the discharge line 106 is connected to a specific voltage discharge potential _VL lower than the precharge voltage Vpg. As described above, since the discharge potential _VL is desirably GND, it is desirable to connect both the source line 104 and the discharge line 106 to the GND, and the configuration is simplified.

  In that case, the configuration is as shown in FIG. 6B.

  In FIG. 6, φtg is a control signal for generating bias voltages φT1, φT2,..., ΦTi,..., ΦTn that are selectively output as either a reset voltage (reset pulse) or an optical carrier storage voltage. Φbg is a control signal for generating bias voltages φB1, φB2,..., ΦBi,..., ΦBn selectively output as either a read voltage or a non-read voltage, and φpg is a precharge voltage Vpg. Is a precharge pulse for controlling the application timing of the switch SWpg, and ON / OFF of the switch SWpg is controlled by this precharge pulse.

  In such a configuration, by applying a bias voltage φTi (i is an arbitrary natural number; i = 1, 2,..., N) to the top gate terminal TG from the top gate driver 110 through the top gate line 101, A photo-sensing function is realized, a bias voltage φBi is applied from the bottom gate driver 120 to the bottom gate terminal BG via the bottom gate line 102, and a detection signal is taken into the drain driver 130 via the drain line 103 to obtain serial data. Alternatively, the selective read function is realized by outputting the output voltage Vout of parallel data.

  The above-described drive control method of the photosensor system basically uses the drive control method of the photosensor 30 (see FIG. 2) described above as one processing cycle, and is serial (hours) for the number of rows of the matrix constituting the photosensor array. For example, when the density of the photosensor array is increased in order to increase the reading accuracy, the time required to read the subject image increases, It is not preferable in terms of practical use. Therefore, as described in, for example, Japanese Patent Application Laid-Open No. 2001-148807, etc., a predetermined delay time interval (specifically, each operation pulse is not temporally affected by each other). By controlling the execution timing so that some of the operation steps have temporal overlap with each other at a time interval that does not overlap, the time required to read the entire subject image can be significantly reduced.

  As described above, by using the photosensor array 100 in which the photosensors 30 in which the double gate type phototransistor 10 and the discharge TFT 40 are connected in parallel are arranged in a matrix, discharge is automatically performed at the time of resetting of each photosensor 30. Since the state of the photosensor 30 after the reset operation can be stabilized (uniformized), there is no need to provide the conventional switch SW2 in the drain driver 130 which is an LSI driver. The second switching control signal for switching SW2 is also unnecessary, and the input terminal to the drain driver 130 for that purpose is also unnecessary. Therefore, according to the photosensor system according to the present embodiment, the number of elements in the drain driver 130 and the number of input terminals of the drain driver 130 can be reduced as compared with the conventional one.

  In the photosensor array 100, the photosensors 30 are arranged in a matrix of n rows × m columns (n and m are arbitrary natural numbers). Conventionally, the double gate type phototransistors 10 are arranged in a matrix. The area to be discharged is large in the first place, and it is easy to add the discharge TFTs 40 one by one because they can be formed by the same process.

  When the photo sensor system is used for a fingerprint sensor or the like, backlight light is emitted from the back surface (transparent insulating substrate 19 side) of the photo sensor array 100, and the reflected light reflected by the finger is used as the photo sensor array 100. However, in view of the area of one photosensor 30 in the photosensor array 100, the area occupied by the double gate type phototransistor 10 is small so that sufficient backlight light can be emitted (adjacent double sensors). Even if the discharge TFT 40 having a smaller area than the double-gate phototransistor 10 is disposed, the emission performance of the backlight light is not greatly affected.

<2D image reader>
Next, an example of a two-dimensional image reading apparatus to which a photosensor system according to an embodiment of the present invention is applied will be described with reference to the drawings. In the example shown below, the above-described photosensor 30 is applied as a photosensor, and a voltage (reset pulse) is applied to the top gate electrode 21 of the double-gate phototransistor 10 of the photosensor 30. In the following description, it is assumed that the function of reading the charge amount accumulated in the channel region is realized by applying a voltage (readout pulse) to the bottom gate electrode 22 as well as realizing the photo-sense function.

  FIG. 7 is a block diagram illustrating an overall configuration of a two-dimensional image reading apparatus to which the photosensor system according to the embodiment is applied. In addition, about the structure equivalent to the photosensor system shown in FIG. 6, the same code | symbol is attached | subjected and the description is simplified or abbreviate | omitted.

  As shown in FIG. 7, the two-dimensional image reading apparatus is roughly divided into a photosensor array 100 configured by two-dimensionally arranging photosensors 30 as in the photosensor system shown in FIG. A top gate driver 110 that applies a predetermined top gate voltage (reset pulse) to the top gate terminal TG of the double gate type phototransistor 10 of each photosensor 30 of the sensor array 100 at a predetermined timing, and a double of each photosensor 30 A bottom gate driver 120 that applies a predetermined bottom gate voltage (readout pulse) to the bottom gate terminal BG of the gate type phototransistor 10 at a predetermined timing, and a precharge voltage to the double gate type phototransistor 10 of each photosensor 30 Application and drain voltage readout A drain driver 130 including a column switch 131, a precharge switch 132 (switch SWpg), and an amplifier 133, and an analog-digital converting the read drain voltage (analog signal) into an image output signal (image data) including a digital signal. Data between a converter (hereinafter referred to as “A / D converter”) 140 and an external function unit 200 that executes predetermined processing such as subject image reading operation control, image data collation, and processing by the photosensor array 100. And the like, and a controller (timing control means) 150 having a function of executing and controlling an image reading operation (that is, a photosensor drive control method according to the present invention), setting of read image data, reading sensitivity, and the like RAM 160 for storing data related to the That. Here, the photosensor array 100, the top gate driver 110, the bottom gate driver 120, and the drain driver 130 have the same configuration and function as the photosensor system shown in FIG. To do.

  The controller 150 outputs the control signals φtg and φbg to the top gate driver 110 and the bottom gate driver 120, so that the photosensor array 100 from each of the top gate driver 110 and the bottom gate driver 120 as shown in FIG. Of applying predetermined signal voltages (bias voltage φTi (reset pulse), bias voltage φBi (readout pulse)) to the top gate terminal TG and the bottom gate terminal BG of the double gate type phototransistor 10 of each photosensor 30 constituting To control. In particular, in the present embodiment, the application timings of the reset pulse and the readout pulse are set so as not to overlap each other between at least two different rows constituting the photosensor array 100, and processing for each row is performed. It is set so as to have a period in which a part of the cycle (the charge accumulation periods) overlap in time.

  In addition, the controller 150 outputs a precharge pulse φpg to the precharge switch 132 (switch SWpg) in the reading operation of the detection object image, so that the controller 150 supplies the drain terminal D of the double gate type phototransistor 10 of each photosensor 30. An operation of applying the precharge voltage Vpg and detecting the drain voltage VD corresponding to the amount of charge accumulated in the double gate type phototransistor 10 of each photosensor 30 corresponding to the read image pattern of the detected object. Control. In particular, in this embodiment, the controller 150 applies a predetermined voltage (precharge voltage Vpg) to the drain line 103 by the precharge operation at least at the start of the reset operation for each row constituting the photosensor array 100. Thus, the drain voltage is set to a constant voltage value.

  Further, the output voltage Vout output from the drain driver 130 is converted into a digital signal via the A / D converter 140 and input to the controller 150 as an image output signal. The controller 150 performs predetermined image processing on the image output signal, writes / reads data to / from the RAM 160, and performs the predetermined processing for collating and processing the image data. It also has a function as an interface.

  Although the present invention has been described above based on the embodiments, the present invention is not limited to the above-described embodiments, and various modifications and applications are naturally possible within the scope of the gist of the present invention.

  For example, the bias voltage applied to the bottom gate terminal BG of the double gate type phototransistor 10 is not limited to the values described in the embodiment.

  Here, the terminals (electrodes) that are controlled to be turned on and off by the gate terminals (electrodes) are called source terminals (electrodes) and drain terminals (electrodes) corresponding to the respective drawings. In some cases, the source terminal (electrode) in each figure may be called the drain terminal (electrode), and the drain terminal (electrode) may be called the source terminal (electrode).

FIGS. 4A and 4B are a cross-sectional structure diagram and an equivalent circuit diagram showing a schematic configuration of a double gate type phototransistor used in a photosensor applicable to a photosensor system according to an embodiment of the present invention. (C) is a figure which shows the equivalent circuit of the photo sensor applicable to the photo sensor system which concerns on one Embodiment. 5 is a timing chart illustrating an example of a photosensor drive control method according to an embodiment. FIG. 6 is an operation conceptual diagram in a reset period, a charge accumulation period, and a precharge period of a photosensor according to an embodiment. It is an operation | movement conceptual diagram of the photo sensor in the read-out period in one Embodiment. It is a figure which shows the optical response characteristic of the output voltage of a double gate type phototransistor. 1 is a schematic configuration diagram of a photosensor system including a photosensor array configured by two-dimensionally arranging photosensors according to an embodiment of the present invention. FIG. 6A is a schematic configuration diagram when both the source line and the discharge line are connected to GND in FIG. 6A. 1 is a block diagram illustrating an overall configuration of a two-dimensional image reading apparatus to which a photosensor system according to an embodiment is applied. It is an operation conceptual diagram at the time of resetting and precharging in a conventional double gate type phototransistor.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Double gate type phototransistor, 11 ... Semiconductor layer, 12 ... Source electrode, 13 ... Drain electrode, 14 ... Block insulating film, 15 ... Upper (top) gate insulating film, 16 ... Lower (bottom) gate insulating film, 17 , 18 ... Impurity layer, 19 ... Insulating substrate, 20 ... Protective insulating film, 21 ... Top gate electrode, 22 ... Bottom gate electrode, 30 ... Photosensor, 40 ... Discharge TFT, 100 ... Photosensor array, 101 ... Top Gate line, 102 ... Bottom gate line, 103 ... Drain line (data line), 104 ... Source line (common line), 106 ... Discharge line, 110 ... Top gate driver (reset means), 120 ... Bottom gate driver (read means) ), 130 ... Drain driver (P (Recharge means, output means), 131 ... column switch, 132 ... precharge switch (SWpg), 133 ... amplifier, 140 ... analog-digital converter (A / D converter), 150 ... controller, 160 ... RAM, 200 ... external Functional part, TG ... Top gate terminal, BG ... Bottom gate terminal, D ... Drain terminal, S ... Source terminal, SWpg ... Switch, Vpg ... Precharge voltage, φTi ... Bias voltage, φBi ... Bias voltage, φpg ... Precharge pulse Vpg: precharge voltage, _VL : specific voltage, VD: drain voltage, Vout: output voltage, Trst: reset period, Ta: charge accumulation period, Tprch: precharge period, Tread: read period.

Claims (9)

A source electrode and a drain electrode formed across a channel region made of a semiconductor layer, and a top gate electrode and a bottom gate electrode formed at least above and below the channel region via an insulating film, respectively, A double gate type phototransistor in which either one of the top gate electrode or the bottom gate electrode is used as a light irradiation side, and a charge corresponding to the amount of light irradiated from the light irradiation side is generated and accumulated in the channel region; ,
A discharge transistor for discharging the charge accumulated in the drain electrode by a signal applied to the top gate electrode of the double-gate phototransistor;
A photosensor comprising: The double gate type phototransistor is:
By applying a reset pulse during the reset period, the double gate phototransistor is initialized,
The bottom gate electrode is applied with a readout pulse during a readout period, and a voltage that changes according to the charge generated by the light applied to the double gate phototransistor is applied from the drain electrode of the double gate phototransistor. Output phototransistor,
The photosensor according to claim 1, wherein a signal applied to a top gate electrode of the double gate phototransistor is the reset pulse. A plurality of photosensors according to claim 1 or 2,
A top gate line and a bottom gate line extending by connecting the top gate electrode and the bottom gate electrode of each double-gate type phototransistor in the row direction;
A data line connecting the drain electrodes of the double gate phototransistors in the column direction;
A common line connecting the source electrodes of the double-gate phototransistors in the column direction;
A discharge line connecting the source electrodes of the respective discharge transistors in a column direction;
Comprising
When the reset pulse is applied to the top gate line during a reset period, the double gate phototransistors connected to the top gate line are initialized and the top gate line is connected to the top gate line. The drain electrode of the corresponding double gate type phototransistor is connected to the discharge line via each discharge transistor,
A read pulse is applied to the bottom gate line during a read period, and a voltage that changes in accordance with charges generated by light irradiated to each double-gate phototransistor connected to the bottom gate line is changed to the double voltage. An output from the data line connected to a gate type phototransistor. A source electrode and a drain electrode formed across a channel region made of a semiconductor layer, and a top gate electrode and a bottom gate electrode formed at least above and below the channel region via an insulating film, respectively, A double gate type phototransistor in which either the top gate electrode or the bottom gate electrode is used as a light irradiation side, and charges corresponding to the amount of light irradiated from the light irradiation side are generated and accumulated in the channel region. A photosensor array comprising a plurality of photosensors;
Reset means for initializing the plurality of photosensors by applying a reset pulse to the plurality of photosensors of the photosensor array;
A discharge transistor for discharging the charge accumulated in the drain electrode by a signal applied to the top gate electrode of the double-gate phototransistor;
Precharge means for applying a precharge voltage to the plurality of photosensors based on a precharge pulse;
After completion of initialization of the plurality of photosensors by the reset means, a charge accumulation period for accumulating charges generated by irradiated light has elapsed, and the precharge operation for applying the precharge voltage has been completed. Read means for applying a read pulse to a plurality of photosensors;
An output means for reading out a voltage changed according to the charge accumulated in the charge accumulation period and outputting it as an output voltage with respect to the precharge voltage in a readout period in which the readout pulse is applied;
A photosensor system comprising: The gate electrode of the discharge transistor is connected to the top gate electrode of the double gate type phototransistor,
The photosensor system according to claim 4, wherein a drain electrode of the discharge transistor is connected to a drain electrode of the double gate type phototransistor. It said reset means, wherein by applying the reset pulse to the top gate electrode of the double-gate photo transistor performs a reset operation for initializing the double-gate photo transistor, thereby turning on the discharge transistor The photosensor system according to claim 4 or 5.   7. The photosensor system according to claim 4, wherein a predetermined discharge voltage lower than the precharge voltage is applied to a source electrode of the discharge transistor.   The photosensor system according to claim 7, wherein the predetermined discharge voltage is set to a ground potential. A drive control method for a photosensor system comprising a photosensor array comprising a plurality of phototransistors and a discharge transistor connected to each phototransistor,
A first step of initializing the plurality of phototransistors and applying the plurality of discharge transistors by applying a reset pulse;
After completion of initialization of the plurality of phototransistors in the first step, the plurality of phototransistors for which the charge accumulation period for accumulating charges generated by irradiated light has elapsed in the plurality of phototransistors. A second step of applying a read pulse and outputting a voltage due to the charge accumulated during the charge accumulation period as an output voltage;
A drive control method for a photosensor system including a photosensor array.

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