JP5060422B2 - Printed wiring board and apparatus having the printed wiring board - Google Patents

Description

  The present invention relates to a printed wiring board and an apparatus having the printed wiring board. In particular, the present invention relates to a printed wiring board and a device having the printed wiring board for suppressing a circuit malfunction caused by noise interference conducted to a power supply pattern or a ground (hereinafter referred to as GND or ground) pattern.

  2. Description of the Related Art Recent semiconductor integrated circuits (hereinafter referred to as ICs) have been made finer in process technology and the operation speed has been increasing year by year. By using ICs with higher operating speeds, various devices have been reduced in size and functionality. On the other hand, as the operation speed of the IC is increased, the high frequency noise levels of the power supply terminal, the GND terminal, and the signal terminal portion connected to the IC are increasing. High-frequency potential fluctuations propagated to the signal terminal, power supply terminal, and GND terminal of the IC propagate to the printed wiring board, cable, and metal casing on which the IC is mounted, and eventually increase the radiation noise level from the device. Yes. In order to suppress the radiation noise from the device, measures in the IC, measures in the printed wiring board, cable twisting method in the device, and measures to devise the sheet metal configuration are taken.

  However, in order to take measures against the cable winding method and sheet metal configuration, it often leads to a great deal of time and significant cost increase of the equipment. It is better to take measures. In addition, when a high-frequency potential variation caused by the IC propagates to the printed wiring board on which the IC is mounted, there is a problem that a malfunction of the signal control circuit disposed on the printed wiring board occurs. In order to prevent such malfunction in the signal control circuit, in addition to the countermeasures in the IC, countermeasures in the printed wiring board are taken.

  Further, in recent years, as the operation speed of the IC increases, the noise voltage due to the fluctuation of the GND and the power supply voltage generated during the IC operation increases at the external terminal portion of the IC. On the other hand, the operating voltage of the IC tends to decrease more and more, so the noise margin tends to decrease. That is, the malfunction of the device due to noise has become a big problem.

  In order to solve these problems, conventional countermeasures have been taken to reduce wiring noise to the internal wiring of semiconductor integrated circuits and printed wiring boards and to provide noise resistance, etc. Has been used. This branch wiring is connected at about 0Ω in a low frequency band of KHz or lower, but is separated by an inductance component and a direct current resistance component parasitic on the wiring pattern in a high frequency band of MHz or higher.

  For example, in Patent Document 1, a power line and a GND line for external terminals and an internal circuit power line and a GND line for supplying a power supply voltage to an internal circuit are divided on a pattern inside the IC. Thereby, the noise generated in the former does not affect the internal circuit connected to the latter.

  Further, in Patent Document 2, a relatively quiet power rail and a relatively noisy power rail inside an IC are separated, and partially coupled in parallel with a low resistance coupling resistance to reduce parasitic inductance. Are separated. Also, a relatively quiet ground rail and a relatively noisy ground rail inside the IC are separated, and partly separated by reducing the parasitic inductance by partially coupling in parallel with a low resistance coupling resistance. Yes. As a result, the output of the output buffer circuit connected to the relatively quiet power rail or ground rail is maintained within an allowable range.

  As described above, in order to prevent noise generated in the internal circuit of the IC from propagating to other block circuits, the power supply wiring and the GND wiring are branched in the IC as shown in Patent Documents 1 and 2. Wiring technology has been proposed.

  However, in recent years, due to the increase in scale and speed of the IC, only measures such as branch wiring between the power supply wires and between the GND wires in the IC as proposed in Patent Documents 1 and 2 are provided. It is becoming insufficient. Therefore, there is a growing need to take countermeasures from both sides of the IC internal countermeasures and the printed circuit board pattern wiring method. Then, the noise countermeasure by the pattern wiring method of a printed wiring board is shown next.

  The techniques exemplified in Patent Documents 3 to 6 take measures against the pattern wiring of the printed board in order to reduce interference due to high frequency noise. Techniques have been proposed in which the power supply pattern and the GND pattern of the printed board are separated into islands, separated in a one-point ground connection configuration, and the branched patterns are connected with an inductance element. Note that the island-shaped pattern separation and the separation of the one-point ground connection configuration are high-frequency separation on the wiring, and thus are accurately expressed as branches. According to these configurations, it is possible to suppress propagation of high-frequency potential fluctuations generated at the power supply terminals and GND terminals of the ICs mounted on the printed wiring board to the power supply terminals and GND terminals of other ICs. .

  However, on the contrary, the current return path of the output signal of the IC is divided by the shortest pattern path, so that the wiring impedance becomes high in the high frequency component. If the impedance of the high frequency component is increased, the waveform quality of the high-speed output signal may be degraded. In other words, the propagation of high frequency noise contained in the power supply terminal and the GND terminal of the IC is suppressed, but instead, the output signal that operates at high speed has a reduced waveform quality with respect to the high frequency component (MHz band or higher) of the output signal. There was a problem of ending up. As a result, there is a problem that high-frequency noise due to the differential mode is easily radiated in the output signal section.

  Therefore, a technique for connecting the branched patterns with a bypass capacitor is disclosed. In recent years, + 5V and + 3.3V power supplies are mixed on the same printed wiring board, and even if the same + 3.3V power supply is used, the power supply is separated into several systems due to the energy-saving requirements of power management. There may be a discontinuous path in the power supply pattern.

  In such a case, Patent Document 7 discloses a technique for ensuring a short return path for high-frequency current by connecting a separated power source or a branched GND pattern with a bypass capacitor in order to ensure a return path for the high-frequency current. Is disclosed. Conventionally, because the power supply pattern is discontinuous, the high-frequency signal has been routed through a path such as stray capacitance, and the loop area of the return current has been increased. On the other hand, a path for reducing the return current loop can be secured. Unnecessary radiation noise is reduced.

However, in order to suppress the propagation of the high-frequency noise contained in the power supply terminal and the GND terminal of the IC, a bypass capacitor is provided so that a feedback current path for the high-frequency component can be secured in the place where the power supply or the GND pattern is originally branched. It is configured to connect. That is, with respect to the power supply or GND pattern separated in an island shape, a bypass capacitor that functions to weaken the separation is partially added with respect to the high frequency component. As a result, the propagation of high-frequency noise of several tens of MHz or more included in the power supply terminal and the GND terminal of the IC, which was originally regarded as a problem, returns to the direction of worsening depending on the added bypass capacitor. In other words, there is a trade-off relationship. Therefore, in order to suppress the propagation of high-frequency noise to a level that does not cause a problem and to maintain the waveform quality of the high-speed signal at the required level, the number of capacitors that ensure the return path of the high-frequency current is in a balanced quantity and in the right place. It was accompanied by the difficulty of having to place it.
Japanese Patent Laid-Open No. 5-291511 Japanese Patent Laid-Open No. 5-283597 Japanese Patent Laid-Open No. 5-13909 Japanese Patent Laid-Open No. 10-41629 Japanese Patent Laid-Open No. 11-340630 JP 2001-274558 A JP-A-11-261238

  In the conventional example described above, the wiring pattern is separated by branching into a single-point ground or island shape, so that the high frequency impedance of the wiring pattern is used to separate in the high frequency band. In addition, it is possible to suppress noise interference due to propagation of noise voltage mainly generated in a frequency band higher than the MHz band. However, it is difficult to suppress the propagation of the noise voltage generated when a large current flows in a frequency band below the KHz band, and problems such as circuit malfunctions occur.

  On the other hand, in order to suppress interference in a low frequency band, wiring patterns that are likely to cause noise interference are separated without being connected to each other, and each pattern is configured independently. In this case, a problem arises when one of the GNDs is disconnected from the GND of the apparatus due to an inspection process, manufacturing trouble, disconnection, or the like. When the GND floating state occurs, a current flows through a path that does not normally occur, or a potential that does not normally exist is applied to the circuit, which causes electrical stress.

  Hereinafter, this problem will be described in more detail. In addition, although the above-mentioned conventional example is often described using the word “separation” in the description, since the wiring pattern of the printed wiring board is actually connected, it can be expressed accurately. It is “branch”, “high frequency separation”, etc., and is not separated in the low frequency band.

  In the conventional example described above, in the signal control system electronic circuit using + 5V or + 3.3V in general, and recently the lower voltage + 2.5V or + 1.8V power source, etc., each electronic circuit passes through the printed wiring board. The problems and countermeasures that caused various noise interference were shown.

  The noise problem of this type of signal control system is that the wiring inductance of the printed wiring board pattern cannot be ignored because the noise component is mainly a high frequency of the MHz band or higher. As a result, noise voltage is generated and propagated to various locations, which is a complicated problem. Therefore, on the same printed wiring board, the GND pattern of the printed wiring board is branched to a single point ground or island at a location where noise interference is to be avoided, and separated wiring is performed in the high frequency band using the high frequency impedance of the wiring pattern. there were. Conversely, when it is desired to secure a high-frequency current path with low impedance, a bypass capacitor is provided. Only the high frequency components of signals and noise are separated by pattern wiring, inductance elements, and the like, and the entire GND potential on the printed wiring board is uniformly and stably maintained by connecting with a wiring pattern in one low frequency band.

  In the signal control system described above, even if noise in the low frequency band is generated, the impedance of the wiring pattern is very small, so that no problem occurs due to the pattern wiring. However, when power system low-frequency noise in which a large current of several A level flows is mixed, the wiring inductance of the printed wiring board pattern cannot be ignored due to another factor that the current value of the noise component is large. It becomes a state. As a result, there is a problem that noise voltage is generated.

  For example, in a printed wiring board mounted on a laser beam printer or the like, a + 3.3V signal control system and a + 24V power system circuit are generally mounted on the same printed wiring board. The + 24V system is supplied with a drive current in the tens of KHz band for driving the motor, and a noise voltage in the KHz band may be generated when a large current of several A level flows. In other words, even if the frequency is low, the current is large, so that the wiring impedance in the KHz band cannot be ignored and a noise voltage is generated. In particular, when the motor is started, a larger starting current flows through the + 24V wiring, so that a larger noise is generated in the GND pattern.

  Therefore, when a solid pattern is formed on the same printed wiring board without branching the + 3.3V system GND and the + 24V system GND, the GND potential of the + 3.3V system circuit is also increased by the large current flowing through the + 24V system. It will be greatly shaken. Further, even when a + 3.3V GND pattern and a + 24V GND pattern are branched and patterned in a single-point ground configuration, they are connected with a low impedance close to 0Ω in the KHz band. Therefore, noise interference in the KHz band propagating via the wiring pattern cannot be suppressed, and the GND potential of the + 3.3V system circuit is greatly shaken by the + 24V system high current noise. Thus, when the potential of the + 3.3V system GND is fluctuated by noise, it may cause malfunction in the signal control circuit. For example, a reset circuit that monitors the potential difference between the power supply voltage and GND malfunctions, or the CPU A / D input potential cannot detect a correct value.

  Therefore, conventionally, measures such as additionally mounting a large-capacity electrolytic capacitor of about several hundred μF between the + 3.3V power supply and the + 3.3V system GND have been implemented. However, the component size is large and an arrangement space is required, and the cost is increased. Moreover, the effect was only to reduce the level of noise interference. Further, since an electrolytic capacitor having a larger capacity is required to increase the suppression effect, it is necessary to secure a further arrangement space on the printed wiring board and further increase the cost.

  Laser beam printers also have similar noise interference problems that occur because of the large current. Some laser beam printers are configured with a circuit that cuts off the supply of +24 V via an interlock switch from the viewpoint of safety when the user opens and closes the printer door. When the interlock switch is turned off / on, a large inrush current of about 50 A to 100 A flows through an electrolytic capacitor or the like configured in a circuit downstream from the upstream of the switch. Then, since a very large inrush current flows, a phenomenon occurs in which the potential of the GND pattern rises greatly. The magnitude of the inrush current is increased or decreased according to the capacity of the electrolytic capacitor provided downstream of the interlock switch.

  In recent years, with the increase in the circuit scale provided downstream of this interlock switch, for example, the increase in the number of motors, the increase in motor load capacity, the increase in the number of high-voltage circuits on the high-voltage power supply board, etc. The capacity of the electrolytic capacitor is increasing. That is, the capacity of the electrolytic capacitor increases and the noise level generated due to the inrush current also increases. For example, in order to prevent malfunction caused by potential fluctuation between +3.3 V and +3.3 VGND due to the inrush current of the interlock switch, the impedance becomes as low as about 0.01 to 0.02 Ω at 100 KHz. An electrolytic capacitor is required.

  Therefore, in order to avoid the noise problem due to the large current of + 24V system described above, a configuration in which the + 3.3V signal control system and the + 24V power system GND wiring are wired independently from each other on the printed wiring board. Conceivable. However, in this case, the following problem occurs. Since the operation of the + 24V system power circuit is controlled by the + 3.3V system control circuit, the + 3.3V system circuit and the + 24V system circuit have interfaces connected to each other. Therefore, when one of the GNDs is disconnected from the GND of the apparatus due to an inspection process, a manufacturing trouble, a disconnection, or the like, a GND floating state occurs. For this reason, a current flows through a path that does not normally occur, or a potential that does not normally exist is applied to the circuit, resulting in electrical stress. As a result, there is a concern that a circuit part that has been subjected to electrical stress is damaged. In addition, when a part of the circuit unit is damaged, there is a problem that the printer device is not repaired even when the GND connection unit that has been in a disconnected state is normally connected and restored. .

  The present invention has been made in view of the above conventional example, and provides a printed wiring board that suppresses mutual interference of high-frequency noise via a power supply pattern and a GND pattern in a circuit portion of a signal control system with an inexpensive configuration. In addition, a printed wiring board that suppresses noise interference caused by a large current noise from a power system circuit such as a motor to a signal control system while maintaining the waveform quality of a high-frequency signal is provided. In addition, even if either GND is opened due to inspection process of printed wiring board, manufacturing trouble, disconnection, etc., electrical stress in the mutual interface part of signal control system circuit and power system circuit A printed wiring board for preventing application is provided. The present invention can be effectively applied particularly to a printed wiring board of a single layer type or a double layer type.

  In addition, with regard to a capacitor that bypasses between the isolated island-shaped GNDs, there is a problem that a potential difference at a high frequency in a specific path increases when feedback currents of a plurality of power system loads concentrate on the specific capacitor. In order to solve this problem, we propose a distributed arrangement of multiple capacitors.

  Furthermore, an apparatus provided with the said printed wiring board is provided.

  In order to achieve the above object, the printed wiring board of the present invention has the following configuration.

The at least two systems of DC power are supplied from a power supply device that supplies at least two systems of DC power including the first system and the second system, and an operating current flows to mechanically operate or mechanical operation A printed wiring board configured to supply a control signal generated by the first system DC power supply and an operation current generated by the second system DC power supply to an operating device having means for operating current flow. A pair of the first system power supply wiring and the first system GND wiring, and a pair of the second system power supply wiring and the second system GND wiring. wherein the GND wiring and the second system of GND lines, the printed circuit is constituted in the substrate in an independent wiring patterns or wiring planes, G of the first system of the GND lines and the second line Between the D line, via at least one capacitive element the potential difference across which is connected in parallel to the limiting element and the limiting element for limiting to a predetermined value or less while preventing the following low-frequency noise current kHz It is connected.

  The apparatus of the present invention has the following configuration.

A power supply for supplying at least two systems of DC power including the first system and the second system, in which the power supply wiring is independent or branched into at least two systems by a wiring pattern or wiring plane, and the GND wiring is connected by the wiring pattern or wiring plane. A supply unit, a printed wiring board to which the at least two systems of DC power are supplied, a wire connecting the power supply device and the printed wiring board, and a means or a machine that is mechanically operated with an operating current flowing In an apparatus including an operating unit having a means for operating current to flow by a typical operation, the printed wiring board includes a pair of the first system power supply wiring and the first system GND wiring, and the second system. A pair of the second system GND wiring and the first system GND wiring and the second system GND wiring are connected to each other. It is composed of a wiring board in an independent wiring patterns or wiring planes, between the GND wiring between GND wiring of the first system and the second system, as well as to prevent the following low-frequency noise current kHz It is connected through a limiting element that limits the potential difference between both ends to a predetermined value or less and at least one capacitive element connected in parallel to the limiting element.

  According to the present invention, it is possible to suppress the GND potential fluctuation generated in the power system circuit from propagating to the signal control system circuit via the pattern on the printed wiring board with an inexpensive configuration. In addition, the interface units connected to each other by the signal control system circuit and the power system circuit can simultaneously transmit and receive high-speed signals without damaging the waveform quality. In addition, even if either GND is in an open connection state due to a printed wiring board inspection process, manufacturing trouble or disconnection, etc., electrical stress at the mutual interface part of the signal control circuit and power system circuit Can be prevented.

  Hereinafter, some preferred embodiments of the present invention will be described more specifically and in detail with reference to the accompanying drawings. In the example of the printed wiring board described below, a signal control system circuit unit on which an ASIC, a CPU, and the like are mounted and a power system circuit through which a current of about several A or more such as a motor flows are mixed. A laser beam printer will be described as a representative example of an apparatus having such a printed wiring board. However, the present invention relates to any printed wiring board under the condition of a printed wiring board in which a signal control system circuit operating in a high frequency band of several MHz or more and a power system circuit in which a current of several A or more flows are mixed, and an apparatus having the same It is applicable to. These are also included in the scope of the present invention.

[Embodiment 1]
The printed wiring board according to the first embodiment is a printed wiring board in which a signal control system circuit unit on which an ASIC, a CPU, and the like are mounted and a power system circuit unit in which a current of about several A or more such as a motor flows are mixed. That is, the printed circuit board is supplied with the at least two systems of DC power from a power supply device that supplies at least two systems of DC power including the first system and the second system. Then, from the printed circuit board, the control signal generated by the DC power source of the first system and the operating device having the means for operating mechanically by operating current flowing or the means for operating current flowing by mechanical operation, The operating current generated by the DC power supply of the second system is supplied.

  The GND wiring pattern for the signal control circuit section and the GND wiring pattern for the power system circuit section are configured independently of each other in the wiring pattern or wiring plane in the printed wiring board. And it is characterized by connecting between each GND pattern using the resistor and the bypass capacitor connected in parallel with the resistor.

  Here, the bypass capacitor functions as a capacitive element for shortening the feedback route of the high-frequency control signal and maintaining the waveform quality. In addition, the resistor prevents the influence of the low frequency large current generated in the power system circuit unit GND on the signal control system circuit unit GND, and the power system circuit unit GND and the signal control system circuit unit GND It functions as a limiting element that limits the potential difference between both ends, which is the potential difference, to a predetermined value or less.

<Circuit Configuration Example of Device Including the Printed Wiring Board of Embodiment 1>
FIG. 1 partially shows a unit configuration and a GND connection configuration of a laser beam printer, which is a type of image forming apparatus, as an example of a configuration of an apparatus including a printed wiring board according to the first embodiment.

  The apparatus in FIG. 1 includes a power supply unit 10 that generates a power supply voltage for operating the apparatus from a power supply inlet, an engine controller 11 that serves as a control center of the printer engine, and a motor unit 12.

  Here, the power supply unit 10 corresponds to a power supply device or a power supply unit. The engine controller 11 corresponds to a printed wiring board. The motor unit 12 corresponds to an operating device or an operating unit.

  For convenience of explanation, a configuration in which one motor unit 12 is connected as a power system circuit is illustrated, and the configuration of other power system circuits is omitted. The signal control system circuit for generating and transmitting the control signal includes a signal circuit having a fundamental wave component of MHz band or higher, an A / D converter circuit, a D / A converter circuit, a microcontroller, an ASIC, etc. The power is supplied. The signal control system circuit may be a circuit including any of a signal circuit, an A / D converter circuit, a D / A converter circuit, a microcontroller, and an ASIC. In addition, a high-current circuit that is a power system circuit is a circuit having a fundamental wave component in the KHz band, and includes a circuit in which a capacitive element is formed downstream of a motor, an actuator, and a switch that opens and closes. Supply.

  In addition, the power supply unit 10 and the engine controller 11 have their respective power supplies and GND connected to each other with a wire, and inductance components and DC resistance components parasitic on the wire are simply indicated as L12, L22, L32, and L42. ing. Similarly, L51, L37, and L47 simply show an inductance component and a direct current resistance component parasitic on the wire connecting the engine controller 11 and the motor unit 12. In addition, the wire 31, 32, 35, 36 which connects the control signal or GND demonstrated in the following drawings is shown.

  In the power supply unit 10, + 3.3V as a power supply voltage for the signal control system circuit and + 24V for driving the power system circuit are generated. Even if the voltage is not + 3.3V and + 24V, the voltage value is different if the power supply voltage for the signal control system circuit and the power system circuit unit are supplied to the engine through different paths. There may be. However, in general, many signal control systems constituting the CPU and the like are operated at + 5V or less, and many drive sources such as motors are operated at + 12V or more. Further, FIG. 1 shows only two power sources, but three or more power sources may be used as long as they include power sources for signal control system circuits and power system circuit units.

  For convenience of explanation, the power supply unit 10 omits a block diagram of the converter circuit and the like. In FIG. 1, the electrolytic capacitor C1 of the + 3.3V output unit, the power supply voltage + 3.3V, SGND1 as the + 3.3V type GND, the electrolytic capacitor C2 of the + 24V output unit, the power supply voltage + 24V, and the + 24V type Only PGND1 as GND is shown. L 11, L 20, L 21, L 31, L 40 and L 41 simply show the parasitic inductance and DC resistance component of the wiring pattern in the power supply unit 10. Further, SGND1 and PGND1 are connected to a frame GND (FG) as a reference ground point of the apparatus of the present embodiment.

  The engine controller 11 includes a circuit 20 to which a + 3.3V power supply voltage is connected and a circuit 21 to which a + 24V power supply voltage is connected.

  The circuit 20 is composed of a CPU and the like for controlling the operation of each part of the engine, and includes an input / output signal port for controlling the motor. Further, the circuit 20 is connected to SGND2, and SGND2 is connected to SGND1 of the power supply unit 10 by a wire 35 as a GND potential. The circuit 21 is connected to PGND2, and PGND2 is connected to PGND1 of the power supply unit 10 by a wire 36 as a GND potential.

  SGND2 and PGND2 are not connected by pattern wiring on the engine controller 11, but are connected to each other via a resistor R10 and a capacitor C10 connected in parallel. L13, L25, L26, L33, L34, L45, and L46 simply show the parasitic inductance and DC resistance component of the wiring pattern on the printed wiring board. The capacitors C20 and C21 function to maintain a power supply voltage of + 3.3V and a power supply voltage of + 24V in the engine controller 11, respectively.

  The motor unit 12 includes a motor 22 and a motor drive control circuit 23 that drives and controls the motor, and a power supply voltage of +24 V is supplied through the interlock switch SW1. The motor unit 12 is connected to PGND3, and PGND3 is connected to PGND2 of the engine controller 11 by a wire 32 as a GND potential. An electrolytic capacitor C3 is formed between the + 24V power supply line and PGND3. The motor control drive circuit 23 is controlled via the wire 31 by the control signal of the circuit 20 operating in the +3.3 V system of the engine controller 11.

<Configuration Example of Circuit Pattern of Device Including the Printed Wiring Board of Embodiment 1>
FIG. 2A schematically shows a GND pattern wiring example of a printed wiring board that realizes the circuit configuration of the apparatus shown in FIG. In addition, the same reference number is attached | subjected to the element similar to FIG.

  As an example of a typical semiconductor element included in the circuit 20, a CPU 20a is shown. The wire 35 and the wire 36 are GND wires that connect the power supply unit 10 and the engine controller 11. The wire 32 is a GND wire that connects the engine controller 11 and the motor unit 12. The wire 31 is a control signal line that connects the engine controller 11 and the motor unit 12.

  Further, in this embodiment, the resistor R10 and the capacitor C10 connected in parallel to connect SGND2 and PGND2, the resistor R10 is indicated by a resistor 81, and the capacitor C10 is indicated by capacitors 61 to 69. Yes.

  In the arrangement of the resistor 81 on the printed wiring board of the engine controller 11, the resistor 81 is arranged in the vicinity of the connection point of the wires 35 and 36 to the printed wiring board. This is to maintain SGND2 and PGND2 at the ground voltage even if the wire 35 or 36 is disconnected or poorly connected. When one of the GNDs is in an open connection state due to a printed wiring board inspection process, manufacturing trouble, disconnection, or the like, a current flows through the resistor 81. When a high-frequency component is included in the current flowing through the resistor 81, a high-frequency current flows in the wiring pattern if the resistor is disposed in the vicinity of the wires 35 and 36 and the influence of impedance due to the wiring pattern is suppressed low. Thus, the potential difference generated can be reduced. Further, by disposing the resistor 81 in the vicinity of the wires 35 and 36, the resistor 81 is physically separated from the circuit 20. As a result, the electrical stress of the high frequency component applied to the circuit 20 is also reduced.

  The resistance value of the resistor R10 is selected to be equal to or higher than a first resistance value that prevents a voltage drop generated in the resistor R10 from malfunctioning a circuit mounted on the printed wiring board. In addition, in a state where either the first system or the second system GND wiring is disconnected from the GND wiring of the power supply device, the potential difference generated at both ends of the resistor R10 is the power supply voltage of the first system and the second system. Is selected to be equal to or lower than the second resistance value that is equal to or lower than the lower voltage. In this case, the resistance value of the resistor 81 in FIG. 2A is a value that limits the potential difference between SGND2 and PGND2 so as not to be larger than a predetermined value, and is a value that blocks SGND2 from the influence of a large current at a low frequency of PGND2. It is desirable to be selected. The number of resistors is not necessarily one, and a plurality of resistors may be arranged. However, when the number of resistors is expanded, it is essential that the total resistance value of all the resistors connected in parallel satisfies the above resistance value of the resistor R10.

  On the other hand, when the capacitors 61 to 69 are arranged on the printed wiring board of the engine controller 11, the capacitors 68 and 69 are arranged in the vicinity of the connection point of the wire 32 to the printed wiring board. In particular, the capacitor 68 is arranged at a position where the feedback route of the control signal from the motor unit 12 via the wire 32 is shortened, and maintains the waveform quality of the control signal. In FIG. 2A, nine capacitors 61 to 69 are shown. The number and arrangement of the capacitors are determined according to the area of the printed circuit board of the engine controller 11 and the design of the printed pattern of SGND2 and PGND2. Placement is determined.

  The capacitance value of the capacitor C10 is selected so that the impedance is about 0.01 to 0.5Ω in the several MHz to 100MHz band, but about 10Ω or more in the KHz band. For example, a chip-type ceramic capacitor 1000 pF to 0.1 μF is selected. In this case, it is desirable that the capacitance value of the capacitor 68 in FIG. 2A is selected to a value that eliminates the delay in the feedback route of the control signal in the band of several MHz to 100 MHz. Further, when the number of other capacitors 61 to 67, 69 or the number of capacitors as described above is expanded, a capacitance value is selected corresponding to each arrangement. It is essential that the total capacitance value of all capacitors connected in parallel satisfies the above-mentioned capacitance value of the capacitor C10.

<Example of Expansion of Circuit Pattern of Device Including Embodiment 1>
1 and 2A show an example in which only the motor unit 12 is connected to the engine controller 11 as a power system circuit. However, FIG. 2B shows an example in which a plurality of power system units equipped with power system circuits are connected to the engine controller 11. In FIG. 2B, elements that perform the same functions as in FIG. 2A have the same reference numerals.

  In FIG. 2B, similarly to the motor unit 12, the power system units 13 to 15 are connected to the engine controller 11 by wire members 53 to 58, respectively. The wires 54, 56, and 58 are connected to the PGND 2 of the engine controller 11 in the same manner as the wire 32 of the motor unit 12. The wire rods 53, 55, and 57 are signal wires connected to the control system circuit of the engine controller 11, similarly to the wire rod 31 of the motor unit 12.

  On the engine controller 11 to which the wire rods of the power system units 13, 14, 15 are connected, capacitors 74 and 75, capacitors 72 and 73, and capacitors 70 and 71 are respectively connected in the vicinity of the connection portions of the wire rods.

  Even in the case where a plurality of power system units are connected to the engine controller 11, capacitors SGND2 and PGND2 are connected so that a feedback current of a high frequency component flows through a pattern wiring of a shorter path for each power system unit. Connected with. For this reason, the noise voltage generated in the path through which the feedback current flows is suppressed to be small, and the waveform quality of the high-speed signal can be satisfactorily maintained.

  The arrangement and resistance value of each resistor when a plurality of power system units are connected to the engine controller 11 and the arrangement and capacity value of each capacitor are also selected in the same manner as when the one power system unit is connected. Is possible.

<Example of Operation of Device Containing Printed Wiring Board of Embodiment 1 and Its Effect>
Hereinafter, an operation example of the apparatus including the printed wiring board according to the first embodiment and the operation and effect thereof will be described in detail. 2A, in which only one motor unit 12 is connected to the engine controller 11, and in the example in FIG. 2B, in which a plurality of power system units 12 to 15 are connected, the number and arrangement of elements and the characteristic values of each element. Although there is a difference in selection, the operation principle and the effect are the same.

<Example of suppressing noise interference in the first embodiment>
First, the effect that the engine controller 11 of the present embodiment suppresses noise interference will be described. For convenience of explanation, the engine controller 11 of the present embodiment shown in FIGS. 1 and 2 will be described while comparing with a conventional engine controller.

(Conventional high-speed waveform quality and radiation noise)
9 and 10 show specific connection circuit examples of the conventional engine controller 111. FIG. 9 and 10, the same reference numerals and symbols as those already described in FIGS. 1 and 2 are assigned the same reference numerals and symbols, and the description thereof is omitted.

  As shown in FIG. 9, in the conventional engine controller 111, the + 3.3V signal control system SGND2 and the + 24V power system PGND2 are connected by a branch wiring having a pattern such as a one-point grounding configuration. The control signal output from the circuit 20 is input to the motor control drive circuit 23, and the feedback current returns through a path via the PGND3. This feedback current returns to the circuit 20 via the parasitic inductance L47 of the wire 32 and the parasitic inductances L46, L44, and L24 of the engine controller 111.

  If it demonstrates using the schematic diagram of FIG. 10, the control signal output from CPU20a will be input into the motor control drive circuit 23 mounted in the motor unit 12 via the wire 31. FIG. Then, as indicated by a broken line in FIG. 10, a feedback current flows from PGND 3 of the motor unit 12 to PGND 2 of the engine controller 111 via the wire 32. The feedback current that has flowed to PGND2 flows to SGND2 through a one-point grounding portion where PGND2 and SGND2 are connected, and the current returns to the CPU 20a through a route through the pattern wiring of SGND2.

  In other words, in the conventional engine controller 111, the feedback current of the high-speed signal returns through each of the GND patterns branched and wired on the printed wiring board, so that the path through which the feedback current flows becomes long. Therefore, the influence of inductance parasitic on the wiring pattern has increased. As a result, in the case of a high-speed signal of about several MHz or more, there is a problem that the waveform quality is disturbed and high-frequency noise is emitted in the differential mode.

(High-speed signal waveform quality and radiation noise in this embodiment)
As shown in FIGS. 1 and 2A, the engine controller 11 of the present embodiment includes a resistor R10 and a capacitor C10 in which SGND2 and PGND2 are not connected in the pattern wiring in the engine controller 11, and are connected in parallel. Connected through. The control signal output from the circuit 20 is input to the motor control drive circuit 23, and the feedback current returns through a path via the PGND3.

  In FIG. 3A, the path of this feedback current is indicated by a bold line. The feedback current flows from PGND 3 to the capacitor C 10 via the parasitic inductance L 47 of the wire 32 and the parasitic inductance L 46 of the engine controller 11. The capacitor C10 is selected so as to have a low impedance (about 0.01 to 0.5Ω) in a frequency band of about several MHz to 100 MHz. Therefore, the high-frequency component of the feedback current flows as a high-frequency current to SGND2 via the capacitor C10, and returns to the circuit 20 via the parasitic inductance L26.

  If it demonstrates using the schematic diagram of FIG. 2A, the control signal output from CPU20a will be input into the motor control drive circuit 23 mounted in the motor unit 12 via the wire 31. FIG. Then, the feedback current returns from the PGND 3 of the motor unit 12 to the PGND 2 of the engine controller 11 via the wire 32. The feedback current flowing in PGND2 returns to SGND2 and CPU 20a through a short pattern path through a capacitor 68 connected between PGND2 and SGND2.

  That is, in the engine controller 11 of this embodiment, the + 3.3V signal control system SGND2 and the + 24V power system PGND2 are connected by the capacitor so that the feedback current of the high frequency component flows through the pattern wiring of the shorter path. Yes. For this reason, the noise voltage generated in the path through which the feedback current flows is suppressed to be small, and the waveform quality of the high-speed signal can be satisfactorily maintained. As a result, it is possible to suppress high-frequency noise radiated from the high-speed signal line in the differential mode.

<Example of Blocking Large Current Flow in Embodiment 1>
Next, a case will be described in which a large current in the KHz band flows during motor start-up current or when the interlock switch SW1 is turned off / on. Hereinafter, an example in which a large current flows due to the interlock switch being turned off / on will be described.

(Large current in the conventional KHz band)
In the conventional engine controller 111 shown in FIG. 9, the interlock switch SW1 is turned on from the off state. Then, electric charge is rapidly charged from the electrolytic capacitor C2 of the power supply unit 10 to the electrolytic capacitor C3 of the motor unit 12 via the engine controller 111. This charge current returns from the PGND 3 of the motor unit 12 to the electrolytic capacitor C 2 of the power supply unit 10 through the parasitic inductances L 47, L 46, L 44, L 43, L 42, L 41. The parasitic inductances L41 to L47 have impedances of about several mΩ to several tens of mΩ in the KHz band, depending on the pattern wiring length, pattern width, wire diameter, and wire length. Accordingly, when 100 A of rush current (about 100 μs) due to turning on of the interlock switch SW1 flows, a potential of about 1 V to several V is generated in PGND2 of the engine controller 111.

  On the other hand, since this PGND2 is pattern-connected to SGND2 in a single-point ground configuration or the like, it is connected to the GND potential of the + 3.3V system circuit with an impedance of about several mΩ to several tens mΩ. In other words, the rush current due to the turn-on of the interlock switch SW1 flows to the electrolytic capacitor C2 of the power supply unit 10 through the one-point ground portion and also through the path through the parasitic inductances L23, L22, L21, L20, and L40. . Therefore, the GND potential of the + 3.3V system GND2 is also raised by the rush current of the interlock switch SW1.

  At this time, since the power supply voltage unit of the + 3.3V system holds the + 3.3V potential, the potential difference between the + 3.3V power supply and SGND2 decreases, and as a result, the signal control of the + 3.3V system circuit unit In this case, a circuit malfunction or the like is caused. For example, a reset circuit that monitors the potential difference between the + 3.3V power supply voltage and GND malfunctions, or the A / D input potential of the CPU 20a cannot detect a correct value. In order to prevent this malfunction, conventionally, measures such as mounting a large-capacity electrolytic capacitor between the +3.3 V power supply and SGND 2 have been taken. However, there are problems such as an increase in board mounting space and cost.

(Large current in the KHz band in this embodiment)
In the engine controller 11 of the present embodiment shown in FIG. 1, the interlock switch SW1 is turned on from the off state. Then, electric charge is rapidly charged from the electrolytic capacitor C2 of the power supply unit 10 to the electrolytic capacitor C3 of the motor unit 12 via the engine controller 11. This charge current returns from PGND3 of the motor unit 12 to the electrolytic capacitor C2 of the power supply unit via the parasitic inductances L47, L46, L45, L42, and L41. The parasitic inductances L41, L42, L45, L46, and L47 have impedances of about several mΩ to several tens of mΩ in the KHz band, depending on the pattern wiring length, pattern width, wire diameter, and wire length. Accordingly, when 100 A of rush current (about 100 μs) due to turning on of the interlock switch SW1 flows, a potential of about 1 V to several V is generated in PGND2 of the engine controller 11.

  On the other hand, the PGND2 and the + 3.3V SGND2 are not connected by the wiring pattern of the printed wiring board, but are connected via the capacitor C10 and the resistor R10. The impedance of the capacitor C10 is about 0.01 to 0.5Ω in the several MHz to 100 MHz band, but is about 10Ω or more in the KHz band. For example, a chip-type ceramic capacitor 1000 pF to 0.1 μF is selected. In addition, a resistor having a resistance R10 of about several Ω or more is selected. That is, in the KHz band, the impedance of the current path that returns to the electrolytic capacitor C2 via the SGND2 is higher than the impedance of the current path that returns directly from the PGND2 to the electrolytic capacitor C2. Therefore, the ratio of the rush current of the interlock switch SW1 flowing back to the electrolytic capacitor C2 through the path through the GND 2 of the engine controller 11, that is, the path of the parasitic inductances L26, L25, L22, L21, L20, and L40. Is suppressed low.

  As a result, even when the potential of PGND2 rises due to a rush current flowing in the + 24V system, it is possible to stably hold the potential of the + 3.3V system SGND2. In other words, an engine controller 11 that does not malfunction even with a rush current generated in a + 24V system can be configured at low cost without mounting a large-capacity electrolytic capacitor between the + 3.3V power supply and SGND 2 as in the past. It becomes possible.

  In FIG. 3B, the path of this rush current is indicated by a bold line. The impedance of the feedback path of the rush current through the parasitic inductances L47 to L45, L42, and L41 is compared with the impedance of the feedback path through the resistor R10 and the capacitor C10 and the parasitic inductances L26, L25, L22 to L20, and L40. . The constants of the resistor R10 and the capacitor C10 are set so that the impedance of the feedback path through the resistor R10 and the capacitor C10 and the parasitic inductances L26, L25, L22 to L20, and L40 is higher in the frequency band of the rush current. Is done. For example, in the case of the conventional example in which a potential of about 1 V to several V is generated in the PGND 2 of the engine controller 11, the resistor R 10 and the capacitor are controlled so that the potential rise of the SGND 2 is suppressed to about 0.3 V or less. A constant of C10 is determined. Specifically, since the parasitic inductances L47 to L45, L42, and L41 are about several mΩ to several tens of mΩ, respectively, a resistor of about several Ω or more, for example, 2.2Ω, 0.3V or less Can be suppressed.

<Example of preventing GND from floating in Embodiment 1>
Further, SGND2 and PGND2 are connected by a DC resistance of about several Ω. Therefore, even when one of the GNDs is disconnected from the GND of the apparatus due to an inspection process, a manufacturing trouble, a disconnection, or the like, the GND can be prevented from floating. As a result, electrical stress is applied to the + 3.3V system and + 24V system interface sections, and the like can be avoided.

  For example, it is assumed that the wire 36 that connects the PGND 2 of the engine controller 11 and the PGND 1 of the power supply unit 10 is disconnected, or that a connector contact failure occurs. In this case, the + 24V type PGND2 may be in an open connection state with the PGND1 of the power supply unit 10. Since PGND2 in such a state is in an open connection state with PGND1 of power supply unit 10 serving as the reference potential of the apparatus, the potential is indefinite. That is, the potential of PGND2 may be + 24V. When PGND2 becomes a potential of + 24V, the pattern wiring portion having a potential of 0V becomes + 24V in the normal state. Therefore, it is excessive in various places on the circuit to which only a voltage of + 3.3V or less is applied in the normal state. There is a risk of voltage being applied.

  However, in the present embodiment, the + 3.3V system SGND2 and the + 24V system PGND2 are connected by a resistor, for example, a 2.2Ω resistor. Therefore, even when a current of 1.5 A flows through the resistor, the potential drop that occurs across the resistor is 3.3 V, so the potential of PGND2 is +3.3 V or less. That is, electrical stress is applied to the + 3.3V system and + 24V system interface sections, and the like can be avoided.

<Modification of Embodiment 1>
In the above description, the configuration using the resistor R10 has been described.

  However, it is possible to use an inductance element that has sufficiently higher impedance than the parasitic inductances L47 to L45, L42, and L41 in the KHz band and that causes a potential difference generated when a rush current flows through the DC resistance to be equal to or less than each power supply voltage. . Even in this case, it is needless to say that the same effect as the above embodiment can be obtained.

  In this case, the impedance value of the inductance element is selected under the same conditions as the resistance value of the resistor. That is, the voltage drop generated in the inductance element is selected to be equal to or higher than the first impedance value that prevents malfunction of the circuit mounted on the printed wiring board. At the same time, either the first-system GND wiring or the second-system GND wiring may be disconnected from the GND wiring of the power supply device. In this case, a potential difference generated at both ends of the inductance element when a current flows through the inductance element is equal to or lower than a second impedance value that is equal to or lower than a lower voltage between the power supply voltage of the first system and the power supply voltage of the second system. Is selected.

  Furthermore, since the resistance value of the direct current component of the inductance element is very small, even when either GND of PGND2 or SGND2 is in a floating state, the potential drop caused by the current flowing through the inductance element is Smaller than the case. Therefore, it is possible to further reduce the degree of influence of applying electrical stress to the + 3.3V system and + 24V system interface sections.

  It is also possible to provide a detection circuit for detecting the potential difference between SGND2 and PGND2, in this embodiment, the potential difference between both ends of the resistor R10. In this case, it is possible to detect when the wire rods 35 and 36 that connect the PGND 2 of the engine controller 11 and the PGND 1 of the power supply unit 10 are disconnected or that a connector contact failure has occurred. If this detection circuit is provided on the inspection component side outside the apparatus, it is possible to avoid an increase in the cost of the product apparatus.

<Effect of Embodiment 1>
As described above, in the present embodiment, both GNDs are used in an engine controller board in which a + 3.3V signal control system circuit operating in a high frequency band of MHz or higher and a + 24V power system circuit in which a current of several A or more flows are mixed. Are constituted by mutually independent wiring patterns. Between the GND of the + 3.3V system circuit and the GND of the + 24V system circuit, a capacitor having an impedance of several Ω or less in a high frequency band of several MHz or more, and a resistance of several Ω connected in parallel to the capacitor Is connected.

  As a result, it is possible to suppress the potential fluctuation of the GND generated in the + 24V system circuit from being propagated to the + 3.3V system circuit via the pattern on the engine controller board with an inexpensive configuration. Further, in the interface unit connected to each other by the + 3.3V system circuit and the + 24V system circuit, it is possible to simultaneously transmit and receive high-speed signals without deteriorating the waveform quality. Furthermore, even if either GND is in an open connection state due to an inspection process of the engine controller board, manufacturing trouble, disconnection, etc., it is possible to simultaneously prevent the application of electrical stress at the interface section. It becomes.

[Embodiment 2]
The printed wiring board according to the second embodiment is a printed wiring board in which a signal control system circuit unit on which an ASIC, a CPU, and the like are mounted and a power system circuit in which a current of about several A or more such as a motor flows are mixed. Then, the GND wiring pattern for the signal control circuit section and the GND pattern for the power system circuit section are configured independently of each other in the wiring pattern or wiring plane in the printed wiring board. In addition, each GND pattern is connected using a bypass capacitor and a diode connected in parallel.

<Example of Circuit Configuration of Device Including Second Embodiment of Printed Wiring Board>
FIG. 4 partially shows a unit configuration and a GND connection configuration of a laser beam printer as an example of a circuit configuration of an apparatus including a printed wiring board according to the second embodiment.

  The apparatus of FIG. 4 includes a power supply unit 10 that generates a power supply voltage for operating the apparatus from a power supply inlet, an engine controller 16 that serves as a control center of the printer engine, and a motor unit 12.

  In the engine controller 16 of the second embodiment, diodes D10 and D11 connected in parallel in both directions are connected instead of the resistor R10 of the engine controller 11 described in the first embodiment. Other configurations are the same as those of the engine controller 11 described in the first embodiment. Since the contents other than the configuration related to the diode are the same as those in the first embodiment, the description thereof is basically omitted.

(High-speed signal waveform quality and radiation noise in the second embodiment)
In the engine controller 16 of the present embodiment, as shown in FIG. 4, the + 3.3V signal control system SGND2 and the + 24V power system PGND2 are not connected by the pattern wiring. SGND2 and PGND2 are connected using diodes D10 and D11 and a capacitor C10.

  The control signal output from the circuit 20 is input to the motor control drive circuit 23, and the feedback current returns through a path via the PGND3. The path of this feedback current is the same as the thick line shown in FIG. 3A. The feedback current flows from PGND 3 to the capacitor C 10 via the parasitic inductance L 47 of the wire 32 and the parasitic inductance L 46 of the engine controller 16. The capacitor C10 is selected to have a low impedance (about 0.01 to 0.5Ω) in a frequency band of about several MHz to 100 MHz. Therefore, the high-frequency component of the feedback current returns to the circuit 20 by the high-frequency current flowing to SGND2 via the capacitor C10 and the parasitic inductance L26.

  That is, in the engine controller 16 of the present embodiment, the + 3.3V signal control system SGND2 and the + 24V power system PGND2 are connected by the capacitor C10 so that the feedback current of the high frequency component flows through the pattern wiring of a shorter path. . For this reason, the noise voltage generated in the path through which the feedback current flows is suppressed to be small, and the waveform quality of the high-speed signal can be satisfactorily maintained. As a result, it is possible to suppress high-frequency noise radiated from the high-speed signal line in the differential mode.

(Large current in the KHz band in the second embodiment)
Next, a case will be described in which a large current in the KHz band flows during motor start-up current or when the interlock switch SW1 is turned off / on. Hereinafter, an example in which a large current flows due to turning OFF / ON of the interlock switch SW1 will be described.

  In the engine controller 16 of the present embodiment, the interlock switch SW1 is turned on from the off state. Then, electric charge is rapidly charged from the electrolytic capacitor C2 of the power supply unit 10 to the electrolytic capacitor C3 of the motor unit 12 via the engine controller 16. This charge current returns from the PGND 3 of the motor unit 12 to the electrolytic capacitor C 2 of the power supply unit via the parasitic inductances L 47 to L 45, L 42 and L 41. The parasitic inductances L41, L42, and L45 to L47 have impedances of about several mΩ to several tens of mΩ in the KHz band, depending on the pattern wiring length, pattern width, wire diameter, and wire length. Therefore, when a rush current (about 100 μs) due to turning on of the interlock switch SW1 flows, the potential of the rush current × (DC resistance component of L41, L42, L45 to L47 + parasitic inductance) is PGND2 of the engine controller 16. Occurs.

  On the other hand, the PGND2 and the + 3.3V SGND2 are not connected by the wiring pattern of the printed wiring board, but are connected via the capacitor C10 and the diodes D10 and D11. Although the impedance of the capacitor C10 is about 0.01 to 0.5Ω in the several MHz to 100MHz band, the capacitor C10 is selected to have an impedance of about 10Ω or more in the KHz band. For example, a chip-type ceramic capacitor 1000 pF to 0.1 μF is selected.

(When the potential difference between the cathode terminal and anode terminal is less than Vf)
At this time, if the potential difference between the cathode terminal and the anode terminal does not become Vf or more, the diodes D10 and D11 are in a disconnected state. Therefore, the impedance of the current path from the electrolytic capacitor C3 of the motor unit 12 to the electrolytic capacitor C2 of the power supply unit 10 via SGND2 of the engine controller 16 becomes very high, and almost no current flows. That is, the rush current generates a potential of rush current × (DC resistance component of L41, L42, L45 to L47 + parasitic inductance) in PGND2 of the engine controller 16. However, when the potential difference between SGND2 and PGND2 is equal to or less than the Vf voltage of the diode D10 or D11, almost no current flows in the KHz band, and noise interference can be greatly suppressed. As a result, even when the potential of PGND2 rises due to the rush current flowing through the + 24V system, the potential of the + 3.3V system SGND2 can be stably maintained.

<Modification of Embodiment 2 (When Potential Difference between Cathode Terminal and Anode Terminal is Vf or More)>
Next, an example will be described in which the rush current flowing through PGND2 is very large, so that the potential rise of PGND2 with respect to SGND2 becomes equal to or higher than the Vf voltage of diode D10.

  Since the rush current that has flowed into PGND2 also flows into SGND2 via the diode, the potential of SGND2 also rises. When the potential rise of PGND2 with respect to SGND2 is assumed to exceed the Vf voltage of diode D10, a resistor of several Ω or more may be inserted in series with the diode, or a Zener diode may be used. Thereby, it becomes possible to suppress the potential rise of SGND2 as necessary.

  5A to 5C are diagrams showing circuit examples for changing a portion connected between SGND2 and PGND2 in FIG. 5A shows an example in which a resistor is added in series with a bidirectional diode, FIG. 5B shows an example in which a Zener diode is configured, and FIG. 5C shows an example in which a resistor is added in series with a Zener diode.

  First, an example in which a resistor is inserted in series in addition to the bidirectional diode shown in FIG. 5A will be described.

  Even when the potential rise of PGND2 with respect to SGND2 exceeds the Vf voltage of the diode D10, the resistor R11 is connected in series with the diode D10. Therefore, the impedance of the current path from the electrolytic capacitor C3 of the motor unit 12 to the electrolytic capacitor C2 of the power supply unit 10 via SGND2 of the engine controller 16 becomes higher.

  Therefore, the ratio of the rush current of the interlock switch SW1 that flows back to the electrolytic capacitor C2 through the path through the GND2 of the engine controller 16, that is, the paths of the parasitic inductances L26, L25, L22 to L20, and L40, is low. It is suppressed.

  As a result, the potential of PGND2 greatly increases due to the rush current flowing through the + 24V system, and the potential of the + 3.3V system SGND2 can be stably maintained even when the current that has been conducted through the diode D10 flows. It becomes.

  Next, an example in which the Zener diode shown in FIG. 5B is configured will be described.

  In the configuration of FIG. 5B, a Zener diode ZD10 is configured instead of the diode D10. Therefore, by selecting a desired Zener voltage, it is possible to freely set the threshold of the rush current at which the Zener diode ZD10 conducts when the potential of PGND2 rises with respect to SGND2. That is, even if the potential rise of PGND2 that occurs due to the flow of the rush current occurs, it is possible to suppress the flow of the rush current into SGND2 by selecting a Zener voltage product in which the Zener diode ZD10 does not conduct.

  Furthermore, the impedance of the current path from the electrolytic capacitor C3 of the motor unit 12 to the electrolytic capacitor C2 of the power supply unit 10 via SGND2 of the engine controller 15 is very high. Therefore, almost no current flows in the KHz band, and noise interference can be greatly suppressed.

  Next, an example in which a resistor is inserted in series in addition to the Zener diode shown in FIG. 5C will be described.

  Even when the potential rise of PGND2 with respect to SGND2 exceeds the Zener voltage of Zener diode ZD10, resistor R11 is connected in series with Zener diode ZD10. Therefore, the impedance of the current path returning from the electrolytic capacitor C3 of the motor unit 12 to the electrolytic capacitor C2 of the power supply unit 10 via SGND2 of the engine controller 15 becomes higher. Accordingly, the ratio of the rush current of the interlock switch SW1 that flows back to the electrolytic capacitor C2 through the path through the GND 2 of the engine controller 15, that is, the path of the parasitic inductances L26, L25, L22 to L20, and L40, is low. It is suppressed.

  As a result, the potential of PGND2 rises greatly due to the rush current flowing in the + 24V system, and the potential of the + 3.3V system SGND2 can be stably maintained even when the current that flows through the Zener diode ZD10 flows. It becomes possible. Further, by adding the resistor R11 to the Zener diode configuration, the Zener voltage value can be freely selected, and the function of suppressing the potential rise of the SGND2 when the potential rise exceeds the Zener voltage value. Have both. For this reason, the degree of freedom in design can be increased and it can be applied in various conditions.

  As described above, the second embodiment is configured to connect SGND2 and PGND2 illustrated in FIGS. 4 and 5A to 5C. As a result, even when the potential of PGND2 rises due to the rush current flowing through the + 24V system, the potential of the + 3.3V system SGND2 can be stably maintained. In other words, an engine controller that does not malfunction due to a rush current generated in the + 24V system can be configured at low cost without mounting a conventional large-capacity electrolytic capacitor.

(Grounding prevention of GND in Embodiment 2)
In the engine controller 16 of the second embodiment, a diode is connected so that a current flows bidirectionally between the + 3.3V system SGND2 and the + 24V system PGND2. Therefore, even if either GND is disconnected from the power supply unit 10 that is the GND of the device due to an inspection process, manufacturing trouble, disconnection, or the like, it is grounded via this diode. It is possible to prevent GND from floating.

  For example, a case is assumed where the wire rod 36 connecting the PGND2 of the engine controller 15 and the PGND1 of the power supply unit 10 is disconnected or a connector contact failure occurs. As a result, the + 24V PGND2 may be in an open connection state with the PGND1 of the power supply unit 10. Since PGND2 in such a state is in an open connection state with PGND1 of power supply unit 10 serving as the reference potential of the apparatus, the potential is indefinite. That is, the potential of PGND2 may be + 24V. When PGND2 becomes a potential of + 24V, the pattern wiring portion that is a potential of 0V is + 24V in the normal state. Therefore, an excessive voltage may be applied to various places on the circuit to which only a voltage of +3.3 V or less is normally applied.

  However, in the present embodiment, the + 3.3V system SGND2 and the + 24V system PGND2 are connected by a diode. Therefore, even if a current of 10 A flows through the diode, the potential drop generated at both ends of the diode is about 0.6 V, so the potential rise of PGND2 is +0.6 V or less. That is, electrical stress is applied to the + 3.3V system and + 24V system interface sections, and the like can be avoided.

  Further, the voltage fluctuation amount of the diode Vf voltage due to the magnitude of the flowing current value is very small. Therefore, if the current flowing through the diode is within the rated range, the GND will float, and even if a current of 10 A flows through the diode, the potential difference between SGND2 and PGND2 can be suppressed below the Vf voltage. Become. The Vf voltage is generally about 0.6 to 0.7V.

  In other words, even when either GND of SGND2 or PGND2 is disconnected due to disconnection or the like, the potential difference between SGND2 and PGND2 is suppressed to less than Vf of the diode, hardly depending on the value of the flowing current. A single float can be prevented. Therefore, electrical stress is applied to the + 3.3V system and + 24V system interface sections, and the like can be avoided.

  In addition, even when the Zener diode ZD10 shown in FIG. 5B is used, the same effect can be obtained. Since the potential drop generated at both ends of the Zener diode becomes a Zener voltage, even when PGND2 is in an open state with PGND1 of the power supply unit 10, the potential rise of PGND2 is not more than the Zener voltage. By selecting and providing this Zener voltage according to the power supply voltage and the configuration circuit, it is possible to avoid an electrical stress from being applied to the 3.3V and + 24V interface units.

  If a circuit for detecting the potential difference between SGND2 and PGND2 is provided, it is detected that the wire connecting PGND2 of engine controller 15 and PGND1 of power supply unit 10 is disconnected or that a connector contact failure has occurred. It becomes possible. If this detection circuit is provided on the inspection component side outside the apparatus, it is possible to avoid an increase in the cost of the product apparatus.

<Effect of Embodiment 2>
As described above, according to the present embodiment, an engine controller board in which a + 3.3V signal control system circuit operating in a high frequency band of MHz or higher and a + 24V power system circuit in which a current of several A or more flows are mixed, Both GNDs are constituted by mutually independent wiring patterns. In addition, between the GND of the + 3.3V system circuit and the GND of the + 24V system circuit, a capacitor having an impedance of several Ω or less in a high frequency band of several MHz or more and a diode connected in parallel to the capacitor are connected.

  As a result, it is possible to suppress the potential fluctuation of the GND generated in the + 24V system circuit from being propagated to the + 3.3V system circuit via the pattern on the engine controller board with an inexpensive configuration. In addition, the interface unit connected to each other by the + 3.3V system circuit and the + 24V system circuit can simultaneously transmit and receive high-speed signals without damaging the waveform quality. In addition, even if either GND is in an open connection state due to an inspection process of the engine controller board, manufacturing trouble, disconnection, etc., it is possible to simultaneously prevent the application of electrical stress at the interface section. It becomes.

[Embodiment 3]
The printed wiring board according to the third embodiment is a printed wiring board in which a signal control system circuit unit on which an ASIC, a CPU, and the like are mounted and a power system circuit unit through which a current of about several A or more such as a motor flows are mixed. Then, the GND wiring pattern for the signal control circuit section and the GND pattern for the power system circuit section are configured independently of each other in the wiring pattern or wiring plane in the printed wiring board. In addition, each GND pattern is connected using a resistor, and a power supply and a GND between different systems of the signal control system circuit and the power system circuit or between the power supply and the power supply are connected by a bypass capacitor.

  In the following description, the contents other than the connection configuration of the capacitors that connect the systems are the same as those in the first embodiment, and thus the description thereof is omitted.

<Circuit Configuration Example of Device Containing Printed Wiring Board of Embodiment 3>
6, 7, and 8 partially illustrate a unit configuration and a GND connection configuration of a laser beam printer as an example of a circuit configuration of an apparatus including a printed wiring board. The same components and signals as those described in FIG. 1 are denoted by the same reference numerals and reference symbols, and description thereof is omitted.

(Waveform quality and radiation noise of high-speed signal in Embodiment 3)
(Example of + 24V system power supply and SGND2 connected by a capacitor)
The engine controller 17 shown in FIG. 6 is formed by connecting a + 24V power supply wiring pattern and a + 3.3V GND wiring pattern SGND2 using a capacitor C16.

  The control signal output from the circuit 20 of the engine controller 17 is input to the motor control drive circuit 23, and the feedback current returns through a path via the + 24V power supply and PGND3 (see the thick line in FIG. 6).

  First, the feedback current through the + 24V power supply will be described. The feedback current via the + 24V power source flows from the + 24V power source to the capacitor C16 via the parasitic inductance L37 of the wire and the parasitic inductance L34 of the engine controller 16. The capacitor C16 is selected to have a low impedance (about 0.01 to 0.5Ω) in a band of about several MHz to 100 MHz. Therefore, the high-frequency component of the feedback current flows as a high-frequency current to SGND2 via the capacitor C16 and the parasitic inductance L26, and returns to the circuit 20.

  Next, the feedback current via PGND3 will be described. The feedback current via PGND3 flows from PGND3 to parasitic capacitor L47 of wire 32, parasitic inductance L46 of engine controller 16, and capacitor C16. Capacitor C21 and capacitor C11 are selected to have a low impedance (about 0.01 to 0.5Ω) in a band of about several MHz to 100 MHz. Therefore, the high-frequency component of the feedback current flows as a high-frequency current to SGND2 via the capacitors C21 and C16 and the parasitic inductance L26, and returns to the circuit 20.

(Example of connecting PGND2 and + 3.3V power supply with a capacitor)
The engine controller 18 in FIG. 7 is configured such that a + 24V-type GND wiring pattern PGND2 and a + 3.3V-type power supply wiring pattern are connected using a capacitor C17.

  The control signal output from the circuit 20 of the engine controller 18 is input to the motor control drive circuit 23, and the feedback current returns along a path via the PGND 3 (see the thick line in FIG. 7).

  The feedback current via PGND3 flows from PGND3 to the capacitor C17 via the parasitic inductance L47 of the wire 32 and the parasitic inductance L46 of the engine controller 17. The capacitor C17 is selected to have a low impedance (about 0.01 to 0.5Ω) in a band of about several MHz to 100 MHz. Therefore, the high-frequency component of the feedback current flows as a high-frequency current to the + 3.3V power source via the capacitor C17, and returns to the circuit 20 via the capacitor C20 connected to the + 3.3V power source.

(Example of + 24V power supply and + 3.3V power supply connected by a capacitor)
The engine controller 19 shown in FIG. 8 is obtained by connecting a + 24V system power supply wiring pattern and a + 3.3V system power supply wiring pattern using a capacitor C18.

  The control signal output from the circuit 20 of the engine controller 19 is input to the motor control drive circuit 23, and the feedback current returns through a path via the + 24V power supply and PGND3 (see the thick line in FIG. 8).

  First, the feedback current through the + 24V power supply will be described. The feedback current via the + 24V power source flows from the + 24V power source to the capacitor C18 via the parasitic inductance L37 of the wire and the parasitic inductance L34 of the engine controller 16. The capacitor C18 is selected to have a low impedance (about 0.01 to 0.5Ω) in a band of about several MHz to 100 MHz. Therefore, the high-frequency component of the feedback current flows as a high-frequency current to the + 3.3V system power supply wiring via the capacitor C18 and the parasitic inductance L14, and returns to the circuit 20.

  Next, the feedback current via PGND3 will be described. The feedback current through PGND3 flows from PGND3 to the capacitor C18 via the parasitic inductance L47 of the wire 32, the parasitic inductance L46 of the engine controller 18, and the capacitor C21. Capacitor C21 and capacitor C18 are selected to have a low impedance (about 0.01 to 0.5Ω) in a band of about several MHz to 100 MHz. Therefore, the high-frequency component of the feedback current flows as a high-frequency current to the + 3.3V system power supply wiring via the capacitors C21 and C18 and the parasitic inductance L14, and the circuit is connected to the circuit via the capacitor C20 connected to the + 3.3V power supply. Return to 20.

  That is, all of the engine controllers 17 to 19 of the present embodiment are configured such that a high-frequency component feedback current flows through a pattern wiring of a shorter path. In other words, the power supply wiring of the + 3.3V signal control system and the SGND2 are connected to the power supply wiring of the + 24V power system and the PGND2 using a capacitor through at least one of the paths. For this reason, the noise voltage generated in the path through which the feedback current flows is suppressed to be small, and the waveform quality of the high-speed signal can be satisfactorily maintained. As a result, it is possible to suppress high-frequency noise radiated from the high-speed signal line in the differential mode.

(Large current in the KHz band in the third embodiment)
Further, in the configuration of the third embodiment, as in the first embodiment, the resistor R10 is connected between PGND2 and SGND2. Therefore, the ratio of the rush current generated in PGND3 of the motor unit 12 to the electrolytic capacitor C2 through the path through the engine controller SGND2, that is, the paths of the parasitic inductances L26, L25, L22 to L20, and L40, is low. It is suppressed. That is, the rush current returns to the electrolytic capacitor C2 through the path of the parasitic inductances L47 to L45, L42, and L41.

  As a result, even when the potential of PGND2 rises due to the rush current flowing through the + 24V system, the potential of the + 3.3V system SGND2 can be stably maintained. In other words, an engine controller that does not malfunction due to a rush current generated in the + 24V system can be configured at low cost without mounting a conventional large-capacity electrolytic capacitor.

(Grounding prevention of GND in Embodiment 3)
In the configuration of the third embodiment, as in the first embodiment, the + 3.3V system SGND2 and the + 24V system PGND2 are connected by a DC resistance of about several Ω. Therefore, even when one of the GNDs is disconnected from the GND of the apparatus due to an inspection process, a manufacturing trouble, a disconnection, or the like, the GND can be prevented from floating. Therefore, electrical stress is applied to the + 3.3V system and + 24V system interface sections, and the like can be avoided.

<Effect of Embodiment 3>
As described above, according to this embodiment, in an engine controller board in which a + 3.3V signal control system circuit operating in a high frequency band of MHz or higher and a + 24V power system circuit in which a current of several A or more flows are mixed, Both GNDs are composed of mutually independent wiring patterns. In addition, between the GND of the + 3.3V system circuit and the GND of the + 24V system circuit, there is a capacitor having an impedance of several Ω or less in a high frequency band of several MHz or more and a resistor of several Ω connected in parallel to the capacitor. Connected.

  As a result, it is possible to suppress the potential fluctuation of the GND generated in the + 24V system circuit from being propagated to the + 3.3V system circuit via the pattern on the engine controller board with an inexpensive configuration. In addition, the interface unit connected to each other by the + 3.3V system circuit and the + 24V system circuit can simultaneously transmit and receive high-speed signals without damaging the waveform quality. In addition, even if either GND is in an open connection state due to an inspection process of the engine controller board, manufacturing trouble, disconnection, etc., it is possible to simultaneously prevent the application of electrical stress at the interface section. It becomes.

  In the above embodiment, a laser beam printer has been described as an example of an apparatus having a printed wiring board. However, the present invention relates to any printed wiring board under the condition of a printed wiring board in which a signal control system circuit operating in a high frequency band of several MHz or more and a power system circuit in which a current of several A or more flows are mixed, and an apparatus having the same It is applicable to. These are also included in the scope of the present invention.

It is a circuit diagram which shows simply the example of a structure of the apparatus which has a printed wiring board according to Embodiment 1. It is a figure which shows typically the example of pattern wiring of the printed wiring board according to Embodiment 1. FIG. It is a figure which shows typically the example of expansion of the pattern wiring of the printed wiring board according to Embodiment 1. It is a figure which shows simply the return path | route of the high frequency current according to Embodiment 1. It is a figure which shows simply the return path | route of the large current according to Embodiment 1. FIG. It is a circuit diagram which shows simply the example of a structure of the apparatus which has a printed wiring board according to Embodiment 2. It is a figure which shows simply the modification of the connection between GND of the printed wiring board according to Embodiment 2. FIG. It is a figure which shows simply the other modification of the connection between GND of the printed wiring board according to Embodiment 2. FIG. It is a figure which shows simply the further another modification of the connection between GND of the printed wiring board according to Embodiment 2. FIG. It is a figure which shows simply the example of a connection of the capacitor | condenser in the printed wiring board according to Embodiment 3. It is a figure which shows simply the other connection example of the capacitor | condenser in the printed wiring board according to Embodiment 3. It is a figure which shows simply the further example of a connection of the capacitor | condenser in the printed wiring board according to Embodiment 3. FIG. It is a circuit diagram which shows simply the structural example of the apparatus which has the conventional printed wiring board. It is a figure which shows typically the example of pattern wiring of the conventional printed wiring board.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Power supply unit 11 Engine controller 12 Motor unit 16 Engine controller 17 Engine controller 18 Engine controller 19 Engine controller 20 Signal control system circuit 21 Power system circuit 22 Motor 23 Motor control drive circuit 31 Wire rod 32 Wire rod 35 Wire rod 36 Wire rod 111 Engine controller

Claims (17)

The at least two systems of DC power are supplied from a power supply device that supplies at least two systems of DC power including the first system and the second system, and an operating current flows to mechanically operate or mechanical operation A printed wiring board configured to supply a control signal generated by the first system DC power supply and an operation current generated by the second system DC power supply to an operating device having means for operating current flow. And
A pair of the first system power wiring and the first system GND wiring, a pair of the second system power wiring and the second system GND wiring,
Wherein the first line of the GND wiring and the second system of GND lines, the printed circuit is constituted in a in an independent wiring patterns or wiring plane board, the second system and GND wiring of the first system Between the GND wiring and the GND wiring, a low frequency noise current of kHz or less is blocked and a potential difference between both ends is limited to a predetermined value or less, and at least one capacitive element connected in parallel to the limiting element. A printed wiring board characterized by being connected. Wherein the at least one capacitive element, according to claim 1, characterized in that a plurality of capacitive elements connected in series between the GND wiring of the second system and GND wiring of the first system Printed wiring board.   The limiting element is arranged in the vicinity of the position of the printed wiring board where the GND wiring of the first system and the GND wiring of the second system are connected to the corresponding GND wiring of the power supply device. The printed wiring board according to claim 1 or 2. The limiting element is a resistor;
The resistance value of the resistor is equal to or higher than a first resistance value for preventing a voltage drop generated in the resistor from malfunctioning a circuit mounted on the printed wiring board, and the GND wiring of the first system or the second resistance In a state where any one of the GND wirings of the system is disconnected from the GND wiring of the power supply device, a potential difference generated at both ends of the resistor due to a current flowing through the resistor becomes a power supply voltage of the first system. printed circuit board according to any one of claims 1 to 3, characterized in that it is selected in the lower second resistance value following range of a voltage below the supply voltage of the second system. The limiting element is an inductance element;
The impedance value of the inductance element is equal to or greater than a first impedance value for preventing a voltage drop generated in the inductance element from malfunctioning a circuit mounted on the printed wiring board, and the GND wiring of the first system or the second In a state where any one of the GND wirings of the system is not connected to the GND wiring of the power supply device, a potential difference generated at both ends of the inductance element due to a current flowing through the inductance element becomes a power supply voltage of the first system. printed circuit board according to any one of claims 1 to 3, characterized in that it is selected in the lower second impedance value the range as a voltage below the supply voltage of the second system. The limiting element is a diode connected in parallel in both directions, and is connected so that a current flows between the GND wiring of the first system and the GND wiring of the second system from any direction. The printed wiring board according to any one of claims 1 to 3 . The limiting element is a Zener diode connected in a direction in which a current flows from the GND wiring of the second system to the GND wiring of the first system,
The Zener diode is configured such that a current flows through the Zener diode in a state where one of the GND wiring of the first system or the GND wiring of the second system is disconnected from the GND wiring of the power supply device. The potential difference generated between both ends of the Zener diode is selected so as to be in a range equal to or lower than the lower one of the power supply voltage of the first system and the power supply voltage of the second system. 4. The printed wiring board according to any one of items 1 to 3 . Printed circuit board according to claim 6 or 7, characterized in that it comprises the limiting element connected in series with the resistor between the GND wiring or GND wiring of the second system of the first system. A power supply for supplying at least two systems of DC power including the first system and the second system, in which the power supply wiring is independent or branched into at least two systems by a wiring pattern or wiring plane, and the GND wiring is connected by the wiring pattern or wiring plane. A supply unit, a printed wiring board to which the at least two systems of DC power are supplied, a wire connecting the power supply device and the printed wiring board, and a means or a machine that is mechanically operated with an operating current flowing An apparatus having an actuating part having a means for causing an operating current to flow by a typical operation,
The printed wiring board is
A pair of the first system power wiring and the first system GND wiring, a pair of the second system power wiring and the second system GND wiring,
Wherein the first line of the GND wiring and the second system of GND lines, the printed circuit is constituted in a in an independent wiring patterns or wiring plane board, the second system and GND wiring of the first system Between the GND wiring and the GND wiring, a low frequency noise current of kHz or less is blocked and a potential difference between both ends is limited to a predetermined value or less, and at least one capacitive element connected in parallel to the limiting element. A device characterized by being connected. Wherein the at least one capacitive element, according to claim 9, characterized in that it consists of a plurality of capacitive elements connected in series between the GND line and GND wiring of the first system and the second system Equipment. The limiting element is arranged in the vicinity of the position of the printed wiring board where the GND wiring of the first system and the GND wiring of the second system are connected to the corresponding GND wiring of the power supply unit. The apparatus according to claim 9 or 10 . The limiting element is any one of a resistor, an inductance element, a diode connected in parallel in both directions, and a Zener diode connected in a direction in which a current flows from the second GND wiring to the first GND wiring. apparatus according to any one of claims 9 to 11, characterized in that. The first system power wiring and the first system GND wiring are connected as a power supply to a signal control system circuit that generates and transmits a control signal, and the second system power wiring and the second system GND wiring. apparatus according to any one of claims 9 to 12, characterized in that it is connected as a power supply to the high-current circuit which is a power system circuit. The signal control system circuit, a signal circuit with a MHz band or of the fundamental wave component, A / D converter circuit, D / A converter circuit, a microcontroller, to claim 13, characterized in that it comprises any of the ASIC The device described. The large-current circuit is a circuit with a fundamental wave component of the KHz band, motor, actuator, capacitive elements downstream of the switch for opening and closing operation, characterized in that it comprises a constitute circuit according to claim 13 or 14. The apparatus according to 14 . The printed wiring board is an apparatus in which at least two of the operating parts are connected to each other by a wire,
Capacitive elements for connecting the first-system GND wiring and the second-system GND wiring are respectively provided in the vicinity of connection points of the respective wire materials of the printed wiring board to which the respective wire materials are connected. The apparatus according to any one of claims 9 to 15 . Apparatus according to any one of claims 9 to 16, wherein the apparatus is an image forming apparatus including a laser beam printer.

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