JP5039913B2 - ロッキング・キャッシュを用いる直接的保存 - Google Patents

ロッキング・キャッシュを用いる直接的保存 Download PDF

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Publication number
JP5039913B2
JP5039913B2 JP2005313388A JP2005313388A JP5039913B2 JP 5039913 B2 JP5039913 B2 JP 5039913B2 JP 2005313388 A JP2005313388 A JP 2005313388A JP 2005313388 A JP2005313388 A JP 2005313388A JP 5039913 B2 JP5039913 B2 JP 5039913B2
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Japan
Prior art keywords
cache
data
processor
locking
subsystem
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JP2005313388A
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English (en)
Japanese (ja)
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JP2006134324A (ja
JP2006134324A5 (https=
Inventor
マイケル・ノーマン・デイ
チャールズ・ジョンズ
トゥオン・トゥルオン
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International Business Machines Corp
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International Business Machines Corp
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
    • G06F12/0846—Cache with multiple tag or data arrays being simultaneously accessible
    • G06F12/0848—Partitioned cache, e.g. separate instruction and operand caches
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
JP2005313388A 2004-10-28 2005-10-27 ロッキング・キャッシュを用いる直接的保存 Expired - Fee Related JP5039913B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/976,263 US7290107B2 (en) 2004-10-28 2004-10-28 Direct deposit using locking cache
US10/976,263 2004-10-28

Publications (3)

Publication Number Publication Date
JP2006134324A JP2006134324A (ja) 2006-05-25
JP2006134324A5 JP2006134324A5 (https=) 2008-09-25
JP5039913B2 true JP5039913B2 (ja) 2012-10-03

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JP2005313388A Expired - Fee Related JP5039913B2 (ja) 2004-10-28 2005-10-27 ロッキング・キャッシュを用いる直接的保存

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US (2) US7290107B2 (https=)
JP (1) JP5039913B2 (https=)
CN (1) CN100440174C (https=)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7290106B2 (en) * 2004-10-28 2007-10-30 International Business Machines Corporation Method for processor to use locking cache as part of system memory
US7290107B2 (en) * 2004-10-28 2007-10-30 International Business Machines Corporation Direct deposit using locking cache
US7533238B2 (en) * 2005-08-19 2009-05-12 International Business Machines Corporation Method for limiting the size of a local storage of a processor
US7596661B2 (en) * 2005-09-01 2009-09-29 Mediatek Inc. Processing modules with multilevel cache architecture
JP2008226141A (ja) * 2007-03-15 2008-09-25 Toshiba Corp プログラムおよび情報処理装置
US8117412B2 (en) * 2008-03-12 2012-02-14 GM Global Technology Operations LLC Securing safety-critical variables
CN102567220A (zh) * 2010-12-10 2012-07-11 中兴通讯股份有限公司 Cache存取的控制方法及装置
CN103019954A (zh) * 2011-09-22 2013-04-03 瑞昱半导体股份有限公司 高速缓存装置与高速缓存数据存取方法
CN104281443B (zh) * 2013-07-12 2020-06-26 锐迪科（重庆）微电子科技有限公司 利用tcm实现代码、数据替换的方法
CN103473184B (zh) * 2013-08-01 2016-08-10 记忆科技(深圳)有限公司 文件系统的缓存方法及系统
US20170083461A1 (en) * 2015-09-22 2017-03-23 Qualcomm Incorporated Integrated circuit with low latency and high density routing between a memory controller digital core and i/os
US20200218659A1 (en) * 2019-01-09 2020-07-09 Alibaba Group Holding Limited Systems and methods for secure locking of a cache region
CN113934654B (zh) * 2021-09-26 2026-04-10 新华三信息安全技术有限公司 数据缓存加载方法及装置

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5732242A (en) * 1995-03-24 1998-03-24 Silicon Graphics, Inc. Consistently specifying way destinations through prefetching hints
US5737565A (en) * 1995-08-24 1998-04-07 International Business Machines Corporation System and method for diallocating stream from a stream buffer
US6490654B2 (en) * 1998-07-31 2002-12-03 Hewlett-Packard Company Method and apparatus for replacing cache lines in a cache memory
JP3495266B2 (ja) 1998-11-13 2004-02-09 Ｎｅｃエレクトロニクス株式会社 キャッシュロック装置及びキャッシュロック方法
US6282637B1 (en) * 1998-12-02 2001-08-28 Sun Microsystems, Inc. Partially executing a pending atomic instruction to unlock resources when cancellation of the instruction occurs
US6859862B1 (en) * 2000-04-07 2005-02-22 Nintendo Co., Ltd. Method and apparatus for software management of on-chip cache
EP1182567B1 (en) * 2000-08-21 2012-03-07 Texas Instruments France Software controlled cache configuration
GB2368150B (en) * 2000-10-17 2005-03-30 Advanced Risc Mach Ltd Management of caches in a data processing apparatus
JP4822598B2 (ja) * 2001-03-21 2011-11-24 ルネサスエレクトロニクス株式会社 キャッシュメモリ装置およびそれを含むデータ処理装置
US20030014596A1 (en) * 2001-07-10 2003-01-16 Naohiko Irie Streaming data cache for multimedia processor
US7155572B2 (en) * 2003-01-27 2006-12-26 Advanced Micro Devices, Inc. Method and apparatus for injecting write data into a cache
US7120651B2 (en) * 2003-08-01 2006-10-10 Oracle International Corporation Maintaining a shared cache that has partitions allocated among multiple nodes and a data-to-partition mapping
US20060065992A1 (en) * 2004-04-16 2006-03-30 Hutchinson Gerald A Mono and multi-layer articles and compression methods of making the same
US7290106B2 (en) * 2004-10-28 2007-10-30 International Business Machines Corporation Method for processor to use locking cache as part of system memory
US7290107B2 (en) 2004-10-28 2007-10-30 International Business Machines Corporation Direct deposit using locking cache

Also Published As

Publication number Publication date
CN100440174C (zh) 2008-12-03
JP2006134324A (ja) 2006-05-25
US20060095669A1 (en) 2006-05-04
US7290107B2 (en) 2007-10-30
HK1090451A1 (en) 2006-12-22
CN1766853A (zh) 2006-05-03
US7590802B2 (en) 2009-09-15
US20080040549A1 (en) 2008-02-14

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