JP5031455B2 - Element substrate for recording head, recording head, and recording apparatus using the recording head - Google Patents

Description

  The present invention relates to a recording head that receives data and performs recording with a recording element, and an element substrate for a recording head used in the recording head. Particularly, the present invention relates to an ink jet recording head in which an electrothermal conversion element that generates thermal energy necessary for ejecting ink and a driving circuit for driving the same are formed on the same element substrate, and a recording apparatus using the recording head. It is.

  In general, an electrothermal conversion element (heater) as a discharge energy generating element of a recording head mounted in an ink jet recording apparatus and a driving circuit thereof are formed by using a semiconductor process technique as disclosed in Patent Document 1, for example. It is formed on the same substrate.

  In recent inkjet recording apparatuses, there is a tendency to provide multi-color and multi-row nozzles in the head for the purpose of improving the recording quality and recording speed.

  As an example of this, a configuration in which an element substrate for discharging black ink for the purpose of recording text and the like and an element substrate for discharging color ink for the purpose of recording photographs and charts are mounted on one recording device, etc. Is popular.

  As another example, recording apparatuses that realize multi-color recording such as six colors or eight colors for the purpose of expanding the color space of recorded images and improving gradation are widely used.

As a feature of these recent printing apparatuses, it is possible to improve performance such as printing quality and printing speed by mounting a printing head having a plurality of nozzle arrays.
JP-A-5-185594

  FIG. 1 is a diagram schematically showing the layout of circuit blocks and ink supply ports of a semiconductor substrate (element substrate) 100 for this type of ink jet recording head. The semiconductor substrate in FIG. 1 shows a row in which six ink supply ports 101 for supplying ink are formed.

  Ink is supplied from these ink supply ports to the respective ejection port arrays, and an increase in recording speed, an increase in color space due to multicoloring, an improvement in gradation, and the like are achieved.

  Here, for the sake of convenience, the configuration in the circuit block 105 including the heater array and the drive circuit for driving the heater is illustrated for only one on the left side of the ink supply port 101. The configuration in the circuit block corresponding to the other five ink supply ports is omitted. In the drive circuit block 105, a heater row 102 in which a plurality of heaters are arranged in a row is provided along the ink supply port at a position facing the ink supply port 101. A drive circuit 103 for selectively driving individual heaters in the heater array is arranged corresponding to the heater array. The heater row 102 and the drive circuit 103 constitute a set of column circuits 106. Pads 104 for applying power and signals to these heaters and circuit blocks are arranged at the end of the semiconductor substrate.

  FIG. 2 schematically shows the circuit configuration and signal flow of the drive circuit 103 in FIG.

  A block selection that constitutes a drive circuit via the input circuit 202 is a signal including time-division data, image data, and the like, which is data for driving the heaters divided in time via the pad 104 as an input terminal. It is supplied to the circuit 204 and the time division selection circuit 205. In the example shown here, the input data is in a serial data format, and the data in the serial data format is parallel-converted by a shift register in a block selection circuit or a time division selection circuit. The parallel-converted image data is supplied via a signal line to a plurality of heater driving blocks 206 arranged via a latch.

  This block selection circuit has a function of selecting whether or not the heater drive blocks 1 to 8 (206) can be driven (valid / invalid) based on the image data. Here, eight heater drive blocks are arranged. A part of the data is supplied to a shift register in the time division selection circuit arranged adjacently. The decoder in the time division drive circuit has a function of receiving a signal from the shift register and outputting a time division selection signal for sequentially switching heaters that can be driven in the heater drive block in time.

  The block selection circuit 204 and the time division selection circuit 205 constitute a selection signal output circuit 203, and a heater to be driven is selected by each output signal. The heater drive blocks 1 to 8 constitute a heater drive block array 206.

  FIG. 3 shows a circuit diagram in the heater drive block and the heater array 306.

  The heater drive block 206 includes a heater drive MOS transistor 305, a level conversion circuit 304, and a heater selection circuit (AND gate) 307 that are arranged corresponding to the heater. Here, the heater driving MOS transistor 305 functions as a switch for switching whether or not current is supplied to the heater (switching transistor). The block selection signal 302 and the time division signal 303 are input to an AND gate 307 as a heater selection circuit, and when these two signals are both active, the output of the AND gate becomes active.

  The block selection signal 305 is an output signal from the block selection circuit 204 in FIG. 2, and the time division signal 303 is an output signal from the time division selection circuit 205.

  The output signal of the AND gate 307 is supplied to a power supply voltage (second power supply voltage) higher than a drive voltage (first power supply voltage) used by the level conversion circuit 304 from the input circuit to the heater selection circuit 307. ) (Level conversion). The level-converted signal is applied to the gate of the switching transistor 305. Then, a current flows from + to − of the heater power supply wiring 301 through the heater 306 connected to the switching transistor whose voltage is applied to the gate, and the heater is driven.

  The level conversion from the first power supply voltage to the second voltage is achieved by increasing the voltage applied to the gate of the switching transistor 305, thereby reducing the on-resistance and allowing the current to flow through the heater with high efficiency. It is to do.

  FIG. 4 is a circuit block diagram showing an electrical connection relationship between the block selection circuit 204 that receives the supply of image data and the hour / minute selection circuit 205 for driving the heater by dividing (time-division) a predetermined time unit. .

  FIG. 5 shows a timing chart when image data is transferred.

  Here, an example is shown in which eight heater drive blocks of 16 time division drive that have 128 heaters per heater row and can drive eight heaters at the same time are arranged.

  It is necessary for the block selection circuit to receive image data for turning on / off the heater driving block from the outside of the head for 8 bits (the number of blocks). The image data is received by eight 1-bit S / R 401 and eight 1-bit latch circuits 402 constituting the block selection circuit 204. The time division selection circuit is a circuit that receives image data and time division data transferred serially, and includes a combination of four 1-bit S / R 401 and four 1-bit latch circuits 402. These shift registers are connected in series, and a clock signal Clock, a data signal Data, and a latch signal are applied to sequentially transfer images to convert the serial signals into parallel. The parallel-converted image data is output from the eight latch circuits 402 constituting the block selection circuit and individually supplied to the eight heater driving blocks 205. On the other hand, four output signals from the 1-bit latch circuit of the time division selection circuit 205 are input to the decoder 403. Here, the decoder 403 is a 4-input 16-output decoder, and selects an arbitrary 1 bit out of 16-bit output in accordance with input data. The selected time division signal 303 is supplied in common to the heater driving blocks 1 to 8.

  The timing chart of FIG. 5 shows an example of transferring data for one time division among them.

  Data is sequentially transferred to the S / R of 12 bits in total, that is, 8 bits of the block selection circuit 204 and 4 bits of the time division selection circuit 205 in synchronization with the rising edge of the clock signal.

  This data is sent to the latch circuit 402 provided corresponding to each S / R 1 bit when the Latch signal transitions from Hi to Low, and image data read in a state where the Latch signal changes from Low to Hi. Is retained. Note that the latch circuit 402 is active low here.

  As described above, in recent recording apparatuses, there is a tendency to provide a plurality of rows of recording elements corresponding to a plurality of colors in the head for the purpose of improving recording quality and recording speed.

  Data corresponding to the number of recording elements (image data and time-division drive data) is input to a head having a plurality of recording elements. These data are given from the printer body. The print head requires data input pads for the number of print element rows for receiving data from the printer body. In the configuration shown in FIG. 1 having six ink supply ports and twelve ejection port rows, a configuration in which twelve data input pads (data input terminals) are provided in the head for data transfer is common. is there.

  FIG. 6 schematically shows the relationship among the data signals, clock signals, and latch signals input to each column circuit 106 of the inkjet head.

  Twelve column circuits are arranged so as to face each other across the six ink supply ports 101. These column circuits are composed of a selection signal output circuit (shift register and decoder) and a heater drive block array as shown in FIG.

  A signal applied to the pad is supplied to each column via an input circuit. A latch signal and a clock signal are applied to each column circuit in common. An image data signal is input to each column circuit via an individual pad via an input circuit to a shift register constituting a block selection circuit by a clock. Each column circuit is configured to apply individual data signals in synchronization with the timing of the same clock signal and selectively drive an arbitrary heater for each column.

  In particular, in an ink jet recording head, since it is necessary to supply an ink supply port to a substrate on which a circuit is formed, the arrangement of the heater and its peripheral circuits is limited by the ink supply port. Since the ink supply port has a through-hole formed in the substrate from the front surface to the back surface of the substrate, no circuit or wiring can be formed at the position of the ink supply port. Therefore, the column circuit is arranged in a region sandwiched between the ink supply ports, and the circuit between the columns is configured to be electrically independent.

  Therefore, data that is a signal for selectively driving an arbitrary heater for each column is applied individually, and the number of data signal lines supplied from the apparatus main body to the head increases as the number of columns increases.

  This increase in the number of data signal lines causes problems such as an increase in the cost of the printer body for generating signals and an increase in the size of the head and carriage.

  In order to achieve the above object, an ink jet recording head according to the present invention comprises the following arrangement. That is, the recording head in the present invention is a recording head provided with a plurality of sets of recording elements for recording and a drive circuit for driving the recording elements in this column. The head has a common input terminal for inputting data for driving the recording elements, and the data input to the input terminal is commonly used for a plurality of drive circuit arrays corresponding to a group of a plurality of recording elements. Wiring to be supplied. Each of the drive circuits further includes an identification circuit that identifies whether or not the supplied image data should be received.

  According to the embodiment of the present invention, by providing a circuit for identifying data in the driving circuit, it is possible to determine which group the data has been transferred to.

  As a result, the circuit can be shared even when the circuit arrangement is limited and it is difficult to share the circuit, as in the case of an inkjet recording head, for example.

  Preferred embodiments of the present invention will be described below in detail with reference to the accompanying drawings.

  The “element substrate” used in the description does not indicate a simple substrate made of a silicon semiconductor, but indicates a substrate provided with each element, wiring, and the like.

  “On the element substrate” indicates not only the surface of the element substrate but also the inner surface of the element substrate near the surface. In addition, the term “built-in” in the present invention does not mean that each individual element is simply placed on the substrate, but each element is integrally formed on the element substrate by a semiconductor circuit manufacturing process or the like. , Indicating that it is manufactured.

  In the case of the ink jet recording method, the “recording element” includes a discharge energy generating element that generates discharge energy for discharging ink, a discharge port, a flow path, and the like. In the case of a thermal recording method such as a sublimation type, the heater itself corresponds to a recording element.

<First embodiment>
FIG. 7 is a circuit block diagram for explaining the ink supply port provided in the element substrate, the circuit of the first embodiment built in the element substrate, and a diagram schematically showing the flow of electric signals. .

  Here, a supply path for data, a clock signal, and a latch signal to the column circuit is schematically shown.

  As an actual arrangement, 12 column circuits 706 are arranged across 6 ink supply ports 107, respectively. These column circuits are composed of a drive circuit 103 (shift register, decoder, etc.) as shown in FIG. 1, a heater column 102, and an identification circuit described later.

  In the present embodiment, a case where heaters and drive circuits are arranged in a line from the shape of the ink supply port will be described as an example. However, the present invention is not limited to this, and it is sufficient that the drive circuits form a plurality of groups depending on the shape of the ink supply port and the configuration that causes restrictions on the circuit arrangement on the element substrate. However, the present invention is applicable.

  A signal applied to the pad is supplied to each column via a wiring via an input circuit such as a buffer. The same signal is applied to each column circuit as the latch signal and the clock signal. That is, the latch signal line is commonly connected to the latches of the plurality of column circuits, and the clock signal is also commonly connected to the shift registers of the plurality of column circuits. In this embodiment, image data is also supplied from a single pad and input circuit in common to shift registers of a plurality of column circuits, as well as signals such as clocks and latches.

  FIG. 8 shows a specific configuration of a driving circuit in one column circuit 706 in this embodiment, and includes a shift register 401, a decoder 402, and an identification circuit 210, and a circuit showing their electrical connection relation. It is a block diagram. 8 can be applied to the configuration from the circuit configuration in FIG. 8 to the heater constituting the recording element, and the description thereof is omitted here. The shift register and the time division decoder have the same functions as those described in FIG. The identification circuit 210 includes a decoder 801 as will be described later, and is configured such that only one signal is output from the decoder, and this signal becomes an identification signal.

  FIG. 9 is a timing chart when data is transferred to the circuit of FIG. 8 extracted for one time division.

  The circuit in FIG. 8 is arranged for each nozzle row. In the conventional configuration, the clock signal (Clock) and the latch signal (Latch) are commonly applied to all 12 columns. On the other hand, data (Data) is applied to each column individually (FIG. 6). On the other hand, in this embodiment (FIGS. 7 and 8), the data, clock signal, and latch signal are applied in common to all 12 columns.

  Here, as in the block unit of FIG. 2, there are 128 heaters per row, and 8 heater drive blocks of 16 time division drive capable of simultaneously driving 8 heaters are arranged. An example is shown.

  The block selection circuit receives image data for turning on / off the heater driving block from the outside of the head for 8 bits (the number of blocks). The image data is received by eight 1-bit S / R 401 and eight 1-bit Latch circuits 402 constituting the block selection circuit 204.

  A time division selection circuit for selecting and driving a plurality of heaters in one block at a plurality of different timings is a circuit for receiving time division data transferred serially with image data. A combination of four 1-bit S / Rs 401 and four 1-bit latch circuits 402 is configured. These shift registers are connected in series, and a clock signal, a data signal, and a latch signal are applied to sequentially transfer an image and a serial signal is converted into a parallel signal. The parallel-converted block selection signals are output from the eight latches 402 constituting the block selection circuit and are individually supplied to the eight heater drive blocks 205 (see FIG. 2). On the other hand, four output signals (time division signals) from 1-bit Latch of the time division selection circuit 205 are input to the decoder 403. Here, the decoder 402 is a 4-input 16-output decoder, and selects an arbitrary 1 bit out of 16-bit output in accordance with input data. This time division signal 303 is commonly supplied to the heater driving blocks 1 to 8.

  As described above, the configuration based on the image data and the time division data in the data is the same as the configuration described with reference to FIGS. 2 to 4, but the identification circuit 210 is further provided as a feature of the present invention. In addition to the block selection signal and the time division selection signal, an identification signal based on the identification data is output.

  This embodiment shows a circuit configuration in the case where 4-bit identification data is transferred from the apparatus main body before time-division data and image data. However, the present invention is not limited to this, and a circuit configuration that receives identification data after time division data and image data may be used.

  The 4-bit identification data is data indicating to which column circuit of the 12 column circuits the image data, time division data, etc. received from the main body. This 4-bit identification data is input to the 4-bit shift register from the outside of the head and is held in the latch 402 at the timing of the latch signal. The decoder 801 receives the latched identification data and outputs an identification signal.

  The identification circuit 210 of this embodiment that reads and outputs the identification data has a different configuration in each of the 12 column circuits so that a signal is output only when specific identification data is input. It has become. For example, the decoder 801 constituting the identification circuit can originally output 16 bits by 4-bit input, but only one bit of these 16 bits is connected to a wiring so that a signal can be output to the outside. It is configured.

  When 4-bit identification data corresponding to a specific column is sent, the output from the decoder of the specific identification circuit becomes true in synchronization with the latch signal.

  A logical product of the output (identification signal) of the decoder of the identification circuit and the latch signal is supplied as an output signal of the identification circuit 210 to each latch circuit of the block selection circuit and the time division selection circuit.

  In this embodiment, when the output signal of the identification circuit is true, the output signal is supplied to each latch circuit as a latch signal of the latch of the block selection circuit or the time division selection circuit. Further, when the output of the decoder of the identification circuit is false, data is not held in the latch in the block selection circuit or the time division selection circuit.

  Here, the latch signal is negative logic, and the output of the decoder is positive logic.

  In this embodiment, by repeating this operation 12 times, it is possible to share data input terminals corresponding to each column circuit and transfer data to all column circuits.

  Here, since the transfer of the image data needs to sequentially perform the data for each column, it may be necessary to improve the transfer speed of the image data. In such a case, it is desirable to use high-speed data transfer using a low-amplitude differential signal or the like.

  As described above, by identifying whether the supplied data is the data to be received by the circuit of each column by the identification data, each column can receive the data electrically independently, In addition, a reduction in the number of signals can be achieved.

  Furthermore, as another embodiment, it is possible to adopt a circuit configuration that can receive the same data in a plurality of columns.

  That is, the above-described identification circuit is configured to output a signal that can receive data in any one column, but can receive the same data in a plurality of columns. When the identification data is sent, a true signal is output from the identification circuits of the corresponding columns, and the same transferred data is supplied to the latches of different columns.

  For example, when recording a high density portion of an image, ink ejection may be performed simultaneously using the same image data from a plurality of rows of nozzles. At this time, it is possible to achieve data transfer to a plurality of columns by one-time data transfer by adding information corresponding to the plurality of columns to the identification circuit instead of individually inputting the image data to each column.

  As identification information corresponding to such a plurality of columns, a code for selecting two adjacent columns, a code for selecting all the columns, or the like can be used. Thus, the image data can be efficiently transferred by setting the data to be input simultaneously in a plurality of columns based on the identification information corresponding to the plurality of columns.

<Second embodiment>
FIG. 10 is a circuit block diagram for explaining the second embodiment of the present invention and a diagram schematically showing the flow of electric signals.

  In the present embodiment, the configuration in which data for 12 columns is input from one data terminal in the first embodiment is different from Data1 and Data2 for each of the left column and the right column across the ink supply port. The configuration is divided into two data. In the first embodiment, in order to transfer the data for 12 columns, it was necessary to repeat the data transfer of the timing chart shown in the figure 12 times. In order to perform this transfer using two data terminals, Repeat 6 times. Although the number of data signal lines increases to two, data can be transferred by data transfer at a lower speed than in the case of one data signal line.

<Third embodiment>
FIG. 11 is a circuit block diagram showing an electrical connection relationship between a shift register and a decoder corresponding to an arbitrary column in this embodiment.

  In this embodiment, recording elements capable of ejecting droplets of two sizes are mixed in one nozzle row.

  Note that, in each circuit configuration, a symbol with “a” is a configuration of a large droplet circuit, and a symbol with “b” is a configuration of a small liquid application circuit. In addition, the structure with the same numerical value of each code | symbol has shown the same structure unless it mentions specially.

  Here, the recording elements are arranged so that large droplets and small droplets can be alternately ejected, and a large droplet circuit 1101a for driving the heater of the large droplet recording element and a small droplet circuit are arranged. A small droplet circuit 1101b for driving the printing element is arranged corresponding to one printing element row.

  The internal configurations of the large droplet circuit 1101a and the small droplet circuit 1101b are the same, but the identification information corresponding to the identification circuits 210a and 210b is different.

  The same Data, Clock and Latch signals are applied to the large droplet circuit 1101a and the small droplet circuit 1101b.

  Since these two series of column circuits are assigned different identification circuits (210a, 210b), by inputting desired identification data, the time-division selection data, to the latches corresponding to different droplet sizes, Block selection data can be transferred.

  The reason why the different droplet sizes can be discharged is to achieve both high speed and high image quality. In order to achieve high speed, it is necessary to achieve image formation with large ink droplets and a small number of ink ejections. On the other hand, in order to improve gradation and definition, it is necessary to form an image with smaller droplets of ink. In order to achieve both of these, the recording element is provided with ejection openings for ink droplet sizes of different sizes.

  By adopting this configuration, it is possible to perform data for each of large droplets and small droplets from one input terminal.

  When performing normal recording here, in the configuration shown in the present embodiment, data for large droplets and data for small droplets are respectively transferred, and ink ejection from each ejection port is performed simultaneously or at different timings. Will be done.

  In the high-speed recording mode, only large droplets are used, or the frequency of using large droplets is increased, thereby realizing image recording in a short time. In the high image quality mode, only small droplets are used or the frequency of use of small droplets is increased to improve gradation and definition.

  A characteristic point of this embodiment is that necessary data transfer can be efficiently performed. In the high-speed recording mode using only large droplets, it is only necessary to transfer data for only large droplets. In the high image quality mode, data for one or both of large droplets and small droplets is used as necessary. May be input according to the formed image.

  With the configuration of this embodiment, it is possible to efficiently perform data transfer corresponding to an arbitrary droplet size while suppressing an increase in the number of pads.

<Other examples>
The schematic configuration of a recording head to which the present invention is applied will be described below with reference to FIG. FIG. 12 is a perspective view showing a three-dimensional structure of a recording head that discharges three color inks.

  The recording head has ink supply ports 2C, 2M, and 2Y that supply cyan (C), magenta (M), and yellow (Y) inks, respectively.

  Ink channels 301C, 301M, and 301Y are provided corresponding to the electrothermal transducers (heaters) 121, and C ink, M ink, and Y ink are provided on the element substrate through these ink channels. The electrothermal transducer (heater) 121 is led. When the electrothermal converter (heater) 121 is driven, the ink boils and ink droplets 900C, 900M, and 900Y are ejected from the ejection ports 302C, 302M, and 302Y by the generated bubbles.

  In FIG. 12, reference numeral 100 denotes an element substrate on which an electrothermal converter, the above-described drive circuit, and pads are formed.

  In the case of an ink jet head that uses heat, the electrothermal transducer (heater), the discharge port, and the flow path are collectively referred to as a recording element.

  Although FIG. 12 shows the three-dimensional structure of the color type recording head IJHC having three ink supply ports, the recording head IJHK that discharges black ink has the same structure. However, the structure is one third of the configuration shown in FIG. That is, there is one ink supply port, and if the number of recording elements to be arranged is the same, the scale of the element substrate is about one third.

  Next, a schematic configuration of a recording apparatus that performs recording by mounting such a recording head will be described.

<Description of inkjet recording apparatus>
FIG. 13 is a schematic view of an ink jet recording apparatus IJRA which is a typical embodiment of the present invention. The carriage HC has a pin (not shown) that engages with the spiral groove 5005 of the lead screw 5004, and is supported by the guide rail 5003 as the lead screw 5004 rotates so as to reciprocate in the directions of arrows a and b. Is done. An ink jet cartridge IJC is mounted on the carriage HC. The ink jet cartridge IJC includes an ink jet recording head IJH (hereinafter referred to as a recording head) and an ink tank IT for storing recording ink.

  The ink jet cartridge IJC has a configuration in which the recording head IJH and the ink tank IT are integrated. The platen 5000 is rotated by a conveyance motor (not shown) to convey the recording paper P.

  FIG. 14 is a block diagram showing the configuration of the control circuit of the recording apparatus. In FIG. 14, 1700 is an interface for inputting a recording signal, 1701 is an MPU, 1702 is a ROM for storing a control program executed by the MPU 1701, and 1703 is for storing various data (such as recording data supplied to the recording head). DRAM. Reference numeral 1704 denotes a gate array (GA) that controls supply of print data to the print head IJH, and also controls data transfer among the interface 1700, MPU 1701, and RAM 1703.

  Further, reference numeral 1709 denotes a conveyance motor (not shown in FIG. 13) for conveying the recording paper P, and reference numeral 1706 denotes a motor driver for driving the conveyance motor 1709. Reference numeral 1707 denotes a motor driver for driving the carriage motor 1710. Reference numeral 1705 denotes a head driver for driving the recording head IJH. The head driver also outputs image data, time division data, identification data, and the like to the head.

  The operation of the control configuration will be described. When a recording signal enters the interface 1700, the recording signal is converted into recording data for printing between the gate array 1704 and the MPU 1701. Then, the motor drivers 1706 and 1707 are driven, and the recording head IJH is driven in accordance with the recording data sent to the carriage HC, and image recording on the recording paper P is performed.

  In each of the above-described embodiments, an ink jet recording head using an electrothermal transducer (heater) as an ejection energy generating element constituting the recording element has been described as an example. However, the present invention can also be applied to an inkjet recording head using a piezo element as an ejection energy generating element, a thermal head that can be used for a sublimation type, and the like.

  However, in the case of an ink jet recording head having the above-described ink supply port, the heater array needs to be provided with a drive circuit for each column in that the circuit configuration is divided by the ink supply port. Great effect to apply.

The figure which shows typically arrangement | positioning of the circuit block of an element substrate, and an ink supply port. The figure which shows typically the circuit structure of the drive circuit 103, and the flow of a signal. The figure for demonstrating the circuit in a heater drive block. 4 is a circuit block diagram showing an electrical connection relationship between a block selection circuit 204 and a time division selection circuit 205. FIG. 6 is a timing chart when transferring image data for one time division. The figure which shows typically the relationship between each column circuit and the input data, a clock signal, and a latch signal. The circuit block diagram and the figure which shows the flow of the electric signal typically. The circuit block diagram which shows the electrical connection relation of a shift register and a decoder. FIG. 9 is a timing chart for one time division when transferring the image data signal in FIG. 8. FIG. The circuit block diagram and the figure which shows the flow of the electric signal typically. The circuit diagram which shows the electrical connection relation of the shift register and decoder corresponding to arbitrary 1 columns. 3 is a perspective view showing a three-dimensional structure of a recording head IJHC that discharges three color inks. FIG. 1 is a schematic configuration diagram of a recording apparatus applicable to the present invention. FIG. 3 is a block diagram illustrating a control configuration of the recording apparatus.

Explanation of symbols

101 Ink Supply Port 102 Heater Row 103 Drive Circuit 104 Input Terminal 201 Identification Circuit

Claims (14)

A recording head provided with a plurality of groups of a plurality of heaters for recording, and a plurality of sets of shift registers and latches for receiving image data for driving the heaters corresponding to the groups,
An input terminal for inputting the image data;
Wiring for commonly supplying the image data input to the input terminal to a plurality of shift registers corresponding to a group of a plurality of heaters;
And a discriminating circuit which is provided corresponding to each of the plurality of shift registers, and which identifies whether the supplied image data is received by the corresponding shift register.   The recording head according to claim 1, wherein the identification circuit includes a decoder. A recording head provided with a plurality of sets of recording elements for recording and a drive circuit for driving the recording elements of this group,
An input terminal for inputting data for driving the recording element;
Wiring for supplying the data input to the input terminal in common to a plurality of drive circuits corresponding to a group of a plurality of recording elements;
Each of the plurality of drive circuits has an identification circuit for identifying whether or not the supplied data is received.   The recording element has an ejection energy generating element for ejecting ink and an ejection port provided corresponding to the ejection energy generating element, and a set of the ejection energy generating element and a drive circuit supply ink. The recording head according to claim 3, wherein the recording head is disposed on the element substrate with an ink supply port for performing the operation interposed therebetween.   The drive circuit includes a shift register that receives data supplied via the wiring, and a latch circuit that receives and holds data supplied to the shift register, and the latch circuit according to an output signal of the identification circuit The recording head according to claim 3, wherein the recording head receives data.   The recording head according to claim 5, wherein data is received by the latch circuit in accordance with an output signal of the identification circuit and a latch signal indicating a timing to hold data.   The recording head according to claim 3, wherein the data including at least image data and identification data indicating which group the image data is for are input to the input terminal.   Corresponding to the plurality of ink supply ports, a plurality of pairs of ejection energy generating elements and drive circuits are also provided, and each of the plurality of right columns and the plurality of left columns sandwiching the ink supply ports respectively. The recording head according to claim 2, wherein the input terminal and the wiring are in different systems.   The drive circuit has a shift register and a latch for receiving image data, time-division data, and identification data, respectively, and the identification circuit is input to the shift register in response to an output from the shift register and the latch that have received the identification data. The recording head according to claim 3, wherein the recording head is a circuit that outputs a signal indicating whether to latch the image data and the time-division data.   The recording head according to claim 4, wherein the input terminal and the wiring have a plurality of systems for each of the drive circuits for ejecting different amounts of ink.   The recording head according to claim 3, wherein the identification circuit is a circuit for performing identification different from any other group of identification circuits.   The recording head according to claim 3, wherein the identification circuit includes a circuit that performs the same identification as at least one other identification circuit. A group of recording elements for performing recording, a plurality of sets of drive circuits for driving the recording elements of this group, an input terminal for inputting data for driving the recording elements,
A wiring for commonly supplying the data input to the input terminal to a plurality of driving circuits corresponding to a plurality of groups of recording elements, and whether each of the plurality of driving circuits receives the supplied data. A recording head having an identification circuit for identifying
A recording apparatus comprising: a control circuit that outputs image data and identification data for identification by the identification circuit to the input terminal of the recording head. An element substrate provided with a plurality of sets of recording element groups for recording and driving circuits for driving the recording elements of the group,
An input terminal for inputting data for driving the recording element;
Wiring for supplying the data input to the input terminal in common to a plurality of drive circuits corresponding to a group of a plurality of recording elements;
Each of the plurality of driving circuits has an identification circuit for identifying whether or not the supplied data is received.

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