JP5027177B2 - Impulse generator - Google Patents

Description

  The present invention relates to an impulse generator that generates impulses with high time resolution and high output voltage.

  Conventionally, there has been known a pulse radar that generates an impulse with a short pulse width by using an output of a high-speed input / output unit (high-speed interface) such as a PLD (Programmable Logic Device), and drives a mixer with this impulse. Some are disclosed in Document 1. In Patent Document 1, as shown in FIG. 8, an impulse is generated by a pulse generation unit 901, and this impulse is input to a mixer 904. The switch 903 is closed for a time slightly longer than the pulse width of the impulse, thereby cutting out the carrier wave oscillated by the oscillator 902 and outputting it. The output of the switch 903 is mixed with the above-described impulse by the mixer 904 and sent from the transmission antenna 905 as a transmission signal.

  In addition, a pulse radar that generates a transmission pulse using a switch instead of a mixer has been conventionally known. For example, there is one disclosed in Patent Document 2. The configuration of the pulse radar described in Patent Document 2 is shown in FIG. In the pulse radar shown in the figure, the pulse generated by the pulse source 911 passes through the transmission gate 912 and is input to the pulse modulator 913a. Further, the microwave or millimeter wave generated by the microwave source 914 is input to the pulse modulator 913a as a carrier wave. In the pulse modulator 913a, the pulse input from the transmission gate 912 is up-converted by the carrier wave input from the microwave source 914, and transmitted from the transmission antenna 915 to the space. Here, an example in which a switch is used as the pulse modulator 913a is described, and a high voltage impulse is required to drive the switch. An SRD (Step Recovery Diode) or the like is used to generate such a high voltage impulse.

JP 2006-203718 A US6066704

  However, since the transmission circuit described in Patent Document 1 generates transmission pulses using a mixer, there is a problem that the passing power loss is large and the efficiency is low. In addition, when a mixer is used, it is difficult to achieve high isolation between the LO-side port that inputs a carrier wave and the RF-side port that outputs a transmission signal. Carrier leak was a problem. From this point of view, a method using a switch instead of a mixer has been strongly desired.

  In the configuration described in Patent Document 2 in which a transmission signal is generated using a switch, an analog element such as an SRD is used to drive the switch (pulse modulator). However, when timing adjustment needs to be performed more accurately. Such analog elements are unsuitable. Therefore, in order to improve the accuracy of timing adjustment, it is preferable to perform digital processing using a PLD or the like, and it is preferable to generate an impulse using the high-speed input / output unit. However, impulses generated by such digital processing are output by differential signal LVDS (Low Voltage Differential Signaling) or the like, and its amplitude is as small as about 500 mV. Therefore, in order to drive the switch using this impulse, there is a problem that it is necessary to amplify the amplitude to about 2V to 3V using a power amplifier or the like.

  The present invention has been made in view of the above problems, and has an object to provide an impulse generator that generates a voltage impulse having a time resolution of the order of ps (picoseconds) and capable of being driven by a switch. To do.

  In order to solve the above problems, a first aspect of an impulse generator of the present invention includes a digital pattern generator that generates a digital pattern composed of parallel data of a predetermined number of bits, and the digital pattern that is input from the digital pattern generator. A serializer that converts the data into serial data and outputs a differential signal; and a differential signal receiver that inputs the differential signal from the serializer and converts it into a single-ended data stream consisting of “0” or “1”; , A switch for switching and passing the data stream input from the differential signal receiving unit and the fixed data “0”, a control unit for controlling switching of the switch, and a data input from the switch being “1” An output unit that outputs an impulse having a peak voltage of 2 V or more sometimes. To.

  According to the first aspect of the impulse generator of the present invention, an operation signal having a time resolution on the order of ps (picosecond) is output from the serializer, and time information such as a pulse width 1 ns and a pulse repetition period 1 μs of the differential signal It is possible to output an impulse having a peak voltage of 2 V or more from the output unit while maintaining the voltage.

  In another aspect of the impulse generating device of the present invention, the control unit switches the switch to the fixed data “0” side immediately after power-on of the serializer, after a reset or after a power-down, for a predetermined time. And Thereby, it is possible to prevent an unnecessary signal from being generated and output from the output unit at a predetermined time immediately after the serializer is powered on or at a predetermined time after reset.

  In another aspect of the impulse generator of the present invention, the serializer outputs the differential signal at a transfer rate of 1 Gbps or more. This makes it possible to generate a pulse with a pulse width of about 1 ns.

  In another aspect of the impulse generator of the present invention, the digital pattern generator can adjust the pulse width of the impulse according to the number of consecutively arranged “1” bits of the parallel data. . According to this aspect, the pulse width of the impulse can be easily changed simply by changing the number of “1” bits of the parallel data.

  In another aspect of the impulse generating apparatus of the present invention, the digital pattern generating unit continuously outputs a predetermined number of the parallel data to form one digital pattern, and repeatedly generates and outputs the digital pattern to the serializer. It is characterized by that. According to this aspect, it is possible to easily change the pulse repetition period simply by changing the number of parallel data constituting the digital pattern.

  In another aspect of the impulse generating device of the present invention, the digital pattern generating unit, the serializer, the differential signal receiving unit, the switch, the control unit, and the output unit include a PLD (Programmable Logic). Device). By using the PLD, it is possible to provide an impulse generator with a simple configuration and a low price.

  In another aspect of the impulse generator of the present invention, the serializer is configured using a parallel-serial conversion transceiver provided in the PLD.

ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to provide the impulse generator which produces | generates the impulse of the voltage which has a time resolution of ps (picosecond) order, and can drive a switch.
be able to.

It is a block diagram which shows the structure of the impulse generator which concerns on embodiment of this invention. It is a block diagram which shows the structure of a differential signal receiving part. It is explanatory drawing for demonstrating an example which is outputting the signal which a serializer does not need. It is a block diagram which shows the structure of an output part. It is explanatory drawing for demonstrating an example of the parallel data produced in a digital pattern production | generation part. It is explanatory drawing for demonstrating an example of the differential signal output from a serializer. It is a block diagram which shows one structural example of an impulse radar. It is a block diagram which shows the structure of the conventional transmitter / receiver. It is a block diagram which shows the structure of the conventional pulse radar.

  An impulse generator according to a preferred embodiment of the present invention will be described in detail with reference to the drawings. Each component having the same function is denoted by the same reference numeral for simplification of illustration and description. Below, although the embodiment which constituted the impulse generator of the present invention using PLD (Programmable Logic Device) is described, the impulse generator of the present invention is not limited to PLD, and uses the device which has an equivalent function. Can be configured.

The configuration of the impulse generator according to the embodiment of the present invention will be described with reference to FIG. FIG. 1 is a block diagram illustrating a configuration of an impulse generator 100 according to the present embodiment.
The impulse generation device 100 is configured using a PLD 101, and a digital pattern generation unit 110 that generates a predetermined digital pattern is connected to the serializer 120. The digital pattern generation unit 110 generates parallel data at a frequency of 100 MHz, for example, and outputs this to the serializer 120.

  The serializer 120 has a serializer function that converts parallel data into serial data, and converts the parallel data input from the digital pattern generation unit 110 into serial data. The serializer 120 includes a differential output buffer 121 capable of high-speed transfer of several Gbps, and can output a differential signal to the outside according to the converted serial data. The differential signal output from the differential output buffer 121 is composed of a positive signal in which a high level and a low level are represented by “1” and “0”, respectively, and a symmetrical negative signal. The output voltage of the differential output buffer 121 is a low voltage, and the voltage difference between the high level and the low level is about 500 mV at most. The PLD 101 includes a parallel-serial conversion transceiver (SERDES) having a differential output buffer such as LVDS, and can use this as a serializer 120 to output a differential signal to the outside of the PLD 101.

  The differential output buffer 121 of the serializer 120 is connected to the differential signal receiving unit 130 via the differential signal line 122, and the differential signal output to the outside from the serializer 120 is captured again by the differential signal receiving unit 130. It is configured as follows. The differential signal receiving unit 130 is composed of an operation input buffer such as LVDS, and converts the differential signal into a single-ended signal. The configuration of the differential signal receiving unit 130 is shown in the block diagram of FIG. The differential signal line 122 connected to the serializer 120 is terminated using a 100Ω resistor 131 immediately before the connection point with the differential signal receiving unit 130 and the impedance is adjusted. The differential signal receiving unit 130 converts the differential signal sequentially input into logic data (data stream) of “1” and “0”, and the differential signal has a pulse width of 1 ns and a pulse repetition period of 1 μs. Time is retained.

  The switch 140 has two input terminals 141 and 142, and the differential signal receiving unit 130 is connected to one input terminal 141. In addition, data “0” is always input to the other input terminal 142. The switch 140 switches and connects one of the two input terminals 141 and 142 and the output terminal 143, and this switching is controlled by the control unit 145. The control unit 145 controls the switch 140 to switch to the input terminal 141 side for a predetermined period during which impulse generation is required, and to switch to the input terminal 142 side for other periods.

  In particular, when the serializer 120 is powered on, reset, or when the serializer is powered down, the output of the serializer 120 becomes unstable and outputs an unnecessary signal unrelated to the input data. There is a problem. FIG. 3 is an explanatory diagram for explaining an example in which the serializer 120 outputs an unnecessary signal. As shown in the figure, when the serializer 120 is reset, a differential signal as if "1" is input is output even though all the input digital data is "0". .

  An unnecessary signal as shown in FIG. 3 becomes an unexpected signal and needs to be removed. Therefore, when the serializer 120 is unstable, the control unit 145 controls the switch 120 so that the data input to the switch 140 is ignored and the data “0” is forcibly output. Such an unnecessary signal is also generated at power-on, power-down, or reset. In particular, the unnecessary signal generated at power-on destroys a radio frequency (RF) switch connected to the subsequent stage of the impulse generator 100. Therefore, the switch 140 is an essential mechanism.

  The output unit 150 outputs a voltage signal corresponding to “1” or “0” according to the output data from the switch 140. The configuration of the output unit 150 is shown in the block diagram of FIG. The output unit 150 includes an output buffer 151 having an output voltage (peak voltage) of 2 V or more. The output voltage of the output unit 150 varies depending on the supplied voltage or the like, but is usually a relatively high voltage of 2.5V or 3.3V. The output unit 150 simply passes the input data, and outputs a signal of a predetermined voltage while holding time information such as a pulse width 1 ns and a pulse repetition period 1 μs of the input data.

In the impulse generating device 100 of the present embodiment having the above-described configuration, processing until a desired impulse is generated will be described in detail below.
First, the digital pattern generation unit 110 creates parallel data of a predetermined number of bits according to a predetermined pattern. An example of the parallel data created by the digital pattern generation unit 110 is shown in FIG. Here, the number of bits of the parallel data 11 is 20, and 100 parallel data 11 output continuously at a frequency of 100 MHz are set as one digital pattern 10.

  When such a digital pattern 10 is input to the serializer 120, the serializer 120 converts the input parallel data 11 into serial data, and the differential data is output from the differential output buffer 121 to the differential signal line 122. FIG. 6 shows an example of the serial data 20 obtained by serial conversion of the parallel data 11 shown in FIG. 5 in the serializer 120 and the differential signal 30 output in accordance with the serial data 20.

  In FIG. 6, a high-level signal 31 is output as the differential signal 30 for the bit in which “1” is set in the serial data 20. For example, when the serializer 120 receives 20-bit parallel data 11 having a frequency of 100 MHz, for example, from the digital pattern generation unit 110, the serializer 120 outputs the differential signal 30 at a data transfer rate of 2 Gbps. Therefore, the time for outputting a signal per bit is 500 ps, and when there are two consecutive “1” bits as shown in FIG. 6, a pulse-like waveform with a time width of 1 ns is generated. can do.

When the digital pattern 10 composed of 100 parallel data 11 shown in FIG. 5 is repeatedly generated by the digital pattern generation unit 110 and output to the serializer 120, the serializer 120 outputs a pulse-shaped difference with a pulse width of 1 ns every 1 μs. The motion signal 30 is repeatedly output.
When the differential signal receiving unit 130 inputs the differential signal 30, the differential signal 30 is sequentially converted into a logic signal 40 of “1” and “0” and output to the switch 140. The differential signal receiving unit 130 can output the logic signal 40 to the switch 140 in a state where the differential signal has the 1 ns pulse width and the 1 μs pulse repetition period time information.

  The switch 140 is switched to the input end 141 side under the control of the control unit 145 during a period in which impulse generation is required. When the single-ended logic signal 40 is input from the differential signal receiving unit 130 in this state, it is output to the output unit 150. Further, when switching to the input terminal 142 side by the control from the control unit 141, data “0” is continuously output to the output unit 150.

  When the logic signal 40 is input from the differential signal receiving unit 130 via the switch 140, the output unit 150 outputs the voltage signal 50 corresponding to “0” or “1” of the logic signal 40. The output signal 50 is a signal having a relatively high voltage of 2 V or more when “1” is input. Further, the output unit 150 outputs a voltage signal 50 that holds time information of a 1 ns pulse width and a 1 μs pulse repetition period included in the logic signal 40.

As described above, the impulse generator 100 according to the present embodiment uses the serializer (transceiver) 120 having a serializer function, and thus has a time resolution on the order of ps that cannot be generated only by the normal logic processing of the PLD 101. A differential signal 30 is generated. Then, the differential signal 30 can be input again to the differential signal receiving unit 130 in the PLD 101, and a signal having a voltage level necessary for driving the RF switch or the like can be output from the output unit 150 while maintaining the time resolution. It has become.
5 and 6, it is possible to adjust the pulse width of the impulse to be output by adjusting the number of “1” s that are continuously arranged.

Next, a usage example of the impulse generator 100 of the present embodiment will be described below.
The impulse generator 100 can be used to drive an RF switch configured using, for example, a HEMT (High Electron Mobility Transistor). In order to drive the HEMT, it is usually necessary to supply a voltage of about 2V. However, since the output level of the conventional serializer (SERDES) is only about 500 mV and the voltage is insufficient, a conventional power amplifier is used to supply about 2V. Had increased to a voltage of. For this reason, there is a problem that the number of parts increases and the power consumption increases. On the other hand, since the impulse generator 100 according to the present embodiment is configured to convert the output voltage using the PLD 101, the impulse generator 100 is configured not to increase the number of components and increase the power consumption. Yes.

  As another example of use of the impulse generator 100 of the present embodiment, the impulse generator 100 can be used for an impulse source of an impulse radar. An example of an impulse radar using the impulse generator 100 of the present embodiment is shown in FIG. FIG. 7 is a block diagram illustrating a configuration example of an impulse radar. The impulse radar 200 shown in the figure includes a digital signal processing unit 210, a transmission unit 220, a reception unit 230, an oscillator 201, a transmission antenna 202, and a reception antenna 203. The impulse generator 100 of this embodiment is provided in the digital signal processor 210 as a first impulse generator 211, a second impulse generator 212, and a third impulse generator 213.

  In the impulse radar 200, an RF switch 221 is used in the transmission unit 220 in order to generate a transmission signal having a pulse width of, for example, about 1 ns. The RF switch 221 cuts out the carrier wave oscillated by the oscillator 201 into a time width of about 1 ns, and outputs this to the transmission antenna 202 as a transmission signal. For example, a HEMT can be used as the RF switch 221. As described above, the first impulse generator 211 that is the impulse generator 100 of the present embodiment can be controlled with high accuracy so that the RF switch 221 is turned on for about 1 ns.

  Further, in order to configure the impulse radar 200 using an inexpensive device as much as possible, the frequency of the oscillator 201 is lowered so that the transmitter 220 and the receiver 230 can perform predetermined processing at a low frequency. When this processing is completed, the frequency is converted to a desired frequency using the multipliers 222 and 231 and necessary processing is performed at the desired frequency. The second impulse generator 212 of this embodiment can be used to operate the multipliers 222 and 231 with a time width of about 1 ns.

  Further, the reception unit 230 samples the received signal using the A / D converter 232, and the third impulse generation unit 213 can be used as a clock source for operating the A / D converter 232. . The first impulse generating unit 211, the second impulse generating unit 212, and the third impulse generating unit 213 use the RF switch 221, the multipliers 222, 231 and the A / D converter 232, which are control targets, respectively. It can be configured to supply a necessary voltage corresponding to the voltage. Since the impulse generator of this embodiment has a high time resolution, it can provide an impulse source suitable for an impulse radar using a pulse having a pulse width of about 1 ns.

  In the above-described impulse radar 200, the digital signal processing unit 210 including the first impulse generation unit 211, the second impulse generation unit 212, and the third impulse generation unit 213 can be configured using a PLD. . Conventionally, it has been difficult to obtain an output for driving an RF switch or the like from a general-purpose input / output unit of a PLD, that is, a voltage output having a time width of about 1 ns and an output voltage of about 2.5 to 3.3 V. .

  On the other hand, in the impulse generator 100 of this embodiment, the time resolution of about 1 ns can be easily achieved by using the transceiver (differential output buffer 121) of the high-speed serializer (serializer 120) built in the PLD 101 (PLD 204). The output signal can be input to the PLD 101 again, and an output with a higher voltage can be output from the output unit 140 while maintaining the time resolution. Accordingly, an impulse having a desired voltage can be generated with a simple configuration without using an SRD or a power amplifier for amplifying the voltage.

  The impulse generator of the present invention is not limited to the radar device shown in FIG. 7, and can be applied to various pulse radar devices. The description in the present embodiment shows an example of the impulse generator according to the present invention, and the present invention is not limited to this. The detailed configuration and detailed operation of the impulse generator in the present embodiment can be changed as appropriate without departing from the spirit of the present invention.

100 impulse generator 101, 204 PLD
DESCRIPTION OF SYMBOLS 110 Digital pattern production | generation part 120 Serializer 121 Differential output buffer 122 Differential signal line 130 Differential signal receiving part 131 Resistance 140 Switch 141, 142 Input terminal 143 Output terminal 145 Control part 150 Output part 151 Output buffer 200 Impulse radar 201 Oscillator 202 Transmission antenna 203 Reception antenna 210 Digital signal processing unit 211 First impulse generation unit 212 Second impulse generation unit 213 Third impulse generation unit 220 Transmission unit 221 RF switch 222, 231 Multiplier 230 Reception unit 232 A / D converter

Claims (7)

A digital pattern generation unit that generates a digital pattern composed of parallel data of a predetermined number of bits;
A serializer that converts the digital pattern input from the digital pattern generation unit into serial data and outputs a differential signal;
A differential signal receiving unit that inputs the differential signal from the serializer and converts it into a single-ended data stream consisting of “0” or “1”;
A switch for switching and passing the data stream input from the differential signal receiver and the fixed data “0”;
A control unit for controlling switching of the switch;
And an output unit that outputs an impulse having a peak voltage of 2 V or more when data input from the switch is “1”. 2. The impulse generation device according to claim 1, wherein the control unit switches the switch to the fixed data “0” side at a predetermined time immediately after power-on of the serializer, reset, or power-down. The impulse generator according to claim 1 or 2, wherein the serializer outputs the differential signal at a transfer rate of 1 Gbps or more. 4. The pulse width of the impulse according to claim 1, wherein the digital pattern generation unit is capable of adjusting a pulse width of the impulse according to the number of consecutively arranged “1” bits of the parallel data. 5. Impulse generator. 5. The digital pattern generation unit according to claim 1, wherein the digital pattern generation unit continuously outputs a predetermined number of the parallel data to form one digital pattern, repeatedly generates the digital pattern, and outputs the digital pattern to the serializer. The impulse generator according to any one of the preceding claims. The digital pattern generation unit, the serializer, the differential signal reception unit, the switch, the control unit, and the output unit are configured using a PLD (Programmable Logic Device). The impulse generator according to any one of claims 1 to 5. The impulse generator according to claim 6, wherein the serializer is configured using a parallel-serial conversion transceiver provided in the PLD.

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