JP5022434B2 - IC chip supporting large capacity memory and supporting method - Google Patents

Description

  The present invention relates to an IC chip, and more particularly to an IC chip and a support method for supporting a large capacity memory.

  A conventional IC chip includes an IC chip memory as shown in FIG. The IC chip memory may include a ROM memory for code storage, a RAM memory for operation support, and an EEPROM memory for applet storage.

  Although such IC chip-based services have been activated and the requirements for the memory size have increased, the EEPROM of the IC chip memory has a disadvantage that it is difficult to realize 1 Mbyte or more. For this reason, there is a movement from an IC chip manufacturer to try to construct an IC chip that supports a large capacity memory by introducing a flash memory into an existing IC chip.

  However, as shown in FIG. 1, the conventional IC chip supporting the large-capacity memory is physically realized on one chip, and the integrated function of the IC chip and the large-capacity memory is provided. Was not. As a result, there is a problem that data cannot be stored in a large-capacity memory using the security of the IC chip, and restrictions on the memory of the IC chip cannot be compensated using the large-capacity memory.

  On the other hand, a mobile communication terminal such as a GSM (Global System for Mobile communication) phone or a W-CDMA (Wide Code Division Multi Access) phone has a SIM (Subscriber Identity Module) card or a USIM (Universal Subscriber Identity Module) card. IC chip is used.

  In such an IC chip, data that requires security such as mobile communication subscriber information, personal information, and financial information is encrypted and stored using a security algorithm by a coprocessor (Co-Processor).

  However, the conventional IC chip has a problem that the storage capacity is limited as described above, and a large amount of data cannot be stored.

  On the other hand, a flash memory is mainly used for a terminal to store various information. The flash memory is sufficient to store a large amount of data as compared with the memory of the IC chip, and the speed of technical development for expanding the storage capacity is very high.

  However, unlike such an IC chip, such a flash memory does not include a security algorithm or a coprocessor for encrypting data, so that the security of stored data is very weak. In addition, when the flash memory executes a security algorithm on the terminal itself to ensure the security of the stored data, the encryption method differs depending on the terminal device, so that the compatibility of decryption is not guaranteed. there were.

  As described above, the IC chip is excellent in security, but the storage capacity is limited, and the flash memory has a large storage capacity, but the data security is weak, and the mobile communication terminal security algorithm itself decrypts the data. There is a problem that compatibility is not guaranteed.

  The present invention has been made to solve the above-described problems of the prior art, and an object thereof is to provide a large-capacity memory supporting IC chip and a supporting method by which an IC chip processor can directly access a large-capacity memory. . In particular, the IC chip can communicate with the host 400 at high speed.

  Another object of the present invention is to provide a large-capacity memory supporting IC chip in which compatibility of data decryption is ensured while encrypting data such as mobile communication subscriber information, personal information, financial information, etc. that requires security at a terminal. And providing a support method.

According to an embodiment of the present invention, an IC chip supporting a large capacity memory is provided.
An IC chip according to an embodiment of the present invention includes a command line for transmitting a command, a data line for transmitting a data token, a memory for storing data, a processor for exchanging data with the memory according to a connection state, A bus controller that outputs a command requesting connection state setting with the memory to the command line under the control of the processor, and the data line between the memory and the processor according to the command received on the command line. And a memory card controller for changing the connection.

  An IC chip according to another embodiment of the present invention includes an input / output terminal that receives and outputs control signals and data from a host, and a first storage that stores a security algorithm that encrypts and decrypts the input and output data. And receiving the data encryption request signal through the input / output terminal and encrypting the data using the security algorithm, and receiving the data decryption request signal through the input / output terminal and receiving the encrypted data And a processor for decoding using the security algorithm.

  According to another embodiment of the present invention, a mobile communication terminal including an IC chip that supports a large-capacity memory is provided.

  A mobile communication terminal according to an embodiment of the present invention is a mobile communication terminal that encrypts and stores data using an IC chip and decrypts and uses the encrypted data. The IC chip includes the mobile communication terminal. An input / output terminal electrically connected to the terminal; a first storage unit storing a security algorithm for encrypting and decrypting the data; and receiving a data encryption request signal from the mobile communication terminal through the input / output terminal. A processor that encrypts the data using the security algorithm, receives a data decryption request signal from the mobile communication terminal through the input / output terminal, and decrypts the encrypted data using the security algorithm; A second storage unit storing data encrypted by the processor and having a larger storage capacity than the first storage unit. It is possible.

According to still another embodiment of the present invention, a method for changing the connection state of an IC chip is provided.
An IC chip connection state changing method according to an embodiment of the present invention includes a step of communicating with a host through a command line and a data line, and receiving a command through the command line in a memory card controller connected to the memory and the processor. When the command is an APDU command, the processor allows the APDU to transmit / receive APDU through the data line, and when the command is a connection command, connects the processor and the memory. And can be included.

  According to still another embodiment of the present invention, a data security method in a mobile communication terminal is provided.

  A data security method in a mobile communication terminal according to an embodiment of the present invention includes a first step of receiving a data encryption request signal from a mobile communication terminal, and a second step in which a security key is input from the mobile communication terminal and authenticated. When the authentication of the security key is successful in the second step, a third step of encrypting the data using a security algorithm stored in the first storage unit, and the encrypted data in the first storage And a fourth step of storing in the second storage unit having a larger storage capacity than the unit.

  According to the present invention, it is possible to provide a large-capacity memory supporting IC chip and a supporting method that allow an IC chip processor to directly access a large-capacity memory.

  Embodiments of the present invention will be described below with reference to the accompanying drawings.

  In the following, the embodiment adopting the MMC communication protocol will be mainly described. However, the technical idea of the present invention is that the type of the high-speed communication protocol can be used as long as the high-speed communication protocol can be supported between the IC chip and the terminal. It is possible to adopt without limitation.

  FIG. 2 is an exemplary diagram for schematically explaining the present invention. The IC chip according to the present invention performs low-speed communication with a terminal according to the ISO 7816 standard, and can further include a large-capacity memory such as a flash memory, and can perform high-speed communication with the outside through a high-speed interface. The IC chip is a mobile communication subscriber identification IC chip such as a SIM (Subscriber Identity Module), USIM (Universal Subscriber Identity Module), UIM (User Identity Module), or R-UIM (Removable User Identity Module), and a financial chip. Or any one of electronic commerce IC chips. The IC chip can perform both low-speed communication and high-speed communication, and can perform only high-speed communication by encapsulating a low-speed communication token into a high-speed communication token.

  When the MMC (MultiMediaCard) protocol is adopted as a high-speed communication protocol, the host 400 and the IC chip communicate with each other through two lines. Command transfer from the host 400 to the memory card controller 100 and response transfer from the memory card controller 100 to the host 400 are performed through a command line (CMD). Data transfer between the host 400 and the memory card controller 100 is performed through a data line (DATA).

  The connection between the host 400 and the memory card controller 100 shown in FIG. 2 is a data line. The memory card controller 100 enables the IC chip processor 200 to connect to the host 400 or the memory 300 by changing the connection state among the IC chip processor 200, the memory 300, and the host 400. . Normally, the memory card controller 100 maintains a connection state that allows direct access to the memory 300. That is, data input through the data line is stored in the memory 300, or data read from the memory 300 is transferred to the host 400 through the data line.

  In order to pass the access authority to the memory 300 to the IC chip processor 200 or to pass the data token received through the data line to the IC chip processor 200, the memory card controller 100 does not change the connection state inside the memory card controller 100. must not. The data line between the host 400 and the memory card controller 100 is connected to the memory 300 when the switch 1 is on (ON) and the switches 2 and 3 are off (OFF). In this connected state, the memory card controller 100 can write data into the memory 300 and read data. On the other hand, the data line is connected to the IC chip processor 200 when the switch 2 is in the on state and the switch 1 and the switch 3 are in the off state. The IC chip processor 200 is connected to the memory 300 when the switch 3 is in an on state and the switches 1 and 2 are in an off state.

  The connection state of the memory card controller 100 is changed according to a command received through the command line. The command is divided into four as shown in Table 1.

ＮＯＮ ＡＰＤＵコマンドは、ホスト４００からメモリカードコントローラ１００に転送されるコマンド、及び、メモリカードコントローラ１００からホスト４００に転送される応答（Response）であって、高速通信プロトコルにより定義された基本的なコマンド及び応答を含む。ＮＯＮ ＡＰＤＵコマンドを受信すると、メモリカードコントローラ１００はスイッチ１をオンし、スイッチ２及び３をオフしてデータラインを通して受信されたデータトークンをメモリ３００に格納するか、またはメモリ３００に格納されたデータをデータラインを通してホスト４００へ転送する。

The NON APDU command is a command transferred from the host 400 to the memory card controller 100 and a response (Response) transferred from the memory card controller 100 to the host 400, and is a basic command defined by a high-speed communication protocol. And a response. When the NON APDU command is received, the memory card controller 100 turns on the switch 1 and turns off the switches 2 and 3 to store the data token received through the data line in the memory 300 or the data stored in the memory 300. Is transferred to the host 400 through the data line.

  The APDU command is a command generated by the host 400 and transferred to the memory card controller 100, and is a command defined for transmitting and receiving APDU through the data line. An APDU command is generated when an APDU is input from an IC chip host (not shown) connected to the host 400. One or more data tokens are transmitted to or from the host 400 through the data line between an APDU command and a response (APDU Response).

  The data token transferred through the data line according to the APDU command includes a command APDU (C-APDU) or a response APDU (R-APDU) encapsulated by the host 400 or the memory card controller 100.

  If the C-APDU or R-APDU is 48 bits or less, it can be transmitted by one data token, and if it is more than that, one data stream (sequential read / write operation) or a plurality of data tokens ( multiple block read / write operation).

  When the APDU command is received, the memory card controller 100 turns on the switch 2, turns off the switch 1 and the switch 3, and transfers the data token received through the data line to the IC chip processor 200. Here, the data token is converted into C-APDU in a decapsulation process and then transferred to the IC chip processor 200, and the R-APDU is encapsulated in the data token and transferred to the host 400.

  The connection command is a command that is generated by the IC chip processor 200 and transferred to the memory card controller 100, and is a command for transmitting and receiving data between the IC chip processor 200 and the memory 300. When the connection command is received, the memory card controller 100 turns on the switch 3 and turns off the switches 1 and 2, so that the IC chip processor 200 can write data into the memory 300 and read data.

  The release command is a command generated by the IC chip processor 200 and transferred to the memory card controller 100, and notifies the memory card controller 100 that data transmission / reception has been completed between the IC chip processor 200 and the memory 300. It is a command to do. When the release command is received, the memory card controller 100 returns to the connection state before the connection command is received or the connection state designated in advance. In another embodiment, instead of the release command, the memory card controller 100 confirms whether or not data has been transmitted / received between the IC chip processor 200 and the memory 300, and the memory card controller 100 is in a previous connection state or a predetermined connection state. Or after a certain period of time, the memory card controller 100 can return to a previous connection state or a pre-specified connection state.

  As described above, the case where the MMC protocol is used as the high-speed communication protocol has been described as an example. However, it is obvious that the USB protocol can be easily adopted. Refer to ISO7816-12 for the method of transmitting and receiving APDU using the USB protocol. On the other hand, in order to transmit a data token including an APDU to the IC chip processor, which is a feature of the present invention, an additional command for changing a connection state of a controller (for example, the memory card controller 100) that supports a high-speed communication protocol and an IC Defining and using additional commands that allow the chip processor to access the memory is easy for those who have normal knowledge in the field to which the present invention belongs, even when using USB as a high-speed communication protocol. realizable.

  The IC chip processor 200 can drive the security algorithm to store the encrypted data in the memory 300, decrypt the encrypted data stored in the memory, and provide the decrypted data to the host 400. The IC chip processor 200 can include a co-processor responsible for security algorithms.

  When the IC chip processor 200 receives a command signal from the host 400 and writes data to the memory 300 or reads data, the IC chip processor 200 performs security processing on the data. This will be described in more detail with reference to FIGS.

FIG. 3 is a block diagram showing an IC chip according to an embodiment of the present invention.
The memory card controller 100 and the IC chip processor 200 are all included in the IC chip. When the memory 300 is a combination type in which the IC chip and the two modules of the memory 300 are realized by one integrated IC chip, the memory 300 may be included in the IC chip and is a hybrid type in which each module is linked through an interface. In some cases, it may not be included in the IC chip.

The terminal includes a host 400 that transmits / receives data to / from the memory card controller 100 using a high-speed communication protocol, and an IC chip host that is connected to the host 400 and transmits / receives APDU to / from the IC chip processor 200 of the IC chip.
Here, the terminal can be a mobile communication terminal such as a mobile phone with a wireless communication function, or a portable information processing device such as a PDA or a notebook computer.

  When the IC chip host and the IC chip processor 200 encapsulate and transfer the APDU from the transfer side into a data token supported by the high-speed communication protocol, the reception side decapsulates the APDU and communicates with each other. To do.

  An IC chip according to an embodiment of the present invention includes a memory 300 that stores a large amount of data, and a memory card controller 100 that relays data between other components by changing data read / write and connection states in the memory. The IC card processor 200 communicates with the IC chip host through the memory card controller 100 to read and write data in the memory, and the memory card controller 100 accesses the memory of the IC chip processor 200 under the control of the IC chip processor 200. And a bus controller 210 that enables

  The memory card controller 100 that changes the connection state and relays communication between other components of the IC chip includes an interface driver 110, a card interface controller 120, a switch 130, a register 140, a memory core interface 150, and a power supply detection unit 160. including.

The interface driver 110 transmits and receives data tokens and commands to and from the host 400 electrically connected by data line pins and command line pins located on one side of the IC chip through the data lines and command lines.
The electrical signals transmitted at the physical level through the respective data lines and command lines are encapsulated into data tokens and commands by the interface driver 110 and transmitted to the card interface controller 120.
On the other hand, the data token and command output from the card interface controller 120 are also decapsulated into an electrical signal at a physical level and transferred to the host 400 through the data line and the command line.

  The card interface controller 120 performs an operation corresponding to the type of command received from the host 400. That is, when the connection state needs to be changed according to the type of command, a connection state change signal is output.

  When the NON APDU command is received, the card interface controller 120 reads and writes data in the memory 300, which is a basic operation based on the high-speed communication protocol, and controls the switch 130 so that the card interface controller 120 accesses the memory 300. Maintain a possible connection state (see Table 1).

  Here, the memory 300 can be divided into a memory card area that can be used only by the memory card controller 100 and an IC chip area that can be accessed only by the IC chip processor 200. The NON APDU command causes the card interface controller 120 to The specific area of the memory 300 to be accessed is limited to the memory card area.

  The memory 300 manages a security memory area in which security data is stored by using the security algorithm by the IC chip processor 200, a user memory area in which general data is stored without using the security algorithm, and a memory area. Can be divided into system memory areas in which information is stored. This will be described in more detail with reference to FIG.

  When receiving the APDU command, the card interface controller 120 controls the switch 130 so that the content of the data token received through the data line is transmitted to the IC chip processor 200 (see Table 1).

  After receiving the APDU command, the data token received through the data line includes the C-APDU generated from the memory card host 400 and is encapsulated by a high-speed communication protocol.

  The card interface controller 120 removes the header and tail from the data token and outputs only the content. The output content is a C-APDU and is transmitted to the IC chip processor 200 by the switch 130.

  When one C-APDU is transferred by a plurality of data tokens, the card interface controller 120 can sequentially transfer the contents to the IC chip processor 200 when a complete C-APDU is generated.

  When one C-APDU is transferred by a plurality of data tokens, the C-APDU includes a command and cannot be encapsulated in one data token.

  After the connection state of the switch 130 is maintained by the APDU command so that the output of the card interface controller 120 is applied to the IC chip processor 200, the C-APDU received through the data line is transmitted to the IC chip processor 200. .

  The IC chip processor 200 that has received the C-APDU performs processing corresponding thereto. When the processing is completed, the IC chip processor 200 transmits the processing result R-APDU to the card interface controller 120.

  Upon receiving the R-APDU, the card interface controller 120 transmits an APDU response to the host 400 through the command line. When the response data is not included in the R-APDU, the R-APDU can be included in the APDU response and transferred. However, when response data is included in the R-APDU, a response data identifier indicating the presence of the response data can be included in the APDU response. The host 400 that has received the response data identifier can read the R-APDU from the memory card controller 100 according to the data read command.

  When the APDU response is transferred, the card interface controller 120 can change the connection state of the switch 130 to receive the next command. The connection state of the switch 130 before or after the transfer of the APDU response is changed according to a preset policy.

  First, the current connection state of the switch 130 can be maintained until the next command is received. Therefore, after the APDU response is transferred, the connection state of the switch 130 can be changed after the NON APDU command or the connection command is received. Second, the switch 130 can be changed to a connection state before receiving the APDU command. Accordingly, the connection state between the card interface controller 120 and the memory 300 or between the IC chip processor 200 and the memory 300 is restored. Third, it can only return to a predetermined connection state.

  Therefore, when the connection state by the NON APDU command is set to the basic connection state, the connection state between the card interface controller 120 and the memory 300 is returned before and after the APDU response transfer and after the processing by the connection command is completed.

  When the connection command is received, the card interface controller 120 controls the switch 130 so that the IC chip processor 200 and the memory 300 can be connected (see Table 1).

  The connection command generates the bus controller 210 by a control signal of the IC chip processor 200, and the generated connection command is transmitted to the card interface controller 120 through a command line to which the bus controller 210 is connected.

  The card interface controller 120 changes the connection state of the switch 130 so that data can be transmitted and received between the IC chip processor 200 and the memory 300. The IC chip processor 200 accesses a specific address of the memory 300 connected by the switch 130 to read or write stored data.

  When the IC chip processor 200 needs to notify the card interface controller 120 that the memory read / write operation has been completed, it outputs a release command through the bus controller 210.

  In accordance with the release command, the card interface controller 120 changes the connection state of the switch 130 in order to receive the R-APDU from the IC chip processor 200 or to perform processing according to the next command.

  Since the R-APDU must be transferred when the IC chip processor 200 accesses the memory to process the C-APDU transferred from the host 400, the card interface controller 120 controls the switch to change the connection state. By changing, the R-APDU is received from the IC chip processor 200.

  On the other hand, except when the IC chip processor 200 accesses the memory 300 to generate the R-APDU, the card interface controller 120 maintains the current connection state or switches to the predetermined connection state.

  In addition to R-APDU generation, there are various reasons why the IC chip processor 200 accesses the memory 300, such as encryption / decryption of data in the memory 300 using a security algorithm, file management, etc. it can.

In particular, in the case of a high-speed communication protocol that does not have a separate security function, data security can be ensured using a security algorithm. For this purpose, the host 400 or the memory card controller 100 can generate a C-APDU that performs data security processing by designating an address in a specific area of the memory 300, and can apply the generated C-APDU to the IC chip processor 200. . Here, the specific area of the memory 300 may be a memory card area that can be accessed only by the memory card controller 100.
The IC chip processor 200 that has received the C-APDU for performing the data security process outputs a connection command for accessing the area through the bus controller 210, and requests a change of the connection state. Thereafter, the IC chip processor 200 can perform data security processing for the specific area. This will be described in more detail with reference to FIGS.

  In another embodiment, the card interface controller 120 releases the connection state between the IC chip processor 200 and the memory 300 after a predetermined time (for example, one cycle), and the previous connection state or the predetermined connection state. The switch 130 is controlled to return to the state.

  In another embodiment, the card interface controller 120 monitors the data transmission / reception state between the IC chip processor 200 and the memory 300, and if there is no more data exchange, the card interface controller 120 has a previous connection state or a predetermined state. The switch 130 is controlled to return to the connected state.

  The switch 130 is coupled to the card interface controller 120, the IC chip processor 200, and the memory 300, respectively, and enables data transmission / reception between the three components under the control of the card interface controller 120.

  The switch 130 can be realized in various ways, and its configuration can be easily realized by anyone who has ordinary knowledge in the field to which the present invention belongs. Refer to FIG. 2 and Table 1 for the method of changing the connection state of the switch 130.

  The register 140 includes a basic register (mandatory) and a selection register (optional), and stores state information necessary for the operation of the card interface controller 120. The register 140 stores a 128-bit CID (Card Identification Number) for storing a card individual number for identification, and a 16-bit RCA (Relative) for storing a card system address dynamically assigned by the host 400 in the initialization process. Card Address), 128-bit CSD (Card Specific Data) for storing information on the card operating state, and 32-bit OCR (Operation Condition Register) used by a specific broadcast command for identifying the card voltage format And 16-bit DSR (Driver Stage Register) that selectively configures the output driver of the card.

  The memory core interface 150 accesses a specific address of the memory requested from the card interface controller 120 or the IC chip processor 200 to read or write data.

  When the IC chip is inserted into the socket of the terminal, the power detection unit 160 detects the applied power, generates a reset signal (Reset signal) that drives the component of the IC chip, and applies it to each component. .

  The IC chip processor 200 performs basic operations of the IC chip, but modules (for example, code, applet, etc.) and data required for executing the basic operations access the system memory area of the memory 300, for example, the memory 300. Can be obtained.

  When the C-APDU is received from the host 400 through the memory card controller 100, the IC chip processor 200 determines whether it is necessary to access the memory 300, whether the C-APDU type and whether the C-APDU includes data. Judgment based on.

  As a result of the determination, when it is necessary to read or write data from the memory 300, a control signal is output to the bus controller 210. When the IC chip processor 200 and the memory 300 are connected in accordance with the connection command generated from the control signal, the IC chip processor 200 connects to the IC chip area of the memory 300 allocated in advance by a conventional method and reads data. Write.

  Here, the IC chip area of the memory 300 is an area set so as to be accessible only by the IC chip processor 200, and stores modules and data. Here, it is preferable that the address system of the memory management system of the conventional IC chip is directly adopted for the IC chip area. In this case, the IC chip processor 200 can freely use the memory 300 even if the conventional memory address is used as it is. Of course, in order to write a large amount of data, a larger number of addresses are required, so the address system can be expanded accordingly.

  After completion of the work using the memory 300, the IC chip processor 200 controls the bus controller 210 so as to generate a release command, and passes the access authority of the memory 300 to the card interface controller 120.

  Of course, in another embodiment, the IC chip processor 200 is authorized to access the memory 300 for a predetermined time, or the data exchange state between the IC chip processor 200 and the memory 300 is monitored. It can also be determined whether or not the work of the IC chip processor 200 has been completed. The IC chip processor 200 configures the work result as an R-APDU and transmits it to the card interface controller 120.

  If it is not necessary to read or write data from the memory 300 as a result of the determination, the IC chip processor 200 transmits the work result to the card interface controller 120 without generating a connection command.

  On the other hand, the IC chip processor 200 can secure memory resources necessary for execution of all work through the memory 300, and can also temporarily store a calculation result at the time of executing the basic operation in a RAM (not shown).

  The bus controller 210 is coupled between the IC chip processor 200 and the command line, and generates a connection command or a release command according to a control signal from the IC chip processor 200 and transmits it to the memory card controller 100.

  The memory 300 may be a solid-state storage element such as a flash memory that can electrically write and delete data, or another form of storage element.

  The memory 300 can be divided into a memory card area and an IC chip area, and each area can be used only by the memory card controller 100 and the IC chip processor 200.

Data transferred from the host 400 can be stored in the memory card area, and modules required for executing basic operations of the IC chip processor 200 can be stored in the IC chip area.

  The memory 300 can be divided into a security memory area for storing security data, a user memory area for storing general data, and a system memory area for managing the IC chip memory. This will be described in more detail with reference to FIG.

  FIG. 4 is an exemplary diagram for explaining an operation of an APDU command according to an embodiment of the present invention. First, an APDU transfer method between the host 400 and the IC chip will be schematically described, and then an embodiment employing the MMC protocol will be described.

  The C-APDU generated by the IC chip host is composed of a 4-byte header and a variable-length body. The header is composed of 1-byte CLA (Class of Instruction), 1-byte INS (Instruction code), 1-byte P1 (parameter 1), and 1-byte P2 (Parameter 2). The body is composed of a 1-byte Lc that specifies the length of the selective body or data field, a data field that includes a command parameter or data of variable length, and a 1-byte Le that specifies the expected length of the return data. The R-APDU generated by the IC chip processor 200 includes a variable length body and two status words SW1 and SW2. The body is composed of Le which specifies the length of the selective body or the data field, and variable length data.

  The host 400 combines the LB header specifying the length of the C-APDU with the C-APDU generated by the IC chip host, and encapsulates it into a plurality of data tokens.

  The plurality of encapsulated data tokens are transmitted to the memory card controller 100 through a physical hierarchy formed between the host 400 supporting the high-speed communication protocol and the memory card controller 100 of the terminal. The plurality of received data tokens are decapsulated into APDU by the card interface controller 120 with reference to the LB header value.

  Hereinafter, an operation using a high-speed communication protocol based on the MMC protocol will be described in detail.

  In the case of the MMC protocol, a command token of a command and a response and a data token associated with the command token are transmitted and received through the command line and the data line, respectively. Data read / write commands (from the host 400 to the IC chip) and responses thereto (from the IC chip to the host 400) are transmitted and received through the command line, and data according to the command is transmitted and received through the data line. In the MMC protocol, data read / write commands are classified into sequential commands and block-oriented commands. A continuous command transfers a continuous data stream and continues to transfer until a stop command appears on the command line. The block-oriented command transfers a continuous block (token) having cyclic redundancy checking (CRC), and the block transfer is continued until a stop command appears on the command line. The command is transferred from the host 400 to the IC chip, and the response is transferred from the IC chip to the host 400. Data is transferred between the host 400 and the IC chip.

  The command token has a total length of 48 bits, and the start bit (start bit) and the end bit (end bit) are always 0 and 1. The transmitter bit located after the start bit is a bit indicating a command from the terminal and is 1, and the command content is located next to the transmitter bit. It is protected by a 7-bit CRC checksum bit.

  The response token has a total length of 48 or 136 bits, and the start and end bits are always 0 and 1. The transmitter bit located next to the start bit is a bit indicating that it is a response from the IC chip and is 0, and the response content is located next to the transmitter bit and is a 7-bit CRC checksum. Protected by bits.

  A block-oriented data token always has a start bit and an end bit of 0 and 1. The remaining length excluding the start bit, end bit, and CRC checksum is 512 bytes, and is composed of a 2-byte LB field indicating the length of the APDU and a 510-byte APDU field. The APDU field includes C-APDU or R-APDU from the host 400 or IC chip. An APDU exceeding 510 bytes is divided and transferred into two or more block-oriented data tokens, and 00h is inserted into the remaining unfilled bytes of the last block-oriented data token.

  Referring to FIG. 4, APDU communication includes the following four types of cases.

Case 1: Case where neither C-APDU data field value nor R-APDU data field value exists Case 2: Case where C-APDU data field value does not exist, but R-APDU data field value exists Case 3: C-APDU data field value exists but R-APDU data field value does not exist Case 4: C-APDU data field value and R-APDU data field value both exist In the absence of a C-APDU data field value, the C-APDU may be included in the APDU command 410 or included in the APDU token 420 (Case 1 and Case 2). On the other hand, when the data field value of the C-APDU exists, the C-APDU is included in the APDU token 420 and transferred (Case 3 and Case 4). In the above two cases, the APDU token 420 containing the C-APDU is transferred between the APDU command 410 and the APDU response 430. This is because the R-APDU is received from the APDU response 430 when the data field value of the R-APDU does not exist. On the other hand, the memory card controller 100 that has received the APDU command 410 for transferring the C-APDU changes the connection state of the switch 130 from the memory card controller-memory 415 to the memory card controller-IC chip processor 425.

  When the data field value of the R-APDU does not exist (case 1 and case 3) or when the size is sufficiently small, the R-APDU is included in the APDU response 430.

  When the data field value of the R-APDU exists and the size cannot be transferred through the R-APDU, the following process is performed. When the data field value of the R-APDU exists, the IC chip processor 200 stores the R-APDU itself, the address of the memory in which the R-APDU is stored, or information indicating the presence of the R-APDU to be transferred. This is transmitted to the controller 100. Upon receiving this, the memory card controller 100 inserts the R-APDU read identifier into the APDU response 430 and transfers it. The R-APDU read identifier is information indicating the presence of an R-APDU to be transferred to the host 400. The R-APDU read identifier simply indicates whether or not it exists using one or more bits, or stores the R-APDU. An address of the memory 300 can be indicated, or a combination thereof can be indicated. The host 400 that has received the APDU response 430 including the R-APDU read identifier reads the R-APDU from the IC chip according to the read command. On the other hand, before or after the APDU response is transferred, the memory card controller 100 changes the connection state of the switch 130 to the previous connection state or the connection state specified in advance. FIG. 4 shows that the connection state between the memory card controller and the memory is changed.

  FIG. 5 is an exemplary diagram for explaining an operation of a connection command according to an embodiment of the present invention.

  When receiving the C-APDU from the IC chip host through the memory card controller 100, the IC chip processor 200 determines whether it is necessary to access the memory 300 and whether the data is included in the type of the C-APDU and the C-APDU. If it is necessary to read or write data from the memory 300, the connection command 500 is output on the data line through the bus controller 210. The memory card controller 100 that has received the connection command 500 through the data line changes the connection state from the memory card controller-memory 505 to the IC chip processor-memory 515. When the IC chip processor 200 is connected to the memory 300, the IC chip processor 200 reads and writes data by connecting the IC chip areas of the memory 300 allocated in advance by a conventional method. Therefore, no signal is generated on the data line.

  When the work using the memory 300 is completed, the IC chip processor 200 controls the bus controller 210 so as to generate a release command, and passes the memory 300 access authority to the card interface controller 120. Of course, in another embodiment, the IC chip processor 200 is authorized to access the memory 300 for a predetermined time or the data exchange state between the IC chip processor 200 and the memory 300 is monitored to It can also be determined whether the work has been completed. Therefore, the release command 520 is a selection item. When the operation using the memory 300 is completed, the memory card controller 100 returns to the previous connection state or the connection state designated in advance. FIG. 5 shows that the connection state between the memory card controller and the memory is changed.

  FIG. 6 is an exemplary diagram for explaining an operation of an IC chip using an APDU command and a connection command according to an embodiment of the present invention.

  The host 400 that has received the C-APDU from the IC chip host transfers the APDU command 600 to the memory card controller 100 through the command line. Thereafter, the C-APDU is encapsulated in an APDU token 610 and transferred to the memory card controller 100 through a data line. Before receiving the APDU command 600, the memory card controller 100 and the memory 300 are connected as shown by 605. The memory card controller 100 that has received the APDU command 600 changes the connection state so that the memory card controller-IC chip processor is connected like 615. Thereafter, when the APDU token 610 is received through the data line, the memory card controller 100 decapsulates the C-APDU and transmits it to the IC chip processor 200. The IC chip processor 200 that has received the C-APDU determines whether or not the memory 200 needs to be accessed, and outputs a connection command 620 to the command line if necessary. The memory card controller 100 that has received the connection command 620 changes the connection state to IC chip processor-memory as indicated by 625. Thereafter, when the R-APDU is received from the IC chip processor 200, the memory card controller 100 converts the R-APDU into an APDU response 630 and transfers it to the host 400. Before and after the transfer of the APDU response 630, the connection state of the memory card controller 100 maintains the current connection state, or is changed to a previous connection state or a connection state designated in advance.

  7 and 8 are diagrams illustrating an operation of an IC chip using an APDU command and a connection command according to an embodiment of the present invention, and transferring an R-APDU having a data field value. It is an illustration figure. Since the reference numerals “700” to “730” and the reference numerals “800” to “830” are the same as the reference numerals “600” to “630” in FIG. 6, the following description will focus on other parts.

  Thereafter, when the memory card controller 100 receives an R-APDU or a corresponding response (memory address storing the R-APDU, information indicating the presence of the R-APDU to be transferred, etc.) from the IC chip processor 200. This is converted into an APDU response 730 and transferred to the host 400. The memory card controller 100 inserts the R-APDU read identifier into the APDU response 730 and transfers it. On the other hand, before and after the transfer of the APDU response 730, the connection state of the memory card controller 100 maintains the current connection state as in 735, or is changed to the previous connection state or the connection state designated in advance.

  The host 400 that has received the APDU response 730 including the R-APDU read identifier reads the R-APDU from the IC chip through the read command 740. The memory card controller 100 that has received the read command 740 transfers the read response 750 to the host 400, encapsulates the R-APDU in the data token 760, and transfers it to the host 400. When the transfer of the data token 760 is completed, the host 400 transfers a cancel command 770 to the memory card controller 100, and the memory card controller 100 transfers a cancel response 780 to the host 400 as a response thereto.

  In the embodiment in which the IC chip processor 200 transfers only the information indicating the presence of the R-APDU to the memory card controller 100, the APDU command 840 is a read command and a command for reading data from the IC chip processor 200. Therefore, the memory card controller 100 changes the connection state to the memory card controller-IC chip processor by the APDU command 840 (855), and the IC chip processor 200 temporarily stores the R- that has been temporarily stored in response to the connection state change. The APDU is transferred to the memory card controller 100. The memory card controller 100 encapsulates the R-APDU in the data token 850 and transfers it to the host 400, and changes the connection state as in 865.

  FIG. 9 is a diagram for explaining the execution of a security algorithm according to an embodiment of the present invention.

  The IC chip can include a data input / output terminal 910, an IC chip processor 200, and an IC chip memory 920.

  The data input / output terminal 910 is a terminal for inputting / outputting data input from the outside of the terminal to / from the IC chip, and is connected to the above-described data line and command line. The data input / output terminal 910 can be input / output in various forms such as ISO7816, RF, MMC, USB standards.

  As described above, the IC chip processor 200 exchanges data with the memory 300 according to the connection state, controls the IC chip to perform the function of the IC chip, and transmits data transmitted through the data line at the request of the host 400 If it is desired to encrypt the data, the security algorithm is driven to change the data to encrypted security data. The IC chip processor 200 stores the encrypted security data in the security memory area 310 of the memory 300.

  The security algorithm is driven by the IC chip processor 200, changed to encrypted security data, stored in the security memory area 310 of the memory 300, and the security data stored using the same security algorithm is decrypted. The process of changing the data and transmitting it to the host 400 is called a security processing process.

  When it is requested from the host 400 to be managed as general data without being encrypted by the control signal, the security algorithm by the IC chip processor 200 is not driven and the user memory area 320 of the memory 300 is stored. The process of storing and transmitting this to the host 400 at the time of inquiry without going through the decryption process is called a general processing process.

  As the security algorithm, those widely known in the technical field can be used as described above, and for example, any one of DES, 3-DES, and AES can be used.

  In the present invention, the security algorithm is not executed for all data input / output through the data line, but can be executed for data requested by the host 400, and is set in advance by a control program. Can be performed on different types of data.

  The security algorithm can be executed by a control program installed in the IC chip memory 920. The control program controls whether or not the data input through the data line is encrypted and whether or not the data stored in the memory 300 is decrypted, and the address on the memory is set to the IC chip memory 920 or Or stored in the system memory area 330. The control program can be stored in the system memory area 330 of the memory 300.

  The control program can ask the user of the terminal whether to encrypt data through a graphic user interface (GUI). At this time, if the user requests encryption, the control program executes a security algorithm to encrypt the data, stores it in the memory 300, and encrypts the data in the IC chip memory 920 or the system memory area 330. It is possible to store information that the data has been stored and the address of the stored data on the memory.

  On the other hand, when the user does not request encryption, the control program stores the data in the memory 300 without executing the security algorithm. The storage area of the IC chip stores information that the data has not been encrypted and the address on the memory of the stored data. As described above, whether or not the data has been encrypted and the address on the memory are information necessary when the control program searches the data stored in the memory 300 later.

  The graphic user interface (GUI) may be included in the control program as a single module, or may be separately provided in various applications executed on the terminal. An example of the application will be described in more detail with reference to FIG.

  The memory 300 can be composed of an integrated IC chip composed of an IC chip and a single module, or can be composed of a form linked with an IC chip and a separate module.

  When the memory 300 is configured as an integrated IC chip, an address bus and a data bus can be configured for data transfer between the IC chip and the memory 300.

  When the memory 300 is configured separately from the IC chip, data is exchanged between the IC chip and the memory 300 by any one method of ISO7816, MMC standard, ISO14443, ISO15693, and ISO18092. The integrated IC chip form has an advantage that the operation speed is faster than a separately linked form.

  An IC chip embodied in a form such as a GSM SIM card or a W-CDMA USIM card stores mobile communication subscriber information. It can be used as a mobile communication terminal. The IC chip stores information that requires security, such as personal information and financial information.

  The memory 300 according to an embodiment of the present invention includes a security memory area 310 for storing encrypted data in the memory 300 by driving a security algorithm by the IC chip processor 200, and a user memory for storing general data that is not encrypted. An area 320 and a system memory area 330 that manages the IC chip memory 920 can be included. Here, the IC chip processor 200 can include a coprocessor responsible for security processing.

  The memory 300 can store security data and general data by partitioning the memory address in advance and physically partitioning it. However, for efficient management of the memory 300, the area is divided and set in advance as described above. It is preferable to do. As the memory 300, for example, a flash memory capable of storing a large amount of data can be used.

  In the memory area division described above, the user can use the memory 300 by dividing it into a security memory area and a user memory area at a ratio desired by the user using a memory management program of the terminal. Since the system memory area manages the memory area as a whole, it is generally an inaccessible area.

  When the user divides the memory area at the desired ratio using the memory management program of the terminal, the initial setting applet stored in the system memory area is loaded when the memory is first connected to the terminal. Driven to set the memory area.

  In general, when the user uses a lot of memory functions, the user memory area can be set to be used more. When the user uses a lot of mobile content, the security memory area can be set more. .

  For example, if setting is performed at a ratio of user memory: security memory = 50%: 50%, the user area for managing the entire physical address of the memory 300 and the security area may be divided in the system memory area. it can.

  An access policy is separately applied to each divided area, and a portion that can be controlled by the user is a user memory area portion. The terminal employs a memory management program to drive a memory management applet stored in the system memory area of the IC chip so that the memory area can be reset.

  In this case as well, a user accessible part can be set using an access policy from a memory address reset managed by the system memory.

  On the other hand, each region may have a unique size, but it is preferable that the size of each region can be dynamically changed.

  FIG. 10 is a flowchart illustrating a process of encrypting data using a data security algorithm according to an embodiment of the present invention.

  Referring to FIG. 10, in step S1010, the control program confirms with the user of the terminal whether or not the data input through the input / output terminal of the IC chip is encrypted.

  If the user selects data encryption in step S1020, the control program receives the security key input from the user and authenticates it. Here, as an authentication method, a PIN or a personal identification number can be used.

  If the authentication of the security key is successful in step S1030, the control program executes a security algorithm by the IC chip processor 200 and encrypts the data. If the security key authentication fails, the process ends.

  On the other hand, if the user does not select data encryption, the process proceeds to step S1040 without going through step S1030 for encrypting data.

  In step S1040, the data is stored in the memory 300, and whether the stored data is encrypted and the address of the stored data on the memory are stored in the IC chip memory 920 in the IC chip. Here, “whether or not the data has been encrypted” is stored in step S1040 if the data has been encrypted in step S1030, and encrypted if the data has not been encrypted in step S1030. Information that it has not been stored is stored in step S1040.

  In step S1050, the control program provides the data storage result to the user through the display unit of the terminal.

  FIG. 11 is a flowchart illustrating a process of decrypting data using a data security algorithm according to an embodiment of the present invention.

  Referring to FIG. 11, in step S1110, the user is requested to search for data stored in the memory 300 through the graphic user interface of the mobile communication terminal.

  If the data inquired in step S1120 is encrypted data, the control program authenticates the user's security key. Authentication of the security key can use a PIN or a password.

  If the authentication of the security key is successful in step S1130, in step S1140, the control program decrypts the data retrieved from the address on the memory by executing a security algorithm by the IC chip processor 200. If it is inquired in step S1120 that the data has not been encrypted, step S1140 is not performed. On the other hand, if the authentication of the security key fails in step S1130, the process ends as it is.

  In step S1150, the control program provides the decrypted data or unencrypted data to the user through the display unit of the mobile communication terminal.

  FIG. 12 is a block diagram of data that can be stored in a security memory area of a memory according to an embodiment of the present invention.

  The data shown in FIG. 12 is structured by classifying terminal setting information and terminal user personal information by item.

  As shown in FIG. 12, the data structured in this way includes a personal user interface (MY UI) item, a personal schedule management system (PIMS) item, a browser item, a browser item, and a finance. It can be divided into items and application items.

  Personal user interface items include standby screens, bell sounds (such as ringtones), time settings, fonts, own avatars, Tamagotchi, etc., as information set for the purpose of the user using the mobile communication terminal for convenience and decorating purposes. Information is included.

  The PIMS item includes information such as a telephone number, schedule management, alarm, SMS transmission / reception, and e-mail. The browser item includes favorites, history information, and the like.

  The financial items include information such as account number, personal identification number, usage history, and remittance account number.

  Application items can include messenger, telemetry, DMB, office, and ID executed on the mobile communication terminal.

  The messenger item may include information mainly used for messenger used for chatting, for example, my ID, friend list, blocking list, history information, and the like.

  The telemetry item is, for example, information necessary for receiving a route guidance service on the terminal, and may include favorites, departure points such as home, setting information, history information, and the like.

  The DMB item may include information required for receiving a broadcast service on the terminal, such as a channel list, a program list, and setting information.

  The office item can include information stored for connecting to office groupware on the terminal, for example, VPN (Virtual Private Network), setting information, and the like.

  The ID item may include information such as an entrance / exit key value at home or work, or a temporary reservation number generated when a train or an aircraft is reserved on the terminal.

  It will be easily understood by those skilled in the art to which the present invention belongs that information that requires encryption can be included in addition to the data shown in FIG.

  In this way, information that requires encryption is structured and stored, and this is provided to the user of the terminal, so that the terminal user can more easily encrypt and store the setting information and personal information and use it. can do. In addition, even when a terminal is changed, existing information can be used as it is by attaching an IC chip or memory 300 storing the data of the present invention to a new terminal, and a security key such as a PIN or a personal identification number can be used. Since personal information and setting information are managed, there is no fear of leakage of personal information even if the mobile communication terminal is lost or stolen.

  As described above, according to the present invention, since the large capacity memory can be used for the IC chip to perform the basic operation, the physical limit of the memory capacity can be overcome as compared with the conventional case. As a result, it is possible to store data such as a large certificate or security algorithm code that could not be mounted conventionally.

  On the other hand, since communication with the host 400 is performed using a high-speed communication protocol, data transmission / reception is faster than in the past.

  Further, when data is stored in a large-capacity memory, it can be stored and used using the security algorithm of the IC chip, so that the security performance of the large-capacity memory is improved as compared with the case where only the high-speed communication protocol is used. .

  The present invention has been described with reference to the embodiments of the present invention. However, those who have ordinary knowledge in the technical field are within the scope of the spirit and scope of the present invention described in the claims. It will be understood that the invention can be modified and changed in various ways.

It is a block diagram which shows the conventional IC chip. It is an illustration for demonstrating this invention roughly. It is a block diagram which shows the IC chip by one Example of this invention. 6 is a diagram illustrating an operation of an APDU command according to an embodiment of the present invention. 6 is a diagram illustrating an operation of a connection command according to an embodiment of the present invention. 3 is a diagram illustrating an operation of an IC chip using an APDU command and a connection command according to an embodiment of the present invention. 4 is a diagram for explaining an operation of an IC chip using an APDU command and a connection command according to an embodiment of the present invention and transferring an R-APDU having a data field value. 6 is a diagram for explaining an operation of an IC chip using an APDU command and a connection command according to another embodiment of the present invention and transferring an R-APDU having a data field value. 3 is a diagram for explaining execution of a data security algorithm according to an embodiment of the present invention; 4 is a flowchart illustrating a process of encrypting data using a data security algorithm according to an embodiment of the present invention. 4 is a flowchart illustrating a process of decrypting data using a data security algorithm according to an embodiment of the present invention. FIG. 3 is a block diagram of data that can be stored in a security memory area of a memory according to an embodiment of the present invention.

Explanation of symbols

100 Memory Card Controller 110 Interface Driver 120 Card Interface Controller 130 Switch 140 Register 150 Memory Core Interface 160 Power Supply Detection Unit 200 IC Chip Processor 210 Bus Controller 300 Memory 400 Host

Claims (13)

A command line that communicates commands,
A data line carrying a data token;
Memory to store data,
A processor for exchanging the data with the memory according to a connection state;
A bus controller that outputs a command requesting connection state setting with the memory on the command line under the control of the processor;
A memory card controller that changes a connection between the data line, the memory, and the processor in response to a command received on the command line;
Including
The command includes an APDU (Application Protocol Data Unit) command for setting a connection between the memory card controller and the processor, and a connection command for setting a connection between the processor and the memory,
The IC chip, wherein the memory card controller changes the connection state according to a preset policy in response to completion of transfer of response data of an APDU command . The memory card controller
An interface driver communicating with the host through the command line and the data line;
A card interface controller that determines the type of command received on the command line and outputs a corresponding connection state change signal;
A register for storing status information of the card interface controller;
A switch for changing a connection between the card interface controller, the processor, and the memory in response to the connection state change signal;
A memory core interface connected to the switch and accessing the memory to read and write data;
A power detection unit that applies a reset signal to the card interface controller and the memory core interface when power is supplied;
The IC chip according to claim 1, comprising:   The IC chip according to claim 1, wherein the command further includes a release command for releasing the connection between the processor and the memory.   2. The IC chip according to claim 1, wherein the memory card controller converts an APDU token corresponding to the APDU command into a C-APDU (Command APDU) (decapsulates) and outputs the converted CPDU to the processor.   2. The IC chip according to claim 1, wherein the memory card controller outputs a C-APDU (Command APDU) included in the APDU command to the processor.   The memory card controller inserts the R-APDU into an APDU response and outputs it through the data line when response data is not included in the R-APDU (Response APDU) output from the processor. The IC chip according to claim 1.   When the R-APDU output from the processor includes response data, the memory card controller inserts a response data identifier indicating the presence of response data into the APDU response and outputs the response data identifier through the data line. The IC chip according to claim 1.   The IC chip according to claim 1, wherein the memory is a flash memory.   9. The IC chip according to claim 8, wherein the memory includes an IC chip area and a memory card area.   2. The IC chip according to claim 1, wherein the processor performs a data security process on a part of the data stored in the memory using a security algorithm.   The IC chip according to claim 1, further comprising a RAM (Random Access Memory) connected to the processor and temporarily storing a calculation result of the processor.   The IC chip according to claim 1, wherein the memory card controller connects the processor and the memory for a predetermined time. A memory card controller that communicates with a host through a command line and a data line and is connected to a memory and a processor, and changes a connection state between the memory and the processor.
Receiving a command on the command line;
If the command is an APDU command, allowing the processor to send and receive APDUs through the data line;
If the command is a connection command, connecting the processor and the memory;
The memory card controller changing the state of the connection according to a preset policy in response to completion of transfer of response data of the APDU command ,
The command includes an APDU (Application Protocol Data Unit) command for setting a connection between the memory card controller and the processor, and a connection command for setting a connection between the processor and the memory. How to change the connection status.

Images