JP4967948B2 - Circuit simulation method, circuit simulation program, and circuit analysis apparatus - Google Patents

Description

  The present invention relates to a circuit simulation method for analyzing characteristics of a circuit including an integrated circuit, a circuit simulation program corresponding to the circuit simulation method, and a circuit analysis apparatus for realizing the circuit simulation method.

  Conventionally, circuit simulation has been performed at the time of designing or changing the design of LSI, package, PCB, etc. for the purpose of grasping the effects of LSI (Large Scale Integration), package, PCB (Printed Circuit Board) on signal waveform transmission. A technique for analyzing the signal waveform has been proposed (see, for example, Patent Document 1).

  When performing the above-described circuit simulation, a behavior model describing the electrical characteristics (for example, input / output characteristics) of the LSI has been used as the LSI model. This behavior model is devised as an alternative to an LSI model that a semiconductor manufacturer or the like does not want to disclose because it is equivalent to publicizing know-how such as design data.

JP 2002-245112 A

  However, since the behavior models described above have many inconsistent electrical characteristics, there is a problem in that correct circuit simulation may not be executed.

  That is, the behavior model is created by actual measurement or SPICE (Simulation Program with Integrated Circuit Emphasis) simulation. When actually created, voltage / current characteristics, transient characteristics, and load characteristics, which are the electrical characteristics of the behavior model, need to be measured individually, but each measurement value contains measurement errors. Therefore, a behavior model having inconsistent electrical characteristics is created, and as a result, a correct circuit simulation may not be executed.

  Also, when created by SPICE simulation, it is necessary to perform simulation by setting the measurement interval and voltage measurement range according to the characteristics of the device, but the voltage in the necessary range has not been measured. A behavior model with inconsistent electrical characteristics may be created due to influences such as a rough measurement interval and a short analysis time for transient analysis. As a result, a correct circuit simulation may not be executed.

  Accordingly, the present invention has been made to solve the above-described problems of the prior art, and provides a circuit simulation method, a circuit simulation program, and a circuit analysis device capable of executing a correct circuit simulation using a behavior model. The purpose is to provide.

  In order to solve the above-described problems and achieve the object, the present invention is a circuit simulation method used in a circuit analysis apparatus for analyzing the characteristics of a circuit including an integrated circuit, and includes a plurality of output characteristics of the integrated circuit. A characteristic inspection step for inspecting the consistency between one output characteristic combination and another combination of the output characteristics, and if it is determined that there is a problem in the consistency, the output model of the integrated circuit is corrected by correcting one of the characteristic data Generating a plurality of the output models by performing the correction for each of the characteristic data, a correction availability determining step for checking whether the correction is within an allowable range, and the correction And a simulation step of simulating the circuit using each of the output models determined to be acceptable.

  Further, the present invention is characterized in that, in the above-mentioned invention, the characteristic data is a LOW voltage current characteristic, a HIGH voltage current characteristic, a load characteristic, and a transient characteristic.

  Further, the present invention is characterized in that, in the above invention, the characteristic data correction step performs correction by multiplying each of the low voltage current characteristic and the high voltage current characteristic by a coefficient.

  Further, the present invention is characterized in that, in the above-mentioned invention, the characteristic data correction step performs correction for displacing the LOW voltage current characteristic and the HIGH voltage current characteristic in a voltage direction and a current direction.

  Further, the present invention is characterized in that, in the above-described invention, the method further includes a simulation inspection step for inspecting whether or not a plurality of simulation results are possible.

  According to the present invention, when the computer determines that there is a problem in the consistency check step for checking the consistency between one of the plurality of output characteristics of the integrated circuit and a combination of the other output characteristics. Correcting one of the characteristic data to generate an output model of the integrated circuit, and performing the correction for each of the characteristic data to generate a plurality of output models, and the correction Performing a correction propriety determining step for inspecting whether or not is within an allowable range, and a simulation step for simulating a circuit including the integrated circuit using each of the output models determined to be correctable. Features.

  In addition, the present invention is a circuit analysis apparatus for analyzing characteristics of a circuit including an integrated circuit, the characteristic for testing consistency between one of a plurality of output characteristics of the integrated circuit and a combination of the other output characteristics. When it is determined that there is a problem with the inspection unit and the consistency, one of the characteristic data is corrected to generate an output model of the integrated circuit, and the correction is performed for each of the characteristic data. A simulation of the circuit using a characteristic data correction unit that generates the output model, a correction propriety determination unit that checks whether the correction is within an allowable range, and the output model that is determined to be correctable. And a simulation unit for performing the above.

  According to the present invention, even when there is a contradiction in the electrical characteristics (for example, input / output characteristics) of the obtained behavior model, a correct circuit simulation is performed using the behavior model generated so that there is no contradiction in the characteristics. The effect that it can be performed is obtained.

  According to the present invention, even if there is a contradiction in the characteristics of the behavior model, there is an effect that a correct circuit simulation can be executed by omitting the trouble of obtaining another new model from the provider. It is done.

  According to the present invention, it is possible to obtain an effect that a more correct simulation result can be obtained by checking the result of the circuit simulation executed using the behavior model generated so as not to contradict the characteristics.

  Exemplary embodiments of a circuit simulation method, a circuit simulation program, and a circuit analysis device according to the present invention will be described below in detail with reference to the accompanying drawings. In the following, Example 1 will be described as an embodiment of a circuit analysis apparatus that implements a circuit simulation method according to the present invention, and then another embodiment (other example) included in the present invention will be described.

  In the following first embodiment, the outline and features of the circuit analysis device according to the first embodiment, the configuration and processing of the circuit analysis device will be described in order, and finally the effects of the first embodiment will be described.

[Outline and Features of Circuit Analysis Device (Example 1)]
First, the outline and features of the circuit analysis apparatus according to the first embodiment will be described with reference to FIG. FIG. 1 is a diagram for explaining the outline and features of the circuit analysis apparatus according to the first embodiment.

  The circuit analysis apparatus according to the first embodiment outlines the analysis of the characteristics of a circuit including an integrated circuit by executing a simulation, but it is possible to execute a correct circuit simulation using a behavior model. Has the main characteristics.

  The main feature will be specifically described. For example, when the circuit analysis apparatus according to the first embodiment receives input of LSI model data (behavior model) as model data of an integrated circuit used for circuit simulation, the received behavior model It is checked whether there is a problem in the consistency among the voltage-current characteristics, the transient characteristics, and the load characteristics, and if there is no problem in the consistency, it is determined that there is no contradiction in the characteristics (FIG. 1). (See (1)).

  When it is determined that there is a contradiction in the characteristics of the behavior model, the circuit analysis apparatus according to the first embodiment generates a correction model (see (2) in FIG. 1). Specifically, it is assumed that there is an error in any one of the voltage-current characteristics, transient characteristics, and load characteristics, which are behavior model characteristics, and the relationship between the voltage-current characteristics, transient characteristics, and load characteristics. A plurality of correction models are generated by correcting each characteristic so as to satisfy the consistency. The circuit analysis apparatus according to the first embodiment stores the generated correction models in the storage unit.

  After generating the respective correction models, the circuit analysis apparatus according to the first embodiment determines whether or not the correction performed for each characteristic is possible based on the correction allowable range data stored in advance (see (3) in FIG. 1). ).

  The circuit analysis apparatus according to the first embodiment uses the correction model determined as “correction is possible” as the LSI model data (behavior model) as a result of determining whether correction is possible, as an analysis model for performing circuit simulation. (See (4) in FIG. 1).

  After generating the analysis model, the circuit analysis apparatus according to the first embodiment executes circuit simulation using the generated analysis model (see (5) in FIG. 1).

  For this reason, the circuit analysis apparatus according to the first embodiment can execute a correct circuit simulation using a behavior model as described above.

[Configuration of Circuit Analysis Device (Example 1)]
Next, the configuration of the circuit analysis apparatus 10 according to the first embodiment will be described with reference to FIGS. FIG. 2 is a block diagram illustrating the configuration of the circuit analysis apparatus 10 according to the first embodiment.

  As illustrated in FIG. 1, the circuit analysis device 10 according to the first embodiment includes an input unit 11, an output unit 12, a storage unit 13, and a control unit 14.

  The input unit 11 is an input unit that receives an operation from a user and inputs various types of information. The input unit 11 includes a keyboard, a mouse, a microphone, and the like. For example, the input unit 11 receives an operation from the user and receives an integrated circuit (for example, an LSI). ) Is input the behavior model information. The monitor described later also realizes a pointing device function in cooperation with the mouse.

  The output unit 12 is an output unit that outputs various types of information, and includes a monitor (or a display, a touch panel) and a speaker. For example, the output unit 12 displays and outputs a simulation check result from a simulation result check unit 14f described later. .

  The storage unit 13 is a storage unit that stores data and programs necessary for various processes performed by the control unit 14, and particularly those closely related to the present invention include a correction model storage unit 13a and a correction allowable range data storage unit. 13b and an analysis model generation data storage unit 13c.

  The correction model storage unit 13a is a storage unit that stores various types of information related to the correction model generated by the correction model generation unit 14b described later.

  The correction allowable range data storage unit 13b is a storage unit that stores various types of information used for processing by the correction possibility determination unit 14c described later, voltage current correction allowable range data related to correction of voltage current characteristics, and correction of transient characteristics. And the transient characteristic correction allowable range data related to the load characteristic and the load characteristic correction allowable range data related to the correction of the load characteristic are stored.

  The voltage / current correction allowable range data, the transient characteristic correction allowable range data, and the load characteristic correction allowable range data will be specifically described with reference to FIGS. FIG. 3 is a diagram illustrating an example of voltage / current characteristic correction allowable range data. FIG. 4 is a diagram illustrating an example of transient characteristic correction allowable range data. FIG. 5 is a diagram illustrating an example of a waveform representing transient characteristics. FIG. 6 is a diagram illustrating an example of load characteristic correction allowable range data. FIG. 7 is a diagram illustrating an example of a straight line representing the load characteristics.

  As illustrated in FIG. 3, the correction allowable range data storage unit 13b includes, as voltage / current correction allowable range data, a variation allowable range of the shift amount (absolute value) in the current direction after correction with respect to the correction before correction, and after correction with respect to the correction before correction. Are stored in a tolerance range of variation in the voltage direction shift amount (absolute value) and a tolerance range of variation in the amount of enlargement or reduction before and after correction.

  Further, as illustrated in FIG. 4, the correction allowable range data storage unit 13 b accepts the variation in the center voltage (for example, “Vdc” illustrated in FIG. 5) of the waveform after correction as the transient characteristic correction allowable range data. The range and the amplitude (for example, “Vamp” shown in FIG. 5) of the waveform after correction with respect to the correction before the correction are stored and configured.

  Further, as illustrated in FIG. 6, the correction allowable range data storage unit 13 b performs, as load characteristic correction allowable range data, a variation allowable range of the terminal voltage after correction (for example, “Vterm” illustrated in FIG. 7) before correction. , And a variation allowable range of the load resistance (for example, “R_load” shown in FIG. 7) after the correction before the correction is stored.

  The analysis model generation data storage unit 13c is a storage unit that stores data used for generation of an analysis model in an analysis model generation unit 14d to be described later. For example, the analysis model generation data storage unit 13c is configured to store printed circuit board data in CAD data. Is done.

  The control unit 14 includes a predetermined control program, a program defining various processing procedures, and an internal memory for storing necessary data, and performs various processing using these, and is particularly suitable for the present invention. As closely related, the characteristic contradiction determination unit 14a, the correction model generation unit 14b, the correction availability determination unit 14c, the analysis model generation unit 14d, the circuit simulation execution unit 14e, and the simulation result check unit 14f Prepare.

  The characteristic contradiction determination unit 14a corresponds to the “characteristic inspection unit” described in the claims, and the correction model generation unit 14b corresponds to the “characteristic data correction unit” described in the claims, The correctability determination unit 14c also corresponds to the “correction determination unit” described in the claims, and the circuit simulation execution unit 14e corresponds to the “simulation unit” described in the claims.

  The characteristic contradiction determination unit 14 a is a processing unit that determines whether there is a contradiction in the characteristics of the behavior model received via the input unit 11. That is, the characteristic contradiction determination unit 14a checks whether there is a problem in the consistency among the voltage-current characteristic, the transient characteristic, and the load characteristic, which are the characteristics of the behavior model, and if there is no problem in the consistency, It is determined that there is no contradiction.

  The characteristic contradiction determination method of the characteristic contradiction determination unit 14a will be specifically described with reference to FIG. FIG. 8 is a diagram illustrating an example of a characteristic contradiction determination method. As shown in the figure, the characteristic contradiction determining unit 14a has a point where a curve representing the voltage-current characteristic on the pulldown side and a straight line representing the load characteristic intersect when the electronic circuit is driven LOW (for example, “A”). Output voltage value, and the output voltage value at the point (for example, “B”) where the curve representing the pull-up side voltage-current characteristic and the straight line representing the load characteristic intersect when driving High is a waveform representing the transient characteristic. When the first voltage value coincides with a point indicating the first voltage value (for example, “A ′”) and a point indicating the last voltage value (for example, “B ′”), the voltage-current characteristics, the transient characteristics, and the load characteristics Since there is no problem in the consistency between them, it is determined that there is no contradiction in the characteristics of the behavior model. On the other hand, when “A” and “A ′” and “B” and “B ′” do not match each other, the characteristic contradiction determination unit 14a adjusts the consistency between the voltage-current characteristic, the transient characteristic, and the load characteristic. Since there is a problem, it is determined that there is a contradiction in the characteristics of the behavior model.

  The correction model generation unit 14b is a processing unit that generates a correction model when the characteristic contradiction determination unit 14a determines that there is a contradiction in the behavior model. That is, the correction model generation unit 14b assumes that there is an error in any one of the voltage / current characteristics, the transient characteristics, and the load characteristics of the behavior model, and the consistency between the voltage / current characteristics, the transient characteristics, and the load characteristics. Are corrected so as to generate a plurality of correction models.

  The correction method of the correction model generation unit 14b will be specifically described with reference to FIGS. FIG. 9 is a diagram illustrating an example of a method for correcting voltage-current characteristics. FIG. 10 is a diagram illustrating an example of a voltage-current characteristic correction method. FIG. 11 is a diagram illustrating an example of a transient characteristic correction method. FIG. 12 is a diagram illustrating an example of a method for correcting load characteristics.

  When the correction model generation unit 14b generates a model in which the voltage / current characteristic is corrected on the assumption that there is an error in the voltage / current characteristic, a curve representing the LOW-side voltage / current characteristic in the behavior model as shown in FIG. And “A”, which is the intersection of the straight line representing the load characteristic, are translated to coincide with “A1”, and “B”, which is the intersection of the curve representing the high-side voltage-current characteristic and the straight line representing the load characteristic. Is translated to match “B1”, thereby generating a correction model satisfying the consistency among the voltage-current characteristics, the transient characteristics, and the load characteristics. As shown in FIG. 10, the correction model generation unit 14b multiplies a coefficient (for example, “mag”) to expand and contract a curve representing the voltage / current characteristic, thereby reducing the voltage / current characteristic, the transient characteristic, and the load. It is also possible to generate a correction model in which consistency between characteristics is satisfied.

  In addition, when the correction model generation unit 14b generates a model in which the transient characteristic is corrected assuming that there is an error in the transient characteristic, the first voltage value of the waveform representing the transient characteristic in the behavior model as illustrated in FIG. By reducing the waveform representing the transient characteristics so that “A ′” which is a point indicating “B ′” and “B ′” which is a point indicating the last voltage value are matched with “A2” and “B2”, respectively (case) To create a correction model that satisfies the consistency between voltage-current characteristics, transient characteristics, and load characteristics.

  When the correction model generation unit 14b generates a model in which the load characteristic is corrected assuming that there is an error in the load characteristic, as shown in FIG. 12, the straight line representing the load characteristic and the voltage-current characteristic in the behavior model are displayed. By rotating the straight line representing the load characteristic so that “A” and “B”, which are the intersections with the curve to be represented, coincide with “A3” and “B3”, respectively, the voltage-current characteristics, the transient characteristics, and the load characteristics A correction model satisfying the consistency of is generated.

  And the correction model production | generation part 14b stores each correction model produced | generated as mentioned above in the correction model memory | storage part 13a.

  The correction propriety determination unit 14c is a processing unit that determines the propriety of each correction model generated by the correction model generation unit 14b. More specifically, the correction possibility determination unit 14c includes voltage / current correction allowable range data regarding correction of voltage / current characteristics, transient characteristic correction allowable range data regarding correction of transient characteristics, and load characteristic correction allowable range regarding correction of load characteristics. Data is read from the correction allowable range data storage unit 13b. Then, the correction possibility determination unit 14c determines “correction is possible” when the numerical value in each characteristic after correction with respect to the correction is within the allowable range, and “correction content is not possible” when it is not within the allowable range. Is determined.

  The correction propriety determination will be described in detail for the voltage / current characteristic correction model, the transient characteristic correction model, and the load characteristic correction model. When determining whether or not the correction is possible for the correction model of the voltage / current characteristic, the correction propriety determination unit 14c has a shift amount in the current direction after correction with respect to the correction before correction within ± 5 mA (see FIG. 3), and When the shift amount in the voltage direction after the correction before the correction is within ± 100 mV (see FIG. 3), it is determined that “correction content is possible”. If the amount of enlargement or reduction before and after correction is within 0.95 to 1.05, it is determined that “correction content is possible”.

  In addition, when determining whether or not correction is possible for the correction model of the transient characteristic, the correction propriety determination unit 14c has a center voltage (for example, “Vdc” illustrated in FIG. 5) of the waveform after correction with respect to that before correction is ± 5%. And the amplitude of the waveform after correction (for example, “Vamp” shown in FIG. 5) is within ± 10% (see FIG. 4). It is determined that “correction content is possible”.

  In addition, when determining whether or not correction is possible for a correction model of load characteristics, the correction possibility determination unit 14c has a terminal voltage after correction (for example, “Vterm” illustrated in FIG. 7) within ± 5% ( If the load resistance after correction (for example, “R_load” shown in FIG. 7) is within ± 10% (see FIG. 4) It is determined as “Yes”.

  The analysis model generation unit 14d is a processing unit that generates an analysis model for executing a simulation by a circuit simulation execution unit 14e described later using the correction model determined as “possible correction content” by the correction determination unit 14c. is there.

  Specifically, the analysis model generation unit 14d reads out from the correction model storage unit 13a the correction models determined to be “corrected” by the correction determination unit 14c, and also prints the printed circuit board from the analysis model generation data storage unit 13c. Read data. Then, as illustrated in FIG. 13, the analysis model generation unit 14d converts an analysis model including a printed circuit board model generated from the printed circuit board data and a driver model corresponding to any one of the correction models into the correction model. Generate as many as each. FIG. 13 is a diagram illustrating an example of an analysis model.

  The circuit simulation execution unit 14e is a processing unit that executes a circuit simulation using each analysis model generated by the analysis model generation unit 14d and acquires a simulation result.

  The simulation result check unit 14f is a processing unit that checks the waveform quality and timing of each simulation result acquired by the circuit simulation execution unit 14e.

  The waveform quality and timing check by the simulation result check unit 14f will be specifically described with reference to FIGS. FIG. 14 is a diagram for explaining the waveform quality check. FIG. 15 is a diagram illustrating an example of a waveform quality check result using an actual tool. FIG. 16 is a diagram for explaining the timing check. FIG. 17 is a diagram illustrating an example of a timing check result using an actual tool. FIG. 18 is a diagram illustrating a display example of a simulation check result when an actual tool is used. FIG. 19 is a diagram illustrating details of the simulation check result.

  As shown in FIG. 14, the simulation result check unit 14f is configured to receive the upper limit value (s_overshot (High)) of the voltage that should not be exceeded and the line that should not be broken while the threshold voltage High side data is received on the High side ( Vth (High)), a line that should not be divided while the threshold voltage Low side data is being received on the Low side (Vth (Low)), and a lower limit value of the voltage that should not be exceeded (s_overshot (Low)) Then, the waveform quality is checked by checking whether the voltage value of the waveform obtained as a simulation result is within the specified value. FIG. 15 shows an example of a check result of waveform quality using an actual tool.

  [OS / US] shown in FIG. 15 is an item indicating the check result of the upper limit value and the lower limit value of the voltage, and [CRACK] shown in FIG. 15 is the voltage Vth (High) and Vth (Low). This item indicates the check result.

  Also, as shown in FIG. 16, the simulation result check unit 14f receives the input signal within the received clock time including the setup time when the input signal must be stabilized and the hold time when the input signal should not be changed. A timing check is performed by inspecting whether or not the voltage is likely to cause a change from “High” to “Low” or from “Low” to “High”. FIG. 17 shows an example of a timing check result using an actual tool. Note that [TMGCHK] illustrated in FIG. 17 is an item indicating a timing check result.

  Then, the simulation result check unit 14f outputs a summary of the waveform quality and timing check result of each simulation result (see FIG. 18) and details of the simulation check result for each correction method (see FIG. 19) to the output unit 12. To do. Here, the details of the simulation check result will be described. As shown in FIG. 19, “NO1-1 VIL” of “transient characteristic correction” and “Delay Chk Min” of “VI characteristic current correction” are NG. Therefore, NG is displayed at the corresponding location in FIG. “NOISE VIL” corresponds to the check result of Vth (Low), and “Delay Chk Min” is one item included in the timing check result.

[Processing by Circuit Analysis Device (Example 1)]
Next, processing performed by the circuit analysis apparatus according to the first embodiment will be described with reference to FIG. FIG. 20 is a flowchart illustrating a process flow of the circuit analysis apparatus according to the first embodiment.

  As shown in the figure, the characteristic contradiction determination unit 14a determines whether there is a contradiction in the characteristics of the behavior model received via the input unit 11 (step S2001). When the characteristic contradiction determination unit 14a determines that there is a problem in the consistency between the voltage / current characteristic, the transient characteristic, and the load characteristic, which are the characteristics of the behavior model, and there is a contradiction in the characteristics of the behavior model (step (Yes in S2001), the correction model generation unit 14b generates a correction model (step S2002). On the other hand, when the characteristic contradiction determination unit 14a determines that there is no contradiction in the characteristics of the behavior model (No in step S2001), the characteristic contradiction determination unit 14a proceeds to step 2004 described later.

  That is, the correction model generation unit 14b assumes that there is an error in any one of the voltage / current characteristics, the transient characteristics, and the load characteristics of the behavior model, and the consistency between the voltage / current characteristics, the transient characteristics, and the load characteristics. Are corrected so as to generate a plurality of correction models.

  When the generation of the correction model is completed by the correction model generation unit 14b, the correction availability determination unit 14c determines whether each correction model generated by the correction model generation unit 14b is possible (step S2003). More specifically, the correction possibility determination unit 14c includes voltage / current correction allowable range data regarding correction of voltage / current characteristics, transient characteristic correction allowable range data regarding correction of transient characteristics, and load characteristic correction allowable range regarding correction of load characteristics. Data is read from the correction allowable range data storage unit 13b. Then, the correction possibility determination unit 14c determines “correction is possible” when the numerical value in each characteristic after correction with respect to the correction is within the allowable range, and “correction content is not possible” when it is not within the allowable range. Is determined.

  Then, the analysis model generation unit 14d generates an analysis model for executing a simulation in a circuit simulation execution unit 14e described later using the correction model determined as “possible correction content” by the correction availability determination unit 14c ( Step S2004).

  Specifically, the analysis model generation unit 14d reads out from the correction model storage unit 13a the correction models determined to be “corrected” by the correction determination unit 14c, and also prints the printed circuit board from the analysis model generation data storage unit 13c. Read data. Then, as illustrated in FIG. 13, the analysis model generation unit 14d converts an analysis model including a printed circuit board model generated from the printed circuit board data and a driver model corresponding to any one of the correction models into the correction model. Generate as many as each.

  Next, the circuit simulation execution unit 14e executes a circuit simulation using each analysis model generated by the analysis model generation unit 14d (step S2005), and acquires a simulation result.

  Subsequently, the simulation result check unit 14f checks the waveform quality and timing of each simulation result acquired by the circuit simulation execution unit 14e (step S2006).

  For example, as shown in FIG. 14, the simulation result check unit 14f should not divide the upper limit voltage (s_overshot (High)) that should not be exceeded and threshold voltage High side data while receiving the High side data. The line (Vth (High)), the line that should not be divided while the threshold voltage Low side data is being received on the Low side (Vth (Low)), and the lower limit value of the voltage that should not be exceeded (s_overshot (Low)) Based on the above, the waveform quality is checked by checking whether the voltage value of the waveform obtained as a simulation result is within the specified value.

  Also, as shown in FIG. 16, the simulation result check unit 14f receives the input signal within the received clock time including the setup time when the input signal must be stabilized and the hold time when the input signal should not be changed. A timing check is performed by inspecting whether or not the voltage is likely to cause a change from “High” to “Low” or from “Low” to “High”.

  Then, the simulation result check unit 14f provides the output unit 12 with a summary of the waveform quality and timing check results of each simulation result (see FIG. 18) and details of the simulation check results for each correction method (see FIG. 19). Output (step S2007).

[Effects of Example 1]
As described above, according to the first embodiment, even if there is a contradiction in the electrical characteristics (for example, voltage-current characteristics, transient characteristics, and load characteristics) of the obtained behavior model, matching between the characteristics is achieved. Since the circuit simulation is executed using the correction model generated in such a manner that the performance is satisfied, an effect that the correct circuit simulation can be executed is obtained.

  Further, according to the first embodiment, the circuit simulation is executed using the correction model generated so that the consistency between the characteristics is satisfied, so that it is not necessary to obtain another new model from the provider. Thus, an effect that a correct circuit simulation can be executed is obtained.

  Further, according to the first embodiment, since the result of the circuit simulation executed using the correction model generated so that the consistency between the characteristics is satisfied is checked, a more accurate simulation result can be obtained. An effect is obtained.

  Although the embodiments of the present invention have been described so far, the present invention may be implemented in various different forms other than the embodiments described above. Accordingly, examples of other embodiments included in the present invention will be described below.

(1) Device Configuration, etc. Each component of the circuit analysis device 10 shown in FIG. 2 is functionally conceptual and does not necessarily need to be physically configured as illustrated. In other words, the specific form of distribution / integration of the circuit analysis device 10 is not limited to the one shown in the figure. For example, all or part of the circuit analysis execution unit 14e and the simulation result check unit 14f may be integrated in various ways. Depending on the load, usage conditions, etc., any unit can be functionally or physically distributed and integrated. Further, each processing function (see FIG. 20 and the like) performed in the circuit analysis device 10 is realized by a CPU and a program that is analyzed and executed by the CPU, or wired logic. It can be realized as hardware.

(2) Circuit Simulation Program By the way, various processes (see FIG. 20 and the like) of the circuit analysis apparatus 10 described in the above embodiment are executed by a computer system such as a personal computer or a workstation. Can be realized. In the following, an example of a computer that executes a circuit simulation program having the same function as that of the above embodiment will be described with reference to FIG. FIG. 21 is a diagram illustrating a computer that executes a circuit simulation program.

  As shown in the figure, a computer 20 as a circuit analysis device is configured by connecting an input unit 21, an output unit 22, an HDD 23, a RAM 24, and a CPU 25 via a bus 30.

  Here, the input unit 21 receives input of various data from the user. The output unit 22 displays various information. The HDD 23 stores information necessary for the CPU 25 to execute various processes. The RAM 24 temporarily stores various information. The CPU 25 executes various arithmetic processes.

  As shown in FIG. 21, the HDD 23 has a circuit simulation program 23 a that exhibits the same function as each processing unit of the circuit analysis apparatus 10 shown in the above embodiment, and an input from the user via the input unit 21. The circuit simulation data 23b to be executed is stored in advance. Note that the circuit simulation program 23a may be appropriately distributed and stored in a storage unit of another computer that is communicably connected via a network.

  Then, the CPU 25 reads out the circuit simulation program 23a from the HDD 23 and develops it in the RAM 24, whereby the circuit simulation program 23a functions as a circuit simulation execution process 24a as shown in FIG. Then, the circuit simulation execution process 24a reads the circuit simulation data 23b and the like from the HDD 23, expands them in an area allocated to itself in the RAM 24, and executes various processes based on the expanded data and the like. The circuit simulation execution process 24a includes a characteristic contradiction determination unit 14a, a correction model generation unit 14b, a correction availability determination unit 14c, an analysis model generation unit 14d, and a circuit simulation execution of the circuit analysis device 10 illustrated in FIG. Respectively correspond to the unit 14e and the simulation result check unit 14f.

  The circuit simulation program 23a described above does not necessarily need to be stored in the HDD 23 from the beginning. For example, a flexible disk (FD), a CD-ROM, a DVD disk, a magneto-optical disk, an IC inserted into the computer 20 can be used. Each program is stored in a “portable physical medium” such as a card, and “another computer (or server)” connected to the computer 20 via a public line, the Internet, a LAN, a WAN, or the like. The computer 20 may read and execute each program from these.

  As described above, the circuit simulation method, the circuit simulation program, and the circuit analysis apparatus according to the present invention are useful for analyzing the characteristics of a circuit including an integrated circuit, and in particular, execute a correct circuit simulation using a behavior model. Suitable for doing.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram for explaining an overview and features of a circuit analysis device according to a first embodiment. 1 is a block diagram illustrating a configuration of a circuit analysis device according to a first embodiment. It is a figure which shows an example of voltage-current characteristic correction | amendment tolerance range data. It is a figure which shows an example of transient characteristic correction | amendment allowable range data. It is a figure which shows an example of the waveform showing a transient characteristic. It is a figure which shows an example of load characteristic correction | amendment allowable range data. It is a figure which shows an example of the straight line showing a load characteristic. It is a figure which shows an example of the characteristic contradiction determination method. It is a figure which shows an example of the correction method of a voltage current characteristic. It is a figure which shows an example of the correction method of a voltage current characteristic. It is a figure which shows an example of the correction method of a transient characteristic. It is a figure which shows an example of the correction method of a load characteristic. It is a figure which shows an example of an analysis model. It is a figure for demonstrating the check of waveform quality. It is a figure which shows an example of the check result of the waveform quality using an actual tool. It is a figure for demonstrating a timing check. It is a figure which shows an example of the timing check result at the time of using an actual tool. It is a figure which shows the example of a display of the simulation check result at the time of using an actual tool. It is a figure which shows the detail of a simulation check result. 3 is a flowchart illustrating a process flow of the circuit analysis apparatus according to the first embodiment. It is a figure which shows the computer which performs a circuit simulation program.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Circuit analyzer 11 Input part 12 Output part 13 Storage part 13a Correction model storage part 13b Correction tolerance range data storage part 13c Analysis model generation data storage part 14 Control part 14a Characteristic contradiction determination part 14b Correction model generation part 14c Correction possibility determination part 14d Analysis model generation unit 14e Circuit simulation execution unit 14f Simulation result check unit 20 Computer (circuit analysis device)
21 Input unit 22 Output unit 23 HDD (Hard Disk Drive)
23a Circuit simulation program 23b Circuit simulation data 24 RAM (Random Access Memory)
24a Circuit simulation execution process 25 CPU (Central Processing Unit)
30 bus

Claims (7)

A circuit simulation method performed by a circuit analysis device that analyzes characteristics of a circuit including an integrated circuit,
A characteristic inspection step of inspecting consistency between one of the plurality of output characteristics of the integrated circuit and a combination of the other output characteristics;
If it is determined that there is a problem with the consistency, a correction is performed on one of the characteristic data to generate an output model of the integrated circuit, and the correction is performed for each of the characteristic data so that a plurality of the output models are generated. And a characteristic data correction step for storing the generated plurality of output models in the storage unit ,
Whether or not the corrected characteristic data for the characteristic data before correction in each of the plurality of output models stored in the storage unit is within a predetermined upper limit and lower limit predetermined for each characteristic data A correction propriety determination step for determining
Each of the output models determined that the characteristic data after correction with respect to the characteristic data before correction is within a predetermined upper limit and lower limit predetermined for each characteristic data is read from the storage unit and read. A simulation step of simulating the circuit using each of the output models ;
A circuit simulation method characterized by comprising: The characteristic data includes a LOW voltage current characteristic that is a voltage-current characteristic on the pull-down side when the integrated circuit is driven LOW , and a HIGH voltage current that is a voltage-current characteristic on the pull-up side when the integrated circuit is driven HIGH. 2. The circuit simulation method according to claim 1, wherein the circuit simulation method includes a characteristic , a load characteristic indicating a relationship between an output voltage and an output current of the integrated circuit, and a transient characteristic indicating a relationship between time and the output voltage of the integrated circuit . The characteristic data correction step, numerical values indicating the LOW voltage-current characteristic, the circuit simulation method according to claim 2, characterized in that each Kakeawaseru the coefficient correction number indicating the HIGH voltage-current characteristic. The characteristic data correction step, the curve indicating the LOW voltage-current characteristic in a coordinate system output voltage and output current to the horizontal and vertical axes respectively of the integrated circuit, and the output voltage of the curve showing the HIGH voltage-current characteristic 3. The circuit simulation method according to claim 2, wherein a correction for displacement in a direction and an output current direction is performed. Further , a plurality of the above-described output models determined using the output model determined that the corrected characteristic data with respect to the characteristic data before correction are within a predetermined upper limit and lower limit predetermined for each of the characteristic data Whether each output value by the simulation takes an upper limit value and a lower limit value of a predetermined range that are predetermined for each output value, and is constant for a predetermined period that is predetermined for each output value circuit simulation method according to claim 1, characterized by a simulation test step for inspecting the results of a plurality of the simulation by determining. On the computer,
A characteristic checking step for checking consistency between one of the plurality of output characteristics of the integrated circuit and another combination of the output characteristics;
If it is determined that there is a problem with the consistency, a correction is performed on one of the characteristic data to generate an output model of the integrated circuit, and the correction is performed for each of the characteristic data so that a plurality of the output models are generated. And a characteristic data correction step for storing the generated plurality of output models in the storage unit ,
Whether or not the corrected characteristic data for the characteristic data before correction in each of the plurality of output models stored in the storage unit is within a predetermined upper limit and lower limit predetermined for each characteristic data A correction propriety determination step for determining
Each of the output models determined that the characteristic data after correction with respect to the characteristic data before correction is within a predetermined upper limit and lower limit predetermined for each characteristic data is read from the storage unit and read. A simulation step of simulating a circuit including the integrated circuit using each of the output models ;
A circuit simulation program characterized in that A circuit analysis device for analyzing characteristics of a circuit including an integrated circuit,
A characteristic inspection unit for inspecting consistency between one of the plurality of output characteristics of the integrated circuit and a combination of the other output characteristics;
If it is determined that there is a problem with the consistency, a correction is performed on one of the characteristic data to generate an output model of the integrated circuit, and the correction is performed for each of the characteristic data so that a plurality of the output models are generated. And a characteristic data correction unit that stores the generated plurality of output models in the storage unit ,
Whether or not the corrected characteristic data for the characteristic data before correction in each of the plurality of output models stored in the storage unit is within a predetermined upper limit and lower limit predetermined for each characteristic data A correction propriety determination unit for determining
Each of the output models determined that the characteristic data after correction with respect to the characteristic data before correction is within a predetermined upper limit and lower limit predetermined for each characteristic data is read from the storage unit and read. A simulation unit for simulating the circuit using each of the output models ;
A circuit analysis apparatus comprising:

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