JP4967657B2 - Group III nitride semiconductor optical device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a semiconductor optical device including a current confinement layer.

  Group III nitride semiconductors typified by gallium nitride have been attracting attention as materials for light emitting diodes (LEDs) and laser diodes (laser diodes, LDs) because of their high-efficiency blue-violet emission. It was. In particular, LD is expected as a light source for a large-capacity optical disk apparatus. In recent years, development of a high-power LD as a light source for writing has been vigorously advanced. In application to optical disks, it is necessary to adjust the beam shape in order to narrow the laser beam into a spot shape. For this reason, lateral mode control is important. In order to increase the output, it is important to increase the carrier injection efficiency. Furthermore, high-frequency characteristics have become important as the transfer rate of optical disks increases, and it is necessary to reduce the element resistance and the parasitic capacitance of the element as much as possible.

  Ridge type LDs are widely used as nitride LD structures for realizing these. The LD having a ridge structure includes a ridge formed by dry etching on the LD structure. The upper portion of the ridge is covered with an insulating film having a stripe-shaped opening, and a p-type electrode is provided in the opening. The current confinement is made by a striped electrode, and the transverse mode is controlled by adjusting the ridge width and ridge height.

  On the other hand, an embedded structure type LD has been proposed as a structure for realizing current confinement more efficiently than a ridge type LD. FIG. 2 is a diagram showing the structure of an embedded structure type (inner stripe type) LD described in Patent Document 1: Japanese Patent Laid-Open No. 11-261160. In this semiconductor laser, in a nitride-based compound semiconductor laser device 300 having an active layer 305 sandwiched between an n-type first cladding layer 304 and a p-type second cladding layer 307, an amorphous layer is formed on the active layer 305. Alternatively, a high resistance layer made of a polycrystalline nitride-based compound semiconductor layer is grown, and a stripe-shaped opening 320 is formed by wet etching to form the current confinement layer 308. Alternatively, the second clad layer is irradiated with charged particles except for the stripe portion, and carrier traps are formed at a high density to form a high-resistance current confinement layer 308. Carrier injection efficiency is improved by the current confinement layer 308.

  However, both the ridge type and the embedded structure type have a problem that it is difficult to obtain sufficient adhesion of the upper electrode.

  Japanese Patent Application Laid-Open No. 2003-347238 describes a technique for improving electrode adhesion in a ridge type LD. FIG. 3 is a diagram showing a semiconductor laser described in Japanese Patent Laid-Open No. 2003-347238. In this semiconductor laser, minute irregularities are formed in the p-type GaN contact layer 28 to improve the adhesion of the p-side electrode 36. The unevenness is formed as follows.

In FIG. 3, when the p-type GaN contact layer 28 is grown after the p-type AlGaN cladding layer 26 is grown, the p-type GaN contact layer 28 having a predetermined film thickness is first grown at a substrate temperature of about 1,000 ° C. Let When the growth of the p-type GaN contact layer 28 is completed, the substrate temperature is changed to 1,000 ° C. over 1 to 2 minutes while TMG, TMI, MeCp ₂ Mg, and NH ₃ gas are continuously supplied to the deposition chamber. The temperature is lowered to 700 ° C. and maintained at 700 ° C. for 5 to 60 seconds. Next, the supply of TMG, TMI, and MeCp ₂ Mg is stopped, and the temperature is lowered to room temperature while supplying only the NH ₃ gas, thereby completing the formation of the stacked structure. By doing so, groove-like recesses having a typical depth of 1 to 2 nm are formed on the outermost surface of the formed p-type GaN contact layer 28 in an irregular network shape at intervals of several tens to several hundreds of nm. An extended structure is formed.

Thereafter, stripe ridges 30 and mesas 32 are formed in the same manner as in the conventional method, and SiO ₂ films 34 are formed on both side surfaces of the ridge 30 and the remaining layers of the p-type AlGaInN cladding layer 26. Subsequently, a p-side electrode 36 is provided on the p-type GaN contact layer 28, and an n-side electrode 38 is provided on the n-type GaN contact layer 16. As a result, a GaN-based semiconductor laser device in which the operating voltage is low, the adhesion and adhesion between the metal film of the p-side electrode 36 and the p-type GaN contact layer is improved, and the p-side electrode 36 is difficult to peel off can be manufactured. It is said that.

Japanese Patent Application Laid-Open No. 11-16852 describes a technique for improving electrode adhesion by providing irregularities on an electrode base. FIG. 4 shows the semiconductor laser disclosed in this document. As shown, this is a ridge type semiconductor laser (LD), not an inner stripe type. In the figure, 1 is a substrate, 2 is a buffer layer, 3 is an undoped GaN layer, 4 is an AlGaN layer, 5 is an Mg-doped p-type GaN layer, and 6 is a p-electrode. After the p-type GaN layer 5 is formed, Au is vapor-deposited on the surface, and a photoresist pattern is formed thereon by photolithography. Next, the exposed Au portion is removed by etching, and a structure in which only a necessary portion is exposed with p-type GaN and the others are covered with Au is produced. By subjecting the sample with the Au mask to wet etching with a molten salt of ammonium dihydrogen phosphate (NH ₄ H ₂ PO ₄ ), many hexagonal column-shaped etch pits are formed. A p-electrode 6 is formed thereon to obtain the illustrated structure.

However, JP 2003-347238 discloses, in the technique described in JP-A-11-16852 Patent Gazette, it is difficult to sufficiently improve the electrode adhesion. Further, it has been difficult to sufficiently reduce the element resistance.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to improve the adhesion of the upper electrode and reduce the device resistance in a group III nitride semiconductor optical device including a current confinement layer therein.

According to the present invention, a semiconductor layer made of a group III nitride semiconductor, a current confinement layer having a predetermined opening provided on the semiconductor layer, an uneven surface provided on the semiconductor layer and the opening, A group III nitride semiconductor optical device, in particular, comprising: a contact layer having a contact layer; and an electrode provided on the uneven surface of the contact layer.
A semiconductor layer made of a group III nitride semiconductor, a current confinement layer provided on the semiconductor layer and having a predetermined opening, and provided on the current confinement layer and the opening provided on the semiconductor layer And a portion formed on the current confinement layer includes a contact layer having a concavo-convex surface, and an electrode provided on an upper surface of the contact layer having the concavo-convex surface portion. A semiconductor optical device is provided.

According to the present invention, the electrode is provided on the uneven surface of the contact layer. Therefore, excellent electrode adhesion can be obtained, and the element resistance can be effectively reduced. The group III nitride semiconductor refers to a semiconductor having a group III element and nitrogen as constituent elements. As a typical example, a semiconductor represented by a general formula In _x Ga _y Al _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1) (hereinafter referred to as a GaN-based semiconductor) Is mentioned.

  In the present invention, the contact layer may have a shape extending in a horizontal direction along the uneven surface at the upper part of the current confinement layer. According to this configuration, since the contact layer has a cross-sectional shape along the uneven surface above the current confinement layer, a current flows in the contact layer along the uneven surface. For this reason, current injected from a wide range of electrodes can be collected in the opening, and an element having good IV characteristics can be realized with low element resistance.

  In the present invention, the contact layer may be formed continuously from a region above the current confinement layer to a region above the opening. According to this configuration, when current flows in the contact layer, current can be collected not only from the electrode part provided above the opening but also from the electrode part above the current confinement layer, and the low element resistance. Thus, an element having good IV characteristics can be realized.

  In the present invention, the contact layer may have a concavo-convex surface above the current confinement layer and a flat surface above the opening. According to this configuration, since the electrode is provided on the uneven surface of the contact layer, excellent electrode adhesion can be obtained, and the element resistance can be effectively reduced. On the other hand, since the contact layer surface is flat in the energization region provided with the opening, it is possible to energize suitably in the stacking direction. That is, the unevenness does not adversely affect the crystal that directly contributes to laser oscillation.

In the present invention, the contact layer can be composed of In _a Ga _b Al _1-ab N (0 ≦ a ≦ 1, 0 ≦ b ≦ 1, a + b ≦ 1). The current constriction layer _may be composed of _{In x Ga y Al 1-x} -y N (0 ≦ x ≦ 1,0 ≦ y ≦ 1, x + y ≦ 1).

  In the present invention, the root mean square roughness of the uneven surface can be larger than the thickness of the contact layer. The root mean square roughness of the uneven surface is preferably 10 nm or more, more preferably 100 nm or more. There is no particular upper limit, but a thickness of 1 μm or less is sufficient. By making such irregularities, excellent electrode adhesion can be obtained.

  The uneven surface may be constituted by a crystal plane. In this way, since contact with the electrode is made through the crystal plane, low device resistance can be stably realized. As the crystal plane, when the contact layer is made of GaN or AlGaN, it can be a (1-101) plane when the contact layer surface is a (0001) plane. In addition, if the uneven surface is a crystal growth surface instead of a surface formed by etching, damage to the contact layer or the like due to etching can be avoided, and the contact layer is formed extending in the horizontal direction from the electrode. The current collecting effect is improved and the element resistance can be sufficiently reduced.

  The uneven surface may include a hexagonal pyramid pit. By doing so, hexagonal pyramidal pits are formed, so that excellent electrode adhesion and good element resistance can be obtained.

In the present invention, a clad layer having a superlattice structure is provided between the current confinement layer and the contact layer, and the thin layer constituting the superlattice structure has a shape extending in the horizontal direction along the uneven surface It is good. By doing so, the current collection efficiency from the electrodes is remarkably improved, and a low element resistance is realized.
The element of the present invention can be applied to various elements. For example, a structure including an active layer under the semiconductor layer may be employed. Thereby, it is suitably applied to a light emitting diode, a semiconductor laser, and the like.

  Furthermore, according to the present invention, a step of forming a semiconductor layer made of a group III nitride semiconductor on the substrate, a step of forming a current confinement layer having a predetermined opening on the semiconductor layer, and the semiconductor Forming a contact layer having a concavo-convex surface by growing a group III nitride semiconductor at a growth temperature of 1,000 ° C. or less on the layer and the opening, and forming an electrode on the concavo-convex surface of the contact layer There is provided a method for manufacturing a group III nitride semiconductor optical device.

  According to this manufacturing method, it is possible to stably manufacture a semiconductor laser having excellent electrode adhesion and effectively reduced element resistance.

  According to the present invention, the electrode is provided on the uneven surface of the contact layer. Therefore, excellent electrode adhesion can be obtained, and the element resistance can be effectively reduced.

FIG. 1 is a sectional view schematically showing the structure of an inner stripe type semiconductor laser according to an embodiment of the present invention. FIG. 2 is a cross-sectional view schematically showing the structure of a conventional inner stripe type semiconductor laser. FIG. 3 is a cross-sectional view schematically showing the structure of a conventional ridge type semiconductor laser. FIG. 4 is a cross-sectional view schematically showing the structure of a conventional semiconductor laser. FIG. 5 is a cross-sectional view schematically showing the structure of a semiconductor laser having an uneven surface formed by etching. FIG. 6 is a diagram schematically illustrating the unevenness formed on the contact layer surface in the inner stripe type semiconductor laser according to the embodiment of the present invention. FIG. 7 is a cross-sectional view schematically showing the structure of the AlGaN / GaN superlattice cladding layer in the inner stripe type semiconductor laser according to the embodiment of the present invention. FIG. 8 is a cross-sectional view schematically showing the structure of an AlGaN / GaN superlattice cladding layer formed at an optimum temperature, which is used when an uneven surface is formed by etching. The symbols shown in the figure have the following meanings.

DESCRIPTION OF SYMBOLS 10 GaN semiconductor laser element 12 Sapphire substrate 14 GaN-ELO structure layer 16 n-type GaN contact layer 18 n-type AlGaN clad layer 20 n-type GaN guide layer 22 Active layer of GaInN multiple well (MQW) structure 24 p-type GaN guide layer 26 p-type AlGaN cladding layer 28 p-type GaN contact layer 30 striped ridge 32 mesa 34 SiO ₂ film 36 p-side electrode 38 n-side electrode 101 n-type electrode 102 n-type GaN substrate 103 Si-doped n-type GaN layer 104 Si-doped n-type AlGaN cladding layer 105 Si-doped n-type GaN optical confinement layer 106 InGaN MQW active layer 107 Mg-doped p-type AlGaN cap layer 108 Mg-doped p-type GaN optical confinement layer 109 AlN current confinement layer 110 Mg-doped p-type AlGaN cladding layer 111 Mg-doped p-type GaN contact layer 112 p-type electrode 401 Semiconductor surface 402 Hexagonal hole 501 Mg-doped p-type AlGaN / GaN superlattice cladding layer

  Hereinafter, the present invention will be described in more detail based on examples.

[Example 1]
An inner stripe type semiconductor laser according to the present embodiment will be described with reference to FIG. In this semiconductor laser, an Si-doped n-type GaN layer 103 (Si concentration 4 × 10 ¹⁷ cm ⁻³ , thickness 1 μm), Si-doped n-type Al _0.1 Ga _0.9 N (Si concentration 4 × ¹⁰ 17 ^{cm -3,} n-type clad layer 104 having a thickness of 2 [mu] m), Si-doped n-type GaN (Si concentration 4 × ¹⁰ 17 ^{cm -3,} n-type light confinement layer having a thickness of 0.1 [mu] m) 105, 3 consisting of an In _0.15 Ga _0.85 N (thickness 3 nm) well layer and a Si-doped In _0.01 Ga _0.99 N (Si concentration 1 × 10 ¹⁸ cm ⁻³ , thickness 4 nm) barrier layer Multiple quantum well (MQW) layer 106 having two well layers, a cap layer 107 made of Mg-doped p-type Al _0.2 Ga _0.8 N, Mg-doped p-type GaN (Mg concentration 2 × 10 ¹⁹ cm ⁻³ , thickness 0.1μ ) Is p-type GaN guide layer 108 made of having a structure laminated. On top of this, an AlN current confinement layer 109, a p-type cladding layer 110 made of Mg-doped p-type Al _0.1 Ga _0.9 N (Mg concentration 1 × 10 ¹⁹ cm ⁻³ , thickness 0.5 μm), Mg A contact layer 111 made of doped p-type GaN (Mg concentration 1 × 10 ²⁰ cm ⁻³ , thickness 0.02 μm) is laminated. Concavities and convexities having a root mean square roughness of about 150 nm are formed on the upper surface of the contact layer 111.

  A method for manufacturing this semiconductor laser will be described below.

For the production of the element structure, a 300 hPa reduced pressure MOVPE (metal organic vapor phase epitaxy) apparatus was used. As a carrier gas, a mixed gas of hydrogen and nitrogen was used, and trimethylgallium (TMG), trimethylaluminum (TMA), and trimethylindium (TMI) were used as Ga, Al, and In sources, respectively. Silane (SiH ₄ ) was used as the n-type dopant, and biscyclopentadienyl magnesium (Cp ₂ Mg) was used as the p-type dopant.

  First, an n-type GaN substrate 102 is prepared. As the n-type GaN substrate 102, a 100 μm-thick n-type GaN (0001) substrate manufactured by the FIELO method (A. Usui et al., Jpn. J. Appl. Phys., 36, L899 (1997)) was used.

  On this GaN substrate, an active layer, an n-type cladding layer, a p-type cladding layer, and low-temperature AlN growth for current confinement are performed. Hereinafter, this process is referred to as an “active layer growth process”.

After the n-type GaN substrate 102 is put into the growth apparatus, the temperature of the substrate is raised while supplying NH ₃ , and growth is started when the growth temperature is reached. Si-doped n-type GaN layer 103, n-type cladding layer 104 made of Si-doped n-type Al _0.1 Ga _0.9 N, n-type optical confinement layer 105 made of Si-doped n-type GaN, In _0.15 Ga _0. A multi-quantum well layer 106 having three well layers composed of an ₈₅ N well layer and a Si-doped In _0.01 Ga _0.99 N barrier layer, and a cap layer composed of Mg-doped p-type Al _0.2 Ga _0.8 N 107, A p-type optical confinement layer 108 made of Mg-doped p-type GaN is sequentially deposited.

GaN growth is performed at a substrate temperature of 1,080 ° C., a TMG supply rate of 58 μmol / min, and an NH ₃ supply rate of 0.36 mol / min. AlGaN growth is performed at a substrate temperature of 1,080 ° C., a TMA supply rate of 36 μmol / min, and a TMG supply. The amount is 58 μmol / min and the NH ₃ supply rate is 0.36 mol / min. In the InGaN MQW growth, the substrate temperature is 800 ° C., the TMG supply rate is 8 μmol / min, and NH _{3 is} 0.36 mol / min. The TMIn supply rate is 48 μmol / min for the well layer and 3 μmol / min for the barrier layer.

After depositing these structures, the substrate temperature is subsequently lowered to a predetermined temperature, and a low-temperature grown AlN layer (which will later become the current confinement layer 109) is deposited. The deposition temperature of the low temperature growth AlN layer is desirably 200 ° C. or higher and 600 ° C. or lower. Here, the deposition temperature (substrate temperature) was 300 ° C. The supply amounts of TMA and NH ₃ are 36 μmol / min and 0.36 mol / min, respectively, and the deposited film thickness is 0.1 μm.

Next, a stripe opening is formed in the low temperature growth AlN layer. Hereinafter, this process is referred to as a “stripe formation process”. After depositing 100 nm of SiO ₂ on the AlN layer and applying a resist, a stripe pattern having a width of 2 μm is formed on the resist by photolithography. Next, SiO ₂ is etched with buffered hydrofluoric acid using the resist as a mask, and then the resist is removed with an organic solvent and washed with water. The AlN layer is not etched or damaged in each step of buffered hydrofluoric acid, organic solvent, and water washing. Next, it intends row etching of low temperature growth AlN layer of SiO ₂ as a mask. As the etching solution, a solution in which phosphoric acid and sulfuric acid are mixed at a volume ratio of 1: 1 is used. The AlN layer in the region not covered with the SiO ₂ mask is removed by etching for 10 minutes in the above solution kept at 80 ° C., and a stripe-shaped opening is obtained. Further, SiO ₂ used as a mask with buffered hydrofluoric acid is removed to obtain a structure having a stripe-shaped opening having a width of 2 μm in the AlN layer.

The etching solution for the low temperature growth AlN layer can be nitric acid heated to 80 ° C. or higher, but from the viewpoint of controllability, phosphoric acid heated to 50 ° C. or higher and 200 ° C. or lower, preferably 80 ° C. to 120 ° C. is used. A solution containing is preferred. With these solutions, the low-temperature grown AlN layer has a thickness of 1 to 30 nm / min. Etching is performed at an etching rate of the order. On the other hand, crystalline GaN and AlGaN are not etched. Thereby, only the low temperature growth AlN layer is etched with high selectivity. In addition, isotropic etching is realized with amorphous AlN because the etching rate does not depend on the plane orientation as seen with single crystal AlN. As a result, side etching during the formation of the LD stripe can be suppressed. Although in the above embodiment using SiO ₂ as an etching mask of the AlN layer, as long as the material is not attacked by an etchant may be used an organic substance containing SiNx or resist.

The embedded regrowth of the p-type AlGaN cladding layer is performed on the sample having the stripe opening obtained as described above. Hereinafter, this process is referred to as a “p-cladding regrowth process”. After charging the MOVPE apparatus, the temperature is raised to 980 ° C., which is the growth temperature, at an NH ₃ supply rate of 0.36 mol / min. After reaching 980 ° C., the p-type cladding layer 110 made of Mg-doped p-type Al _0.1 Ga _0.9 N (Mg concentration 1 × 10 ¹⁹ cm ⁻³ , thickness 0.5 μm) and Mg-doped p-type GaN A contact layer 111 made of (Mg concentration 1 × 10 ²⁰ cm ⁻³ , thickness 0.02 μm) is grown. Here, in the growth of the p-type cladding layer 110 and the p-type contact layer 111, the NH ₃ flow rate is set to 1 slm, which is lower than the optimal value of 10 slm. By selecting the NH ₃ flow rate: 1 slm, the V / III ratio is about 4,500. The growth temperature of the p-type cladding layer 110 and the p-type GaN contact layer 111 is preferably selected in the range of 900 to 1,000 ° C., and the NH ₃ flow rate is in the range of 0.5 to 3 slm or less (corresponding V The / III ratio is preferably selected in the range of 2,300 to 14,000. It is important that these conditions have appropriate values according to the material and film thickness of the current confinement layer, contact layer, and cladding layer.

As described above, an LD wafer including a p-type contact layer, an AlN current confinement layer, a p-type and n-type cladding layer, a p-type and n-type guide layer, and an active layer is obtained. P-type and n-type electrodes are formed on this LD wafer. This process is called an “electrode process”. Ti 5 nm and Al 20 nm are vacuum-deposited in this order on the back surface of the n-type GaN substrate, and then Ni 10 nm and Au 10 nm are vacuum-deposited in this order on the p-type contact layer. The sample is put into an RTA (Rapid Thermal Annealing) apparatus and alloyed at 600 ° C. for 30 seconds to form an ohmic contact. Au is vacuum-deposited on TiAl on the back side of the substrate and NiAu on the front side to form an n-type electrode 101 and a p-type electrode 112. The sample after the electrode formation is cleaved in a direction perpendicular to the stripe to form an LD chip. A typical element length is 500 μm.

The semiconductor laser manufactured as described above is evaluated as follows.

(I) Morphological observation of p-type contact layer 111 When the p-type contact layer 111 was formed, its surface was observed with a scanning electron microscope. On the surface of the p-type contact layer 111, no defects such as cracks and pits were found immediately above the stripe-shaped openings 113. On the other hand, on the mask region formed by the AlN current confinement layer 109, as shown in FIG. In many cases, the side surface of the hexagonal weight is the (1-101) plane of (Al) GaN or a plane equivalent thereto. When the surface roughness of the concavo-convex surface was measured by AMF (atomic force microscope), the root mean square roughness was about 150 nm, and the surface roughness exceeded the thickness of the contact layer 111.

  Moreover, when the cross section of the obtained LD structure was observed, the following things were confirmed. The p-type GaN contact layer 111 has a shape extending in the horizontal direction along the uneven surface above the current confinement layer 109, and extends from the region above the current confinement layer 109 to the region above the opening 113. It was formed continuously (contact layer 111 in FIG. 1).

(Ii) Device performance of the semiconductor laser When current was injected into the laser device, the operating voltage of the laser output of 30 mW was 4.8 V, and very good electrical characteristics were obtained. The reason why such excellent electrical characteristics are obtained is considered to be due to sufficient contact (ohmic contact) between the p-type electrode 112 and the p-type GaN contact layer 111.

  As a control experiment, the semiconductor laser of Example 1 was prototyped using dry etching. Up to the current confinement layer 109 in Example 1 was formed in the same manner as in Embodiment 1. Thereafter, the p-type cladding layer 110 and the p-type GaN contact layer 111 were formed at a growth temperature of 1,080 ° C. Subsequently, a mask patterned in a predetermined shape was provided on the surface of the p-type GaN contact layer 111, and the p-type GaN contact layer 111 was selectively etched using this mask to form an uneven surface.

  When the p-type contact layer 111 was formed, the surface was observed with a scanning electron microscope. Unevenness was formed on the entire surface of the p-type contact layer 111. Further, when the cross section of the obtained LD structure was observed, the p-type GaN contact layer 111 was divided at the recess as shown in FIG.

  When current was injected into the laser element obtained in this example, the operating voltage at a laser output of 30 mW was 5.5V.

  Hereinafter, the effects of the semiconductor laser and the manufacturing method thereof according to the present embodiment will be described in detail.

  First, in this embodiment, since the AlN current confinement layer 109 is formed by low temperature growth, the film quality of the cladding layer and the contact layer can be improved, and the substantial effective area of the electrode can be widened. The element resistance can be greatly reduced.

  In the prior art, the AlN layer deposited at a high temperature of 1,000 ° C. or higher is selectively removed by etching to form the AlN current confinement layer 109. However, it is generally difficult to etch the high-temperature grown AlN layer. However, there have been problems such as generation of cracks in the layer during the growth of the AlN layer and the subsequent growth of the semiconductor layer on the AlN layer. In this embodiment, since AlN is grown at a low temperature of 600 ° C. or lower, amorphous AlN can be obtained. For this reason, cracks during growth can be suppressed and good selective etching with a GaN single crystal or an AlGaN single crystal can be performed.

Further, in the above-mentioned Japanese Patent Application Laid-Open No. 2003-347238, since a completely amorphous material such as SiO ₂ is used as the current blocking layer, the polycrystal deposited on the current blocking layer takes over the crystal information of the base completely. In addition, there is no order and no conductivity. On the other hand, in the semiconductor laser according to the present embodiment, when forming the current confinement layer 109, first, an amorphous layer is formed by low temperature deposition at 600 ° C. or lower, an opening is provided by etching, and then the amorphous layer forming temperature is formed. The step of converting the amorphous layer to the crystalline layer by forming the layer above the p-type cladding layer 110 at a higher temperature is employed. For this reason, when the low temperature growth AlN layer for the current confinement layer 109 is formed, crystallization proceeds in the subsequent temperature rising process even if an amorphous-like layer is once deposited. Therefore, the Mg-doped p-type Al _0.1 Ga _0.9 N cladding layer 110 and the Mg-doped p-type GaN contact layer 111 on the current confinement layer 109 exhibit p-type conductivity. Accordingly, a substantial effective area of the electrode can be widened.

Second, since moderate irregularities are formed on the surface of the p-type GaN contact layer 111, the electrode adhesion can be remarkably improved and the element resistance can be stably reduced. Attempts to improve the electrode adhesion by the concavo-convex structure have been studied so far as described in the section of the prior art. However, in the inner stripe type semiconductor laser, there has been no example in which an uneven shape is given to the contact layer surface. Moreover, what is described in Japanese Patent Application Laid-Open No. 2003-347238 has unevenness of an atomic level of 0.25 nm or more, and it was difficult to obtain sufficient adhesion. Further, in the method of forming pits by wet etching (Japanese Patent Laid-Open No. 11-16852), there is a tendency for device resistance to increase and there is room for improvement. In this respect, in this embodiment, a concavo-convex structure effective for improving electrode adhesion and device resistance is realized by adopting a new process in forming the current confinement layer 109 and the upper layer thereof. ing. That is, in this embodiment, low temperature growth AlN is used as the material of the current confinement layer 109. Further, when the p-type cladding layer 110 and the p-type GaN contact layer 111 are formed, the substrate temperature is set to 980 ° C. which is lower than the optimum value, and the NH ₃ flow rate is lowered to be less than the optimum value of 10 slm (corresponding to 1 slm). The V / III ratio was about 4,500). In this example, by adopting a combination of the above-described novel processes, moderate irregularities are formed on the surface of the p-type GaN contact layer 111 as described above, and the electrode adhesion is remarkably improved and the element resistance is increased. Can be stably reduced.

In addition, by adopting the above process, the surface of the Mg-doped p-type Al _0.1 Ga _0.9 N cladding layer 110 and the Mg-doped p-type GaN contact layer 111 is uneven above the AlN current confinement layer 109. On the other hand, the crystal growth proceeds while the surface remains flat on the opening 113 of the AlN current confinement layer 109. Therefore, a structure is obtained in which the interface between the p- type electrode 112 and the p-type GaN contact layer 111 is flat in the current-carrying region and is an uneven surface in the current confinement region. Electrode adhesion is improved by the uneven surface in the current confinement region, while a good interface is stably achieved in the energized region passing through the opening 113 because it has a flat interface.

The reason why a structure that is flat in the energization region passing through the opening 113 and becomes an uneven surface in the current confinement region is presumed as follows. Since a large amount of contaminants and oxides are present on the surface of the low-temperature grown AlN layer for the current confinement layer 109, the Mg-doped p-type Al _0.1 Ga _0.9 N cladding layer 110 is initially grown again. Is not sufficiently nucleated on the low-temperature grown AlN layer for the current confinement layer 109. In addition, when the substrate temperature is relatively low, since significant lateral growth does not occur during the growth of the Mg-doped p-type Al _0.1 Ga _0.9 N cladding layer 110, two-dimensional It is thought that three-dimensional growth remained until the end. On the other hand, since the surface is clean on the opening 113 of the AlN current confinement layer 109, it is considered that flat two-dimensional growth was realized from the initial stage of regrowth even when the substrate temperature was low.

  Third, according to the configuration of the present embodiment, current injected from a wide range of electrodes can be collected in the opening, and an element having a low resistance and good IV characteristics can be realized. In this embodiment, as shown in FIG. 1, the low-resistance p-type GaN contact layer 111 extends in the horizontal direction along the uneven surface, and the region above the current confinement layer to the region above the opening. It is formed continuously over. For this reason, current can be collected from a wide range of electrodes, and the above-described effects can be obtained.

[Example 2]
Another example of the inner stripe type semiconductor laser according to the present invention will be described with reference to FIG. In this example, an Mg-doped p-type AlGaN / GaN superlattice clad layer 501 was employed instead of the Mg-doped p-type Al _0.1 Ga _0.9 N clad layer 110 in Example 1. The unevenness on the surface of the p-type GaN contact layer 111 is a hexagonal pyramid shape as in Example 1 (FIG. 7).

In this embodiment, the superlattice cladding layer and the contact layer thereon have a concavo-convex structure. By adopting such a configuration, the semiconductor laser of the present embodiment can improve the adhesion of the p- type electrode and reduce the element resistance without impairing the original function of the superlattice cladding.

  When current was injected into the laser element according to this example, the operating voltage with a laser output of 30 mW was 4.5 V, and very good electrical characteristics were obtained. The reason why such good electrical characteristics are obtained is considered to be that contact (ohmic contact) between the p-type electrode 112 and the p-type GaN contact layer 111 is sufficiently secured.

  As a control experiment, an inner stripe type semiconductor laser having the same structure as that of the semiconductor laser of Example 2 was prototyped using dry etching.

The structure of the semiconductor laser of this example will be described with reference to FIG. In this example, from the Si-doped n-type GaN layer 103 to the Mg-doped p-type GaN optical confinement layer 108 (except for the InGaN MQW active layer 106), the Mg-doped p-type AlGaN / GaN superlattice cladding layer 501 and Mg The doped p-type GaN contact layer 111 is formed at an optimal (Al) GaN formation temperature of 1,080 ° C. in the present MOVPE apparatus. Therefore, the surface is flat when the crystal growth is completed. Then, the unevenness | corrugation was formed in the surface by performing dry etching. Thus, when the surface is uneven by dry etching, the feature is that the layer structure such as the interface between the Mg-doped p-type Al _0.1 Ga _0.9 N cladding layer 110 and the Mg-doped p-type GaN contact layer 111 is The inside is formed flat (FIG. 8). In this structure, the p-type GaN contact layer 111 and the superlattice clad layer 501 are partly separated at the recesses.

  The operating voltage of the obtained semiconductor laser with a laser output of 30 mW was a high value of 5.8V. The reason why a sufficiently low element resistance cannot be obtained when unevenness is formed on the surface by dry etching is presumed as follows.

  When the irregularities are formed by dry etching, the surface exposed to the etching particles is severely damaged during dry etching, the contact resistance with the p-type electrode is increased, and the element resistance is extremely increased. In addition, the effective area of the p-type electrode is narrow, and the IV characteristics are degraded. Such a problem becomes particularly remarkable when a superlattice cladding layer is employed. This is because when the superlattice clad layer is employed, currents injected from a wide range of electrodes can be collected as shown in FIG.

  As in Example 2, when unevenness is formed on the surface by growth, the thin layer constituting the superlattice structure is in the horizontal direction along the shape of the uneven surface formed on the upper surface of the current confinement layer that is initially amorphous. It has a shape that extends. In other words, the interface between the thin layers constituting the superlattice structure is laminated so as to follow the uneven shape formed on the upper surface of the current confinement layer. Since the thin layer has a low resistivity in the lateral direction within the layer, as shown in FIG. 7, current injected from a wide range of electrodes near the laser stripe gathers in the laser stripe (opening), resulting in As a result, low resistance and good IV characteristics are realized.

  On the other hand, when unevenness is formed on the surface by dry etching as shown in FIG. 8, the thin layer constituting the superlattice structure formed at the (Al) GaN formation optimum temperature is along the substrate horizontal plane even on the upper surface of the current confinement layer. Are stacked. That is, the interface between the thin layers constituting the superlattice structure is formed in parallel with the substrate horizontal plane. For this reason, the concavo-convex portion formed by dry etching has a structure in which each thin layer is divided, and current can be collected only from a range injected from a narrow range that is not damaged by dry etching. It becomes difficult to obtain a sufficient IV improvement effect by the cladding layer.

  As mentioned above, although embodiment of this invention was described with reference to drawings, these are the illustrations of this invention, Various structures other than the above are also employable.

For example, in the above embodiment, AlN is used as the material of the current confinement layer 109, but other materials may be used as long as the current can be blocked. In particular, the layers represented by the general formula In _x Ga _y Al _1-xy N (0 ≦ x ≦ 0.4, 0 ≦ y ≦ 0.4, x + y ≦ 0.4) are upper and lower layers (for example, The p-type GaN guide layer 108 and the Mg-doped p-type Al _0.1 Ga _0.9 N clad layer 110) are preferable because they are close in crystal structure and lattice constant and have good compatibility.

In the first and second embodiments, GaN is used as the contact layer 111, but In _a Ga _b Al _1-ab N (0 ≦ a ≦ 1, 0 ≦ b ≦ 1, a + b ≦ 1). It may be configured. When In _a Ga _b Al _1-ab N (0 ≦ a ≦ 1, 0 ≦ b ≦ 1, a + b ≦ 1) is used as the contact layer 111, the Al composition (1-ab) is , 0 ≦ (1-a−b) ≦ 0.4 is preferable. In general, it is preferable that the p-type contact layer 111 has a lower Al composition than the p-type clad layer 110, and at the same time, the forbidden band width Eg is also made smaller.

  In addition, as in the first and second embodiments, in the element structure in which the contact layer 111 has a p-type doped contact layer and the p-type electrode is formed thereon, the effect of the present invention is more remarkably exhibited. The At this time, the current concentration in the opening 113 provided in the current confinement layer 109 is concentrated while reaching the opening 113 from the p-type electrode 112 via the p-type contact layer 111 and the p-type cladding layer 110. move on. Therefore, the current density per unit area is reduced at the interface between the p-type electrode 112 and the p-type contact layer 111. On the other hand, the thickness and doping concentration of the p-type cladding layer 110 and the p-type contact layer 111 can be appropriately selected according to the current concentration process.

In the first and second embodiments, the application example of the edge-emitting gallium nitride semiconductor laser has been described. However, the present invention can be applied to a light emitting element that is not a laser and a semiconductor optical element that is not a light emitting element, such as a light receiving element. Can be carried out without hindrance. The present invention can also be applied to a surface emitting laser. In this case, a ring-shaped upper electrode is provided on the uneven surface, and the opening is used as a light emitting window. In this case, a contact with the electrode is made at the uneven portion, while light is emitted from the flat surface above the opening, and a semiconductor laser excellent in light emission efficiency and electrode adhesion can be obtained.

Claims (14)

A semiconductor layer made of a group III nitride semiconductor;
A current confinement layer provided on the semiconductor layer and having a predetermined opening;
A portion of the current confinement layer provided on the semiconductor layer and the opening provided above the opening, and a portion formed in a region to be the upper portion of the current confinement layer has an uneven surface;
An electrode provided on the upper surface of the contact layer having the uneven surface portion;
With
The current confinement layer is grown at a growth temperature selected in a range of 200 ° C. or higher and 600 ° C. or lower. In _x Ga _y Al _1-xy N (0 ≦ x ≦ 0.4, 0 ≦ y ≦ 0. 4, x + y ≦ 0.4) or low temperature growth AlN,
A clad layer is provided between the current confinement layer and the contact layer,
The portion formed in the upper region of the current confinement layer of the cladding layer has an uneven surface, the portion formed in the upper region of the opening has a flat surface,
The contact layer has an uneven surface in the upper region of the current confinement layer, it has a flat surface in the upper region of the opening,
The contact layer and the clad layer are selected at a growth temperature selected in the range of 900 ° C. to 1000 ° C., and the supply ratio of the raw material NH ₃ and the group III organometallic compound: V / III ratio is selected in the range of 2300 to 14000. And grown by metal organic chemical vapor deposition (MOVPE),
The low temperature grown In _x Ga _y Al _1-xy N (0 ≦ x ≦ 0.4, 0 ≦ y ≦ 0.4, x + y ≦ 0.4) or the low temperature grown AlN is formed after the low temperature growth. A group III nitride semiconductor optical device which is amorphous before being heated at the growth temperature . The group III nitride semiconductor optical device according to claim 1,
The group III nitride semiconductor light characterized in that the contact layer has a shape in which the concavo-convex surface portion formed in a region to be an upper portion of the current confinement layer extends in a horizontal direction along the concavo-convex element. The group III nitride semiconductor optical device according to claim 1 or 2,
The group III nitride semiconductor optical device, wherein the contact layer is formed continuously from a region above the current confinement layer to a region above the opening. In the group III nitride semiconductor optical device according to any one of claims 1 to 3,
The electrode provided on the upper surface of the contact layer is a p-type electrode,
The group III nitride semiconductor optical device, wherein the contact layer is a p-type contact layer. In the group III nitride semiconductor optical device according to any one of claims 1 to 4,
A group III nitride semiconductor optical device, wherein the uneven average surface has a root mean square roughness larger than the thickness of the contact layer. In the group III nitride semiconductor optical device according to any one of claims 1 to 5,
A group III nitride semiconductor optical device, wherein the uneven surface has a root mean square roughness of 10 nm or more. In the group III nitride semiconductor optical device according to any one of claims 1 to 6,
The group III nitride semiconductor optical device, wherein the uneven surface is constituted by a crystal plane. In the group III nitride semiconductor optical device according to any one of claims 1 to 7,
The III-nitride semiconductor optical device, wherein the uneven surface includes hexagonal pyramid pits. In the group III nitride semiconductor optical device according to any one of claims 1 to 8,
A clad layer having a superlattice structure is provided between the current confinement layer and the contact layer,
The group III nitride semiconductor optical device, wherein the thin layer constituting the superlattice structure has a shape extending in a horizontal direction along the uneven surface. In the group III nitride semiconductor optical device according to any one of claims 1 to 9,
The group III nitride semiconductor optical device, wherein the contact layer is made of In _a Ga _b Al _1-ab N (0 ≦ a ≦ 1, 0 ≦ b ≦ 1, a + b ≦ 1). In the group III nitride semiconductor optical device according to any one of claims 1 to 10,
It said current confinement layer, characterized in that it is constituted by the low-temperature growth _{In x Ga y Al 1-xy} N (0 ≦ x ≦ 0.4,0 ≦ y ≦ 0.4, x + y ≦ 0.4) Group III nitride semiconductor optical device. In the group III nitride semiconductor optical device according to any one of claims 1 to 11,
It said current confinement layer, III-nitride semiconductor light element, characterized in that it is constituted by the low-temperature growth AlN. In the group III nitride semiconductor optical device according to any one of claims 1 to 12,
A group III nitride semiconductor optical device comprising an active layer under the semiconductor layer. A method for producing a group III nitride semiconductor optical device according to any one of claims 1 to 13,
Forming a semiconductor layer made of a group III nitride semiconductor on the substrate;
Forming a current confinement layer having a predetermined opening on the semiconductor layer;
A group III nitride semiconductor is grown at a growth temperature of 1000 ° C. or less on the current confinement layer and the opening formed on the semiconductor layer, and a portion formed in the region above the current confinement layer is Forming a contact layer having an uneven surface;
Forming an electrode on the contact layer having the uneven surface;
With
The current confinement layer is grown at a growth temperature selected in a range of 200 ° C. or more and 600 ° C. or less. Low temperature growth In _x Ga _y Al _1-xy N (0 ≦ x ≦ 0.4, 0 ≦ y ≦ 0. 4, x + y ≦ 0.4) or low temperature growth AlN,
A clad layer is provided between the current confinement layer and the contact layer,
The contact layer and the clad layer are selected at a growth temperature selected in the range of 900 ° C. to 1000 ° C., and the supply ratio of the raw material NH ₃ and the group III organometallic compound: V / III ratio is selected in the range of 2300 to 14000. And grown by metal organic chemical vapor deposition (MOVPE),
The low temperature grown In _x Ga _y Al _1-xy N (0 ≦ x ≦ 0.4, 0 ≦ y ≦ 0.4, x + y ≦ 0.4) or the low temperature grown AlN is formed after the low temperature growth. A method for manufacturing a group III nitride semiconductor optical device, wherein the device is amorphous before being heated at the growth temperature .