JP4963681B2 - Image processing device - Google Patents

Description

  The present invention relates to an image processing apparatus, and more particularly, to a predictive coding encoder.

  FIG. 8 is a block diagram showing a configuration of the encoder 101 of the predictive coding method. The encoder 101 includes a quantization unit 102, a prediction unit 103, and an encoding unit 104. Data D100 is input from the preceding processing block (not shown) to the quantization unit 102. The quantization unit 102 outputs data D101 by quantizing the data D100. Data D <b> 101 is input from the quantization unit 102 to the prediction unit 103. In addition, data processed in the past is input to the prediction unit 103 as prediction data D102. The prediction unit 103 outputs a difference value between the data D101 and the prediction data D102 as data D103. Data D 103 is input from the prediction unit 103 to the encoding unit 104. The encoding unit 104 outputs encoded data D104 by entropy encoding the data D103.

  In recent years, HD Photo (or JPEG XR) has been proposed by Microsoft as a still image file format with a higher image quality than JPEG and a simplified circuit configuration and arithmetic processing than JPEG2000.

  FIG. 9 is a block diagram showing the configuration of the encoder 201 in HD Photo. The encoder 201 includes a color conversion unit 202, a prefilter 203, a frequency conversion unit 204, a quantization unit 205, a prediction unit 206, and an encoding unit 207.

  An RGB color space pixel signal D200 is input to the color conversion unit 202 from an image sensor such as a CCD or CMOS image sensor. The color conversion unit 202 converts the pixel signal D200 into, for example, a pixel signal D201 in the YUV color space, and outputs it. The pixel signal D201 is input from the color conversion unit 202 to the prefilter 203. The pre-filter 203 performs pre-filter processing for reducing block distortion on the pixel signal D201, and outputs a pixel signal D202. The pixel signal D202 is input from the prefilter 203 to the frequency conversion unit 204. The frequency conversion unit 204 performs a predetermined frequency conversion process (PCT: HD Photo Core Transform) on the pixel signal D202, and outputs data D203 after the frequency conversion process. In HD Photo, the data D203 includes a high-pass component, a low-pass component, and a DC component.

  Data D <b> 203 is input from the frequency conversion unit 204 to the quantization unit 205. The quantization unit 205 outputs data D204 by quantizing the data D203. Data D204 is input from the quantization unit 205 to the prediction unit 206. In addition, data processed in the past is input to the prediction unit 206 as prediction data. The prediction unit 206 outputs a difference value between the data D204 and the prediction data as data D205. Data D205 is input from the prediction unit 206 to the encoding unit 207. The encoding unit 207 outputs encoded data D206 by entropy encoding the data D205.

  Details of HD Photo are disclosed in, for example, Non-Patent Document 1 below, and details of JPEG XR are disclosed in, for example, Non-Patent Document 2 below.

"HD Photo -Photographic Still Image File Format", [online], November 7, 2006, Microsoft Corporation, [October 10, 2007 search], Internet <URL: http://www.microsoft.com/whdc /xps/hdphotodpk.mspx> "Coding of Still Pictures -JBIG JPEG", [online], 19 December 2007, ISO / IEC JTC 1 / SC 29 / WG1 N 4392, [March 4, 2008 search], Internet <URL: http: // www .itscj.ipsj.or.jp / sc29 / open / 29view / 29n9026t.doc>

  In the encoders 101 and 201 shown in FIGS. 8 and 9, in order to reduce the code amount of the encoded data D104 and D206 output from the encoding units 104 and 207, the prediction input to the encoding units 104 and 207 is used. It is desirable that the value of the subsequent data (data D103, D205) is as small as possible.

  The present invention has been made in view of such circumstances, and an image processing apparatus capable of reducing the code amount of encoded data by reducing the value of post-prediction data input to an encoding unit. The purpose is to obtain.

  An image processing apparatus according to a first aspect of the present invention includes an encoding unit that encodes input data, and the encoding unit stores the data in a first digit range in a higher-order first digit range. Of the first partial data and the second partial data in the second digit range on the lower side, and the first of the first partial data and the second partial data A second processing unit that encodes only the partial data, and a third processing unit that executes a correction process for setting the value of the first partial data to “0”.

  According to the image processing apparatus of the first aspect of the present invention, the value of the first partial data is set to “0” by the correction process executed by the third processing unit. As a result, since the value of the first partial data encoded by the second processing unit is reduced, the code amount of the encoded data can be reduced. In addition, the entire data input to the encoding unit is not encoded, but only the first partial data on the upper side is encoded, and the code amount of the first partial data on the upper side is encoded. Reduction effect is obtained. Therefore, compared with the case where the entire data input to the encoding unit is encoded, the effect of reducing the code amount becomes significant.

  The image processing apparatus according to the second aspect of the present invention is the image processing apparatus according to the first aspect, in particular, the first partial data includes the third partial data in the upper digit range and the lower order side. 4th partial data within a range of digits of the third partial data, and the third processing unit sets the fourth partial data on condition that the value of the third partial data is “0”. The correction process is executed for the above.

  According to the image processing device of the second aspect of the present invention, the third processing unit is configured so that the lower-side fourth data is provided on the condition that the value of the upper-side third partial data is “0”. A correction process is executed on the partial data. In other words, when the value of the third partial data is not “0”, the third processing unit does not perform the correction process on the fourth partial data. Therefore, when the value of the first partial data is relatively large, it can be avoided that the correction process is executed and the image quality is extremely lowered.

  The image processing apparatus according to the third aspect of the present invention is the image processing apparatus according to the first or second aspect, particularly when the third processing unit executes the correction process. A fourth processing unit is further provided for setting all the values of the respective digits in the range to “1”.

  According to the image processing device of the third aspect of the present invention, when the third processing unit executes the correction process, the fourth processing unit converts all the values of the respective digits within the second digit range. Set to “1”. When the value of the first partial data on the upper side is corrected to “0”, the image quality is extremely lowered by setting the value of the second partial data on the lower side to the maximum value. It can be avoided.

  The image processing apparatus according to a fourth aspect of the present invention is the image processing apparatus according to any one of the first to third aspects, in particular, the third processing unit is high pass component data in HD Photo, Of the low-pass component data and the direct-current component data, the correction processing is executed only for the high-pass component data.

  According to the image processing device of the fourth aspect of the present invention, the third processing unit converts the high-pass component data among the high-pass component data, the low-pass component data, and the direct-current component data in HD Photo. Only the correction process is executed. In other words, the third processing unit does not perform the correction process on each data of the low-pass component and the DC component. In HD Photo, for high-pass components, prediction data is obtained in the current macroblock to be processed. On the other hand, for low-pass components and DC components, prediction data is obtained based on macroblocks processed in the past. Therefore, when the correction process is executed on each data of the low-pass component and the DC component, errors caused by the correction process are accumulated in a chain, and there is a possibility that the image quality is greatly deteriorated. According to the image processing device of the fourth aspect of the present invention, the third processing unit does not perform the correction process on the low-pass component data and the direct-current component data. It can be avoided.

  The image processing device according to a fifth aspect of the present invention is the image processing device according to any one of the first to fourth aspects, in particular, the first digit range is a normal bit in HD Photo, The second digit range is a Flex Bit in HD Photo.

  With the image processing device according to the fifth aspect of the present invention, it is possible to reduce the code amount of the data after entropy encoding for the normal bit for which entropy encoding is executed in HD Photo.

  According to the present invention, the code amount of encoded data can be reduced.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In addition, the element which attached | subjected the same code | symbol in different drawing shall show the same or corresponding element.

  FIG. 1 is a block diagram showing a configuration of an image processing apparatus 1 according to an embodiment of the present invention. The image processing apparatus 1 can be applied to an encoder that encodes data having a portion to be encoded and a portion not to be encoded, for example, an encoder in HD Photo.

  The image processing apparatus 1 includes a quantization unit 2, a prediction unit 3, and an encoding unit 4. The quantization unit 2 receives data D1 before quantization from a previous processing block (not shown) (for example, a frequency conversion unit). The quantization unit 2 outputs data D2 by quantizing the data D1. Data D <b> 2 is input from the quantization unit 2 to the prediction unit 3. In addition, data processed in the past (for example, data processed last time) is input to the prediction unit 3 as prediction data D3. The prediction unit 3 outputs a difference value between the data D2 and the prediction data D3 as data D4. However, the prediction unit 3 does not execute the prediction process depending on conditions, and in this case, data having a data value “0” is used as the prediction data D3. Data D4 is input to the encoding unit 4 from the prediction unit 3. The encoding unit 4 outputs encoded data D11 and non-encoded data D12.

  FIG. 2 is a block diagram showing a configuration of the encoding unit 4 shown in FIG. The encoding unit 4 includes processing units 7 to 9, 20, and 21. Data D4 is input to the processing unit 7 from the prediction unit 3 shown in FIG.

  FIG. 3 is a diagram showing the data D4. The processing unit 7 divides the data D4 into partial data D4U in the upper digit range R1 and partial data D4L in the lower digit range R2. The digit range R1 corresponds to a normal bit in HD Photo, and the digit range R2 corresponds to a Flex Bit in HD Photo. If the bit width of the digit range R1 is N, the bit width of the digit range R2 (Model Bits) is M, and the least significant digit of the digit range R2 is the 0th digit, the most significant digit of the digit range R2 is the (M− 1) Digit, the least significant digit of the digit range R1 is the Mth digit, and the most significant digit of the digit range R1 is the (N + M-1) th digit. In HD Photo, the bit width M is adaptively variable.

  Referring to FIG. 2, partial data D <b> 4 </ b> U is input from processing unit 7 to processing unit 20. The partial data D20 is output from the processing unit 20. The partial data D20 is input from the processing unit 20 to the processing unit 8. The processing unit 8 outputs encoded data D11 by entropy encoding the partial data D20. The partial data D4L is input from the processing unit 7 to the processing unit 21. The partial data D21 is output from the processing unit 21. The partial data D21 is input from the processing unit 21 to the processing unit 9. The processing unit 9 generates and outputs data D12 based on the data D21.

  FIG. 4 is a diagram showing the partial data D4U. The partial data D4U has partial data D4UU in the upper digit range R1U and partial data D4UL in the lower digit range R1L. If the bit width of the digit range R1L is S, the most significant digit of the digit range R1L is the (M + S-1) th digit, and the least significant digit of the digit range R1U is the (M + S) digit. The bit width S can be arbitrarily set.

  FIG. 5 is a diagram for explaining a first example of the processing contents of the processing units 8, 9, 20, and 21 shown in FIG. In FIG. 5, as an example, it is assumed that the partial data D4U and D4L each have a bit width of 8 bits, and the partial data D4UL (digit range R1L) has a bit width S of 4 bits.

  As shown in FIG. 5A, partial data D4U “11010111”, for example, is input to the processing unit 20. In this case, the partial data D4UU is “1101”, and the partial data D4UL is “0111”. Further, as shown in FIG. 5B, the partial data D4L, for example, “01010011” is input to the processing unit 21.

  The processing unit 20 verifies the value of each digit of the partial data D4UU. In the case of the first example, a digit “1” is included in a plurality of digits of the partial data D4UU. That is, the value of the partial data D4UU is not “0” as a whole. In this case, as shown in FIGS. 15C and 15D, the processing units 20 and 21 output the partial data D4U and D4L as they are as the partial data D20 and D21, respectively.

  FIG. 6 is a diagram for explaining a second example of the processing contents of the processing units 8, 9, 20, and 21 shown in FIG. As in FIG. 5, in FIG. 6, as an example, assume that the partial data D4U and D4L each have a bit width of 8 bits, and the partial data D4UL (digit range R1L) has a bit width S of 4 bits. Yes.

  As shown in FIG. 6A, partial data D4U of “00000111”, for example, is input to the processing unit 20. In this case, the partial data D4UU is “0000” and the partial data D4UL is “0111”. Further, as illustrated in FIG. 6B, for example, partial data D4L “01010011” is input to the processing unit 21.

  The processing unit 20 verifies the value of each digit of the partial data D4UU. In the case of the second example, the digit “1” is not included in the plurality of digits of the partial data D4UU. That is, the value of the partial data D4UU is “0” as a whole. In this case, as shown in (C) of FIG. 6, the processing unit 20 executes correction processing for setting all the digits of the partial data D4UL to “0”, and the partial data whose value is “0” as a whole. D20 is output. In this case, as shown in FIG. 6D, the processing unit 21 sets all the digits of the partial data D4L to “1” and outputs the partial data D21.

  As described above, according to the image processing apparatus 1 according to the present embodiment, as illustrated in FIG. 6, the processing unit 20 sets the value of the partial data D4U to “0” by the correction process, and the partial data D20. Output as. As a result, the value of the partial data D20 encoded by the processing unit 8 becomes small, so that the code amount of the encoded data D11 can be reduced. In addition, the entire data D4 input to the encoding unit 4 is not encoded, but only the upper partial data D4U (partial data D20) is encoded, and the upper partial data D4U (partial data) The effect of reducing the code amount is obtained with respect to D20). Therefore, compared with the case where the entire data D4 input to the encoding unit 4 is encoded, the effect of reducing the code amount becomes significant.

  Further, according to the image processing apparatus 1 according to the present embodiment, the processing unit 20 corrects the lower partial data D4UL on the condition that the value of the upper partial data D4UU is “0”. Execute the process. In other words, as illustrated in FIG. 5, when the value of the partial data D4UU is not “0”, the processing unit 20 does not perform the correction process on the partial data D4UL. Therefore, when the value of the partial data D4U is relatively large, it can be avoided that the correction process is executed and the image quality is extremely lowered.

  Furthermore, according to the image processing apparatus 1 according to the present embodiment, as illustrated in FIG. 6, the processing unit 21 determines the value of each digit in the digit range R2 when the processing unit 20 executes the correction process. Are all set to “1”. When the value of the upper partial data D4U is corrected to “0”, setting the value of the lower partial data D4L to the maximum value can prevent the image quality from being extremely deteriorated. it can.

  FIG. 7 is a block diagram showing the configuration of the pre-filters 51 and 52 and the frequency converters 53 and 54 in the HD Photo encoder. As shown in FIG. 7, the encoder in HD Photo includes a first layer prefilter 51 and a frequency conversion unit 53, and a second layer prefilter 52 and a frequency conversion unit 54.

  The prefilter 51 receives the pixel signal D50. The prefilter 51 performs prefiltering on the pixel signal D50 and outputs a pixel signal D51 after the prefiltering. The pixel signal D51 is input to the frequency conversion unit 53. The frequency conversion unit 53 performs frequency conversion processing (PCT) on the pixel signal D51, and outputs high-pass component data D1HP and DC component data D52 in the first layer. The data D52 is input to the prefilter 52. The prefilter 52 performs prefiltering on the data D52 and outputs data D53 after the prefiltering. The data D53 is input to the frequency converter 54. The frequency converter 54 performs a frequency conversion process (PCT) on the data D53, and outputs low-pass component data D1LP and direct-current component data D1DC.

  Data D1HP, D1LP, and D1DC output from the frequency conversion units 53 and 54 are input to the quantization unit 2 as the data D1 shown in FIG. Similarly, the data D4 input to the encoding unit 4 includes high-pass component data, low-pass component data, and DC component data.

  In the image processing apparatus 1 according to the present embodiment, the processing unit 20 illustrated in FIG. 2 applies only the high-pass component data among the high-pass component data, the low-pass component data, and the direct-current component data. The correction process is executed. In other words, the processing unit 20 does not perform the correction process on the low-pass component data and the DC component data. In HD Photo, for high-pass components, prediction data is obtained in the current macroblock to be processed. On the other hand, for low-pass components and DC components, prediction data is obtained based on macroblocks processed in the past. Therefore, when the correction process is executed on each data of the low-pass component and the DC component, errors caused by the correction process are accumulated in a chain, and there is a possibility that the image quality is greatly deteriorated. On the other hand, according to the image processing apparatus 1 according to the present embodiment, the processing unit 20 does not perform the correction process on each data of the low-pass component and the DC component, so that the deterioration of the image quality becomes large. It can be avoided.

It is a block diagram which shows the structure of the image processing apparatus which concerns on embodiment of this invention. It is a block diagram which shows the structure of the encoding part shown in FIG. It is a figure which shows data. It is a figure which shows partial data. It is a figure for demonstrating the 1st example of the processing content of the process part shown in FIG. It is a figure for demonstrating the 2nd example of the processing content of the process part shown in FIG. It is a block diagram which shows the structure of the pre filter and frequency conversion part in the encoder of HD Photo. It is a block diagram which shows the structure of the encoder of a prediction encoding system. It is a block diagram which shows the structure of the encoder in HD Photo.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Image processing apparatus 2 Quantization part 3 Prediction part 4 Encoding part 7-9,20,21 Processing part

Claims (5)

An encoding unit for encoding input data;
The encoding unit includes:
A first processing unit that divides the data into first partial data in the upper first digit range and second partial data in the lower second digit range;
A second processing unit that encodes only the first partial data of the first partial data and the second partial data;
An image processing apparatus comprising: a third processing unit that executes a correction process for setting a value of the first partial data to “0”. The first partial data includes third partial data in the upper digit range and fourth partial data in the lower digit range,
The image according to claim 1, wherein the third processing unit executes the correction process on the fourth partial data on condition that a value of the third partial data is “0”. Processing equipment.   The fourth processing unit further sets a value of each digit in the second digit range to “1” when the third processing unit executes the correction process. 2. The image processing apparatus according to 2.   The third processing unit executes the correction processing only on high-pass component data among high-pass component data, low-pass component data, and direct-current component data in HD Photo. 4. The image processing apparatus according to any one of 3. The first digit range is a normal bit in HD Photo,
The image processing apparatus according to claim 1, wherein the second digit range is a Flex Bit in HD Photo.

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