JP4958207B2 - Method for manufacturing optical element substrate - Google Patents

Description

The present invention relates to a method for manufacturing an optical element substrate by a flux method in which a semiconductor crystal made of a group III nitride compound semiconductor is grown using a flux .

  According to the conventional Na flux method in which gallium nitride is grown in sodium (Na) flux, a GaN single crystal can be grown at a relatively low temperature of 600 ° C. to 800 ° C. under a pressure of about 5 MPa. it can.

Further, as can be seen from the prior art disclosed in Patent Documents 1 to 5 below, in the conventional manufacturing method of growing a group III nitride compound semiconductor crystal by a flux method, usually, a base substrate As the (seed crystal), a template in which a semiconductor layer such as a buffer layer is stacked on a sapphire substrate, a GaN single crystal free-standing substrate, or the like is exclusively used.
Japanese Patent Laid-Open No. 11-060394 JP 2001-058900 A JP 2001-064097 A JP 2004-292286 A Japanese Patent Laid-Open No. 2004-300024

  In particular, when a substrate of a semiconductor optical device such as an LED, LD, or photosensor is formed from a group III nitride compound semiconductor crystal, both in improving the internal quantum efficiency of the device and in improving the external quantum efficiency. The crystal quality of these element substrates is very important for suppressing the drive voltage or for improving the electrostatic withstand voltage performance, life, and yield.

However, with the conventional Na flux method, it is difficult to obtain a high-quality semiconductor crystal that is transparent, has a low dislocation density, and has a substantially flat crystal growth surface. Further, the conventional Na flux method has a problem in the crystal growth rate and yield, and therefore, it is difficult to put it into practical use for an electronic device substrate. These problems also applies to _{In x Al y Ga 1-xy} N (0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ x + y ≦ 1) other Group III nitride compound semiconductor crystal growth consisting of It is.

  In addition, when the template as described above is used, there is a large difference in thermal expansion coefficient between a desired semiconductor crystal made of a group III nitride compound semiconductor and a sapphire substrate. When a semiconductor crystal is taken out from the reaction chamber, many cracks are generated in the crystal. For this reason, when the above template is used as the base substrate, it is difficult to obtain a high-quality semiconductor crystal having a film thickness of 300 μm or more, for example.

The present invention has been made to solve the above-described problems, and an object of the present invention is to produce a high-quality optical element substrate at a low cost in the flux method.
A further object of the present invention is to realize a semiconductor optical device having high operating efficiency and high electrostatic withstand voltage performance using these optical device substrates.

In order to solve the above problems, the following means are effective.
That is, the first means of the present invention is gallium (Ga), aluminum (Al) or indium (In) in a mixed flux having a plurality of types of metal elements selected from alkali metals or alkaline earth metals. In the method for manufacturing an optical element substrate in which a group III nitride compound semiconductor crystal is grown by reacting a group III element) with nitrogen (N), the mixed flux and the group III element are mixed with stirring. A group nitride compound semiconductor crystal is grown, and before the group III nitride compound semiconductor crystal is grown, hydrogen (H ₂ ) gas, nitrogen (N ₂ ) gas, ammonia (NH ₃ ) gas is grown. , A rare gas (He, Ne, Ar, Kr, Xe, or Rn) or a mixed gas obtained by mixing two or more of these gases at an arbitrary mixing ratio. As, 900 ° C. or more 1100 ° C. temperature below over a 1 minute or longer, and cleaning the crystal growth surface of the seed crystal or base substrate, III nitride compound semiconductor crystal of the base substrate where crystal growth At least in part, a soluble material that dissolves in the mixed flux is used, and the soluble material is used during the crystal growth process of the group III nitride compound semiconductor crystal or the crystal growth process of the group III nitride compound semiconductor crystal. It is characterized in that it is dissolved in the mixed flux at around the growth temperature later .

However, the stirring and mixing process in the present invention may be carried out by physically moving the reaction vessel by swinging, rotating, rotating, or the like, or stirring the flux using a stirring bar or a stirring blade. Alternatively, the heat flux may be generated by using a heating means or the like to generate a thermal gradient in the flux and thereby heat convection the flux. That is, the processing method of stirring and mixing in the present invention may be arbitrary. Also, these methods may be implemented in any appropriate combination.
Further, the above-described time for the cleaning process is more preferably 2 minutes or more and 10 minutes or less.

As the above-mentioned soluble material, silicon (Si) or the like can be used, but it is not necessarily limited to this.
Further, a protective film is formed on the exposed surface of the soluble material, and the timing or dissolution rate of the soluble material is dissolved in the flux according to the thickness or pattern of the protective film. Is also possible. As a material for such a protective film, for example, aluminum nitride (AlN), tantalum (Ta), or the like can be used. These protective films are formed by a known method such as crystal growth, vacuum deposition, or sputtering. be able to.

The second means of the present invention is the method according to the first means, wherein at least a part of the soluble material contains an impurity to be added to the group III nitride compound semiconductor crystal. is there.
However, you may comprise the whole soluble material only with the required impurity.

The third means of the present invention is to form the mixed flux using lithium (Li) or calcium (Ca) and sodium (Na) in the first or second means. .
That is, the second main component next to Na of the mixed flux to be used is at least one of lithium (Li) and calcium (Ca).

Further, a fourth means of the present invention is the boron ion (B), an impurity to be added to a desired group III nitride compound semiconductor crystal in any one of the first to third means. Thallium (Tl), calcium (Ca), compounds containing calcium (Ca), silicon (Si), sulfur (S), selenium (Se), tellurium (Te), carbon (C), oxygen (O), aluminum ( Al), indium (In), alumina (Al ₂ O ₃ ), indium nitride (InN), silicon nitride (Si ₃ N ₄ ), silicon oxide (SiO ₂ ), indium oxide (In ₂ O ₃ ), zinc (Zn) ), Magnesium (Mg), zinc oxide (ZnO), magnesium oxide (MgO), or germanium (Ge) is included in the mixed flux.
These impurities may contain only 1 type, and may contain multiple types simultaneously. These selections and combinations may be arbitrary.

In the present specification, the following items are also described separately from the above-described invention.
Further, in the optical element substrate manufactured by the method for manufacturing an optical element substrate of the present invention , the dislocation density of the surface can be 1 × 10 ⁵ cm ⁻² or less, and the maximum diameter can be 1 cm or more .
However, the dislocation density is preferably as low as possible and the maximum diameter is as large as possible. In particular, in view of industrial practicality, the desired semiconductor substrate is more preferably a circular substrate having a diameter of about 45 mm, a rectangular substrate having a diameter of approximately 27 mm, or a rectangular substrate having a diameter of approximately 12 mm.

Further, it is preferable that the thickness of the optical device board above Symbol than 300 [mu] m.
However, the thickness of the semiconductor substrate is more preferably 400 μm or more, and more preferably about 400 μm to 600 μm.

In the semiconductor light-emitting device constituted by a plurality of layers stacked semiconductor crystal layer made of a Group III nitride compound semiconductor on a crystal growth substrate, the optical device substrate produced according to the present invention the crystal growth substrate It can consist of
Examples of these semiconductor light emitting devices include LEDs (light emitting diodes) and LDs (semiconductor lasers).

In the semiconductor light receiving element constructed by plural layers stacked semiconductor crystal layer made of a Group III nitride compound semiconductor on a crystal growth substrate, the optical device substrate produced according to the present invention the crystal growth substrate It can consist of
Examples of these semiconductor light receiving elements include a light receiving element that constitutes an imaging apparatus, and an optical sensor.

In the semiconductor light emitting device, a light emitting layer made of a group III nitride compound semiconductor, and a carrier made of a mixed gas of hydrogen (H ₂ ) and nitrogen (N ₂ ) having a nitrogen partial pressure ratio of 40% to 80%. A group III nitride compound semiconductor crystal layer containing aluminum and an acceptor impurity, which is laminated on the light emitting layer by a crystal growth process using a gas, may be provided .

In the method for manufacturing a semiconductor light-emitting device constituted by a plurality of layers stacked semiconductor crystal layer made of a Group III nitride compound semiconductor on a crystal growth substrate, a transparent made of a Group III nitride compound semiconductor A crystal growth substrate is formed from a bulk semiconductor crystal, and a semiconductor crystal layer containing aluminum and an acceptor impurity is mixed with hydrogen (H ₂ ) and nitrogen (N ₂ ) with a nitrogen partial pressure ratio of 40% to 80%. It can be laminated on the light emitting layer by a crystal growth process using a carrier gas made of a gas .

However, the nitrogen partial pressure ratio desirable Ri good is a 50% to 75%, more preferably it is 60% to 70%. In addition, the semiconductor crystal layer having aluminum and an acceptor impurity is not necessarily stacked directly on the crystal growth substrate. Between the semiconductor crystal layer and the crystal growth substrate, other crystal growth processing or the like may be used. Other arbitrary semiconductor layers may be stacked. Further, the crystal growth conditions for stacking such other arbitrary semiconductor layers by crystal growth may be arbitrary, and are not restricted by the nitrogen partial pressure ratio or the like.

Further , in the above optical element, a pair of two layers is formed in the order of the undoped undoped semiconductor layer and the doped semiconductor layer doped with impurities from the contact layer side between at least one contact layer and the active layer. A plurality of sets of withstand voltage structures may be provided .

However, the above-described optical element may be an LED, a semiconductor laser, a light receiving element of an imaging apparatus, or an optical sensor. The contact layer may be an n-type contact layer or a p-type contact layer, and the above-described structure is simultaneously applied to both the n-side and p-side contact layers. It may be applied.
The impurity may be an n-type impurity or a p-type impurity, and a plurality of types of impurities may be added simultaneously. Further, an n-type impurity and a p-type impurity may be added simultaneously. However, when one additive semiconductor layer is formed by mixing both types of impurities, for example, an n-type contact layer uses n-type impurities at a higher concentration than p-type impurities. And
Further, the active layer may have an MQW structure, an SQW structure, or another laminated structure.

Further, a contact layer above SL and n-type contact layer may be the above-mentioned impurities and n-type impurity.

In the above element, a DBR multilayer formed by alternately laminating a plurality of undoped group III nitride compound semiconductor crystal layers having different composition ratios between two other p-type layers is provided. It may be provided .
This DBR multi-layer can be composed of a multilayer structure of at least two layers and one pair, but more preferably a multilayer structure of about 2 to 10 pairs. If the number of stacked layers is small, the reflectance of light in the DBR multilayer is not improved so much, or improvement in electrostatic withstand voltage performance cannot be expected so much. If the number of stacked layers is too large, the drive voltage increases.
More preferably, one of the other two p-type layers is a p-type contact layer. With this configuration, it is possible to suppress an increase in the driving voltage of the light emitting element based on the insertion of the DBR multilayer.

In the above element, the DBR multilayer may be formed from a plurality of undoped GaN crystal layers and a plurality of undoped Al _x Ga _1-x N crystal layers (0 <x <1).

Also, crystals in the manufacturing method of the semiconductor optical device formed by a semiconductor crystal layer made of a Group III nitride compound semiconductor on a growth substrate a plurality of layers laminated, the optical device manufactured by the manufacturing method of the present invention Before crystal growth of a semiconductor crystal layer made of a group III nitride compound semiconductor on the crystal growth surface of the substrate or the optical element substrate, hydrogen (H ₂ ) gas, nitrogen (N ₂ ) gas, ammonia (NH ₃ ) Gas, noble gas (He, Ne, Ar, Kr, Xe, or Rn) or a mixed gas obtained by mixing two or more of these gases at an arbitrary mixing ratio is used as a cleaning gas at 900 ° C. or higher and 1100 The cleaning process may be performed at a temperature not higher than ° C. and taking a time of 1 minute or longer .
However, it is more preferable that the time for the cleaning process is 2 minutes or more and 10 minutes or less.
Also, select a semiconductor crystal layer made of a Group III nitride compound semiconductor on a crystal growth substrate in the manufacturing method of the semiconductor optical device constructed by a plurality of layers laminated, from alkali metal or alkaline earth metal Among the mixed fluxes having a plurality of types of metal elements, by reacting a group III element of gallium (Ga), aluminum (Al) or indium (In) with nitrogen (N), the mixed flux and the above Crystal growth surface of the optical element substrate obtained by crystal growth of the group III nitride compound semiconductor crystal while stirring and mixing with the group III element is grown on the semiconductor crystal layer made of the group III nitride compound semiconductor. prior to, hydrogen (H ₂₎ gas, nitrogen (N ₂₎ gas, ammonia (NH ₃₎ gas, a rare gas (He, Ne, Ar, Kr , Xe or Rn,) Others The combined gas mixture at an arbitrary mixing ratio of two or more gases from these gas as a cleaning gas, at a temperature of 1100 ° C. 900 ° C. or higher, over at least 1 minute time, to the cleaning process You may do it. The above time for the cleaning process is more preferably 2 minutes or more and 10 minutes or less.
By the above means of the present invention, the above-mentioned problem can be effectively or rationally solved.

The effects obtained by the above-described means of the present invention are as follows.
That is, according to the first to fourth any one means of the present invention, in the flux method, can this be produced efficiently at low cost a high-quality semiconductor crystal, thereby, an optical element substrate, High quality and efficient production at realistic production levels.

In particular, according to the first means of the present invention, the dissolution rate of nitrogen in the mixed flux effectively increases based on the stirring and mixing treatment, and the crystal material is uniformly distributed in the flux. Further, such an ideal flux can be constantly supplied to the crystal growth surface without unevenness. Therefore, according to the first means of the present invention, it is possible to obtain a high-quality optical element substrate that is transparent, has a low dislocation density, and has a substantially flat crystal growth surface. In addition, these high-quality optical element substrates can be easily grown in a desired bulk shape based on the high crystal growth rate and yield due to the above-described action.
In addition, according to the first means of the present invention, the foreign matter or impurities on the crystal growth surface on which the semiconductor crystal is to be grown can be favorably excluded from the crystal growth surface, so that the desired optical element substrate can be improved in quality. Crystals can be grown.

Further, according to the first means of the present invention, the soluble material is dissolved in the flux during the semiconductor crystal growth step or near the semiconductor crystal growth temperature after the semiconductor crystal growth step. The stress does not act between the base substrate and the semiconductor crystal (optical element substrate) due to the temperature lowering action when taking out the desired semiconductor crystal from the reaction chamber. Therefore, according to the first means of the present invention, the density of occurrence of cracks in a desired optical element substrate can be greatly reduced as compared with the prior art.
In addition, as the above-described soluble material, for example, a relatively inexpensive material such as silicon (Si) can be used, so that the production cost is lower than the conventional case where a GaN single crystal free-standing substrate is used as a base substrate. It can be kept cheap.

Further, if the phenomenon that the soluble material dissolves into the flux is used as an impurity addition process by the second means of the present invention, the impurity is added to the desired optical element substrate when the impurity needs to be added. The addition process does not need to be performed by other methods. At the same time, the necessary impurity material can be saved.

Further, according to the third means of the present invention, the yield and growth rate of the semiconductor crystal can be suitably or optimally adjusted based on the mixing ratio in the lithium (Li) or calcium (Ca) flux. Thereby, the productivity of a desired optical element substrate can be adjusted suitably or optimally.

In addition, according to the fourth means of the present invention, an optical element substrate having desired electric conduction characteristics and a band gap can be arbitrarily crystal-grown.

According to the onset bright, the light emitting element (LED, LD), the substrate of the optical element such as a light-receiving element, or in good quality at low cost practical level useful crystal growth substrate (optical device substrate) as the substrate of the semiconductor wafer Can be configured.

Further, according to this onset bright, the light emitting element (LED, LD), the substrate of the optical element such as a light-receiving element, or good quality thick a practical level useful crystal growth substrate (optical device substrate) as the substrate of the semiconductor wafer Can be configured.

Further, according to this onset bright, because the crystal quality of the crystal growth substrate of the semiconductor light-emitting device can be increased more easily than the prior art, it is easy to mass-produce good semiconductor light emitting device characteristics than conventional. Examples of the characteristics of the semiconductor light emitting device that can be improved by improving the quality of the crystal growth substrate include internal quantum efficiency, external quantum efficiency, driving voltage, electrostatic withstand voltage performance, life, and yield.

In particular, in the case of a semiconductor laser, in order to increase the resonance efficiency of the output light in the resonator, the half-value width in the frequency axis direction of the light emitted from the light emitting layer is sufficiently narrow, It is important that the reflectance is high. For example, particularly in the case of an edge-emitting semiconductor laser, it is important that the end face of the resonator can be cleanly formed by cleavage. In particular, in the case of a surface-emitting semiconductor laser, the roughness of the crystal growth surface ( It is important that the unevenness is small. Further, since the output light reciprocates through the resonator many times by reflection before output, the transparency of the resonator itself is very important for improving the output performance. Therefore, even when considered from these viewpoints, according to this onset bright, it can be easily increased than the conventional output performance of the semiconductor laser.

Further, according to this onset bright, because the crystal quality of the crystal growth substrate of the semiconductor light receiving device can be increased more easily than the prior art, it is easy to mass-produce good semiconductor photodetector characteristics than conventional. Examples of the characteristics of the semiconductor light receiving element that can be improved by improving the quality of the crystal growth substrate include internal quantum efficiency, external quantum efficiency, driving voltage, electrostatic withstand voltage performance, life, and yield.

In addition to the effects of the present invention described above, the following effects can also be achieved with respect to an element using a substrate manufactured by the manufacturing method of the present invention.
According to the crystal growth process using a carrier gas composed of a mixed gas of hydrogen (H ₂ ) and nitrogen (N ₂ ) having a nitrogen partial pressure ratio of 40% or more and 80% or less , a group III nitride system having an acceptor impurity and aluminum Increase the carrier mobility and photoluminescence intensity of the above-mentioned semiconductor crystal layer made of a compound semiconductor, reduce the surface roughness, and also show variations in the aluminum composition ratio and film thickness in each part of the crystal. Can be reduced in layers. This is because by optimizing the range of the nitrogen concentration in the carrier gas, the crystal quality of the group III nitride compound semiconductor layer containing aluminum is improved and the surface morphology is flattened. Such an effect can also be considered to be obtained because generation of defects and surface roughness due to re-evaporation of atoms from crystals during epitaxial growth are suppressed.
Then, by laminating these semiconductor crystals, for example, the operational efficiency of an arbitrary optical element such as a light emitting diode (LED), a semiconductor laser (LD), a light receiving element of an imaging device, an optical sensor, a photocoupler, etc. is improved. Can do.

Further , in the optical element, when the above-mentioned withstand voltage structure composed of one set of two layers is formed in the semiconductor element continuously in plural from the contact layer side , this electrostatic withstand voltage characteristic is improved. In the portion composed of a plurality of withstand voltage structures that contribute to the above structure, at least two or more additive semiconductor layers are provided. According to this configuration, when a high static voltage is applied, carriers are included in the element. The phenomenon of concentration on defects in the crystal structure can be mitigated better than before. Therefore, while the light emission intensity or emission performance or the light receiving device performance, such as the light receiving sensitivity is sufficiently secured about at least a conventional, electrostatic breakdown voltage of the element can be obtained from further better conventionally.

In the case where an n-type semiconductor layer is stacked on the lower side, which is closer to the crystal growth substrate, and a p-type semiconductor layer is stacked on the upper side, which is the opposite side, the withstand voltage structure described above is A plurality of sets are formed adjacent to or close to the contact layer on the side close to the growth substrate. Therefore, a possibility of giving a high temperature growth layer is grown at a temperature higher than the crystal growth temperature of the active layer be formed in the withstand voltage structure described above, the thermal damage in the high temperature environment of the crystal growth process in the active layer There is no.

Therefore, crystal semiconductor layer of n-type are stacked on the lower side is the side close to the growth substrate, in the case of stacking the semiconductor layer of p-type on the upper side is the opposite side, the active layer crystal quality and the It is possible to simultaneously ensure a high crystal quality of the withstand voltage structure, and thus the light emission performance or light reception performance of the optical element can be effectively maintained or improved.

In addition, in the optical element, when a DBR multi-layer composed of an undoped semiconductor crystal layer is provided, the external quantum efficiency of the light-emitting element is improved by the optical reflection action, and the conductivity of the undoped layer is increased. Based on the characteristics, the electrostatic withstand voltage performance of the device can be improved at the same time. Improvement of the electrostatic withstand voltage performance can be attributed to such relaxation effect of intensive career.

Moreover, because of the low dislocation density of crystal growth substrate, the dislocation density of each semiconductor crystal layer is kept low both respectively. For this reason, it can be considered that the electrostatic withstand voltage performance of the semiconductor light-emitting element is further improved by the synergistic effect of both the crystal quality improving action and the undoped layer stacking action.
Moreover, since this semiconductor light emitting device is a flip chip type, the greatly improved transparency of the optical device substrate also contributes greatly to the improvement of the external quantum efficiency.

Further, when the DBR multilayer is composed of a plurality of undoped GaN crystal layers and a plurality of undoped Al _x Ga _1-x N crystal layers (0 <x <1) , A large difference in refractive index between the interfaces of the DBR multilayer can be ensured within a range in which the internal quantum efficiency is not significantly degraded. For this reason, the reflectance of said DBR multilayer can be effectively made within the range.

In addition, when the crystal is grown on the substrate manufactured according to the present invention, by performing the above-described cleaning treatment , foreign matters or impurities on the crystal growth surface on which the semiconductor crystal should be grown can be favorably removed from the crystal growth surface. Therefore, each semiconductor crystal layer constituting the desired semiconductor optical device can be crystal-grown with higher quality.

The film formation pattern that can be formed on the exposed surface of the soluble material according to claim 1 can be formed by a known technique such as photolithography or etching. In addition, the dissolution time can be advanced as the thickness of these protective films decreases, and the dissolution rate should be set higher as the exposed area of the soluble material with respect to the flux becomes wider. Can do. That is, according to these settings, the dissolution of the soluble material is started from the time when the exposed surface of the soluble material comes into contact with the high-temperature flux, and the dissolution rate is approximately equal to the area of the exposed surface. Therefore, by appropriately adjusting these setting conditions, it is possible to arbitrarily adjust the dissolution start time, the required dissolution time, the dissolution rate, and the like of the above-described soluble material. In addition, the time required for dissolving the above-mentioned soluble material can be arbitrarily adjusted by the type, thickness, flux temperature, etc. of the soluble material.

The seed crystal used for crystal growth by the flux method and the method for producing the base substrate may be arbitrary, and the flux method, HVPE method, MOVPE method, MBE method, etc. are effective. The size and thickness may be arbitrary, but in consideration of industrial practicality, a circular shape with a diameter of about 45 mm, a square with a size of about 27 mm, a square with a size of about 12 mm, and the like are more desirable. Further, it is desirable that the radius of curvature of the crystal growth surface of the seed crystal or the base substrate is larger.
Further, the lower the dislocation density of the seed crystal or the base substrate, the better, but this is not necessarily the case when the method of claim 1 or claim 2 is used. That is, in this case, if the dislocation density is too low, the above soluble material (underlying substrate) may be difficult to dissolve in the flux.

Moreover, as a crystal growth apparatus to be used, any apparatus capable of performing the flux method may be used. For example, the apparatus described in Patent Documents 1 to 5 can be applied or applied. However, it is desirable that the temperature of the reaction chamber of the crystal growth apparatus when performing crystal growth according to the flux method can be arbitrarily controlled to rise and fall to about 1000 ° C. Further, it is desirable that the pressure in the reaction chamber can be arbitrarily controlled to increase or decrease to about 100 atm (about 1.0 × 10 ⁷ Pa). The electric furnace, stainless steel container (reaction container), raw material gas tank, and piping of these crystal growth apparatuses are preferably formed of, for example, a stainless steel (SUS) material, an alumina material, copper, or the like.

Further , when manufacturing an optical element, for example, particularly when the light emission wavelength or light reception wavelength in the active layer is set to 450 nm or more and 480 nm or less, each withstand voltage after the second set counted from the contact layer side is used. The total value of the sum of the film thicknesses of the respective semiconductor layers constituting the structure and the film thickness value of the added semiconductor layers constituting the first withstand voltage structure counted from the contact layer side is 140 nm or more and 600 nm. The following is more desirable.

  With this configuration, the electrostatic withstand voltage characteristic can be improved as compared with the conventional one while maintaining the light emitting characteristic or the light receiving characteristic more than the conventional one. If this film thickness is too thick, the light emitting performance or light receiving performance is lowered due to the following (reason 1) or (reason 2). If this film thickness is too thin, the resistance of these semiconductor layers themselves becomes too small. It becomes difficult to improve the electrostatic withstand voltage characteristics.

(Reason 1) The resistance of the additive-free semiconductor layer itself becomes too large.
(Reason 2) When the additive-free semiconductor layer is grown at a relatively low crystal growth temperature of about 800 ° C. to 900 ° C., which will be described later, moderate roughness can be formed on the surface of the additive-free semiconductor layer. At this time, if the film thickness of the additive-free semiconductor layer is too thick, the crystal quality of the additive-free semiconductor layer and the crystal quality of the semiconductor layer such as an active layer to be subsequently grown are ensured by the surface roughness. Because it becomes difficult.

  In addition, when the emission wavelength or the light reception wavelength in the active layer is set to, for example, 510 nm or more and 550 nm or less, each semiconductor constituting each withstand voltage structure of the second and subsequent sets counted from the contact layer side. More preferably, the total value of the sum of the film thicknesses of the layers and the value of the film thickness of the added semiconductor layer constituting the first withstand voltage structure counted from the contact layer side is 50 nm or more and 250 nm or less. desirable.

  With this configuration, the electrostatic withstand voltage characteristic can be improved as compared with the conventional one while maintaining the light emitting characteristic or the light receiving characteristic more than the conventional one. If this film thickness is too thick, the light emission performance or light reception performance due to the above (reason 1) or (reason 2) is deteriorated. If this film thickness is too thin, the resistance of these semiconductor layers themselves becomes too small. It becomes difficult to improve the electrostatic withstand voltage characteristics.

  Further, it is more preferable that the film thickness of the additive-free semiconductor layer constituting the first set of withstand voltage structure counted from the contact layer side is 100 nm or more and 300 nm or less. If this film thickness is too thick, the light emitting performance or light receiving performance due to the above (reason 1) is deteriorated. If this film thickness is too thin, the resistance of the additive-free semiconductor layer itself becomes too small and the electrostatic withstand voltage characteristics are reduced. It becomes difficult to improve.

  Further, it is more desirable that the thickness of the added semiconductor layer constituting the first set of withstand voltage structure counted from the contact layer side be 10 nm or more and 100 nm or less. If this film thickness is too thick, the light emission performance or light receiving performance due to the above-mentioned (reason 2) is deteriorated. If this film thickness is too thin, the dispersing action in the lateral direction of the carrier is insufficient, and the electrostatic withstand voltage characteristics. It becomes difficult to improve.

  Further, it is more preferable that the thickness of the added semiconductor layer constituting the second withstand voltage structure counted from the contact layer side is 20 nm or more and 40 nm or less. If this film thickness is too thick, the light emission performance or light receiving performance due to the above-mentioned (reason 2) is deteriorated. If this film thickness is too thin, the dispersing action in the lateral direction of the carrier is insufficient, and the electrostatic withstand voltage characteristics. It becomes difficult to improve.

Note that in the present specification, "Group III nitride compound semiconductor" generally, binary, ternary, or quaternary _{"Al 1-xy Ga y In x} N; 0 ≦ x ≦ 1,0 ≦ y ≦ A semiconductor having an arbitrary mixed crystal ratio represented by a general formula of 1,0 ≦ 1−x−y ≦ 1 is included, and a semiconductor to which a p-type or n-type impurity is added is also included in these “ This is a category of “Group III nitride compound semiconductor”.

Further, at least a part of the above group III elements (Al, Ga, In) is replaced with boron (B), thallium (Tl), or the like, or at least a part of nitrogen (N) is phosphorus (P ), Arsenic (As), antimony (Sb), bismuth (Bi), or the like.
Moreover, as said p-type impurity (acceptor), well-known p-type impurities, such as magnesium (Mg) or calcium (Ca), can be added, for example.

As the n-type impurity (donor), for example, known n-type impurities such as silicon (Si), sulfur (S), selenium (Se), tellurium (Te), or germanium (Ge) are used. Can be added.
Moreover, two or more elements may be added simultaneously to these impurities (acceptor or donor), or both types (p-type and n-type) may be added simultaneously.

  In addition, as a method for crystal growth of the group III nitride compound semiconductor layer on the optical element substrate, molecular beam vapor phase epitaxy (MBE), metal organic chemical vapor deposition (MOVPE), hydride vapor phase epitaxy. The method (HVPE), the liquid phase growth method, etc. are effective.

The light emitting layer or the active layer may have a single layer structure, a single quantum well (SQW) structure, a multiple quantum well (MQW) structure, or any other structure. In particular, when these semiconductor crystal layers have a multiple quantum well (MQW) structure, a group III nitride compound semiconductor Al _y Ga _1-yz In _z N (0 ≦ y <1) containing at least indium (In). , 0 <z ≦ 1) is preferable. Therefore, the light emitting layer or the active layer includes, for example, a well layer made of Ga _1-z In _z N (0 <z ≦ 1) with or without addition, and an arbitrary composition ratio having a band gap larger than that of the well layer. A barrier layer made of a group III nitride compound semiconductor AlGaInN can be used.

Hereinafter, the present invention will be described based on specific examples.
However, the embodiments of the present invention are not limited to the following examples.

A cross-sectional view of the crystal growth apparatus used in Example 1 is shown in FIG.
1. Crystal Growth Device This crystal growth device is for growing a desired semiconductor crystal on the crystal growth surface of the substrate 8 by the flux method. In the heating vessel 2 disposed inside the heat and pressure resistant vessel 1, The gas introduction pipe 4 for introducing the nitrogen-containing gas 7 is connected. A shaft 6 extending from the rocking device 5 is connected to the opposite side of the heating container 2 so as to be coaxial with the gas introduction pipe 4. The oscillating device 5 includes a motor and a motor control device. In the reaction vessel 3 made of boron nitride, the mixed flux and the substrate 8 are put.

2. Crystal Growth by Flux Method Crystal growth for crystal growth of a gallium nitride single crystal using the crystal growth apparatus of FIG. 1 will be described below.
(1) First, a GaN film having a thickness of 3 μm was formed on the crystal growth surface of the sapphire substrate by the MOVPE method, thereby completing the substrate 8 of FIG.
(2) Next, the substrate 8 was placed at the bottom of the reaction vessel 3, and sodium (Na) and lithium (Li) were further added to the reaction vessel 3. At this time, the amount of sodium (Na) was about 8.8 g, and the amount of lithium (Li) was about 0.027 g. When converted to a molar ratio, it is 99: 1.

(3) Next, the reaction vessel 3 was set in the heating vessel 2, and the reaction vessel 3 was tilted in a certain direction. With this setting, the substrate 8 was set so as not to touch the mixed flux of sodium (Na) and lithium (Li).

(4) Next, nitrogen gas (N ₂ ) heated to about 1000 ° C. was passed through the reaction chamber for about 30 minutes to clean the crystal growth surface of the substrate 8. At this time, the gas pressure in the heating container 2 is periodically changed between about 0 to 10 atm (1 to 10 × 10 ⁵ Pa), and nitrogen (N ₂ ) gas is poured into the heating container 2 ( Cleaning gas inflow / exhaust treatment was performed by repeating compression and exhaust.

(5) Thereafter, nitrogen gas was newly introduced, the gas pressure in the heating container 2 was increased to 10 atm (about 10 × 10 ⁵ Pa), and the temperature was set to 890 ° C.
(6) Thereafter, the reaction vessel 3 is swung using the rocking device 5 to move the raw material liquid 9 (mixed flux) back and forth as illustrated in FIGS. 2-A, -B, and -C. Thus, the crystal growth surface of the GaN film was always covered with the thin mixed flux 9. In addition, the temperature and pressure were maintained constant for 4 hours while continuing this oscillation. The oscillation cycle at this time may be about 1 to several reciprocations per minute.

(7) Then, with the reaction vessel 3 tilted so that the flux does not touch the substrate 8, the temperature is lowered and lowered to about room temperature and normal pressure, and the substrate 8 is taken out from the heating vessel 2, and the substrate 8 is placed around the substrate 8. The adhered flux (Na, Li) was removed using ethanol. As a result, a transparent bulk GaN single crystal having a uniform thickness obtained by crystal growth on the substrate 8 was obtained.

The thickness of the GaN single crystal obtained by the above method was about 10 μm, and the maximum diameter was 5 cm or more.
Moreover, when photoluminescence was measured about this GaN single crystal under normal temperature, the intensity | strength of 10 mW or more was shown with respect to the excitation light of wavelength 325nm.
Further, when the XRD peak half width of the X-ray reflected from the (100) plane was measured, it was 100 arc.sec or less.
From the above, it can be seen that, for example, a desired high-quality optical element substrate having a thickness of 400 μm and a low dislocation density can be obtained by performing the crystal growth process for about 160 hours.

  In the above crystal growth, the second main component of the mixed flux is lithium (Li), but calcium (Ca) may be used instead of lithium (Li) as the second main component of the mixed flux. . Further, in addition to lithium (Li), calcium (Ca) may be used.

Further, as a gas containing nitrogen (N) which is a crystal raw material, nitrogen gas (N ₂ ), ammonia gas (NH ₃ ), a mixed gas of these gases, or the like can be used. In the above composition formula of the group III nitride compound semiconductor constituting the desired semiconductor crystal, at least a part of the above group III elements (Al, Ga, In) is boron (B) or thallium ( Tl) or the like, or at least part of nitrogen (N) can be replaced with phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), or the like.

  In addition, as the p-type impurity (acceptor), for example, an alkaline earth metal (eg, magnesium (Mg), calcium (Ca), or the like) can be added. As the n-type impurity (donor), for example, an n-type impurity such as silicon (Si), sulfur (S), selenium (Se), tellurium (Te), or germanium (Ge) may be added. it can. Moreover, two or more elements may be added simultaneously to these impurities (acceptor or donor), or both types (p-type and n-type) may be added simultaneously. That is, these impurities can be added to a desired semiconductor crystal, for example, by being previously melted in a flux.

A procedure for creating the base substrate (template 10) used in the crystal growth process by the flux method in the second embodiment will be described below with reference to FIG.
1. Preparation of base substrate (1) First, the protective film 15 is formed on the back surface of the silicon substrate 11 (the soluble material of the present application). The protective film 15 may be formed by laminating an AlN layer according to, for example, the MOVPE method, or an appropriate metal such as tantalum (Ta) may be formed using a sputtering apparatus or a vacuum evaporation apparatus. Anyway.

(2) Next, by crystal growth according to the MOVPE method, a buffer layer 12 made of AlGaN is laminated on a silicon substrate 11 having a thickness of about 400 μm, and a GaN layer 13 is further laminated thereon. This GaN layer 13 may be partially dissolved in the flux until the growth of the desired semiconductor crystal by the flux method is started. Therefore, the GaN layer 13 is laminated so as not to disappear at that time.
The template 10 (underlying substrate) can be produced by the above steps (1) and (2).

2. Configuration of Crystal Growth Device FIGS. 4-A and -B show a configuration diagram of the crystal growth device according to the second embodiment. This crystal growth apparatus includes a raw material gas tank 21 for supplying nitrogen gas, a pressure regulator 22 for adjusting the pressure of the growth atmosphere, a leak valve 23, and an electric furnace 25 for performing crystal growth. The electric furnace 25, the piping connecting the raw material gas tank 21 and the electric furnace 25, etc. are made of stainless steel (SUS) or alumina material, copper, or the like.

A stainless steel container 24 (reaction chamber) is disposed inside the electric furnace 25, and a crucible 26 (reaction container) is set in the stainless steel container 24. The crucible 26 can be formed of, for example, boron nitride (BN) or alumina (Al ₂ O ₃ ).
The temperature in the electric furnace 25 can be arbitrarily controlled to rise and fall within a range of 1000 ° C. or less. Further, the pressure in the crystal atmosphere in the stainless steel container 24 is arbitrarily controlled by the pressure regulators 22 and 29, the leak valve 23, etc. within a range of 1.0 × 10 ⁷ Pa or less via the pipe 28. be able to.

  FIG. 4-B shows a cross-sectional view of the stainless steel container 24. A side wall 27 of the reaction chamber is formed in a cylindrical shape, and a heater H for heating is disposed in a ring shape on the outer lower portion of the foot. The heater H is for generating thermal convection in the mixed flux 9 in the crucible 26 by heating the crucible 26 (reaction vessel) through the bottom of the reaction chamber.

3. Crystal Growth Process Hereinafter, the crystal growth process of the present example using the crystal growth apparatus of FIGS. 4-A and -B will be described with reference to FIGS.
(1) First, sodium (Na), lithium (Li), and Ga as an element III are put into a reaction vessel (crucible 26), and the reaction vessel (crucible 26) is used as a reaction chamber (stainless steel vessel) of a crystal growth apparatus. 24), the gas in the reaction chamber is exhausted. However, the molar ratio of sodium (Na) to lithium (Li) was 99: 1. In addition, if necessary, any of the above-mentioned additives such as alkaline earth metals may be introduced into the crucible in advance. In addition, when these operations are performed in the air, Na is immediately oxidized, so the operation of setting the substrate and raw materials in the reaction vessel is performed in a glove box filled with an inert gas such as Ar gas. .

(2) Next, the gas pressure in the reaction chamber is periodically varied between about 0 to 10 atm (1 to 10 × 10 ⁵ Pa), and nitrogen (N ₂ ) gas is poured into the reaction chamber (compression). ) And evacuation are repeated to clean the crystal growth surface of the substrate. The processing temperature at this time is 900 ° C., and the cleaning processing time is about 30 minutes.

(3) Next, while adjusting the temperature of the crucible between 850 ° C. and 880 ° C., nitrogen gas (N ₂ ) is newly fed into the reaction chamber of the crystal growth apparatus in parallel with this temperature adjustment step. The gas pressure in the reaction chamber is maintained at about 3 to 5 atmospheres (3 to 5 × 10 ⁵ Pa). At this time, the protective film 15 of the template 10 is immersed in the melt (mixed flux) generated as a result of the temperature rise, and the crystal growth surface of the template 10, that is, the exposed surface of the GaN layer 13 is melted. It is arranged near the interface between the liquid and nitrogen gas.

(4) Thereafter, the heater H in FIG. 4-B is heated to generate thermal convection of the mixed flux 9, thereby continuously agitating and mixing the flux while maintaining the crystal growth conditions of (3) above. Maintained.

  By setting the conditions as described above, the vicinity of the interface between the melt of Ga and Na and the nitrogen gas is continuously supersaturated with the material atoms of the group III nitride compound semiconductor, so that the desired semiconductor crystal (n The type GaN single crystal 20) can be grown smoothly from the crystal growth surface of the template 10 (FIG. 3) (FIG. 5-A). Here, the n-type semiconductor crystal (n-type GaN single crystal 20) is obtained because the silicon substrate 11 melted in the flux is added to the growing crystal as an n-type additive (Si). (FIG. 5-B).

  However, the protective film 15 may be thickly stacked so that the silicon substrate 11 does not melt into the flux during the crystal growth process. In this case, an undoped optical element substrate that is not doped with an additive such as silicon (Si) can be crystal-grown.

4). Dissolution of crystal growth substrate When the n-type GaN single crystal 20 is grown to a sufficient film thickness of, for example, about 500 μm or more by the above crystal growth process, the temperature of the crucible is continuously maintained at 850 ° C. or more and 880 ° C. or less for protection. Waiting for all of the film 15 and the silicon substrate 11 to dissolve in the flux (FIGS. 5-B to C), the gas pressure of nitrogen gas (N ₂ ) is changed to 3 to 5 atm (3 to 5 × 10 ⁵ Pa). ) The temperature of the reaction chamber is lowered to 100 ° C. or lower while maintaining the degree.

  However, the step of dissolving the silicon substrate 11 in the flux and the above-described temperature lowering step may be carried out in a somewhat overlapped manner. Further, for example, as described above, at least a part of the protective film 15 and the silicon substrate 11 may be dissolved in the flux during the growth process of the GaN single crystal 20. The mode of parallel and simultaneous progress of these steps can be appropriately adjusted depending on, for example, the form of the protective film 15.

5. Flux removal Next, the n-type GaN single crystal 20 (desired semiconductor crystal) is taken out from the reaction chamber of the crystal growth apparatus, the temperature is lowered to 30 ° C. or lower, and the surroundings are also maintained at 30 ° C. or lower. Then, the flux (Na) attached around the n-type GaN single crystal 20 is removed using ethanol.
By sequentially executing the above steps, it is possible to manufacture an optical element substrate (n-type GaN single crystal 20) having a high quality thickness of 400 μm or more with fewer cracks than conventional methods at a low cost by the flux method. it can.

  In Example 3, in order to determine the crystal growth conditions of the details (p-type layer 107) of the LED, which will be described later, first, a sample of a p-type AlGaN crystal layer is prototyped and the characteristics of those semiconductor layers are investigated. did.

In the crystal growth treatment of this sample (p-type AlGaN crystal layer), the carrier is based on a metal organic vapor phase growth method using a mixed gas of hydrogen (H ₂ ) and nitrogen (N ₂ ) as a carrier gas. The p-type AlGaN crystal layer was stacked while changing the nitrogen partial pressure ratio of the gas from 0 to 1. A sapphire substrate was used as the crystal growth substrate. The source gases used at this time were ammonia gas (NH ₃ ), trimethylgallium (Ga (CH ₃ ) ₃ ), trimethylaluminum (Al (CH ₃ ) ₃ ), trimethylindium (In (CH ₃ ) ₃ ), silane ( SiH ₄ ) and cyclopentadienyl magnesium (Mg (C ₅ H ₅ ) ₂ ). Further, nitrogen (N ₂ ) was used for the bubbler for supplying the gas of the metal source.

The above sample (p-type AlGaN crystal layer) was obtained after an AlN buffer layer and an undoped GaN layer were provided on a sapphire substrate and an Al _0.24 Ga _0.76 N: Mg layer was provided and the resistance was reduced under the same conditions. Is. That is, magnesium was doped as an acceptor impurity of the target p-type AlGaN crystal layer.
Table 1 below shows the physical properties of each semiconductor obtained from these samples.

Hereinafter, the nitrogen partial pressure ratio of the carrier gas is denoted as R. In Table 1, the case where R = 1.0 is used as a reference, and the case where a more desirable characteristic is obtained is indicated by ◯. Further, a case where characteristics substantially equivalent to the case of R = 1.0 is obtained is indicated by Δ, and a case where the characteristics are deteriorated is indicated by x. However, the following items were adopted as these evaluation items.
(1) PL intensity The intensity of photoluminescence having a wavelength of 326 nm was compared. The higher the strength, the better.
(2) Mobility We compared the hole mobility. The higher the hole mobility, the better.
(3) Surface roughness The surface roughness was compared. That is, it is desirable that the surface roughness indicated by the root mean square (rms) of the height displacement of each part of the surface of the sample (p-type AlGaN crystal layer) with respect to the average height of the surface is smaller.
(4) Al component distribution The Al composition ratio of each part in the sample was measured, and the variation was compared. It is desirable that the Al composition ratio is uniform.
(5) Film thickness distribution The film thickness of the sample (p-type AlGaN crystal layer) was measured, and the variation was compared. It is desirable that the film thickness is uniform.

From these investigation results, it can be determined that the best physical properties can be obtained when the carrier gas is composed of nitrogen and hydrogen and the nitrogen partial pressure ratio is 0.6 ≦ R ≦ 0.7.
Hereinafter, an example of manufacturing an LED having a p-type AlGaN crystal layer formed according to such conditions will be disclosed.

FIG. 6 shows a schematic cross-sectional view of the LED. The optical element substrate (crystal growth substrate 101) of this LED 100 is a transparent bulk semiconductor single crystal excellent in crystallinity manufactured according to the manufacturing method of Example 2 above, and silicon (Si) is 5 × 10 5. ^It consists of approximately 300 μm thick GaN crystal doped with ¹⁸ cm ⁻³ .

Further, on this optical element substrate (crystal growth substrate 101), 20 pairs of layers 1051 made of undoped In _0.1 Ga _0.9 N having a thickness of 1.5 nm and layers 1052 made of undoped GaN having a thickness of 3 nm are alternately arranged. A multilayer 105 having a thickness of 90 nm is formed by stacking. Further thereon, a multiple quantum well layer 106 is formed in which a barrier layer 1062 made of undoped GaN having a thickness of 17 nm and a well layer 1061 made of undoped In _0.2 Ga _0.8 N having a thickness of 3 nm are sequentially stacked.

Further, a p-type layer 107 made of p-type Al _0.2 Ga _0.8 N having a thickness of 15 nm doped with 2 × 10 ¹⁹ / cm ^{3 of} Mg is formed on the multiple quantum well layer 106. On the mold layer 107, a layer 108 made of undoped Al _0.02 Ga _0.98 N having a thickness of 300 nm was formed. Furthermore, a p-type GaN layer 110 having a thickness of 80 nm made of a GaN crystal doped with 1 × 10 ²⁰ cm ^{−3 of} magnesium is stacked thereon, and further magnesium is 2 × 10 ²⁰ cm ^{−. A} 20-nm-thick p-type GaN layer 111 made of ^3- doped GaN crystal is stacked.

The p-side electrode was composed of an ITO electrode 120 made of ITO having a thickness of about 300 nm laminated on the p-type GaN layer 111. Further, a protective film 130 made of a SiO ₂ film is formed on the top.
On the other hand, the n-side n-electrode 140 laminated on the back surface of the crystal growth substrate 101 by vapor deposition is composed of a first layer 141 made of vanadium (V) having a thickness of about 18 nm and aluminum (Al) having a thickness of about 500 nm. It is configured in a multilayer structure with the second layer 142.
However, the n-electrode 140 may be formed in a single layer structure using a metal such as rhodium (Rh).

In the LED 100 having the above-described configuration, when the p-type layer 107 made of the p-type Al _0.2 Ga _0.8 N is formed, a mixture of nitrogen and hydrogen having a nitrogen partial pressure ratio of R = 2/3 as a carrier gas of the source gas In the crystal growth of other semiconductor crystal layers using a gas, the carrier gas of the source gas was composed of only nitrogen (that is, R = 1.0). The light emission intensity of the LED 100 was improved by about 20% compared to other prototypes having the same configuration as described above in which the p-type layer 107 was formed with R = 1.0.

  Thus, the group III nitride compound semiconductor layer having acceptor impurities and aluminum formed by optimizing the nitrogen partial pressure ratio R is formed directly on the light emitting layer of the LED or LD to form the light emitting layer or the like. On the other hand, it works well as a semiconductor layer having a wide band gap. Another reason why the Group III nitride compound semiconductor layer having aluminum can be formed with very good quality is that the semiconductor crystal of extremely good quality manufactured based on the manufacturing method of Example 2 is used. This is probably because a crystal growth substrate made of That is, it is considered that the light emission intensity of the LED 100 is improved by about 20% due to a good synergistic effect of optimization of the quality of the crystal growth substrate and the crystal growth conditions (nitrogen partial pressure ratio R).

Moreover, when the tolerance test by -1000v electrostatic withstand voltage was implemented regarding said LED100, the electrostatic withstand voltage performance higher than before was able to be verified. This breakdown voltage performance was obtained by a synergistic effect of the very low dislocation density of the crystal growth substrate 101 and the insertion of the layer 108 made of undoped Al _0.02 Ga _0.98 N having a thickness of 300 nm. it is conceivable that.

Furthermore, the configuration of the LED 100 is advantageous also in the following points.
(1) By using a conductive substrate, a crystal growth step prior to a conventional n ⁺ layer stacking step such as an AlN buffer layer, an undoped GaN layer, or an n ⁺ layer is unnecessary.
(2) Since the upper and lower electrodes are provided, short-circuiting between the electrodes is unlikely to occur.
(3) Due to the upper and lower electrode structure, a dry etching step for forming an n electrode in the n ⁺ layer is unnecessary.
(4) Due to the upper and lower electrode structures, the n electrode on the back surface can also serve as a reflective metal film.
(5) With the upper and lower electrode structure, substantially the entire upper surface can be used as a light extraction surface.
(6) Since the current density distribution is made uniform by the upper and lower electrode structures, uneven light emission is less likely to occur.

In FIG. 7, typical sectional drawing of LED200 of the present Example 4 is shown. In this LED 200, a transparent bulk optical element substrate 201 having excellent crystallinity and having a thickness of about 400 μm is used, on which GaN doped with silicon (Si) 1 × 10 ¹⁸ / cm ³ is used. An n-type contact layer 204 (high carrier concentration n ⁺ layer) having a thickness of about 5 μm is formed.
The optical element substrate 201 is made of a semiconductor single crystal manufactured according to the manufacturing method of the second embodiment, and is composed of a GaN crystal having a thickness of about 400 μm doped with silicon (Si) at 5 × 10 ¹⁸ cm ^−3. Has been.

On the n-type contact layer 204, an n-type layer 205 made of n-type Al _0.15 Ga _0.85 N having a thickness of 25 nm doped with silicon (Si) at 1 × 10 ¹⁷ / cm ³ is formed. . Further thereon, three pairs of a well layer 2061 made of undoped In _0.2 Ga _0.8 N with a thickness of 3 nm and a barrier layer 2062 made of undoped GaN with a thickness of 20 nm are stacked to form a light emitting layer 206 having a multiple quantum well structure. Has been.

Further, a p-type layer 207 made of p-type Al _0.15 Ga _0.85 N having a thickness of 25 nm doped with Mg 2 × 10 ¹⁹ / cm ³ is formed on the light emitting layer 206. On the p-type layer 207, a DBR multi-layer 208 in which five pairs of a layer 2081 made of undoped GaN having a thickness of 47 nm and a layer 2082 made of undoped Al _0.25 Ga _0.75 N having a thickness of 49 nm are formed. On the DBR multilayer 208, a p-type contact layer 209 made of 100-nm-thick p-type GaN doped with 8 × 10 ¹⁹ Mg was formed.

  A thin metal layer 211 is formed on the p-type contact layer 209 by metal deposition. The thin metal layer 211 is formed of a metal layer made of cobalt (Co) or nickel (Ni) having a thickness of about 10 mm and bonded to the p-type contact layer 208. The positive electrode 220 was formed of rhodium (Rh) having a thickness of about 3000 mm. The positive electrode 220 may be composed of a metal layer made of silver (Ag), ruthenium (Ru), platinum (Pt), palladium (Pd), or an alloy containing at least one of these metals.

The n-electrode 240 having a multilayer structure is composed of a first layer 241 made of vanadium (V) having a thickness of about 18 nm and an aluminum (Al) having a thickness of about 100 nm from a part of the exposed portion of the n-type contact layer 204. It is comprised by laminating | stacking the 2nd layer 242 which consists. A protective film 230 made of a SiO ₂ film is formed on the top.

Due to the insertion action of the DBR multilayer 208, the light emission output of the LED 200 is improved to about 1.4 times the light emission output of other substantially equivalent LED samples without the DBR multilayer 208.
Further, due to the insertion action of the DBR multi-layer 208 having a multilayer structure of undoped semiconductor crystal layers, an extremely high breakdown voltage performance of 6000 V in the forward voltage could be obtained. Further, as one of the other factors that have obtained such a high breakdown voltage performance, the dislocation density of the crystal growth substrate (optical element substrate 201) can be raised. That is, it is considered that the above-described excellent pressure resistance performance was obtained by the synergistic effect of the improvement of the quality of the crystal growth substrate and the insertion of the multilayer structure (DBR multi-layer 208) composed of the undoped semiconductor crystal layer.

  FIG. 8 is a cross-sectional view of the LED 300 of the fifth embodiment. The LED 300 includes an n-type contact layer 330, an electrostatic withstand voltage portion 340, an n-type cladding layer 350, and an MQW active layer 360 on the crystal growth surface of the optical element substrate 310 having the same structure as the optical element substrate 201 of the LED 200 described above. , P-type cladding layer 370 and p-type contact layer 380 are obtained by sequentially growing crystals. However, the electrostatic withstand voltage portion 340 is obtained by sequentially laminating each semiconductor layer by crystal growth in the order of the additive-free semiconductor layer 341, additive semiconductor layer 342, additive-free semiconductor layer 343, and additive semiconductor layer 344 from the lower side. It is. In the electrostatic withstand voltage portion 340, the additive-free semiconductor layer 341 and the additive semiconductor layer 342 form the first set of withstand voltage structure of the present invention. Further, the additive-free semiconductor layer 343 and the additive semiconductor layer 344 Thus, the second withstand voltage structure of the present invention is formed.

Hereinafter, the manufacturing method of said LED300 is demonstrated using FIG.
Each of the semiconductor layers of the LED 300 is a crystal grown by vapor phase growth using an organic metal compound vapor phase growth method (MOVPE). The gases used here are carrier gas (H ₂ or N ₂ ), ammonia gas (NH ₃ ), trimethylgallium (Ga (CH ₃ ) ₃ : hereinafter referred to as “TMG”), and trimethylindium ( In (CH ₃ ) ₃ : hereinafter referred to as “TMI”), trimethylaluminum (Al (CH ₃ ) ₃ : hereinafter referred to as “TMA”), silane (SiH ₄ ), and cyclopentadienyl magnesium ( Mg (C ₅ H ₅ ) ₂ : hereinafter referred to as “CP ₂ Mg”).
However, as a method for crystal growth of these semiconductor layers, in addition to the above-mentioned organometallic compound vapor phase epitaxy (MOVPE), molecular beam vapor phase epitaxy (MBE), halide vapor phase epitaxy (HVPE), etc. Can be used.

(Cleaning of crystal growth surface)
First, while flowing hydrogen, the temperature of the optical element substrate 310 is raised to 1050 ° C., and the crystal growth surface is cleaned for about 5 minutes.

(N-type contact layer 330)
Next, the temperature of the optical element substrate 310 is increased to 1100 ° C. while flowing hydrogen gas (carrier gas) and ammonia gas. As soon as the substrate temperature reaches 1100 ° C., TMG, ammonia gas, and silane gas as impurity gases are used. The n-type contact layer 330 made of GaN having a Si concentration of 4.5 × 10 ¹⁸ [cm ⁻³ ] is grown to a thickness of 4 μm.

(Electrostatic withstand voltage part 340)
(1) Additive-free semiconductor layer 341
Next, only the silane gas is stopped and an undoped semiconductor layer 341 made of undoped GaN is grown to a thickness of 200 nm using TMG and ammonia gas at 1100 ° C.
(2) Additive semiconductor layer 342
Subsequently, the TMG is turned off and the temperature is lowered to 850 ° C. When the temperature reaches 850 ° C., TMG and silane gas are added to grow an additional semiconductor layer 342 made of GaN doped with Si of 4.5 × 10 ¹⁸ [cm ⁻³ ] to a thickness of 50 nm.
The two semiconductor layers of the additive-free semiconductor layer 341 and the additive semiconductor layer 342 constitute the first set of withstand voltage structure of the present invention counted from the n-type contact layer 330 side.

(3) Additive-free semiconductor layer 343
Thereafter, only the silane gas is stopped and an undoped semiconductor layer 343 made of undoped GaN is grown at a film thickness of 200 nm at the same temperature (850 ° C.).
(4) Additive semiconductor layer 344
Finally, silane gas is added, and an additional semiconductor layer 344 made of GaN doped with Si of 4.5 × 10 ¹⁸ [cm ⁻³ ] is grown at the same temperature (850 ° C.) to a thickness of 30 nm.
The two semiconductor layers of the additive-free semiconductor layer 343 and the additive semiconductor layer 344 constitute a second set of withstand voltage structures of the present invention counted from the n-type contact layer 330 side.

(N-type cladding layer 350)
Next, silane gas and TMG are stopped and the temperature is raised to 1050 ° C. When the temperature reaches 1050 ° C., TMG is added, and a first nitride semiconductor layer made of undoped GaN is grown to 4 nm. Next, the temperature is set to 800 ° C., and TMG, TMI, and ammonia are used to undoped In _0.13 Ga _0.87. A second nitride semiconductor layer made of N is grown by 2 nm. Then, these operations are repeated, and 10 layers are alternately stacked in the order of 1 + 2, and finally, an n-type cladding made of a multilayer film having a superlattice structure in which a first nitride semiconductor layer made of GaN is grown to 4 nm. Layer 350 is grown to a thickness of 64 nm.

(MQW active layer 360)
Next, the temperature is set to 800 ° C., and a barrier layer made of additive-free GaN with a thickness of 20 nm and a well layer made of additive-free In _0.2 Ga _0.8 N with a thickness of 3 nm are alternately stacked. An MQW active layer 360 is grown.

(P-type cladding layer 370)
Next, a third layer of p-type Al _0.2 Ga _0.8 N doped with 1 × 10 ²⁰ [cm ⁻³ ] Mg using TMG, TMA, ammonia, CP ₂ Mg (cyclopentadienyl magnesium) at a temperature of 1050 ° C. Indium doped with 1 × 10 ²⁰ [cm ⁻³ ] of Mg using TMG, TMI, ammonia, CP ₂ Mg at a temperature of 800 ° C. _A fourth nitride semiconductor layer made of _0.03 Ga _0.97 N is grown to a thickness of 2.5 nm. Then, these operations are repeated, and 5 layers are alternately stacked in the order of 3 + 4, and finally a p-type formed of a multilayer film having a superlattice structure in which a third nitride semiconductor layer is grown to a thickness of 4 nm. A cladding layer 370 is grown to a thickness of 36.5 nm.

(P-type contact layer 380)
Subsequently, a p-type contact layer 380 made of p-type GaN doped with Mg at 1 × 10 ²⁰ [cm ⁻³ ] is grown to a thickness of 70 nm using TMG, ammonia, and CP ₂ Mg at 1050 ° C.

  After that, a mask having a predetermined shape is formed on the surface of the uppermost p-type contact layer 380, and etching is performed from the p-type contact layer 380 side by an RIE (reactive ion etching) apparatus. As shown in FIG. A part of the contact layer 330 is exposed.

Next, a translucent p-electrode 391 a is deposited on the p-type contact layer 380, and an n-electrode 392 is deposited on the n-type contact layer 330. The p-electrode 391a includes a first layer made of cobalt (Co) having a thickness of about 1.5 nm directly bonded to the p-type contact layer 380 and a first layer made of gold (Au) having a thickness of about 6 nm bonded to the cobalt film. It is configured by sequentially laminating two layers.
Further, the p-pad electrode 391b deposited on the translucent p-electrode 391a is a first layer made of vanadium (V) having a thickness of about 18 nm and a first layer made of gold (Au) having a thickness of about 1.5 μm _. Two layers and a third layer made of aluminum (Al) having a thickness of about 10 nm are sequentially stacked.
On the other hand, the n-electrode 392 having a multilayer structure includes a first layer made of vanadium (V) having a thickness of about 18 nm and an aluminum (Al ) And the second layer are sequentially laminated.

Note that a protective film made of a SiO ₂ film may be formed on the exposed surface of the translucent p-electrode 391a, the side wall surface of each semiconductor layer exposed by etching, or the like. Further, a reflective metal layer made of, for example, aluminum (Al) having a film thickness of about 500 nm may be deposited on the outermost lowermost portion corresponding to the bottom surface of the sapphire substrate 310. When such a reflective metal layer is formed, nitrides such as TiN and HfN may be used as the material in addition to metals such as Rh, Ti and W.

  The emission peak wavelength of the LED 300 produced as described above was about 470 nm (blue light emission), and the drive voltage Vf at a forward current of 20 mA was about 3.5v. A durability test (an ESD test of a human body model (HBM)) in which a reverse electrostatic voltage of 1000 v to 1800 v was applied to the LED 300 was performed. The survival rate of the LED 300 with respect to each static voltage at that time exceeded 80% in any case, and showed a significantly higher value than before.

  The breakdown voltage performance that is significantly superior to that of the prior art largely depends on the electrostatic breakdown voltage section 340, but as one of the other factors for obtaining such a high breakdown voltage performance, a crystal growth substrate (optical It can be mentioned that the dislocation density of the element substrate 310) is low. That is, it is considered that the above-described excellent withstand voltage performance is obtained by the synergistic effect of the crystal growth substrate and the electrostatic withstand voltage unit 340.

[Other variations]
The embodiment of the present invention is not limited to the above-described embodiment, and other modifications as exemplified below may be made. Even with such modifications and applications, the effects of the present invention can be obtained based on the functions of the present invention.

(Modification 1)
For example, although the multiple quantum well layer 106 is formed in the above Example 3, in the LED having the p-type AlGaN layer as in the above Example 3, the light emitting layer is, for example, a single layer or a single quantum well structure. Any configuration such as (SQW) or multiple quantum well structure (MQW) can be employed. In particular, when the light emitting layer has a multiple quantum well structure, a group III nitride compound semiconductor Al _y Ga _1-yz In _z N (0 ≦ y <0) having an appropriate composition ratio containing at least indium (In). A well layer of 1,0 <z ≦ 1) is preferably formed in the light emitting layer.
These structures having the p-type AlGaN layer as described above may be applied to other optical elements such as LDs.

(Modification 2)
Also, the electrostatic withstand voltage structure (such as the optical element substrate 310 and the electrostatic withstand voltage unit 340) similar to that of the LED 300 of the fifth embodiment is very useful for a conventional semiconductor laser. That is, even in those semiconductor lasers having a known current confinement structure or a light guide layer, the electrostatic withstand voltage performance can be remarkably improved by providing a structure similar to the above electrostatic withstand voltage structure.

  For example, when manufacturing an edge-emitting semiconductor laser, it is important that the end face of the resonator can be cleanly formed by cleavage. Therefore, a crystal growth substrate with high crystal quality (the optical element substrate of the present invention) is used. This is much more advantageous. In addition, since the output light of these semiconductor lasers reciprocates in the resonator many times by reflection before output, it is particularly advantageous to use the optical element substrate of the present invention from the viewpoint of enhancing the transparency of the resonator itself. It becomes.

(Modification 3)
Further, as exemplified in, for example, “JP 2000-174323: GaN-based semiconductor light receiving element”, semiconductor light receiving elements having a so-called PIN structure are generally known. However, the internal quantum efficiency of these conventional light receiving elements is reduced. The optical device substrate of the present invention, which is extremely excellent in crystal quality such as dislocation density and transparency, in terms of improving the external quantum efficiency, improving electrostatic withstand voltage performance, life, and yield, etc. It is very advantageous to use.

Further, based on the conductivity that can be easily and arbitrarily provided in the optical element substrate of the present invention, if the upper and lower electrode structures similar to those of the LED 100 of Example 3 described above are given to these light receiving elements, Can also have the following advantages.
(1) By using a conductive substrate, a crystal growth step prior to a conventional n ⁺ layer stacking step such as an AlN buffer layer, an undoped GaN layer, or an n ⁺ layer is unnecessary.
(2) Since the upper and lower electrodes are provided, short-circuiting between the electrodes is unlikely to occur.
(3) Due to the upper and lower electrode structure, a dry etching step for forming an n electrode in the n ⁺ layer is unnecessary.
(4) Due to the upper and lower electrode structures, the n electrode on the back surface can also serve as a reflective metal film.
(5) With the upper and lower electrode structure, substantially the entire upper surface can be used as the light receiving surface.
(6) Since the current density distribution is made uniform by the upper and lower electrode structures, uneven reception of light is less likely to occur.

  The present invention is useful for manufacturing a semiconductor device using a semiconductor crystal made of a group III nitride compound semiconductor. Examples of these semiconductor devices include other general semiconductor devices such as FETs in addition to light emitting elements and light receiving elements such as LEDs and LDs.

Sectional view of the crystal growth apparatus used in Example 1 Sectional drawing which illustrates operation | movement of the crystal growth apparatus used in Example 1. FIG. Sectional drawing which illustrates operation | movement of the crystal growth apparatus used in Example 1. FIG. Sectional drawing which illustrates operation | movement of the crystal growth apparatus used in Example 1. FIG. Sectional drawing in the creation process of the template 10 of Example 2. Configuration diagram of crystal growth apparatus used in Example 2 Partial sectional view of the crystal growth apparatus used in Example 2 Sectional drawing in the crystal growth process of the semiconductor crystal of Example 2. Sectional drawing in the crystal growth process of the semiconductor crystal of Example 2. Sectional drawing in the crystal growth process of the semiconductor crystal of Example 2. Sectional drawing of LED100 of Example 3. Sectional drawing of LED200 of Example 4. Sectional drawing of LED300 of Example 5.

2: Reaction chamber 3: Reaction vessel 8: Seed crystal 9: Mixed flux H: Heater 10: Template 20: Semiconductor substrate 100: LED
101: Semiconductor substrate 107: p-type AlGaN layer

Claims (4)

Among mixed fluxes having a plurality of types of metal elements selected from alkali metals or alkaline earth metals, group III elements of gallium (Ga), aluminum (Al) or indium (In) and nitrogen (N) In the method of manufacturing an optical element substrate in which a group III nitride compound semiconductor crystal is crystal-grown by reacting
Crystal growth of the group III nitride compound semiconductor crystal while stirring and mixing the mixed flux and the group III element,
Before crystal growth of the crystal growth surface of the seed crystal or the base substrate, the group III nitride compound semiconductor crystal,
Hydrogen (H ₂ ) gas, nitrogen (N ₂ ) gas, ammonia (NH ₃ ) gas, rare gas (He, Ne, Ar, Kr, Xe, or Rn) or two or more kinds of these gases Using a mixed gas mixed at an arbitrary mixing ratio as a cleaning gas, a cleaning process is performed at a temperature of 900 ° C. or higher and 1100 ° C. or lower for a time of 1 minute or longer ,
At least part of the base substrate for crystal growth of the group III nitride compound semiconductor crystal, a soluble material that dissolves in the mixed flux,
The soluble material is dissolved in the mixed flux during the crystal growth step of the group III nitride compound semiconductor crystal or near the growth temperature after the crystal growth step of the group III nitride compound semiconductor crystal. A method for producing an optical element substrate, comprising: 2. The method of manufacturing an optical element substrate according to claim 1 , wherein the soluble material has an impurity to be added to the group III nitride compound semiconductor crystal at least in part. The flux mixture is lithium (Li) or calcium (Ca), and an optical element manufacturing method of a substrate according to claim 1 or claim 2, characterized in that it has a sodium (Na). The mixed flux is an impurity to be added to the group III nitride compound semiconductor crystal,
Boron (B), thallium (Tl), calcium (Ca), compounds containing calcium (Ca), silicon (Si), sulfur (S), selenium (Se), tellurium (Te), carbon (C), oxygen ( O), aluminum (Al), indium (In), alumina (Al ₂ O ₃ ), indium nitride (InN), silicon nitride (Si ₃ N ₄ ), silicon oxide (SiO ₂ ), indium oxide (In ₂ O ₃₎ ), zinc (Zn), magnesium (Mg), zinc oxide (ZnO), according to any one of claims 1 to 3, characterized in that it has a magnesium oxide (MgO), or germanium (Ge) Manufacturing method of the optical element substrate.

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