JP4947129B2 - Substrate bonding structure - Google Patents

Description

  The present invention relates to a bonding structure in which a ceramic substrate and a resin substrate are connected by bumps.

  Conventionally, reinforcing bumps having a cross-sectional area equal to or larger than the cross-sectional area of signal bumps are arranged at corners near the quadrangle of a BGA (Ball Grid Array), thereby reinforcing underfill reinforcement. Techniques are known that increase the mechanical strength of the package without doing so.

JP 2001-68594 A (13th to 14th paragraphs)

However, when the ceramic substrate and the resin substrate are BGA-connected, the difference in linear expansion between the two becomes 10 PPM or more, so when the temperature change of about 70 to 100 ° C. occurs in the substrate, the substrates are arranged in a square shape. Stress concentration occurs along the four sides connecting the outermost bumps.
This stress concentration causes cracks in the ceramic substrate and the bumps themselves around the outermost bumps. This crack is often a micro-sized breakage that cannot be visually confirmed, and the progress of the crack causes a signal breakage of the BGA in the long term. As a result, there is a problem that the long-term reliability of the device is impaired.

  The bonding structure of the ceramic substrate and the resin substrate according to the present invention aims to obtain a bonding structure that maintains the long-term reliability of a device even if a crack occurs in a bump or a ceramic substrate due to stress concentration.

The bonded structure of the ceramic substrate and the resin substrate according to the present invention is as follows:
A ceramic substrate in which lands composed of a plurality of conductor pads are arranged and a plurality of pseudo waveguides are formed;
A resin substrate in which lands composed of a plurality of conductor pads are arranged and a plurality of pseudo waveguides are formed;
A plurality of bumps that are bonded between the land of the resin substrate and the land of the ceramic substrate, respectively , and constitute a ball grid array,
With
Among the bumps , some of the plurality of bumps arranged at the center of the ceramic substrate form a signal connection region that electrically connects the land of the resin substrate and the land of the ceramic substrate ,
Among the bumps, some other plurality of bumps arranged on the outer edge side of the substrate with respect to the signal connection region are around the connection portion of the pseudo waveguide of the ceramic substrate and the pseudo waveguide of the resin substrate. It is arranged and connected to the ground plane and forms a waveguide connection .

  According to the present invention, even if thermal stress acts on the bumps located in a predetermined region of the ceramic substrate, it is possible to extend the period during which the failure occurs due to the cracks in the connection portion, thereby extending the life.

It is a perspective view of the connection structure of the ceramic substrate and resin substrate by this Embodiment 1. FIG. Sectional drawing of the connection structure of the ceramic substrate and resin substrate by this Embodiment 1 is shown. (A) A bottom view of a ceramic substrate and (b) a top view of a resin substrate according to the first embodiment. Sectional drawing of the connection structure of the ceramic substrate and resin substrate by this Embodiment 2 is shown. According to the second embodiment, (a) a bottom view of a ceramic substrate and (b) a top view of a resin substrate are shown. The perspective view of the pseudo waveguide part by this Embodiment 2 is shown.

Embodiment 1 FIG.
FIG. 1 is a perspective view showing a connection structure between a ceramic substrate and a resin substrate according to Embodiment 1 of the present invention. FIG. 2 is a view in the direction of arrow A in FIG. FIG. 3 is a diagram illustrating an arrangement example of each land. FIG. 3A is a rear view of the ceramic substrate 2. FIG. 3B is a top view of the resin substrate 5.

  1 and 2, a semiconductor package 1 is configured by incorporating a semiconductor element inside an upper cover 3 of a ceramic substrate 2. A plurality of lands 6 are arranged on the back surface of the ceramic substrate 2. The resin substrate 5 is made of a resin such as glass epoxy resin or BT resin, and a plurality of lands 7 are arranged on the upper surface of the resin substrate 5. The lands 6 and 7 are composed of a plurality of conductor pads and have a quadrangular shape, a round shape, a bowl shape, or the like.

The lands 6 of the ceramic substrate 2 are joined to the lands 7 of the resin substrate 5 through a plurality of regularly arranged bumps 4 to form a BGA mounting structure constituting the BGA 8.
The BGA mounting structure is a method in which electrical connection between substrates is bonded on a substrate surface-to-substrate surface. Projected electrodes called balls or bumps are arranged in a lattice shape on the substrate surface in a rectangular shape in a plane. Therefore, it is called BGA. In the BGA mounting structure, a semiconductor substrate incorporating a semiconductor element can be mounted on a mother board (substrate) with a minimum area, and all junction points can be bonded simultaneously. There are various types of balls or bumps, such as solder, resin covered with a conductor film, stacked plating, metal balls, and the like, and they are properly used depending on applications and purposes. Here, these are all called bumps.

  As shown in FIG. 2, each bump 4 located at the outermost edge is connected in parallel between two or more other bumps 4 adjacent to each other. That is, as shown in FIG. 3A, the land 6 located at the outermost edge of the ceramic substrate 2 is connected to two or more other adjacent lands 6 by the conductor pattern 11 to form a parallel circuit. Yes. Further, as shown in FIG. 3B, the land 7 positioned at the outermost edge of the resin substrate 5 is connected to two or more other adjacent lands 7 by an inner conductor pattern 12 to form a parallel circuit. is doing.

  When the ceramic substrate 2 and the resin substrate 5 are bump-bonded, the connection portion of the outermost bump 4 is subjected to thermal stress due to temperature change in the use environment. The linear expansion coefficient of the ceramic substrate 2 is about 5 to 7 PPM, while the linear expansion coefficient of the resin substrate 5 is around 16 PPM, which is more than twice the difference. For this reason, since the resin substrate 5 is greatly expanded and the ceramic substrate 2 is small in elongation, when returning to room temperature after mounting and fixing, a tensile force toward the center of the ceramic substrate 2 remains at each joint portion of the bump. It remains as stress. This residual stress is larger at the outer edge of the ceramic substrate 2 and smaller at the center. In addition, the larger the size of the ceramic substrate 2, the more the residual stress at the outer edge portion increases. In an actual use environment where each substrate is exposed, a heat cycle with a temperature change width of about 70 to 100 ° C. is applied. Therefore, repeated stress due to expansion and contraction is applied while the residual stress remains.

When subjected to thermal stress due to temperature changes in the use environment, the structure of the connection point gradually deteriorates from the four corner positions. As a result, starting from the lands 6 bonded to the bumps 4 on the outer edge of the ceramic substrate 2, cracks 9 and 10 are generated in the ceramic substrate 2 and the bumps 4, respectively, as shown in FIG.
This structural deterioration eventually breaks, leading to a failure that breaks the electrical connection between the ceramic substrate 2 and the resin substrate 5. Further, the stress concentration point moves to the adjacent ball connection portion next to the connection portion of the bump 4 at the four corner positions.
As the outer edge portion where the stress of the ceramic substrate 1 is higher and further closer to the end point (corner), the thermal stress is higher and the connection reliability to the heat cycle is lower. Therefore, at least one ball connection point at the outermost edge portion per circuit Two or more balls are connected in parallel to form a redundant connection that does not break the circuit connection even if one ball connection is broken.

  In the example shown in FIG. 2, the ceramic substrate 2 has a conductor pattern 11 formed on the surface on which the BGA 8 is formed, and two or more bumps 4 are connected. Similarly, the resin substrate 5 is formed with a conductor pattern 12 on the surface on which the BGA 8 is formed, and two or more bumps 4 are connected. If the ceramic substrate 2 is a multilayer substrate, it suffices if two or more bumps 4 are connected by the inner conductor pattern. The resin substrate 5 side is exactly the same, and two or more lands 7 may be connected on the surface or may be connected on the inner layer of the resin substrate 5.

  Further, the thermal stress applied to the bump 4 at the outer edge portion increases as the outer dimension of the ceramic substrate 2 increases, and the damaged portion of the connecting portion of the bump 4 due to the thermal stress extends from the end point (corner) of the outer edge along the side. And gradually progress. For this reason, the larger the external dimension of the ceramic substrate 2 is, the more the number of bumps 4 connected to one circuit is increased and the connection reliability is maintained. In addition, the outermost bumps 4 may not be redundantly connected but may be redundantly connected by the outermost bumps 4 and the bumps 4 located closer to the center of the ceramic substrate 2 than that. In particular, since the bumps 4 at the end points are easily damaged, it is preferable to connect the bumps 4 located near the center of the ceramic substrate 2.

  As described above, in the BGA type mounting structure of the ceramic substrate and the resin substrate according to this embodiment, a portion where the connection is easily broken by the thermal stress acting on the ceramic substrate 2 can always have a redundant connection or more. For this reason, even if the generation | occurrence | production point of the crack 9 of the ceramic substrate 2 and the crack 10 of the resin substrate 5 increases gradually, the lifetime in which BGA of the ceramic substrate 2 functions can be extended greatly. Further, since no reinforcement or fixing is performed, the assembly process is minimal, and the ceramic substrate 2 can be easily replaced. This is effective for reducing the cost of the semiconductor package.

Embodiment 2. FIG.
FIG. 4 is a sectional view showing a connection structure between the ceramic substrate 2 and the resin substrate 5 according to the second embodiment.
In the figure, the semiconductor package 1 is configured by incorporating a semiconductor element inside an upper cover 3 of a ceramic substrate 20. The ceramic substrate 20 includes a pseudo waveguide portion 13 communicating with the back surface.

  The pseudo-waveguide portion 13 is configured by arranging through holes 14 connected to a ground plane (not shown) in the substrate in a rectangular shape at intervals equal to or less than λ (propagation wavelength in the substrate). In the pseudo-waveguide portion 13, an enclosure in which bumps 16 kept at the same potential are arranged in a square shape functions as a waveguide, and can propagate radio waves to the internal space.

  The resin substrate 50 is made of a resin such as glass epoxy resin or BT resin. The resin substrate 50 includes a pseudo waveguide portion 15. The pseudo waveguide portion 15 is configured by an opening hole 15 b provided in the resin substrate 50. The side surface of the opening hole 15b is metallized with a ground conductor.

5A and 5B are diagrams showing the bonding surfaces of the respective substrates. FIG. 5A is a back view of the ceramic substrate 20 and FIG. 5B is a top view of the resin substrate 50.
As shown in FIG. 5A, one or more rows of lands 6 are arranged around the pseudo waveguide section 13. Further, as shown in FIG. 3B, at least two rows of lands 7 are arranged around the pseudo waveguide portion 15. At the outer edge portion of the pseudo waveguide portion 15, the land 7 is connected to a conductor surrounding the pseudo waveguide portion 15.

  FIG. 6 is a perspective view illustrating an example of a partial shape of the waveguide connection portion 13 including the waveguide connection portions 13 and 15 and the bumps 16. As shown in FIG. 6A, the waveguide connecting portions 13 and 15 have a rectangular shape. As shown in FIG. 6B, the bumps 16 connecting the waveguide connection portion 13 and the waveguide connection portion 15 are arranged in a rectangular shape and function as a waveguide.

  A plurality of lands 7 are arranged on the upper surface of the resin substrate 50. A plurality of lands 6 are arranged on the back surface of the ceramic substrate 20. The land 6 and the land 7 are composed of a plurality of conductive pads having a quadrangular shape or a round shape. The lands 6 of the ceramic substrate 20 are regularly arranged around the pseudo waveguide portion 13. The lands 7 of the resin substrate 50 are regularly arranged around the pseudo waveguide portion 15.

  The ceramic substrate 20 is bonded to the land 7 of the resin substrate 50 with a plurality of bumps 16 interposed therebetween, so that the BGA type mounting constituting the BGA is achieved. That is, the bumps 16 are arranged in one or more rows around the pseudo waveguide portion 20 and the pseudo waveguide portion 50. In particular, around the pseudo-waveguide part 20 and the pseudo-waveguide part 50, the interval between the adjacent bumps 16 is arranged to be equal to or less than λ (propagation wavelength in the substrate).

  When a plurality of bumps 16 are arranged, the bumps 16 are arranged in a so-called zigzag pattern by alternately shifting the positions of the odd-numbered and even-numbered bumps 16 arranged around each pseudo waveguide section. You may do it. As a result, leakage signals leaking from the respective pseudo waveguide portions and passing through the gaps of the bumps 16 can be further suppressed, and a pseudo waveguide portion with less loss can be obtained.

  In the joint portion of the bump 16, the closer to the outer edge portion of the ceramic substrate 20, the higher the thermal stress. Therefore, a plurality of bumps 16 may be arranged by selecting a point where crack damage is likely to occur in the bump connection part. At this time, the redundant bumps 4 and the conductor patterns 11 and 12 constituting the parallel circuit as described in the first embodiment may be used.

  The bumps 16 constituting a part of the pseudo waveguide portion 13 have a function of constructing a shield surrounding the waveguide in a pseudo manner, and are not used for signal connection. Therefore, the waveguide performance can be maintained even if only a small part of the bumps 16 are damaged. In extreme terms, if one ball is missing, the waveguide characteristics will be distorted but will not fail at all.

  Further, as described above, cracks generated by thermal stress are micro-sized like hair cracks, and such a minute defect does not cause radio wave leakage, so that the shielding effect is maintained. From this, it can be said that the waveguide performance is hardly affected.

  Therefore, it is preferable that the pseudo waveguide portion 13 is disposed along the outer edge portion of the ceramic substrate 20 that has high thermal stress and easily breaks the bump connection. By vacating the inner region of the ceramic substrate 20 as a signal connection region that must be surely electrically connected, a waveguide connection structure with high heat cycle resistance can be obtained. In addition, the life of the device can be extended by suppressing the performance deterioration of the waveguide connection structure.

  Further, since the area of the outer edge portion of the ceramic substrate 2 where the thermal stress is high and the signal connection balls cannot be disposed can be used effectively, the size of the ceramic substrate 20 can be suppressed to the minimum, and it is effective for downsizing the device.

When the ceramic substrate 2 and the resin substrate 5 are joined, the connection portion that joins the outermost bumps 4 receives thermal stress due to a temperature change in the use environment. The linear expansion coefficient of the ceramic substrate 2 is about 5 to 7 PPM, while the linear expansion coefficient of the resin substrate 5 is around 16 PPM, which is more than twice the difference.
For this reason, since the resin substrate 5 is greatly expanded and the ceramic substrate 2 is small in elongation, when returning to room temperature after mounting and fixing, a tensile force toward the center of the ceramic substrate 2 remains at each joint portion of the bump. It remains as stress.

  This residual stress is larger at the outer edge of the ceramic substrate 2 and smaller at the center. In addition, the larger the size of the ceramic substrate 2, the more the residual stress at the outer edge portion increases. In an actual use environment where each substrate is exposed, a heat cycle having a temperature change width of about 70 to 100 ° C. is applied. While the residual stress remains, repeated stress due to expansion and contraction is further applied.

  As described above, in the BGA type mounting structure of the ceramic substrate and the resin substrate according to this embodiment, the pseudo waveguide is intentionally arranged at a position where the stress is high like the periphery of the outer periphery of the ceramic substrate 20. By bonding the periphery with bumps, the entire area of the ceramic substrate 20 can be used effectively. At this time, even if cracks due to thermal stress occur at the outer edge of the ceramic substrate, there is almost no influence on the waveguide performance.

As a result, the central portion (for example, the one-dot chain line region 200 in FIG. 5A) between the waveguide connection portions can be used as a signal connection region where tearing is not allowed.
In addition, minimizing the ceramic substrate 20 can contribute to downsizing of the device.
Furthermore, a ceramic BGA mounting structure with higher heat cycle reliability can be obtained, which is effective for extending the life of the device.

In the case where the periphery of the ceramic substrate 20 (for example, the one-dot chain line region 201 outside the rectangular broken line in FIG. 5A) is used as a signal connection region outside the region where the waveguide connection portion is disposed on the ceramic substrate. As described in the first embodiment, a plurality of bumps may be connected by the conductor patterns 11 and 12 to form a redundant parallel circuit.
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  DESCRIPTION OF SYMBOLS 1 Semiconductor package, 2 Ceramic substrate, 4 Bump, 5 Resin substrate, 7 land, 8 BGA, 11, 12 Conductor pattern, 13 Pseudo waveguide part, 15 Pseudo waveguide part.

Claims (3)

A ceramic substrate in which lands composed of a plurality of conductor pads are arranged and a plurality of pseudo waveguides are formed;
A resin substrate in which lands composed of a plurality of conductor pads are arranged and a plurality of pseudo waveguides are formed;
A plurality of bumps that are bonded between the land of the resin substrate and the land of the ceramic substrate, respectively , and constitute a ball grid array,
With
Among the bumps , some of the plurality of bumps arranged at the center of the ceramic substrate form a signal connection region that electrically connects the land of the resin substrate and the land of the ceramic substrate ,
Among the bumps, some other plurality of bumps arranged on the outer edge side of the substrate with respect to the signal connection region are around the connection portion of the pseudo waveguide of the ceramic substrate and the pseudo waveguide of the resin substrate. Arrayed and connected to the ground plane and forming a waveguide connection,
A substrate bonding structure characterized by that.   2. The substrate connection structure according to claim 1, wherein the signal connection region is a region where breakage of electrical connection is not allowed.   3. The substrate bonding structure according to claim 1, wherein the pseudo waveguide of the ceramic substrate is formed by a plurality of through-hole arrays, and the pseudo waveguide of the resin substrate is formed by an opening hole. .

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