JP4946438B2 - Semiconductor device, method for manufacturing the same, and electronic device - Google Patents

Description

  The present invention relates to a semiconductor device, a manufacturing method thereof, and an electronic device.

In recent years, portable electronic devices typified by mobile phones using ICs (integrated circuits) such as microcomputers have been widely used. In addition, the spread of IC cards and wireless tags is expected in the future.

  As an example of an IC card, a radio wave (electromagnetic wave) generated from a coil of a reader / writer device is received by a coil on the IC card side, power, a clock, and a transmission / reception signal are generated, and a command received from the reader / writer device is processed. An RFID (Radio Frequency Identification) type IC card (hereinafter referred to as an RFID card) has been proposed (for example, Patent Document 2).

  FIG. 13 is a block diagram showing an electrical configuration of a conventional RFID card. The RFID card 10 is necessary for driving the circuit of the RFID card 10 based on the DC voltage converted by the rectifier circuit 13 that rectifies the received AC signal connected to the coil 12 and converts it into a DC voltage. A power supply circuit 14 that generates a power supply voltage VDD, a demodulation circuit 15 that extracts (demodulates) reception information included in an AC signal supplied from the outside via the coil 12, and an AC signal that includes transmission information (modulation) Data is written into the memory circuit 18 based on the modulation circuit 16 that drives the coil 12, the memory circuit 18 that stores identification information for identifying the RFID card 10, and the reception information demodulated by the demodulation circuit 15. The transmission information read from the memory circuit 18 is output to the modulation circuit 16 and the transmission to an external reader / writer (not shown) is performed. It is configured of a read-write control circuit 17 for performing signal protocol control.

  The AC signal received by the coil 12 is input to the demodulation circuit 15 and demodulated from the ASK modulated (amplitude modulated) signal to reproduce the data signal. The reproduced data is written into the memory circuit 18 by a read / write control circuit 17 that performs read / write control of the memory circuit 18 and transmission / reception protocol control. On the other hand, transmission data from the RFID card to the reader / writer is read from the memory circuit 18 by the read / write control circuit 17, LSK (load modulation) is performed on the coil signal by the modulation circuit 16, and the data is transmitted.

  Here, the RFID card 10 which is an electronic device needs to hold an ID code in order to identify each other during the exchange of data with the reader / writer. As the memory circuit 18 that holds the ID code, an electrically writable and erasable nonvolatile memory such as an EEPROM (Electrically Erasable Programmable Read Only Memory) is generally used (for example, Patent Document 2). It is also known to use a fuse ROM in which an ID code can be physically written by applying a high voltage to a cutting terminal according to desired information to flow a large current and fusing it (for example, Patent Document 1). ).

In recent years, a method for manufacturing an electronic circuit board in which a wiring pattern corresponding to identification information such as a product number or an ID code is formed by an ink jet printer has been proposed (for example, Patent Document 3). According to this method, it is possible to write the ID code at low cost without much labor.
Japanese Patent Laid-Open No. 2-13046 JP 2000-172806 A JP 2002-344113 A

  When writing an ID code or manufacturing number in the fuse ROM of Patent Document 1, it is necessary to write the ID code and manufacturing number by attaching the fuse ROM to a dedicated writing device for blowing by flowing a large current. It must be attached to the substrate of the apparatus, and it is difficult to write an ID code or a production number at low cost.

  On the other hand, the EEPROM of Patent Document 2 is capable of writing an ID code and a manufacturing number in a state where it is incorporated in an electronic device. However, there remains a security problem that an illegal ID code or serial number is written. In addition, since information is written via radio waves when mounted on a portable device such as an IC tag or a mobile phone, the contents of the EEPROM may be rewritten relatively easily.

  An object of the present invention is to provide a semiconductor device in which an ID code or a manufacturing number can be written in a state where it is incorporated in an electronic device, and which is difficult to rewrite, and a manufacturing method thereof.

As a result of intensive studies, the present inventor has found that the object of the present invention can be achieved by adopting one of the following configurations.
(Configuration 1) On a base material, a plurality of thin film transistors each including a gate electrode, a gate insulating layer, and a source electrode and a drain electrode connected by a semiconductor layer, a gate line connecting the plurality of gate electrodes, In a method of manufacturing a semiconductor device having a thin film transistor array having a source line connecting a source electrode and a bit line connecting the drain electrode, an input process of inputting a wiring pattern of the thin film transistor array, and an input process in the input process A connection step of connecting a separation portion between the source electrode and the source line, the connection of which has been previously separated based on the wiring pattern, using a conductive material, and the connection step includes the wiring pattern input in the input step Insulating the separation part to be insulated with a fluid insulating material, and then connecting the other separation part with a conductive material, Serial insulating by flowable insulating material separating unit, by an inkjet method, a method of manufacturing a semiconductor device, wherein the flowable insulating material is applied to the separation unit.
(Configuration 2) On a base material, a plurality of thin film transistors having a gate electrode, a gate insulating layer, and a source electrode and a drain electrode connected by a semiconductor layer, a gate line connecting the plurality of gate electrodes, In a method of manufacturing a semiconductor device having a thin film transistor array having a source line connecting a source electrode and a bit line connecting the drain electrode, an input process of inputting a wiring pattern of the thin film transistor array, and an input process in the input process A connection step of connecting a separation portion between the drain electrode and the bit line, the connection of which has been previously separated based on the wiring pattern, using a conductive material, and the connection step is a wiring input in the input step Based on the pattern, after isolating the isolation part to be insulated with a fluid insulating material, connect the other isolation part with a conductive material. Insulation by flowable insulating material of the separation part, by an inkjet method, a method of manufacturing a semiconductor device, wherein the flowable insulating material is applied to the separation unit.

It is a circuit diagram of a part of a TFT array according to the present invention. 2A is a plan view of the TFT shown in FIG. 1, and FIG. 2B is a cross-sectional view taken along the line AA in FIG. 2A. FIG. 2C is a cross-sectional view showing a state in which the conductive material is filled in the source separation portion in FIG. It is a circuit diagram of a part of a TFT array according to another embodiment of the present invention. 4A is a plan view of the TFT shown in FIG. 3, and FIG. 4B is a cross-sectional view taken along the line BB in FIG. 4A. FIG. 4C is a cross-sectional view showing a state where the drain isolation portion is filled with a conductive material in FIG. It is the schematic diagram which showed the outline of the manufacturing process of the semiconductor device which concerns on this invention. It is a state transition diagram of TFT in the manufacturing process of the semiconductor device concerning the present invention. It is the schematic diagram which showed the pattern of the separation part connection by an inkjet system. It is the schematic diagram which showed the outline of the manufacturing process of the semiconductor device which concerns on the other form of this invention. It is a state transition diagram of TFT in the manufacturing process of the semiconductor device which concerns on the other form of this invention. It is a block diagram of TFTROM. It is a block diagram which shows the electrical constitution of the RFID card carrying TFTROM. It is an external appearance perspective view of the RFID card carrying TFTROM. It is a block diagram which shows the electrical structure of the conventional RFID card | curd.

  Hereinafter, the present invention will be described in detail with reference to embodiments, but the present invention is not limited thereto.

  A semiconductor device according to Configuration 1 of the present invention will be described with reference to FIGS.

  FIG. 1 is a circuit diagram of a part of a thin film transistor (hereinafter referred to as TFT) array 66 which is a semiconductor device according to the present invention.

  The TFT array 66 includes TFTs 20, source lines 22, source separation units 23, gate lines 25, and bit lines 27 arranged in a matrix.

  The TFT 20 is a field effect transistor, and includes a source electrode 21, a gate electrode 24, and a drain electrode 26.

  The source line 22 is a bus provided so that the source electrodes 21 of the TFTs 20 arranged in the Y direction in the figure can be connected to each other, and at least one source line 22 is provided for each column of the TFTs 20 arranged in the X direction. .

  The source separation portion 23 which is a separation portion of the present invention is provided between the source electrode 21 and the source line 22 of each TFT 20 and electrically separates the source electrode 21 and the source line 22 and will be described later. It can be connected with a conductive material by the method.

  The gate line 25 is a bus that connects the gate electrodes 24 of the respective TFTs 20 arranged in the X direction in the drawing, and is provided at least one for each row of the TFTs 20 arranged in the Y direction.

  The bit line 27 is a bus that connects the drain electrodes 26 of the TFTs 20 arranged in the Y direction in the drawing, and is provided at least one for each column of the TFTs 20 arranged in the X direction.

  FIG. 2 is a structural diagram of the TFT 20 shown in FIG. 1 and its peripheral part. FIG. 2A is a plan view of the TFT 20 and its peripheral part, and FIG. 2B is a cross-sectional view taken along the line AA in FIG. FIG. 2C shows a state in which the conductive material 32 is filled in the source separation portion 23 in FIG. In the following drawings, the same symbols are assigned to the same elements as those described above in order to avoid duplication of explanation.

  The TFT 20 includes a gate line 25 connected to a gate electrode (not shown) on a base material 35 that is an insulating material, and an insulating layer 34 stacked thereon, and further a semiconductor 31, a bit line 27, a source electrode 21 and A source line 22 is stacked and covered with an insulating layer 33 except for the source separation portion 23.

  The semiconductor 31 is connected to the bit line 27 and the source electrode 21 provided at a constant interval. In this case, the surface where the semiconductor 31 and the bit line 27 are connected corresponds to the drain electrode 26 shown in FIG.

  Further, the source electrode 21 and the source line 22 are provided between the source electrode 21 and the source line 22 so as to form a source separation portion 23 whose upper surface is opened up to the insulating layer 34. .

  As shown in FIG. 2C, the source separation portion 23 is selectively filled with a conductive material 32 supplied from the opened upper portion according to a desired wiring pattern, and is electrically connected.

  Any material may be used as the conductive material 32 as long as it contains a conductive material. Particularly, a conductive polymer described later, a conductive paste containing metal fine particles, a conductive ink, or a metal. A thin film precursor material can be suitably used.

  Platinum, gold, silver, nickel, chromium, copper, iron, tin, antimony lead, tantalum, indium, palladium, tellurium, rhenium, iridium, aluminum, ruthenium, germanium, molybdenum, tungsten, zinc, etc. Can be used.

  The solvent or dispersion medium is preferably a solvent or dispersion medium containing 60% or more, preferably 90% or more of water in order to suppress damage to the organic semiconductor.

  Furthermore, a known conductive polymer dispersion whose conductivity is improved by doping or the like, for example, conductive polyaniline, conductive polypyrrole, conductive polythiophene, a complex of polyethylenedioxythiophene and polysulfonic acid, and the like are also preferably used.

  As the semiconductor 31 material, a π-conjugated material is used. For example, polypyrroles such as polypyrrole, poly (N-substituted pyrrole), poly (3-substituted pyrrole), poly (3,4-disubstituted pyrrole), polythiophene, Poly (3-substituted thiophene), poly (3,4-disubstituted thiophene), polythiophenes such as polybenzothiophene, polyisothianaphthenes such as polyisothianaphthene, and polychenylene vinylenes such as polychenylene vinylene , Poly (p-phenylene vinylene) such as poly (p-phenylene vinylene), polyaniline such as polyaniline, poly (N-substituted aniline), poly (3-substituted aniline), poly (2,3-substituted aniline) , Polyacetylenes such as polyacetylene, polydiacetylenes such as polydiacetylene, Polyazulenes such as azulene, polypyrenes such as polypyrene, polycarbazoles such as polycarbazole and poly (N-substituted carbazole), polyselenophenes such as polyselenophene, polyfurans such as polyfuran and polybenzofuran, poly (p -Phenylene), polyindoles such as polyindole, polypyridazines such as polypyridazine, naphthacene, pentacene, hexacene, heptacene, dibenzopentacene, tetrabenzopentacene, pyrene, dibenzopyrene, chrysene , Perylene, coronene, terylene, ovalene, quaterylene, derivatives of carbons of polyacenes such as circumanthracene and polyacenes substituted with atoms such as N, S, O, and functional groups such as carbonyl groups Polymers such as riphenodioxazine, triphenodithiazine, hexacene-6,15-quinone), polyvinylcarbazole, polyphenylene sulfide, polyvinylene sulfide, and polycyclic condensates described in JP-A-11-195790 are used. be able to.

  Further, for example, α-sexual thiophene α, ω-dihexyl-α-sexual thiophene, α, ω-dihexyl-α-kinkethiophene, α, ω-bis (α) which is a thiophene hexamer having the same repeating unit as these polymers. Oligomers such as 3-butoxypropyl) -α-sexithiophene and styrylbenzene derivatives can also be preferably used.

  Furthermore, metal phthalocyanines such as copper phthalocyanine and fluorine-substituted copper phthalocyanine described in JP-A-11-251601, naphthalene 1,4,5,8-tetracarboxylic acid diimide, N, N′-bis (4-trifluoromethyl) Benzyl) naphthalene 1,4,5,8-tetracarboxylic acid diimide, N, N′-bis (1H, 1H-perfluorooctyl), N, N′-bis (1H, 1H-perfluorobutyl) and N, N '-Dioctylnaphthalene 1,4,5,8-tetracarboxylic acid diimide derivative, naphthalene 2,3,6,7 tetracarboxylic acid diimide and other naphthalene tetracarboxylic acid diimides, and anthracene 2,3,6,7-tetra Condensed ring tet such as anthracene tetracarboxylic acid diimides such as carboxylic acid diimide Carboxylic acid diimides, C60, C70, C76, C78, C84 etc. fullerenes, carbon nanotubes such as SWNT, merocyanine dyes, etc. dyes such hemicyanine dyes and the like.

  Among these π-conjugated materials, thiophene, vinylene, chelenylene vinylene, phenylene vinylene, p-phenylene, a substituent thereof, or two or more of these are used as a repeating unit, and the number n of the repeating units is 4 to 4 At least 1 selected from the group consisting of an oligomer of 10 or a polymer in which the number n of repeating units is 20 or more, a condensed polycyclic aromatic compound such as pentacene, fullerenes, condensed ring tetracarboxylic diimides, and metal phthalocyanine Species are preferred.

  Other organic semiconductor materials include tetrathiafulvalene (TTF) -tetracyanoquinodimethane (TCNQ) complex, bisethylenetetrathiafulvalene (BEDTTTTF) -perchloric acid complex, BEDTTTTF-iodine complex, TCNQ-iodine complex. Organic molecular complexes such as can also be used. Furthermore, (sigma) conjugated polymers, such as polysilane and polygermane, and organic-inorganic hybrid material as described in Unexamined-Japanese-Patent No. 2000-260999 can also be used.

  For example, materials having functional groups such as acrylic acid, acetamide, dimethylamino group, cyano group, carboxyl group, nitro group, benzoquinone derivatives, tetracyanoethylene, tetracyanoquinodimethane, and derivatives thereof in the organic semiconductor layer Materials that accept electrons, such as materials having functional groups such as amino groups, triphenyl groups, alkyl groups, hydroxyl groups, alkoxy groups, and phenyl groups, substituted amines such as phenylenediamine, anthracene, benzo It may contain a material that becomes a donor as an electron donor, such as anthracene, substituted benzoanthracenes, pyrene, substituted pyrene, carbazole and derivatives thereof, tetrathiafulvalene and derivatives thereof, and so-called doping treatment may be performed. Good.

  The doping means introducing an electron-donating molecule (acceptor) or an electron-donating molecule (donor) into the thin film as a dopant. Therefore, the doped thin film is a thin film containing the condensed polycyclic aromatic compound and the dopant. A well-known thing can be employ | adopted as a dopant.

  Although there is no restriction | limiting in particular in a base material, A resin material, for example, a plastic film sheet, can be used preferably. Examples of the plastic film include polyethylene terephthalate, polyethylene naphthalate, polyethersulfone, polyetherimide, polyetherketone, polyphenylene sulfide, polyacrylate, polyimide, polycarbonate, cellulose triacetate, cellulose acetate propionate, and the like. can give.

  The TFT array can be manufactured by a known semiconductor manufacturing process.

  The size of the TFT 20 is a rectangle or square with sides of 20 μm to 100 μm, and the bus line width including the bit line 27, the source line 22, and the gate line 25 is 10 μm to 30 μm. The distance between the electrode 21 and the source line 22 is 10 μm to 40 μm.

  Another embodiment of the semiconductor device of the present invention will be described with reference to FIGS.

  FIG. 3 is a circuit diagram of a part of a TFT array 66, which is a semiconductor device according to another embodiment of the present invention.

  1 differs from the TFT array 66 shown in FIG. 1 in that a drain isolation portion 41 corresponding to the isolation portion of the present invention is provided between the drain electrode 26 and the bit line 27 instead of the source isolation portion 23 of FIG. This is the point.

  FIG. 4 is a structural diagram of the TFT 20 shown in FIG. 4A is a plan view of the TFT 20, and FIG. 4B is a cross-sectional view taken along the line BB in FIG. 4A. FIG. 4C shows a state in which the conductive material 32 is filled in the drain isolation portion 41 of the TFT 20 in FIG.

  A method of manufacturing a semiconductor device according to configurations 2 and 3 of the present invention will be described with reference to FIGS. FIG. 5 is a schematic view showing an outline of the manufacturing process of the semiconductor device according to the present invention.

  The semiconductor device manufacturing process includes an identification information input unit 61, a wiring pattern generation unit 62, an ink jet printer 63, a heating unit 64, a sealing unit 65, and a transport unit 67. These units are concentrated by a control unit (not shown). Is controlled.

  The identification information input unit 61 includes an unillustrated CPU (central processing unit), work memory, storage unit, display unit, input device such as a keyboard, and the like, and identification information such as an ID code and a manufacturing number written in the TFT array 66. With the ability to generate Identification information generated by the identification information input unit 61 is sent to the wiring pattern generation unit 62.

  The wiring pattern generation unit 62 includes a CPU (Central Processing Unit) (not shown), a work memory, a storage unit, and the like. Based on the identification information sent from the identification information input unit 61 and the model information of the inkjet printer 63, the wiring pattern generation unit 62 The wiring pattern information of the source separation unit 23 is converted, and further, the wiring pattern information is converted into control data such as allocation to the heads, nozzles, etc. (not shown) of the ink jet printer 63, discharge start position alignment, and the number of discharges. Forward.

  The ink jet printer 63 applies a conductive material (not shown) to the TFT array 66 based on the control data transferred from the wiring pattern generation unit 62 to form a wiring pattern of the conductive material on the TFT array 66.

  As the conductive material, an ink containing metal particles containing any one of platinum, gold, silver, copper, cobalt, chromium, iridium, nickel, palladium, molybdenum, and tungsten can be used.

  The heating unit 64 includes a hot plate, lamp annealing, or the like, and has a function of heating and drying the solvent of the ink 72 at 100 ° C. to 300 ° C., and firing the metal particles.

  The sealing part 65 has a function of applying a sealing material to insulate and protect the TFT array from moisture.

  For sealing, the TFT array is covered with a sealing material by spray coating, blade coating, printing, or inkjet.

  As the sealing material, polyimide, polyamide polyvinyl alcohol, polyvinyl phenol, polyester, and polyacrylate are preferable.

  The transport unit 67 includes a roller, a belt, a motor, a support material, a drive circuit, and the like (not shown). To be performed continuously.

  The operation of the manufacturing process of the TFT array 66 shown in FIG. 5 will be described with reference to FIGS.

  FIG. 6 is a cross-sectional view showing the state transition of the TFT 20 shown in FIGS. 1 and 2 in the manufacturing process shown in FIG. 5, and shows a case where the separation part is selectively connected with a conductive material (a-1). , (A-2), and (a-3) are shown in (b-1), (b-2), and (b-3) when no separation unit is connected.

  Hereinafter, although an Example demonstrates concretely, this invention is not limited to these description.

  In this embodiment, a TFT array 66 having a source isolation portion between a source line and a source electrode will be described as an example. However, in a TFT array 67 having a drain isolation portion between a bit line and a drain electrode, The drain separation portion is applied in place of the source separation portion so as to be electrically connected or separated.

  In FIG. 5, the TFT array 66 at the position P <b> 0 is transported to the ejection position P <b> 1 of the inkjet printer 63. (FIG. 6 (a-1) (b-1)). The TFT array 66 transported to P1 is subjected to a predetermined wiring pattern according to the control data sent from the wiring pattern generation unit 62 to the conductive material (ink 72 containing metal particles) by the inkjet printer 63, and the source separation unit of the TFT array. 23 (FIG. 6 (a-2)).

  On the other hand, the ink 72 is not applied to the separation portion that is not connected (FIG. 6B-2).

  Here, the application of the ink 72 by the inkjet printer 63 will be described with reference to FIG. FIG. 7 is a schematic diagram showing how the ink 72 is ejected from the ink jet printer 63 of FIG.

  In the ink jet printer 63, the ink 72 is ejected from the head 74 to the TFT array 66 through the nozzle 73 toward the source separation unit 23. Here, ejection means that the ink is ejected from the nozzle, and application means a state where the ejected ink has landed on the separation portion. The source separation unit 23 on which the ink 72 has landed is filled with the ink 23.

  Returning to FIG. 5 and FIG. 6, the TFT array 66 coated with the ink 72 by the inkjet printer 63 is conveyed to the heating unit 64 (P2). In the heating unit 64, the solvent contained in the ink 72 applied by the inkjet printer 63 is heated and dried, and the conductive material is baked to electrically connect the separation unit 23 applied with the ink 72.

  Next, the TFT array 66 transported to the position P3 is sealed with the sealing material 71 at the sealing portion 65 (P3) (FIGS. 6A-3 and 6B-3).

  In this embodiment, an ID code or a serial number is used as identification information, and each separation part of the TFT array 66 is connected with a wiring pattern based on the identification information. Each separation part of the TFT array 66 may be connected by an image-like wiring pattern using image information such as a face photograph, a logo mark, and a fingerprint acquired by an image capturing device such as a camera or a scanner. In this way, a signal output from the TFT array 66 having an image-like wiring pattern can be used as identification information of an electronic device in which the TFT array 66 is incorporated, and a one-time password or a time limit is included. In issuing identification information for temporary use such as card keys, it is possible to easily issue identification information that is not easily tampered with or counterfeited, and it is easy to visually recognize an image-like wiring pattern. Therefore, unauthorized use such as impersonation can be prevented.

  Further, in the application of the ink 72 by the ink jet printer 63, the amount of the ink 72 applied to the source separation unit 23 may be changed stepwise based on the input identification information. The amount of the ink 72 to be applied is changed by changing the area covering the source separation unit 23 by a known area gradation image forming method, or by changing the area of the ink 72 covering the source separation unit 23 by a known overprint image forming method. Change the thickness.

  Another embodiment of the method for manufacturing a semiconductor device according to configurations 2 and 3 of the present invention will be described with reference to FIGS.

  FIG. 8 is a schematic view showing an outline of the manufacturing process of the semiconductor device according to the present invention.

  The manufacturing process of the semiconductor device is obtained by adding a conductive material supply unit 80 between the heating unit 64 and the sealing unit 65 in the manufacturing process described with reference to FIG.

  The wiring pattern generation unit 62 converts the identification information sent from the identification information input unit 61 into pattern information, further generates control data from the wiring pattern information, and transfers the control data to the ink jet printer 63.

  The ink jet printer 63 discharges an insulating material, which will be described later, to the TFT array based on the control data transferred from the wiring pattern generation unit 62, thereby forming a wiring pattern of the insulating material on the TFT array 66.

  As the insulating material, an ink containing polyimide, polyamide polyvinyl alcohol, polyvinyl phenol, polyester, polyacrylate, or the like can be used.

  The conductive material supply unit 80 applies the above-described fluid conductive material to the entire surface of the TFT array, or adheres a conductive sheet or aluminum foil to the entire surface of the TFT array, so that the insulating material 81 is formed by the inkjet printer 63. It has a function of electrically connecting the source separation part 23 which is not applied. Since the source separation part 23 is previously coated with an insulating material by the ink jet printer 63, only the source separation part not coated with the insulating material 81 is connected with a conductive sheet or aluminum foil.

  FIG. 9 is a cross-sectional view showing a state transition of the TFT 20 shown in FIGS. 1 and 2 in the manufacturing process shown in FIG. 8, and the case where the source separation portion 23 is selectively applied with the insulating material 81 (d). -1), (d-2), (d-3), and (d-4) when the source separator 23 is not applied (c-1), (c-2), (b-3), (C-4).

The TFT array 66 at the position P0 is transported to the ejection position P1 of the inkjet printer 63. (Fig. 9 (c-1) (d-1))
Next, in the inkjet printer 63, a predetermined wiring pattern is applied to the source separation unit 23 of the TFT array 66 in accordance with the control data sent from the wiring pattern generation unit 62 (FIG. 9 (d-2)). .

  When not applied to the source separation portion 23 of the TFT array 66, the source separation portion 23 is kept in a separated state (FIG. 9 (c-2)).

  After heating, drying and firing, the TFT array 66 conveyed to the position P2 is brought into close contact with a conductive material 82 such as a conductive sheet or aluminum foil at the position P3.

  The source separation part 23 to which the insulating material 81 is applied is filled with the insulating material 81 and thus remains electrically insulated (FIG. 9D-3), but the insulating material 81 is applied. The unseparated source separator 23 is electrically connected by a conductive material 82 such as a conductive sheet or aluminum foil (FIG. 9 (c-3)).

  Further, the TFT array 66 transported to the position P4 is sealed with a sealing material such as an insulating sheet 83 at the sealing portion 65 (FIGS. 9C-4 and 9D-4).

  In this embodiment as well, it goes without saying that image information such as a face photograph or a logo mark may be used as identification information, and each separation portion of the TFT array 66 may be connected with an image-like wiring pattern.

  The operation of a TFT ROM (Read Only Memory) 100 which is a semiconductor device according to Configuration 2 or 3 of the present invention will be described with reference to FIG.

  FIG. 10 is a circuit diagram schematically showing the concept of the TFT ROM 100 using the TFT array 66 shown in FIG. Note that the same configuration is used when the TFT array 67 shown in FIG.

  The TFT ROM 100 includes a TFT array 66, a ROW decoder 551, a COLUMN decoder 552, an output buffer 53, and a resistor 52.

  The TFT array 66 has the same configuration as the TFT array 66 shown in FIG. 1, and is arranged in a matrix form TFT 201 to TFT 205, gate lines 251 to 253, bit lines 27, source lines 221 to 224, and source separation unit 23. Have

  In the TFTROM 100, data is written in advance in storage elements arranged two-dimensionally, and the contents do not disappear even if the power supply is turned off. Elements are accessed by row and column address lines. The accessed storage element outputs its contents.

  The TFTs 201 to 205 are the TFTs 20 described above with reference to FIG.

  The ROW decoder 551 and the COLUMN decoder 552 are circuits that decode binary address signal input from an external circuit (not shown).

  The gate lines 251 to 253 are ROM address lines, and are connected to the output of the ROW decoder 551 by connecting the gate electrodes 24 in the X row direction.

  The source lines 221 to 224 are address lines of the TFT ROM 100 and are connected to the output of the COLUMN decoder 552.

  The bit line 27 is a ROM data line, and is connected to the input of the buffer 53 by connecting all the drain electrodes 26.

  One of the resistors 52 is connected to the power supply VDD 51 and the other is connected to the bit line 27. When the bit line is high impedance, the resistor 52 functions as a pull-up resistor for maintaining the VDD potential.

  The buffer 53 is a voltage level conversion IC (integrated circuit) for matching the voltage of the bit line 27 that is the output of the TFTs 201 to 205 with an external circuit.

  One of the source lines 221 to 223 is connected to the source separator 23, and the other is connected to the output of the COLUMN decoder 552.

  Next, the operation of the ROM will be described. Any one gate line of the output of the ROW decoder 551 is enabled by the input of a ROW address signal from an external circuit (not shown). When the gate line 251 is enabled, the source electrode 21 and the drain electrode 26 of the TFTs 201 to 204 connected to the enabled gate line 251 are turned on. TFTs connected to the other gate lines 252 and 253 are turned off.

  Similarly, any one of the source lines 221 to 224 connected to the COLUMN decoder 552 is enabled by inputting a COLUMN address signal from an external circuit.

  When the source line 221 is enabled, the COLUMN decoder 552 sets the source line 221 to low (LOW potential) and the other source lines 222 to 224 to high (HI potential).

  When the source line 221 goes low, the source isolation part 23 connected to the TFT 201 is connected by the conductive material 32, so that the power source VDD 51 passes through the resistor 52, the bit line 27, the TFT 201, and the source line 221, and the column decoder 552. A current flows through the output, and the bit line 27 connected to the TFT 201 also goes low. The potential of the bit line 27 is converted by the output buffer 53, and the output 54 to the external circuit becomes low. Since the other source lines 222 to 224 are high, no current flows between the drains and sources of the TFTs 202 to 204.

  On the other hand, when the TFT 202 is selected by the ROW address signal and the source line 202 is set low by the COLUMN address signal, the source separation unit 23 of the TFT 202 is not connected by the conductive material 32, so the power line VDD 51 to the bit line 27, TFT 202, No current flows through the source line 202 to the output of the COLUMN decoder 552, and the bit line 27 maintains the same potential as the power supply VDD51. Therefore, the potential of the bit line 27 becomes high, the voltage is converted by the output buffer 53, and the output 54 to the external circuit becomes high.

  As described above, when any one of the TFTs 201 to 205 is selected by the ROW address signal and the COLUMN address signal from the external circuit, and the source separation unit 23 connected to the selected TFT is connected by the conductive material. The output to the external circuit is low, and it is high when not connected.

  The output data related to one read operation of the TFT ROM 100 shown in FIG. 10 is 1 bit. When it is desired to obtain a plurality of bits of output data by one read operation, the same number of TFT arrays 66 as the number of bits of the output data may be connected in parallel to the COLUMN decoder 552 and the ROW decoder 551.

  In the manufacturing process of the semiconductor device, when the amount of ink 72 applied to the source separation unit 23 is changed stepwise based on the input identification information, the source separation unit 23 is connected. The output signal intensity varies depending on the amount of the conductive material to be processed, and a multi-value signal can be handled in one TFT. In this case, the ROW decoder 551, the COLUMN decoder 552, and the output buffer 53 are configured to detect the signal intensity so that a multi-value signal can be handled.

  An electronic device according to the present invention will be described with reference to FIGS.

  FIG. 11 is an electrical block diagram of the RFID card 9 on which the TFT ROM 100 is mounted. Here, a plurality of bits of output data can be obtained by a single read operation using a TFT ROM 101 in which a plurality of TFT ROMs 100 are connected in parallel.

  The RFID card 9 is different from the RFID card shown in FIG.

  The memory circuit 98 includes an EEPROM 99 and a TFT ROM 101. The EEPROM 99 is a read / write memory, and the TFT ROM 101 is a read-only memory. The control program and temporarily stored data are written and read by the EEPROM 99, and an ID code is written to the TFT ROM 101. Since the TFTROM 101 cannot be easily rewritten, it is possible to realize a system with good security that prevents tampering and counterfeiting.

  FIG. 12 is an external perspective view showing the configuration of the RFID card 9.

  The coil 92 is configured by a printed wiring or the like formed in a spiral shape on the substrate 90. The IC 91 includes a rectifier 93 for generating a power supply voltage in FIG. 11, a power supply circuit 94, a demodulation circuit 95 for demodulating data captured from the coil, a modulation circuit 96 for transmitting data to the outside via the coil, data exchange and A control circuit 97 that controls the exchange of commands and the like and an EEPROM 99 that is a part of the memory circuit are included. The TFT ROM 101 is connected to the IC 91. By not incorporating the TFT ROM 101 in the IC 91, the ID code can be physically written by the customer.

  Information writing to the TFT ROM 101 of the RFID card 9 is preferably performed so that a wiring pattern is generated by the method shown in FIGS. 4 to 9 with the TFT ROM 101 mounted on the RFID card 9. In this way, it is possible to easily and quickly create the RFID card 9 that is not easily tampered with or counterfeited.

  In addition, the information writing to the TFT ROM 101 of the RFID card 9 is performed in place of the methods shown in FIGS. 4 to 9. The TFTs constituting the TFT ROM 101 with the conductive material directly from biometric information such as fingerprints, palm prints, and nose prints are used. It is also possible to transfer to the array 66.

  That is, the electronic device according to this embodiment includes a plurality of thin film transistors each including a gate electrode, a gate insulating layer, and a source electrode and a drain electrode connected by a semiconductor layer, and a plurality of the gate electrodes on a base material. An identification information issuing method for an electronic device having a semiconductor device having a thin film transistor array having a gate line to be connected, a source line to connect the source electrode, and a bit line to connect the drain electrode, wherein the connection is separated in advance A connecting step of connecting an isolation portion for separating one connection selected from the connection between the source electrode and the source line and the connection between the drain electrode and the bit line with an image-like conductive material; An identification information issuing method for an electronic device, comprising: a step of using a signal output from the semiconductor device connected in the connection step as identification information It is possible to configure the.

  According to the above method, image-like conductive materials such as fingerprints, palm prints, and nose prints transferred to the TFT array 66 are electrically connected to specific separation portions of the TFT array 66. In this way, a signal output from the TFT array 66 having an image-like wiring pattern can be used as identification information of an electronic device in which the TFT array 66 is incorporated, and a one-time password or a time limit is included. When issuing identification information for the purpose of temporary use such as card keys, it is possible to easily issue identification information that is not easily altered or counterfeited, and it is easy to visually recognize image-like biometric information. Because of this, unauthorized use such as impersonation can be prevented.

  Note that the description in each of the above embodiments is a preferred example of the semiconductor device and the electronic device according to the present invention, and the present invention is not limited to this.

  For example, in this embodiment, an RFID card is described as an example of an electronic device. However, the present invention can also be applied to an electronic device such as an RFID tag, a mobile phone, a PDA (Personal Digital Assistant), or a digital still camera.

  In addition, the detailed configuration and detailed operation of each component constituting the semiconductor device, the manufacturing method thereof, and the electronic device can be appropriately changed without departing from the gist of the present invention.

  According to Configurations 1 to 3, since the separation portion is provided between the source electrode and the source line or between the drain electrode and the bit line, and the separation portion is connected by the conductive material, the separation portion is built in the electronic device. The separation part can be connected in a state of being mounted on the substrate.

  In addition, since the separating portion is connected by a conductive material, it is not electrically rewritten or erased.

  According to the configuration 4, since the separation part is connected with the fluid conductive material based on the wiring pattern input in the input process, a large-scale manufacturing process is not required like photolithography, the process is simple, and there are few raw materials. It is possible to provide at a low cost without much time and effort.

  According to Configuration 5, since the separation unit is connected by an ink jet method, a large-scale process is not required as in photolithography, and coating can be performed on a high-precision and high-definition pattern.

  According to the structure 6, since the isolation | separation part insulated based on the wiring pattern input at the input process is insulated with a fluid insulating material, and another isolation | separation part is connected with an electrically-conductive material, all the isolation | separation parts are electrically conductive material or Since it is hermetically sealed with an insulating material, after that, for example, even if the entire TFT array is sealed, the sealing material does not directly contact the electrode, and the range of options in the selection of the sealing material is widened.

  According to the structure 7, since the isolation | separation part is insulated by an inkjet system, a large-scale process like a photolithography is unnecessary, and it can apply | coat with respect to a highly accurate and high-definition pattern.

  According to Configuration 8, since the thin film transistor array to which the separation unit is connected is sealed with the sealing material, it is less susceptible to physical disturbance and is effective in preventing intentional alteration of written information.

  According to Configuration 9, since the storage means of the electronic device is a semiconductor manufactured by the manufacturing method according to the present invention, the identification information written in the storage means is intentionally falsified without being easily affected by physical disturbance. It is possible to provide an electronic device that is difficult to break at low cost without much effort.

Claims (2)

A plurality of thin film transistors each including a gate electrode, a gate insulating layer, and a source electrode and a drain electrode connected by a semiconductor layer, a gate line connecting the plurality of gate electrodes, and the source electrode are connected to a base material In a manufacturing method of a semiconductor device having a thin film transistor array having a source line to be connected and a bit line connecting the drain electrode, an input process for inputting a wiring pattern of the thin film transistor array, and a wiring pattern input in the input process based, it is seen including a connecting step of pre-connection connecting the separation portion between the source line and the source electrode separated by an electrically conductive material,
In the connection step, based on the wiring pattern input in the input step, the insulating portion to be insulated is insulated with a fluid insulating material, and then the other separating portion is connected with a conductive material.
Insulating the separation part with a fluid insulating material is performed by applying the fluid insulating material to the separation part by an ink jet method. A plurality of thin film transistors each including a gate electrode, a gate insulating layer, and a source electrode and a drain electrode connected by a semiconductor layer, a gate line connecting the plurality of gate electrodes, and the source electrode are connected to a base material In a manufacturing method of a semiconductor device having a thin film transistor array having a source line to be connected and a bit line connecting the drain electrode, an input process for inputting a wiring pattern of the thin film transistor array, and a wiring pattern input in the input process based, seen including a connecting step of pre-connection of the separation portion between the bit line and the drain electrode separated, connected with a conductive material,
In the connection step, based on the wiring pattern input in the input step, the insulating portion to be insulated is insulated with a fluid insulating material, and then the other separating portion is connected with a conductive material.
Insulating the separation part with a fluid insulating material is performed by applying the fluid insulating material to the separation part by an ink jet method.

Images