JP4937631B2 - Digital converter and control method thereof - Google Patents

Description

  The present invention relates to a digital converter using a step-up chopper, and more particularly to a digital converter with improved transient operation of a switching element and a control method thereof.

The applicant has previously proposed a device capable of realizing precise PWM control without using a large coil (Patent Document 1).
Japanese Patent Application No. 2004-268135

  The invention described in Patent Document 1 includes a step-up chopper provided with a coil and a switching element, a rectifier circuit that supplies an input current to the coil, and a computer circuit that performs PWM control of the switching element Q in a predetermined control cycle. In the converter, while determining whether the input current to the coil is a continuous mode that is not interrupted during the control cycle or a discontinuous mode that is interrupted during the control cycle, PWM control is performed using a different algorithm based on the determination result. Yes.

  According to the present invention, it is possible to perform precise PWM control over a wide range of input current while having a simple configuration. In addition, since all can be realized by software control, the power factor correction circuit as in the case of hardware control can be omitted, and since a general coil can be used, there is an advantage that the entire apparatus can be downsized at low cost.

However, with the increase in the current of the power supply, spike-like noise generated during the ON / OFF transition operation of the switching element may adversely affect other circuits. FIG. 18 illustrates spike noises I ₁ and I ₂ generated in the step-up chopper of Patent Document 1. As illustrated, when the switching transistor Q transitions from the OFF state to the ON state, a spike-like reverse current I ₁ due to the minority carrier accumulation effect of the diode D flows. Further, even when the switching transistor Q transits from ON to OFF, the spike-like current I ₂ flows.

  The present invention has been made in view of the above problems, and an object thereof is to provide a digital converter that reduces or eliminates spike noise and a control method thereof.

In order to achieve the above object, a digital converter according to the present invention includes a step-up chopper provided with a coil and a switching element, a rectifier circuit that supplies an input current to the coil, and PWM control of the switching element in a predetermined control cycle. A switching circuit provided in parallel with the step-up chopper, wherein the switching circuit is turned on prior to an ON transition operation of the switching element, and is turned off after the switching element is turned on The switching element is set to perform an ON operation prior to an OFF transition operation of the switching element and to perform an OFF operation after the OFF transition of the switching element .

  FIG. 17 is a diagram for explaining the operation contents of an embodiment of the present invention constituted by a step-up chopper by the first switching element Q1 and a switching circuit by the second switching element Q2. This switching circuit has the same circuit configuration as that of the step-up chopper, but preferably, input coil L2 <input coil L1, and reverse recovery charge Qrr of diode D2 is set smaller than reverse recovery charge of diode D1. For the diode D2, an element having a short reverse recovery time is preferably selected.

  In the illustrated digital converter, the second switching element Q2 is turned on for a short time prior to the ON / OFF transition operation of the first switching element Q1. Therefore, the second switching element Q2 is in an OFF state in most time periods, and in this OFF time period, the switching circuit functions as a bypass path of the boost chopper and charges the capacitor. In addition, since the second switching element is turned on prior to the ON operation of the first switching element, the accumulated charge of the diode D1 is reduced and the generation of spike-like current can be suppressed.

  The first switching element then transitions from the OFF state to the ON state, and then transitions from the ON state to the OFF state after a predetermined time to realize the predetermined PWM control. The second switching element Q2 is also turned on prior to the first switching element Q1 during the OFF transition operation (FIG. 17B). Therefore, even when the first switching element transitions from the ON state to the OFF state, generation of spike-like current is suppressed.

The present invention preferably differs based on the determination result while determining whether the input current to the coil of the first step-up chopper is a continuous mode in which the current is not interrupted during the control cycle or a discontinuous mode in which the current is interrupted in the middle of the control cycle. PWM control is performed using an algorithm. In the present invention, the determination of the continuous mode or the discontinuous mode may be performed in each control cycle, or may be performed once in a plurality of control cycles. In any case, it is preferable to determine whether the current mode is the continuous mode or the discontinuous mode. In this control cycle, the coil charging start current Iv (n−2), the output voltage Vac (n−1) of the rectifier circuit , and the boost It is determined based on each measured value of the DC output voltage Vdc (n−1) of the chopper, the control time Ton (n−1) of the PMW wave in the current control cycle, and the inductance value of the coil.

  The control time of the PMW wave means the control on time Ton (n−1) in the embodiment, but is not particularly limited. If the OFF time of the switching element is PWM controlled, the control time is controlled. This is the off time. Further, the inductance value of the coil is preferably corrected in accordance with the measured value of the coil current.

  In the present invention, preferably, the control time Ton (n) of the PMW wave should be determined using an arithmetic expression corresponding to the determination result of the continuous mode or the discontinuous mode. More preferably, the control time Ton (n) of the PMW wave in the next control cycle is determined using the predicted value Iav (n) of the coil average current in the next control cycle as an arithmetic element. Here, the predicted value Iav (n) of the coil average current is determined by the integration of the predicted value Vac (n) of the AC input voltage and the integration parameter β, and the integration parameter β is the target value of the DC output voltage Vdc. It is preferably determined by PI (Proportional-Integral) control based on a deviation Verr from Vo.

  The computer circuit according to the present invention also includes an AD converter that digitally converts an analog input signal, and a timer that can automatically output a pulse wave having an arbitrary pulse width based on setting data to various registers. A chip microcomputer is preferred. The AD conversion unit preferably adopts a configuration that digitally converts a group of analog input signals based on a command from the timer unit, in other words, a configuration that operates without receiving a command from the CPU. More preferably, the AD conversion unit should be configured to notify the CPU when the necessary digital conversion processing is completed. Moreover, this invention is a control method of the digital converter which comprises each technical element of Claims 1-6.

  According to the present invention described above, it is possible to realize a digital converter that improves the transient operation of the step-up chopper and suppresses the generation of high-frequency noise.

  Hereinafter, the present invention will be described in more detail based on examples. FIG. 1 is a circuit configuration diagram showing a digital converter 1 under software control, which is incorporated as a part of a motor control system. In this digital converter 1, a single-phase AC voltage (for example, 200V) is rectified by a full-wave rectifier circuit 2 to become a pulsating current, and then a step-up chopper 4A and a PWM (Pulse Width Modulation) control by a one-chip microcomputer 3 The switching circuit 4B that performs the auxiliary operation converts the voltage into a predetermined DC voltage Vdc (for example, 350 V). The three-phase motor M is driven by an inverter circuit 5 controlled by the one-chip microcomputer 3. A ripple suppressing capacitor Cin is connected to the output side of the full-wave rectifier circuit 2.

  The step-up chopper 4A includes an input coil L1 that receives the pulsating flow output Vac of the rectifier circuit 2, a diode D1 connected in series to the input coil L1, and a connection point between the input coil L1 and the diode D1 (anode terminal) and the ground. And a smoothing capacitor C connected between the diode D1 (cathode terminal) and the ground.

  In this embodiment, an insulated gate bipolar transistor IGBT (Insulated Gate Bipolar Transistor) is used as the switching element Q1, and the ON / OFF operation is performed based on the PWM wave received at the gate terminal. The ON current of the switching element Q1 is configured to be detected from the shunt resistor r.

  As illustrated, the switching circuit 4B is the same as the boost chopper 4A in terms of circuit configuration. That is, the switching circuit 4B includes an input coil L2 that receives the pulsating output Vac of the rectifier circuit 2, a diode D2 connected in series to the input coil L2, a connection point between the input coil L2 and the diode D2 (anode terminal), and the ground. And a switching element Q2 which is disposed between the two and performs an ON / OFF operation. However, since the average current of the input coil L2 is set sufficiently smaller than the average current of the input coil L1, the inductance of the input coil L2 is appropriately smaller than that of the input coil L1.

  The switching element Q2 is composed of, for example, an insulated gate bipolar transistor IGBT, and is turned on / off based on a control signal CTL received at the gate terminal. The control signal CTL is an ON signal that precedes the PWM wave received by the step-up chopper 4A, and the switching element Q2 is turned on for a short time before the switching element Q1, and is otherwise turned off. Therefore, the switching circuit 4B in the OFF state functions as a so-called bypass path to the smoothing capacitor C.

  Since the step-up chopper 4 of the embodiment is configured as described above, when the switching element Q1 is turned on, the pulsating input voltage Vac is changed to the switching element Q1, the coil Li and the shunt resistor r connected in series to the switching element Q1. And a charging current flows through the coil L1. In this state, when the switching element Q1 is turned off, the diode D1 is turned on, and the discharge current of the coil L1 flows through the path of the coil L1 → diode D1 → smoothing capacitor C, and the smoothing capacitor C is charged. .

  In the conventional circuit configuration, a spike-like current flows when the diode D1 is turned on (FIG. 18). However, in this embodiment, even when the diode D1 is in the OFF state before the ON transition, the diode D2 is in the ON state and the smoothing capacitor C is charged, and prior to the OFF transition of the switching element Q1, the switching element Since Q2 is turned on to absorb the input current, no spike-like current is generated.

  Next, a case where the switching element Q1 transitions from the OFF state to the ON state in a state where the diode D1 is in the ON state and the smoothing capacitor C is charged through the path of the coil L1 → the diode D1 → the smoothing capacitor C. Think. In the conventional circuit configuration, a reverse current flows at this time due to the discharge of the charge accumulated in the diode D1 (FIG. 18), but prior to the presence of the switching circuit 4B functioning as a bypass path and the ON transition of the switching element Q1. In the present embodiment, the occurrence of spike-like current can be suppressed due to the ON transition of the switching element Q2.

Now, another circuit configuration of FIG. 1 will be described. The one-chip microcomputer 3 has an emitter current I _E1 (= charging current I of the first coil L1) and an input AC voltage Vac through the signal input units IN1 and IN3, respectively. And the output DC voltage Vdc are input, and the input signals are digitally converted by the built-in A / D converters AD1 and AD4, respectively. The A / D converter AD1 and the A / D converter AD4 acquire the charging current I of the first coil L1 at different timings.

  The signal input unit IN1 is configured by an OP amplifier circuit that receives the voltage across the shunt resistor r of the boost chopper 4A, and functions as a current detection sensor together with the shunt resistor r. Further, the signal input unit IN2 and the signal input unit IN3 are configured by a resistance voltage dividing circuit and an OP amplifier amplifier circuit.

  The data acquired through the signal input units IN1 and IN3 and the A / D converters AD1 and AD4 are arithmetically processed by the one-chip microcomputer 3 to calculate the PWM signal ON time (hereinafter referred to as control on time). Then, the one-chip microcomputer 3 outputs a PWM signal having the control on time as a pulse width from the TIOCA_0 terminal. In accordance with this, the one-chip microcomputer 3 outputs the ON pulse signal CTL from the TIOCA_1 terminal and the TIOCA_2 terminal. The output terminals (TIOCA_0, TIOCA_1, TIOCA_2) of the one-chip microcomputer 3 will be described later in detail.

  The pulse signals (PWM, CTL) output from the output terminals (TIOCA_0, TIOCA_1, TIOCA_2) of the one-chip microcomputer 3 are supplied to the gate terminals of the switching elements Q1, Q2 through the OR circuit and the buffer circuit DR. The The one-chip microcomputer 3 is connected to the inverter circuit 5 through the signal input unit IN4 and the signal output unit OUT2, and controls the three-phase motor M by inverter.

  Hereinafter, prior to describing the specific control operation of the one-chip microcomputer 3, the control principle of the boost chopper 4A will be described. FIG. 2 is a time chart illustrating the relationship between the PWM wave output from the one-chip microcomputer 3 and the current flowing through the coil L1 of the step-up chopper 4A.

  As shown in the figure, a triangular wave due to a coil charging current and a coil discharging current flows in the coil L1, but the energy stored in the coil L1 is sufficient and the continuous current flows (see FIG. 2A). Since there is insufficient energy, there is a discontinuous mode (see FIG. 2B) in which the current is interrupted in the middle.

  In this embodiment, since different PWM control is performed depending on which operation mode is in use, first, a determination formula for determining the operation mode will be described. In the time chart of FIG. 2, it is assumed that the current time is the control cycle (n−1). Then, it is considered that the control on time Ton (n) in the next control cycle (n) is determined based on the measured value in the control cycle (n−1). Note that the frequency of the AC input voltage is 50 Hz or 60 Hz, but in order to control it sufficiently quickly, in this embodiment, the control cycle T is set to 45.6 μS.

  Hereinafter, the circuit equation will be described with the inductance value of the coil L1 as L. The circuit equation during coil charging (switching element ON) is Vac (n−1) = L × {Ip (n−1) −Iv (n−2)} / Ton (n−1) (Equation 1 ) Here, Iv (n-2) is a coil charging start current, Ip (n-1) is a coil charging peak current, and Ton (n-1) is a control ON time, and each value in the control cycle (n-1). It is. Vac (n−1) is an input voltage in the control cycle (n−1). Since the control cycle T (= 45.6 μS) is sufficiently short with respect to the power supply frequency, Vac (n−1) is constant. Can be regarded as a value.

  On the other hand, the circuit equation at the time of coil discharge (switching element OFF) is Vdc (n−1) −Vac (n−1) = L × {Ip (n−1) −Iv (n−1)} / Toff (n -1) (Expression 2). Here, Vdc (n-1) is the voltage across the capacitor C, Iv (n-1) is the coil current at the end of the current control cycle (coil charging start current of the next control cycle), Toff (n-1). Are OFF times, which are values in the control cycle (n−1), respectively.

  If Ip (n−1) is eliminated from (Equation 1) and (Equation 2) and Iv (n−1) is solved, Iv (n−1) = Iv (n−2) + T / L × [{Vac (N−1) −Vdc (n−1)} + Ton (n−1) × Vdc (n−1)] (Equation 3) The control period T is T = Ton (n−1) + Toff (n−1).

  In the above (Formula 3), if Iv (n−1)> 0, the continuous mode is selected, and if Iv (n−1) = 0, the discontinuous mode is selected. However, (Formula 3) uses the coil charging start current Iv (n-2) in the current control cycle (n-1), and the coil charging start current Iv (n-1) in the next control cycle (n). Therefore, if the charging start current Iv (n−2) is not accurate, the determination of the continuous mode or the discontinuous mode will be wrong. That is, if Iv (n−2) is determined by a prediction calculation based on the control on time (Ton (n−2)) in the immediately preceding control cycle, an error is accumulated by the calculation of (Equation 3). As a result, the control instruction value itself may diverge from the target. Therefore, in this embodiment, the input current AD1 at the start of coil charging is measured for each control cycle.

  However, since a time delay Ts inevitably occurs from the start of the control cycle to the time of acquisition of the input current (see FIG. 8C), the measured value AD1 is corrected in consideration of this time delay Ts and coil charging is started. The current is Iv (n−2). Now, assuming that the current measurement value at the timing Ts of the control cycle (n−1) is AD1, the inclination (Δi / Δt) of the coil charging current is Δi / Δt = e / from the relationship of L × Δi / Δt = e. L. Here, e is voltage, i is current, and t is time.

  Therefore, the amount of increase in current at the time delay Ts can be calculated as Vac (n−1) / L × Ts. Using this value, Iv (n−2) = AD1−Vac (n−1) / L × Ts (Expression 4) Substituting (Equation 4) into (Equation 3), Iv (n-1) = AD1- [Vac (n-1) * Ts + T * {Vdc (n-1) -Vac (n-1)} −Ton (n−1) × Vdc (n−1)] / L (Expression 5), and input at the final timing of the current control cycle (n−1) (= start timing of the next control cycle) The current value Iv (n-1) can be accurately determined based on the measured value AD1 of the input current at the start timing of the current control cycle (n-1).

  Then, depending on whether or not the coil charging start current Iv (n-1) of the next control cycle obtained in this way is positive, it is possible to accurately determine whether it is a continuous mode or a discontinuous mode, and an optimal control corresponding to that mode. Is possible. That is, the measured values of the AC input voltage Vac (n-1), the DC output voltage Vdc (n-1), and the input current AD1 in the current control cycle (n-1) and the previous control cycle are determined. On the basis of the control on time Ton (n−1), it can be determined whether the control for the continuous mode or the control for the discontinuous mode should be performed. Note that the calculation procedures of the above (formula 1) and (formula 5) are supplemented in FIGS. 11 and 12.

  By the way, the DC output voltage Vdc (n−1) does not necessarily need to be updated every control cycle. Therefore, in this embodiment, Vdc (i) whose value is updated every 1 mS is used ( (See step ST30 in FIG. 9). Therefore, the discriminant of the present embodiment is, precisely, Iv (n-1) = AD1- [Vac (n-1) * Ts + T * {Vdc (i) -Vac (n-1)}-Ton (n −1) × Vdc (i)] / L (Expression 5 ′).

  Furthermore, the average value Vdc for the past 0.5 seconds calculated by the process of step ST38 in FIG. 9 may be used as the DC output voltage. In this case, Iv (n−1) = AD1− [Vac (n−1) × Ts + T × {Vdc−Vac (n−1)} − Ton (n−1) × Vdc] / L. The discriminant of equation 5 ″) is adopted.

<Discontinuous mode>
Next, a method for calculating the control on time Ton (n) based on the coil average current Iav during each control cycle will be described. First, the control on time Ton (n) in the discontinuous mode is calculated (see FIG. 2B).

  The circuit equation at the time of charging the coil is Vac (n) = L × {Ip (n) −Iv (n−1)} / Ton (n), but Iv (n−1) = 0 because of the discontinuous mode. In the end, Vac (n) = L × Ip (n) / Ton (n) (Formula 6). Here, Vac (n) is the AC input voltage, Ip (n) is the current value at the coil charging peak, Iv (n−1) is the current value at the start of coil charging, and Ton (n) is the control on time. .

  On the other hand, the circuit equation at the time of coil discharge is Vdc (n) −Vac (n) = L / Tcut (n) × {Ip (n) −Iv (n)}. Tcut (n) is a time until the current value Ip (n) in the coil charge peak state is discharged and becomes zero (see FIG. 2B). Since the circuit equation in the discontinuous mode is considered here, Iv (n) = 0, and Vdc (n) −Vac (n) = L / Tcut (n) × Ip (n) (Expression 7) ) The average value Iav (n) of the input current in this control cycle is Iav (n) = {Ip (n) × Ton (n) + Ip (n) × Tcut (n)} / (2 × T). (Formula 8)

  Then, when these (Equation 6) and (Equation 8) are solved for Ton (n), Ton (n) × Ton (n) = {2 × T × L × Iav (n) × (Vdc (n) −Vac (N))} / {Vac (n) × Vdc (n)} (Equation 9) The calculation process of (Equation 9) is shown in FIGS.

<Continuous mode>
Subsequently, the control ON time Ton (n) in the continuous mode is calculated (see FIG. 2A). A circuit equation at the time of coil charging is Vac (n) = L × {Ip (n) −Iv (n−1)} / Ton (n) (Equation 10). On the other hand, the circuit equation at the time of coil discharge is Vdc (n) −Vac (n) = L / Toff (n) × {Ip (n) −Iv (n)} (Equation 11). Here, Toff (n) = T−Ton (n), which is the time from the start of coil discharge to the start of coil charge in the next control cycle.

  The average current Iav (n) in this control cycle is Iav (n) = [{Ip (n) + Iv (n−1)} × Ton (n) + {Ip (n) + Iv (n)} × Toff. (N)] / {2 × T} (Expression 12) Here, when (Equation 10) and (Equation 12) are solved for Toff (n) while erasing Ip (n) and Iv (n), Toff (n) × Toff (n) = [2 × T × L * {Iv (n-1) -Iav (n)} / Vdc (n)] + T * T * Vac (n) / Vdc (n) (Formula 13) Therefore, Ton (n) Is calculated as Ton = T−Toff (n) (Equation 14). Note that (Equation 14) and other calculation processes are supplemented in FIGS. 15 and 16.

  In this embodiment, the control on-time Ton (n) is calculated using (Equation 9) or (Equation 14) according to the discontinuous mode or the continuous mode. Prediction parameters for the AC input voltage Vac (n), the DC output voltage Vdc (n), and the average input current Iav (n) in (n) are required.

The AC input voltage Vac (n) is predicted based on the current AC input voltage measurement value Vac (n-1) and the previous AC input voltage measurement value Vac (n-2). The difference between the control cycle (n-2) and the control cycle (n-1) measurement value is added to the current measurement value Vac (n-1) as follows. Vac (n) = 2 × Vac (n−1) −Vac (n−2) (Equation 15)
On the other hand, for the DC output voltage Vdc (n), an average value Vdc of past measurement values for the DC voltage is adopted. Although the calculation method of the average value Vdc is determined as appropriate, in this embodiment, the measured values for the past 0.5 seconds are averaged by the averaging process executed every 0.5 seconds to obtain the DC output voltage Vdc. (See step ST38 in FIG. 9). This DC output voltage Vdc is stored in an appropriate work area of the memory, and the value Vdc of this work area is updated every 0.5 seconds.

  Therefore, in this case, in the discontinuous mode, Ton (n) × Ton (n) = {2 × T × L × Iav (n) × (Vdc−Vac (n))} / {Vac (n) × On the other hand, in continuous mode, Toff (n) × Toff (n) = [2 × T × L × {Iv (n−1) −Iav (n)} / Vdc. ] + T × T × Vac (n) / Vdc (Equation 13 ′), Ton = T−Toff (n) (Equation 14 ′).

  However, instead of using the average value Vdc for 0.5 seconds, the value of Vdc (i) obtained from the output value AD3 of the A / D converter AD3 every 1 mS may be used. In this case, in the discontinuous mode, Ton (n) × Ton (n) = {2 × T × L × Iav (n) × (Vdc (i) −Vac (n))} / {Vac (n) × Vdc (i)} (Equation 9 ″) On the other hand, in continuous mode, Toff (n) × Toff (n) = [2 × T × L × {Iv (n−1) −Iav ( n)} / Vdc (i)] + T × T × Vac (n) / Vdc (i) (Equation 13 ″), Ton = T−Toff (n) (Equation 14 ″) Become. In FIG. 3, for convenience, the case where Vdc (i) is used is indicated by a solid line, and the case where the DC output voltage Vdc is used is indicated by a broken line.

  The predicted value of the average input current Iav (n) is Iav (n) = β × Vac (n) from the relationship with the predicted value of the AC input voltage Vac (n). Here, the gain β is adjusted by PI control so that the difference Verr becomes zero while comparing the reference value (target value) Vo of the DC output voltage with the above-mentioned averaged DC output voltage Vdc.

  That is, Verr = Vo−Vdc (Expression 16), and Vo = Vac (pk) + α (Expression 17). Here, the reference value Vo of the DC output voltage is set to a value obtained by adding the amount of boost α by the coil L to the peak value Vac (pk) of the AC input voltage (pulsating flow). By setting in this way, conversion with high efficiency according to the input voltage value is possible. In addition, since the amount of pressure boosted by the coil L can be reduced, it is possible to select an inexpensive and lightweight coil with an appropriate size that does not increase in size. The optimum inductance value of the coil L is generally determined based on a design formula of L = Vac × Vac × (Vdc−Vac) / {γ × Pac × Vdc / T}. Since the output voltage value Vdc is set in correspondence with the voltage value Vac, the inductance value of the coil always maintains an almost optimum value. In the above design formula, γ is the ripple content of the input current, T is the control period, Pac is the maximum input power, and Vac is the instantaneous value of the input voltage.

  FIG. 3 is a control block diagram for explaining the above-described control operation. As shown in the figure, it is determined for each control cycle whether it is a continuous mode or a discontinuous mode. If it is a discontinuous mode, (Equation 9 ′ / Equation 9 ″) is used. The control on time Ton is calculated using Equation 14 ″). Then, the switching element Q1 of the step-up chopper 4A is turned on by a PWM wave having a pulse width equal to the calculated control on time Ton.

  As described above, the control principle of the PWM control has been described based on FIGS. 2 and 3. Next, the one-chip microcomputer 3 that realizes the control operation of FIG. 3 will be specifically described.

  FIG. 4 illustrates an internal configuration diagram of the one-chip microcomputer 3. Here, a single-chip RISC microcomputer SH7046 (Renesas Technology Corp.) is used. The one-chip microcomputer 3 includes a CPU core 30, a clock generation unit 31, an AD conversion unit 32, and a multifunction timer pulse unit (MTU) 33. The clock generator 31 of this embodiment oscillates a 50 MHz system clock, and a 25 MHz peripheral clock PΦ obtained by dividing the system clock by two is supplied to the MTU 33. Then, the peripheral clock PΦ is supplied to the counter of the MTU 33 as it is as a counting clock (frequency 25 MHz) without being divided thereafter.

  FIG. 5 schematically illustrates the internal configuration of the AD conversion unit 32. The AD converter 32 has 8-channel analog input terminals AN8 and AN15. The input analog signal is AD converted by a successive approximation method, and the digital data after AD conversion (resolution of 10 bits) is: It is stored in the data registers ADDR8 and ADDR15.

  In this embodiment, each analog signal indicating the operation state of the step-up chopper 4 is supplied to the above-described AD conversion unit 32 via the signal input units IN1 and IN3. It functions as a 4-channel A / D converter AD1, AD4. The 4-channel A / D converters AD1 and AD4 are set to operate in the continuous scan mode. When receiving an AD conversion start trigger (see FIG. 5) from the MTU 33, the A / D converters AD1 and AD4 are in that order. An AD conversion operation is executed.

  When all the AD conversion operations are completed, an interrupt signal (ADI interrupt) is set to be output to the CPU core 30. Therefore, the CPU core 30 performs arithmetic processing based on the AD-converted input data in the interrupt processing program caused by the ADI interrupt, and calculates the control on time Ton described above.

  FIG. 6 illustrates the internal configuration of an MTU (multifunction timer pulse unit) 33. The MTU 33 is composed of a 5-bit (channel_0 to channel_4) 16-bit timer, and can output a PWM wave having an arbitrary pulse width based on data set in various registers.

In the case of the present embodiment, each setting of the MTU 33 is as follows.
<Settings related to the AD conversion unit 32>
An AD conversion start trigger is generated by a compare match of TGRA_0 (channel 0 general register A). Note that, as described above, the AD conversion unit 32 of the one-chip microcomputer 3 starts the AD conversion operation by the AD conversion start trigger.
<Setting of interrupt request to CPU core 30>
An interrupt request signal is generated in the CPU core by a compare match of TGRA_0 (channel 0 general register A). In response to this interrupt request signal, the CPU core 30 writes a set value to TGRB_0 (general register B of channel 0), TGRA_2 and TGRB_2 (general registers A and B of channel 2) (the symbol “*” in FIG. 6). reference).

Here, the set value (Ton) of TGRB_0 is a variable value that defines the falling timing of the PWM wave output from the MTU 33. Also, the set values of TGRA_2 and TGRB_2 (indicated as Ton-20 and Ton + 20 in FIG. 6) are variable values that define the timing at which the second switching element Q2 is turned on prior to the OFF transition operation of the first switching element Q1. It is.
<Settings related to the operation of the MTU 33>
[Setting (1)] All channels 0 to 2 are set to “synchronous operation”. Then, the channel 0 counter clearing factor is set to “TGRA — 0 (channel 0 general register A) compare match”, and the channel 1-2 counter clearing factors are set to “synchronous clear”. Accordingly, the timer counters TCNT_0 to TCNT_2 of the channels 0 to 2 are all cleared in synchronization with the TGRA_0 compare match.
[Setting (2)] Channels 0 to 2 are set to “PWM mode 1”. In the case of PWM mode 1, channel 0 uses TGRA (general register A) and TGRB (general register B) in pairs. A PWM wave resulting from a compare match between TGRA and TGRB is output from the TIOCA terminal (PWM output terminal of the MTU 33).

In this embodiment, therefore, PWM is performed by each compare match of TGRA (general register A: set value 1140) and TGRB (general register B: set value Ton for each control cycle) from the TIOCA_0 terminal (PWM output terminal of channel 0). A wave is output (see FIG. 7A).
[Setting (3)] In the TGRA_1 and TGRB_1 (general registers A and B of the channel 1), the CPU core 30 writes 1140-α and γ fixedly by the initial setting. Here, since α = γ = 20, 1120 = 1140-20 and 20 are written in TGRA_1 and TGRB_1. Since α and γ are values that determine the pulse width of the ON pulse signal CTL, they may be changed based on the emitter current for each control cycle. In this case, an interrupt request due to a TGA_0 compare match In response to the signal, it is rewritten every control cycle.
[Setting (4)] As described above regarding <setting of interrupt request to CPU core 30>, TGRA_2 and TGRB_2 (general registers A and B of channel 2) have an interrupt request due to a compare match of TGRA_0. In response, the CPU core 30 writes Ton−α and Ton + γ, respectively. Note that Ton is a control ON time calculated for each control cycle. In FIG. 6 and FIG. 7, it is described as α = γ = 20.
[Setting (5)] The output level of the TIOCA terminal (the PWM output terminal of the MTU 33) changes at the time of TGRA (general register A) compare match and at the time of TGRB (general register B) compare match. Each output of TIOCA_0 to TIOCA_2 rises to an H level by a compare match of TGRA_0 to TGRA_2 and falls to an L level by a compare match of TGRB_0 to TGRB_2 by the initial setting to the TIOR (timer IO control register) of each channel. Set as follows.
[Setting (6)] The counting clock of the timer counter TCNT is set to 25 MHz (period 40 nS) which is the same as the peripheral clock PΦ.

  The MTU 33 is set and operated as described above. FIG. 7A shows the relationship between the timer counters TCNT (TCNT_0 to TCNT_2) of the channels 0 to 2 and the general registers (TGRA_0, TGRB_0) and the output from the PWM output terminal (TIOCA_0) in relation to the operation of the MTU 33. The PWM signal to be output and the pulse signal CTL output from each output terminal (TIOCA_1 to TIOCA_2) of the MTU 33 are illustrated.

  As described above, in this embodiment, the timer counters TCNT_0 to TCNT_2 of the channels 0 to 2 are synchronously cleared at the time of a compare match of TGRA_0 set to the fixed value 1140. Therefore, each timer counter TCNT functions as a 1140 base counter that circulates 0,1139. On the other hand, since the count clock of the timer counter TCNT is 25 MHz (period 40 nS), the timer counter circulates with 45.6 μS (= 1140 × 40 nS) as one period (control period T), and PWM control is performed. The carrier frequency is about 22 KHz.

  In the general registers (TGRA_0, TGRA_1, TGRB_1) of channel 0 and channel 1, 1140, 1140-α, and 0 + γ are fixedly set by the initial setting process, respectively. On the other hand, each of the general registers (TGRB_0, TGRA_2, TGRB_2) of channel 0 and channel 2 has a CPU core due to an interrupt that occurs at the time of a channel 0 TGRA (TGRA_0) compare match (that is, when each timer counter TCNT is synchronously cleared). 30 writes Ton, Ton-α, and Ton + γ, respectively.

  Due to the above settings, TIOCA_0 (the TIOCA terminal of channel 0) rises to the H level as the timer counter TCNT is cleared. Thereafter, when the timer counter TCNT_0 of the channel 0 advances and coincides with Ton which is the value of TGRB_0 (general register B of the channel 0), the TIOCA_0 falls to the L level. Prior to the ON / OFF transition operation of the PWM wave, the ON pulse signal CTL is output in advance from the TIOCA_1 terminal and the TIOCA_2 terminal.

  As described above, the PWM wave turns on the switching element Q1 with the pulse width Ton, and the switching element Q2 is turned on by the ON pulse signal CTL before the switching element Q1 is turned on. FIG. 7B illustrates an output waveform of the drive circuit DR with respect to the switching circuit 4B. FIG. 7C shows the interrupt processing of the CPU core 30 based on the compare match of TGRA_0 (channel 0 general register A). As described above, at the first timing of each control cycle (at the time of TGRA_0 compare match), the CPU core 30 sets the pulse width to the TGRB_0 (channel 0 general register B) of the MTU 33 so that the pulse width becomes the control on time Ton. Write the value. The control on time Ton is a value calculated in the immediately preceding control cycle.

  FIG. 7D illustrates an AD conversion start trigger by a compare match of TGRA — 0 (channel 0 general register A). As shown in the figure, at the first timing of each control cycle (when a compare match of TGRA_0), an AD conversion start trigger is supplied from the MTU 33 to the AD conversion unit 32, and in response, the A / D converters AD1 and AD4 continue. The AD conversion operation is executed in this order by operating in the scan mode. When the A / D converter AD4 finishes AD conversion, it outputs an AD conversion end interrupt signal to the CPU core 30.

  As described above, the MTU 33 cooperates with the CPU core 30 and the AD conversion unit 32 to output a PWM wave with a control period T of about 50 μS. 8 and 9 are flowcharts showing the processing contents of the one-chip microcomputer 3 that realizes the control operation of FIG. The control process shown in FIG. 3 includes a PWM wave output operation (see FIGS. 7A and 8A) performed by the MTU 33 repeated every 45.6 μS, and a timer interrupt TM_INT activated every 1 mS (FIG. 9). ) And an AD conversion end interrupt AD_INT (FIG. 8B) that is started when the AD conversion operation is completed.

  Hereinafter, the operation content of the MTU 33 is confirmed based on FIG. The timer counter TCNT is cleared in synchronization every 45.6 μS (= 1140 count clocks). The CPU core 30 is interrupted at the time of clearing, and the CPU core 30 defines the falling timing of each PWM wave and the operation timing of the ON pulse signal CTL preceding it by the writing process to TGRB_0, TGRA_2, and TGRB_2 ( (Refer FIG.7 (b) (c)). Further, when the timer counter TCNT is cleared, an AD conversion start trigger is supplied to the AD conversion unit 33 (see FIG. 7D).

  Thereafter, when the AD conversion processing of the A / D converters AD1 and AD4 operating in the continuous scan mode is completed, an AD conversion end interrupt is applied to the CPU core 30. As shown in FIG. 8C, there is a time delay Ts from the start of the control cycle to the start of the first AD conversion, and the start of the fourth AD conversion from the start of the first AD conversion. Until there is a delay time Td.

<AD conversion end interrupt AD_INT>
When the AD conversion operation is completed for all the A / D converters, the control operation is executed by the interrupt process AD_INT shown in FIG. First, output values AD1 and AD4 (input current to the coil L) of the A / D converters AD1 and AD4 are acquired (ST10). Next, the average value Iav (n−1) of the input current in the control cycle (n−1) is calculated by the average calculation (AD1 + AD4) / 2 (ST11). As shown in FIG. 8C, the input current value varies depending on the sampling point, so the accuracy as the average value (average current) of the input current is not high, but this average value Iav (n−1) Is used only for the correction of the inductance value described below, so that no particular problem occurs.

  When the average value Iav (n−1) of the input current is obtained, the inductance value of the coil L1 mounted on the circuit is specified based on the current value Iav (n−1). As shown in FIG. 10, the inductance value of the coil L <b> 1 often changes depending on the DC superimposed current (average current) flowing therethrough. Therefore, in this embodiment, the characteristics of the coil L1 mounted on the circuit are stored in advance in the memory, and the inductance value corresponding to the average value Iav (n−1) of the input current is used in each arithmetic expression. I am doing so.

  Therefore, highly accurate control is possible without using a large and expensive coil. In order to further improve the control accuracy, the current value Iav (n−1) obtained by the average calculation (AD1 + AD4) / 2 is used as the control on time Ton (n−1) in the control cycle (n−1). It may be corrected accordingly (see FIG. 3). In other words, the two sampling points AD1 and AD4 may be divided into the coil charging current AD1 and the coil discharging current AD4, or the control on time Ton (n−1) may be long, and both may be the coil charging current. Therefore (see FIG. 8C), more accurate control can be realized if the average current is corrected based on this point.

  Subsequently, the output value AD2 (AC input voltage Vac (n-1)) of the A / D converter AD2 is acquired (ST13). Then, Vac (n) is calculated based on the voltage prediction formula Vac (n) = 2 × Vac (n−1) −Vac (n−2) (ST14). Next, the output value AD3 (DC output voltage Vdc (n-1)) of the A / D converter AD3 is acquired (ST15).

  Subsequently, the input current command value Iav (n) is calculated by calculating Iav (n) = β × Vac (n) (ST16). Note that. A necessary value of the integration parameter β is updated every 1 mS in the timer interrupt process TM_INT shown in FIG. 9 and stored in an appropriate work area.

  Next, the acquired value AD1 from the A / D converter AD1, the inductance value L of the coil corrected in the process of step ST12, the AC input voltage value Vac (n−1) acquired in the process of step ST13, Based on the control ON time Ton (n-1) and the DC output voltage value Vdc (i) in this control cycle, and based on the discriminant of (Expression 5 ′), the coil charging start current Iv (n−1) Is calculated (ST17). Then, according to the value (whether positive or not) of the coil charging start current Iv (n−1), it is determined whether the control should be controlled as the continuous mode or the discontinuous mode (ST17). As described above, the discriminant of (Expression 5 ″) may be used instead of (Expression 5 ′).

  If Iv (n−1) ≦ 0 and the discontinuous mode is set, Iv (n−1) = 0 is set (ST19), (Equation 9 ′) or (Equation 9 ″). ) To calculate the control on time Ton (n) (ST20). On the other hand, if Iv (n−1)> and the continuous mode is set, the control on-time Ton (n) is calculated based on the arithmetic expression of (Expression 14 ′) (Expression 14 ″) (ST21). ).

  Then, on the condition that the calculated control ON time Ton (n) does not exceed the control upper limit value and the control lower limit value, the Ton in the PWM buffer area is set as the control ON time of the next control cycle (n). The value of (n) is set (ST22, 23). The Ton (n) written in the PWM buffer in this way is used at the time of interruption at the start of the next control cycle, and is transferred to the TGRA_2 and TGRB_2 (channel 2 general registers A and B) of the MTU 33, respectively. -Α, Ton + γ are written. However, when the calculated control ON time Ton (n) exceeds the upper limit value or the lower limit value, the control upper limit value or the control lower limit value is set in the PWM buffer.

<Timer interrupt TM_INT>
Next, the timer interrupt TM_INT started every 1 mS independently of the above-described AD conversion end interrupt AD_INT will be described with reference to the flowchart of FIG.

  In the timer interrupt TM_INT, first, Vdc (i), which is the output of the A / D converter AD3, is acquired (ST30). The A / D converter AD3 executes an AD conversion operation every 45.6 μS, but the timer interrupt INT1 acquires the AD converted output DC voltage every 1 mS. Hereinafter, the acquired DC voltage is expressed as Vdc (i).

  Next, the calculation of SUM ← SUM + Vdc (i) is executed, and the acquired value of the output DC voltage Vdc (i) is added to the average calculation buffer SUM in the work area (ST31). Also, the AC input voltage Vac (i), which is the output of the A / D converter AD2, is acquired (ST32), and the AC input voltage Vac (i) and the peak value Vac (pk) stored in the memory are obtained. Contrast (ST33).

  If Vac (i)> Vac (pk), the maximum wave height value Vac (pk) stored in the memory is updated by calculating Vac (pk) ← Vac (i) (ST34). After obtaining the peak value Vac (pk) of the AC input voltage in this way, the counter CT is decremented (−1) (ST35), and it is determined whether or not the counter value CT is zero (ST36).

  Here, when the counter value CT becomes CT = 0, the average value of the output DC voltage Vdc (i) is obtained by multiplying the value of the average calculation buffer SUM by 1/500 (ST37). Then, the DC output voltage Vdc is specified by this average value (ST38).

  When the DC output voltage Vdc is obtained in this way, the values of the average calculation buffer SUM and the counter CT are initialized (ST39), and the reference value (target value) Vo of the output DC voltage is calculated by calculating Vo ← Vac (pk) + α. Is calculated (ST40). α is a boosted amount in the coil L when compared with the peak value Vac (pk) of the input AC voltage. Then, the difference between the output reference voltage Vo and the output average voltage Vdc obtained from the measured value is calculated (ST41). Specifically, Verr (i) ← Vo−Vdc is calculated.

  Based on the above result, the command value β by the PI control is calculated, and the timer interrupt process INT1 is finished (ST42). Here, the calculation of the command value β is based on an arithmetic expression of β = Verr (i) × Kp + {Verr (i) × Ki + Verr (i−1) ′ × Ki}, where Verr (i−1) ′ × Ki is , The previous integration control value (i−1), which is a value calculated as Verr (i−1) ′ × Ki = Verr (i−1) × Ki + Verr (i−2) ′ × Ki.

  The content of the AD conversion end interrupt (FIG. 8B) described above is described as “INT1” in the control block diagram 3. Further, “A / D” is described in the operation of the AD conversion unit 33, and “MTU” is described in the operation of the MTU 33.

  As described above, in the digital converter 1 according to the embodiment, since the switching circuit 4B is connected in parallel to the step-up chopper 4A, the average current of each of the switching elements Q1 and Q2 decreases, and the ON / OFF transition operation is performed. Spike noise is reduced. Moreover, since the switching element Q2 is always in the ON state during the ON / OFF transition operation of the switching element Q1, the occurrence of spike noise is effectively suppressed in this sense.

It is a circuit block diagram which shows the digital converter which concerns on an Example. It is a time chart explaining the relationship between a control period and the charging / discharging operation | movement of a coil. It is a control block diagram explaining the control operation of the digital converter which concerns on an Example. It is a block diagram which shows the internal structure of a one-chip microcomputer. It is a block diagram which shows the internal structure of an AD conversion part. It is a block diagram which shows the internal structure of MTU. It is a time chart explaining operation | movement of MTU. It is a flowchart which shows the operation | movement content of MTU and AD conversion interruption. It is a flowchart which shows the operation | movement content of a timer interruption. It is a characteristic view which shows the relationship between the inductance value of a coil, and an average current. It is drawing explaining the derivation | leading-out process of (Formula 5). It is drawing explaining the derivation | leading-out process of (Formula 5). It is drawing explaining the derivation | leading-out process of (Formula 9). It is drawing explaining the derivation | leading-out process of (Formula 9). It is drawing explaining the derivation | leading-out process of (Formula 14). It is drawing explaining the derivation | leading-out process of (Formula 14). It is drawing explaining the principle of operation of this invention. It is drawing explaining the problem of a prior art.

Explanation of symbols

L1, L3 Coils Q1, Q3 Switching element 1 Digital converter 2 Rectifier circuit 3 Computer circuit (one-chip microcomputer)
4A boost chopper

Claims (7)

In a digital converter having a step-up chopper provided with a coil and a switching element, a rectifier circuit that supplies an input current to the coil, and a computer circuit that performs PWM control of the switching element in a predetermined control cycle,
A switching circuit is provided in parallel with the step-up chopper, and the switching circuit is
ON operation precedes the ON transition operation of the switching element, OFF operation after the ON transition of the switching element,
A digital converter configured to perform an ON operation prior to an OFF transition operation of the switching element and to perform an OFF operation after the OFF transition of the switching element .   The switching circuit is disposed between an input coil that receives a pulsating current output of the rectifier circuit, a diode connected in series to the input coil, a connection point between the input coil and the diode, and a ground, and is turned ON / OFF. The digital converter according to claim 1, comprising an auxiliary switching element that operates.   The digital output device according to claim 2, wherein an output terminal of the diode is connected to a capacitor that is charged when the switching element of the boost chopper is turned off, and a DC output voltage of the boost chopper is obtained from the capacitor. converter. Whether the current mode is the continuous mode or the discontinuous mode is determined in the current control cycle by measuring each of the coil charging start current, the output voltage of the rectifier circuit , and the DC output voltage of the boost chopper. The digital converter in any one of Claims 1-3 determined based on the control time of a PMW wave, and the inductance value of the said coil.   The computer circuit is a one-chip microcomputer having an AD conversion unit for digitally converting an analog input signal and a timer unit capable of automatically outputting a pulse wave having an arbitrary pulse width based on setting data to various registers. The digital converter in any one of Claims 1-4.   The digital converter according to claim 5, wherein the AD conversion unit is configured to digitally convert a group of analog input signals based on a command from the timer unit.   A method for controlling a digital converter that realizes the operation according to claim 1.