JP4930490B2 - Symbol synchronization method and digital demodulator - Google Patents

Description

  The present invention relates to symbol synchronization processing using a zero cross method in a digital demodulator.

  A digital modulation type receiver needs to synchronize symbol timing in order to demodulate a received signal and accurately acquire information. That is, if the symbol timing at the transmitter and the symbol timing at the receiver are not synchronized, information cannot be acquired from the received signal.

  Therefore, there is a zero cross method as a method of synchronizing symbol timing. The zero cross method is a method of obtaining symbol synchronization by detecting the timing at which the sign of the baseband signal is inverted. Symbol timing is synchronized by adjusting the sampling timing so that the zero cross point is at or near zero, with the intermediate point of a predetermined time interval (one symbol period) as the zero cross point.

  FIG. 4 is a schematic diagram showing the state of symbol synchronization when the zero cross method is used. In FIGS. 4A to 4C, the white dot portion represents an actual sample point (symbol timing), the black dot portion represents a zero cross point located between the two white dots, and the vertical broken line represents It represents the position of the ideal symbol point.

  FIG. 4A shows a case where the actual sample point and the ideal symbol point coincide with each other, and the zero-cross point is at the 0 position. FIG. 4B shows a case where there is a time lag between the actual sample point and the ideal symbol point. In this case, the symbol is adjusted so that the zero cross point represented by the black point is at the 0 position. Timing is synchronized.

As such a digital demodulator, for example, Patent Document 1 has already been proposed.
Japanese Patent Laid-Open No. 11-4272

  Conventionally, when a time lag has occurred between an actual sample point and an ideal symbol point, adjustment is performed by shifting the symbol timing by one sampling period. However, with this method, as shown in FIG. 4C, when there is a zero cross point at the position of the ideal symbol point, there is a problem that it takes a very long time to achieve symbol synchronization.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a symbol synchronization method and a digital demodulator capable of shortening the time until symbol synchronization.

According to the first aspect of the present invention, when the modulated signal is digitally demodulated, the input signal is converted into a baseband signal, and a zero cross method is applied to the baseband signal to generate a clock signal at the timing of the symbol point. , the intermediate point when the signs of the two consecutive symbol points are different detected as zero-crossing point, in the symbol synchronization method to bring the symbol points to the ideal symbol point based on the zero-crossing point, the step of detecting the zero-cross point A step of detecting a symbol / zero cross inversion state in which the amplitude of the symbol point is close to 0 is provided later, and the step of detecting the symbol / zero cross inversion state includes two symbols whose absolute value of the amplitude value of the zero cross point is two symbols. When the sum of the absolute values of the points is larger than the sum of the absolute values, the symbol / zero cross inversion state is detected. When the symbol / zero cross inversion state is detected, the clock signal is corrected by 0.4 to 0.6 symbols.

According to the second aspect of the present invention, when the modulated signal is digitally demodulated, the input signal is converted into a baseband signal, and a zero cross method is applied to the baseband signal to generate a clock signal at the timing of the symbol point. , the intermediate point when the signs of the two consecutive symbol points are different detected as zero-crossing point, in the symbol synchronization method to bring the symbol points to the ideal symbol point based on the zero-crossing point, the step of detecting the zero-cross point A step of detecting a symbol / zero cross inversion state in which the amplitude of the symbol point is close to 0 is provided later, and the step of detecting the symbol / zero cross inversion state includes an absolute value of the symbol point amplitude value of the zero cross point. Detected as symbol / zero cross inversion state when absolute value is smaller than 1/2 of absolute value When detecting the symbol / zero crossing inverted state is a symbol synchronization method being characterized in that as said clock signal to 0.4-0.6 correction symbols.

According to a third aspect of the present invention, a detection means for converting an input signal into a baseband signal, a determination means for decoding the baseband signal from the detection means, and a zero-cross method for the baseband signal from the detection means A digital demodulator comprising a timing recovery means for generating a clock signal at a symbol point timing and applying it to the determination means, wherein the timing recovery means encodes two consecutive symbol points. Is detected as a zero-cross point, and when the symbol / zero-cross inversion state in which the amplitude of the symbol point is near 0 is detected thereafter, the clock signal is set to 0.4 to 0.6 symbols. The timing correction means outputs the amplitude value of the zero crossing point completely. A digital demodulating apparatus characterized by determining a symbol / zero crossing inverted state when the value is greater than the sum of the absolute value of the amplitude values of the two symbol points.

According to a fourth aspect of the present invention, detection means for converting an input signal into a baseband signal, and determination means for decoding the baseband signal from the detection means (corresponding to an IQ determination unit in the case of quadrature detection) And a digital demodulator comprising timing recovery means for generating a clock signal at the timing of a symbol point by applying a zero cross method to the baseband signal from the detection means and outputting it to the determination means, In the timing reproduction means, when two consecutive symbol points have different signs, an intermediate point is detected as a zero cross point, and then a symbol / zero cross inversion state in which the amplitude of the symbol point is close to 0 is detected. to become as the clock signal corrected by the 0.4-0.6 symbol outputs to said determining means, said timing The raw unit, a digital demodulating apparatus characterized by determining a symbol / zero crossing inverted state when the absolute value of the amplitude value of the symbol points is smaller than the absolute value of the half of the amplitude value of the zero-cross point.

According to the first aspect of the invention, since in the case of detecting a symbol / zero crossing inverted state was such that 0.4 to 0.6 symbols compensation clock signal, to a state close to the inverted state to the synchronization symbol Since correction can be made at once, the time until symbol synchronization can be greatly shortened. Also, since the symbol / zero cross inversion state is detected when the absolute value of the amplitude value of the zero cross point is larger than the sum of the absolute values of the amplitude values of the two symbol points, the symbol / zero cross inversion state is accurately determined. It becomes possible to do.

According to the second aspect of the present invention, when the symbol / zero cross inversion state is detected, the clock signal is corrected by 0.4 to 0.6 symbols, so from the inversion state to the state close to symbol synchronization at once. Since it can be corrected, the time until symbol synchronization can be greatly shortened. Further, since the symbol / zero cross inversion state is detected when the absolute value of the amplitude value of the symbol point is smaller than the absolute value of ½ of the amplitude value of the zero cross point , the symbol / zero cross inversion state is accurately determined. It becomes possible to do.

According to the third aspect of the present invention, in the timing reproduction means, when the signs of two consecutive symbol points are different, the intermediate point is detected as a zero cross point, and then the amplitude of the symbol point is close to zero. When a symbol / zero cross inversion state is detected, the clock signal is corrected by 0.4 to 0.6 symbols and output to the determination means, so correction from the inversion state to a state close to symbol synchronization is performed at once. Therefore, the time until symbol synchronization can be greatly shortened. In the timing reproduction means, since the symbol / zero cross inversion state is determined when the absolute value of the amplitude value of the zero cross point is larger than the sum of the absolute values of the amplitude values of the two symbol points, the symbol / zero cross state is determined. It is possible to accurately determine the inversion state.

According to the fourth aspect of the present invention, when the signs of two consecutive symbol points are different in the timing reproduction means, the intermediate point is detected as a zero cross point, and then the amplitude of the symbol point is close to zero. When a symbol / zero cross inversion state is detected, the clock signal is corrected by 0.4 to 0.6 symbols and output to the determination means, so correction from the inversion state to a state close to symbol synchronization is performed at once. Therefore, the time until symbol synchronization can be greatly shortened. In the timing reproduction means, since the symbol / zero cross inversion state is determined when the absolute value of the amplitude value of the symbol point is smaller than the absolute value of ½ of the amplitude value of the zero cross point, the symbol / zero cross state is determined. It is possible to accurately determine the inversion state.

  The digital demodulator according to the present invention includes a detection means for converting an input signal into a baseband signal having two orthogonal components, an IQ determination means for decoding the baseband signal from the detection means, and a base from the detection means. A digital demodulator comprising a timing recovery means for generating a clock signal at a symbol point timing by applying a zero cross method to a band signal and outputting it to the IQ determination means, wherein the timing recovery means When the signs of two consecutive symbol points are different, the intermediate point is detected as a zero cross point, and then the absolute value of the amplitude value of the zero cross point is larger than the sum of the absolute values of the amplitude values of the two symbol points. When the inversion state is detected, the clock signal is corrected by 0.5 symbols and output to the IQ determination means. It is characterized in that there was Unishi. Details will be described below.

Embodiments of the present invention will be described with reference to the drawings.
The entire configuration of the digital demodulator according to the present invention is shown in the block diagram of FIG. In FIG. 2, an input intermediate frequency (IF) band signal is a baseband signal after an analog signal is converted into a digital signal by an A / D converter 17 and then quadrature detected by a quadrature detection unit 18. I component and Q component are extracted and input to LPFs (low pass filters) 19a and 19b. The LPFs 19a and 19b perform waveform shaping on the input baseband signals, and remove harmonic components generated by quadrature detection. The timing recovery unit 20 generates a clock signal for extracting symbol points based on the baseband signals from the LPFs 19 a and 19 b and outputs the clock signal to the IQ determination unit 21. The IQ determination unit 21 uses the baseband signals from the LPFs 19a and 19b and the clock signal from the timing recovery unit 20 to determine transmission information from the I component and the Q component, and demodulates the signal.

  The quadrature detection unit 18 has a carrier recovery circuit 22. The carrier recovery circuit 22 extracts the frequency error of the recovered carrier that is multiplied at points A and B in FIG. 2 from the modulated signals output from the LPFs 19a and 19b, and recovers the carrier of the received modulated signal. Reference numeral 23 denotes a 90 ° phase shifter for quadrature detection.

  The present invention is characterized by generation of a clock signal in the timing recovery unit 20, that is, symbol synchronization processing. In the description of the present invention, an actual sample point at a symbol timing based on a symbol frequency is expressed as a “symbol point”, an intermediate point between two symbol points having different signs is expressed as a “zero cross point”, and the symbol point is The ideal position to be taken is expressed as an “ideal symbol point”.

  In the timing reproduction unit 20 of the present invention, the sample signal sent via the LPFs 19a and 19b is processed by attaching a sample number. For example, as shown in FIG. 5, when 8 times oversampling is performed on the baseband signal, numbers 0 to 7 are sequentially assigned to the sample data, and the numbers 0 to 7 are circulated. To use. The timing reproducing unit 20 assigns the sample number in this way, and generates a clock signal that is a timing for extracting the symbol point based on the sample number. Note that the sample numbers to be used in a different manner vary depending on the sampling period, and the example of 8 times oversampling shown in FIG. 5 is merely an example.

  The timing reproduction unit 20 of the present invention employs a conventionally used zero cross method symbol synchronization method, detects the amount of time lag between the actual sample point and the ideal symbol point, and uses this time lag information. Sampling timing is compensated by reflecting it in the clock signal output to the IQ determination unit 21. That is, as shown in FIG. 5, when the zero-crossing method is applied and the amplitude value at the zero-crossing point is not 0, the symbol number is advanced or delayed so that the amplitude value at the zero-crossing point approaches 0. The sample number at the symbol timing is adjusted so as to move the point (in the example of FIG. 5, it is necessary to increase the sample number in the advance direction).

  Further, the timing reproduction unit 20 according to the present invention detects a case where the symbol point is near 0 and the zero cross point is near the ideal symbol point (symbol / zero cross inversion), and in this case, IQ determination is performed. The clock signal output to the unit 21 is forcibly shifted by 0.5 symbols. This will be described in more detail below.

The flow of the symbol synchronization processing in the timing reproduction unit 20 of the present invention will be described based on the flowchart shown in FIG. The timing reproduction unit 20 extracts symbol points at a predetermined interval (symbol frequency interval) for the baseband signal, and constantly monitors two consecutive symbol points and a sample point in between, and based on these symbols, Perform synchronous processing.
First, in (S01) of FIG. 1, the zero cross point is detected. Specifically, when the product of the value of the current symbol point and the value of the previous symbol point is negative, an intermediate point between the two symbol points is detected as a zero cross point. If the zero cross point is detected, the process proceeds to the next (S02). If the zero cross point is not detected, the process proceeds to (S10) and the process proceeds to the next symbol point process.

When a zero cross point is detected, symbol / zero cross inversion determination is performed in (S02). That is, an inversion state in which the symbol point is near 0 and the zero cross point is near the ideal symbol point is detected, and in this case, the process is forcibly shifted by 0.5 symbols (S03). Transition. A specific method of this symbol / zero cross inversion determination is, as shown in the following determination formula, when the absolute value of the amplitude value of the zero cross point is larger than the sum of the absolute values of the amplitude values of the two symbol points, judge.
| Zero cross point amplitude value |> | Previous symbol point amplitude value | + | Current symbol point amplitude value |

  In (S03), the clock signal output to the IQ determination unit 21 is corrected so that the symbol point is forcibly shifted by 0.5 symbols. That is, the sample number of the symbol point is counted up or down in the advance direction or the delay direction by an amount equivalent to 0.5 symbols. This 0.5 symbol shift eliminates the symbol / zero cross inversion state and shortens the time until symbol synchronization. After shifting by 0.5 symbols in (S03), the process proceeds to (S10) and proceeds to processing of the next symbol point.

  If the symbol / zero cross inversion state is not detected, the process proceeds to the normal symbol synchronization process from (S04) to (S09). In (S04), the product of the value of the current symbol point and the value of the zero cross point is calculated, and the sign of the calculation result is determined. If the sign is negative (S05), the value of Btcount is -1 in (S05), and if the sign is positive (B06), the value of Btcount is incremented by 1 (S07). Here, “Btcount” is a count value for determining the directionality in which the zero cross point is moved, and is once counted by Btcount without directly adjusting the symbol timing.

  In (S07), paying attention to the value of Btcount, if Btcount value> MAX threshold value, go to (S08), if Btcount value <MIN threshold value, go to (S09), MAX threshold value ≧ Btcount. If the value of ≧ MIN threshold value, the process proceeds to (S10). Here, the set MAX threshold and MIN threshold are set to values at which symbol synchronization is appropriately performed.

  In (S08), when the value of Btcount> MAX threshold value, the clock output to the IQ determination unit 21 so as to count up the sampling data (shift the symbol point sample number in the advance direction). Correct the signal. That is, the clock signal is corrected so that the symbol point is shifted in the direction (advance direction) in which the symbol timing is earlier by one data interval (sampling data interval) of the baseband signals from the LPFs 19a and 19b. By this process, the process of making the zero cross point amplitude close to zero is performed. Thereafter, the process proceeds to (S10), and the process proceeds to the next symbol point process. The correction amounts in (S08) and (S09) are not limited to this embodiment, and can be appropriately set as design matters.

  In (S09), when the value of Btcount <MIN threshold value, the clock signal output to the IQ determination unit 21 so as to count down the sampling data (shift the symbol point sample number in the delay direction). Correct. In other words, the clock signal is corrected so that the symbol point is shifted in the direction in which the symbol timing is delayed (advance direction) by one data interval (sampling data interval) of the baseband signal from the LPFs 19a and 19b. By this process, the process of making the zero cross point amplitude close to zero is performed. Thereafter, the process proceeds to (S10), and the process proceeds to the next symbol point process.

  In (S07), if MAX threshold ≧ Btcount value ≧ MIN threshold, the process proceeds to (S10) and proceeds to processing of the next symbol point without correcting the symbol timing. In this way, by repeating the processing of (S01) to (S10) for each symbol point, the zero cross point can be brought close to 0, and symbol synchronization processing is performed.

  As described above, the timing reproduction unit 20 of the digital demodulator 24 according to the present invention is provided with a symbol / zero cross inversion determination means, and forcibly shifts by 0.5 symbols when a symbol / zero cross inversion state is detected. As described above, the clock signal output to the IQ determination unit 21 is corrected. Thus, for example, by shifting by 0.5 symbols from the inversion state as shown in FIG. 3A, correction can be made at once to the state where the symbol synchronization shown in FIG. 3B is achieved. Therefore, it is possible to significantly reduce the time until symbol synchronization.

  Further, the timing reproduction unit 20 of the digital demodulator 24 according to the present invention does not directly adjust the symbol timing when the zero cross point is detected, but once counts by Btcount, and it is the first time when Btcount exceeds the threshold value. The symbol point is corrected. By performing such processing, an effect similar to that of performing averaging processing on the deviation of the zero cross point can be obtained.

  In the first embodiment, as a specific method of the symbol / zero cross inversion determination in (S02) of FIG. 1, when the absolute value of the amplitude value of the zero cross point is larger than the sum of the absolute values of the amplitude values of the two symbol points. The inversion state is determined, and in this case, the shift is forced by 0.5 symbols. However, the conditions for the symbol / zero cross inversion determination are not limited to this case.

In the second embodiment, as a specific method of the symbol / zero cross inversion determination in (S02) of FIG. 1, the absolute value of the amplitude value of the previous or current symbol point is zero cross as shown in the following determination formula. When it is smaller than the absolute value of 1/2 of the amplitude value of the point, the inversion state is determined.
| Zero cross point amplitude value / 2 |> | Previous symbol point amplitude value |
Or | zero cross point amplitude value / 2 |> | current symbol point amplitude value |

  When the symbol / zero cross inversion state is determined according to the above determination conditions, the shift is forced by 0.5 symbols. As a result, as in the first embodiment, correction can be made at once from the symbol / zero cross inversion state to the substantially symbol synchronization state, so that the time until symbol synchronization can be greatly shortened.

  In the first and second embodiments, it has been described that correction is performed for 0.5 symbols when the timing reproduction unit 20 detects a symbol / zero cross inversion state. For example, 0.4 symbols or 0.6 symbols are used. Even if the correction is set to the minute, it is possible to shorten the time until symbol synchronization as compared with the conventional symbol synchronization processing. That is, the present invention is not limited to the correction for 0.5 symbols, and can be set as appropriate.

  To express this more generally, an adjustment width (for example, a sampling period) applied when the zero cross point is detected in the so-called zero cross method and is not in the symbol / zero cross inversion state in the present invention. If the symbol / zero cross inversion state is determined according to the present invention, an adjustment amount larger than the predetermined adjustment amount (0. 0 in the first and second embodiments) is expressed. 5 symbols) is corrected all at once. More specifically, when it is determined that the symbol / zero cross inversion state is detected, an adjustment amount that is a multiple of the predetermined adjustment amount is corrected all at once, compared to the conventional case where symbol synchronization is performed using only the predetermined adjustment amount. Thus, the time until symbol synchronization can be shortened.

  In the first embodiment, the determination condition for the symbol / zero cross inversion state is determined as the inversion state when the absolute value of the amplitude value of the zero cross point is larger than the sum of the absolute values of the amplitude values of the two symbol points. In the second embodiment, the inversion state is determined when the absolute value of the amplitude value of the previous or current symbol point is smaller than the absolute value of ½ of the amplitude value of the zero cross point. However, other conditions can be set as appropriate as long as the case where the amplitude of the symbol point takes a value close to 0 and the case where the amplitude of the zero crossing point is equal to or greater than a certain value can be detected. is there.

It is a flowchart figure showing the flow of the symbol synchronization process in the timing reproducing part 20 of the digital demodulator 24 by this invention. It is a block diagram showing the structure of the digital demodulator 24 by this invention. It is a schematic diagram showing a state of shifting by 0.5 symbols when a symbol / zero cross inversion state is detected. It is the schematic diagram explaining the symbol synchronization process using the zero cross method. FIG. 4 is a schematic diagram showing how sample numbers are numbered in the timing reproduction unit 20.

Explanation of symbols

DESCRIPTION OF SYMBOLS 17 ... A / D converter, 18 ... Quadrature detection part, 19a and 19b ... LPF (low-pass filter), 20 ... Timing reproduction part, 21 ... IQ determination part, 22 ... Carrier reproduction circuit, 23 ... 90 degree shift, 24 ... Digital demodulator.

Claims (4)

When digitally demodulating a modulated signal, the input signal is converted into a baseband signal, and a zero cross method is applied to the baseband signal to generate a clock signal at the timing of the symbol point. code detects the midpoint as the zero-crossing point if different, the symbol synchronization method to bring the symbol points to the ideal symbol point based on the zero-cross point, after the step of detecting the zero-cross point, the amplitude of the symbol point is 0 A step of detecting a symbol / zero cross inversion state that is in the vicinity is provided, and the step of detecting the symbol / zero cross inversion state is such that the absolute value of the amplitude value of the zero cross point is the absolute value of the amplitude value of two symbol points. When it is larger than the sum, it is detected as a symbol / zero cross inversion state, and symbol / zero is detected. A symbol synchronization method characterized by correcting the clock signal by 0.4 to 0.6 symbols when a cross inversion state is detected. When digitally demodulating a modulated signal, the input signal is converted into a baseband signal, and a zero cross method is applied to the baseband signal to generate a clock signal at the timing of the symbol point. code detects the midpoint as the zero-crossing point if different, the symbol synchronization method to bring the symbol points to the ideal symbol point based on the zero-cross point, after the step of detecting the zero-cross point, the amplitude of the symbol point is 0 A step of detecting a symbol / zero cross inversion state that is in the vicinity is provided, and the step of detecting the symbol / zero cross inversion state is an absolute value of the amplitude value of the symbol point being ½ of the amplitude value of the zero cross point. When the value is smaller than the value, it is detected as a symbol / zero cross inversion state, and the symbol / zero cross is detected. A symbol synchronization method characterized in that, when a loss inversion state is detected, the clock signal is corrected by 0.4 to 0.6 symbols. Detection means for converting an input signal into a baseband signal, determination means for decoding a baseband signal from the detection means, and a timing of symbol points by applying a zero cross method to the baseband signal from the detection means A digital demodulator comprising a timing recovery means for generating a clock signal to be output to the determination means, wherein the timing recovery means determines an intermediate point when two consecutive symbol points have different signs. detecting a zero-crossing point, then, when detecting the symbol / zero crossing inverted state in which the amplitude is coming near zero symbol point, the clock signal 0.4-0.6 to symbols corrected by the determination means will be output, and in the timing reproducing unit, the absolute value of the two symbols of the amplitude values of the zero-cross point Digital demodulating apparatus characterized by determining a symbol / zero crossing inverted state when greater than the sum of the absolute value of the amplitude values of. Detection means for converting an input signal into a baseband signal, determination means for decoding a baseband signal from the detection means, and a timing of symbol points by applying a zero cross method to the baseband signal from the detection means A digital demodulator comprising a timing recovery means for generating a clock signal to be output to the determination means, wherein the timing recovery means determines an intermediate point when two consecutive symbol points have different signs. detecting a zero-crossing point, then, when detecting the symbol / zero crossing inverted state in which the amplitude is coming near zero symbol point, the clock signal 0.4-0.6 to symbols corrected by the determination means will be output, and in the timing reproducing unit, vibration absolute value of the amplitude value of the symbol points of the zero cross point Digital demodulating apparatus characterized by determining a symbol / zero crossing inverted state when smaller than the absolute value of half the value.

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