JP4903637B2 - Comparator circuit - Google Patents

Description

  The present invention relates to a comparator circuit, and more particularly to a circuit suitable for a comparator circuit of an FSK demodulating circuit.

  When demodulating an FSK (frequency shift keying) signal, a signal component included in the FSK signal is removed to extract a DC component, which is used as an average voltage of the FSK signal, and this voltage is compared with the FSK signal as a threshold voltage. Thus, binarized data is generated.

  Here, in order to obtain the average voltage of the FSK signal, a primary low-pass filter using a resistor and a capacitor is usually used. The cut-off frequency of this low-pass filter is set sufficiently lower than the frequency of the signal component included in the FSK signal. There is a need. For this reason, the capacity of the capacitor is increased, it takes time to charge and discharge, the rise of the average voltage is delayed, and it takes a long time to obtain binarized data. That is, when there is a change in the input signal voltage Vin, the average voltage Vref cannot follow at a high speed due to the time constant composed of the capacitor and the resistor.

  Particularly in a battery-operated system, shortening the rise time is important for extending the battery life, and a charge / discharge circuit for rapidly charging / discharging the capacitor is required. In order to achieve this, conventionally, a method of charging and discharging a capacitor using a diode has been used.

  However, in this configuration, the signal voltage when charging or discharging the capacitor is restricted by the forward voltage VF of the diode. That is, when Vin−Vref obtained by subtracting the average voltage Vref from the input signal voltage Vin takes a positive value, the capacitor is charged when it becomes larger than the forward voltage VF, and when Vin−Vref takes a negative value, the forward voltage When it becomes smaller than −VF, the capacitor is discharged, but the voltage at which charging / discharging is started cannot be set to an arbitrary value and is fixed at ± VF.

Further, the forward voltage VF of the diode is as large as about 0.6 V, and it has been difficult to adapt to the reduction in signal amplitude accompanying the recent reduction in power supply voltage. Further, the forward voltage VF has a temperature-dependent characteristic (-2 mV / ° C.), and it has been difficult to obtain high reliability.
JP-A-5-252009

  An object of the present invention is to provide a comparator circuit that can arbitrarily set a charge / discharge start voltage and can improve circuit characteristics without depending on temperature characteristics of a diode.

  A comparator circuit according to one embodiment of the present invention compares an input signal voltage with a reference voltage obtained by smoothing the input signal using a resistor and a capacitor, and outputs a result thereof. A first addition signal to which a first voltage is added is compared with the reference voltage, and a discharge circuit that discharges the capacitor when the first addition signal falls below the reference voltage; and the input signal voltage And a charging circuit that compares the reference voltage with a second addition signal to which a second voltage is added, and charges the capacitor when the second addition signal rises above the reference voltage. To do.

  An object of the comparator circuit of the present invention is to provide a comparator circuit that can arbitrarily set a charge / discharge start voltage and can improve circuit characteristics without depending on temperature characteristics of a diode.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  First, the configuration of an FSK receiving circuit including a comparator circuit according to an embodiment of the present invention will be described with reference to FIG.

  After the signal received by the antenna (ANT) 101 is amplified by the low noise amplifier (LNA) 102 and the frequency is lowered by the mixer (MIX) 103, components other than the intermediate frequency (IF) are obtained by the IF filter (IFF) 104. Removed.

  After that, after being amplified by the IF amplifier (IF_AMP) 105 and detected by the FM detector (DET) 106, only a necessary low frequency component is passed through the low-pass filter (LPF) 107. Further, the comparator (COMP) circuit 108 compares the voltage with the average voltage from which the signal component has been removed, and outputs a signal.

  A comparator circuit according to the first embodiment of the present invention applied to the comparator circuit 108 in such an FSK receiving circuit will be described.

Embodiment 1
FIG. 2 shows the configuration of the comparator circuit according to the first embodiment.

  In the FM detection in the FSK receiving circuit described above, the DC voltage of the detection output changes in proportion to the input frequency. Therefore, the DC voltage fluctuates when the signal changes from the no-signal state to the state where the signal exists, and the comparator circuit 108 needs to follow this change at high speed.

  The comparator circuit 108 includes a comparator COM, and resistors R1 and R2 are connected to the first input terminal and the second input terminal, respectively, and the input signal voltage Vin is input via the input terminal IN. Is done.

  A capacitor C is connected between the second input terminal and the ground terminal. An average voltage Vref as a comparison target is generated at the second input terminal by the low-pass filter including the resistor R2 and the capacitor C. In order to rapidly charge and discharge the capacitor C, a charge / discharge circuit CDC1 is provided.

  The charge / discharge circuit CDC1 is provided with an operational amplifier OP1, a voltage V1, and a diode D1 for discharging between the input terminal IN and the second input terminal of the comparator COM, and the operational amplifier OP2, voltage V2, and diode D2 for charging. Is provided.

  In the operational amplifier OP1, the input signal voltage Vin + V1 is input to the non-inverting input terminal, the average voltage Vref is input to the inverting input terminal, and when Vin + V1 <Vref, current flows from the capacitor C to the diode D1 and from the output terminal of the operational amplifier OP1 to the ground terminal. The capacitor C is discharged.

  On the other hand, in the operational amplifier OP2, the voltage Vin−V2 is input to the non-inverting input terminal, the average voltage Vref is input to the inverting input terminal, and when Vin−V2> Vref, the output terminal of the operational amplifier OP2, the diode D2, the capacitor A current flows to C, and capacitor C is charged.

  Thus, the discharge start voltage is set by the voltage V1 connected to the non-inverting input terminal of the operational amplifier OP1, and the charge start voltage is set by the voltage V2 connected to the non-inverting input terminal of the operational amplifier OP2. When the input signal voltage Vin falls from the average voltage Vref to V1, the operational amplifier OP1 operates to discharge the capacitor C. When the input signal voltage Vin becomes higher than V2 from the average voltage Vref, the operational amplifier OP2 operates to charge the capacitor C.

  Therefore, according to the first embodiment, the charge / discharge start voltage can be set to an arbitrary value.

  Here, the voltages V1 and V2 may be set to the same voltage or different values. Further, when no temperature fluctuation occurs in the voltages V1 and V2, no temperature fluctuation occurs in the circuit. However, when the detection output level has a temperature variation, temperature correction can be performed by changing the voltages V1 and V2 in accordance with the temperature variation of the detection output level.

  FIG. 3 shows the relationship between the voltage Vin−Vref and the current I that charges and discharges the capacitor C in the circuit according to the first embodiment. When the voltage Vin-Vref becomes larger than the voltage V2 (Vin-Vref> V2, that is, Vin-V2> Vref), the capacitor C is charged. When the voltage Vin-Vref becomes smaller than the voltage -V1, (Vin-Vref <-V1, that is, Vin + V1 <Vref) The capacitor C is discharged.

  If the input DC offset voltages VOFF1 and VOFF2 exist in the operational amplifiers OP1 and OP2, respectively, if this is taken into consideration, the voltage Vin−Vref becomes larger than the voltage V2−VOFF2 (Vin−Vref> V2−VOFF2, that is, Vin. − (V2−VOFF2)> Vref) When the capacitor C is charged and the voltage Vin−Vref becomes smaller than the voltage −V1−VOFF1 (Vin−Vref <−V1−VOFF1, ie, Vin + (V1 + VOFF1) <Vref), the capacitor C is discharged. Is done. The charge / discharge start voltage when such an input voltage DC offset voltage is considered is the same in the following second to fourth embodiments. There are two types of offset voltage, one that is parasitic on the circuit and one that is intentionally set in the circuit design.

  As described above, according to the first embodiment, it is possible to set the charge / discharge start voltage to an arbitrary value by arbitrarily setting the values of the voltages V1 and V2, and to the voltages V1 and V2. When there is no temperature variation, the circuit characteristics can be improved without receiving temperature variation in circuit operation.

Comparative Example FIG. 4 shows a configuration of a comparator circuit according to a comparative example. In this circuit, as a charge / discharge circuit CDC101 for charging / discharging the capacitor C, a diode D101 and a diode D102 are provided in parallel at both ends of the resistor R2.

  When the voltage difference between the input signal voltage Vin and the average voltage Vref exceeds the forward voltage VF of the diode (Vin−Vref> VF), the capacitor C is charged, and the voltage difference between the input signal voltage Vin and the average voltage Vref is When the forward voltage VF becomes lower than the negative value (Vin−Vref <−VF), the capacitor C is discharged.

  FIG. 5 shows the relationship between the voltage (Vin−Vref) and the charge / discharge current I in this case. The charge / discharge start voltage for starting charging / discharging of the capacitor C is determined by the forward voltage ± VF of the diodes D101 and D102. When the temperature is 25 degrees Celsius, it is about ± 0.6V.

  This value is considerably high in a situation where a low power supply voltage is required, and cannot be set to an arbitrary value. Further, as shown in FIG. 5, since the forward voltage of the diode varies with temperature, the charge / discharge start voltage also varies, leading to deterioration of circuit characteristics.

  Here, when the input signal voltage is Vin (p−p), in order to increase the charge / discharge speed, it is necessary to set the relationship 2 × VF ≧ Vin (p−p)> VF. . In particular, when 2 × VF = Vin (p−p), the charge / discharge rate is the fastest and the rise of the average voltage Vref can be accelerated.

  However, as described above, since the forward voltage VF has a large temperature fluctuation, it is difficult to set so that the above relational expression is established.

  When 2 × VF> Vin (p−p)> VF, the rise of the average voltage Vref is delayed, and it takes time for the average voltage Vref to reach the level of the input signal voltage Vin. For this reason, it becomes slow for the duty ratio to reach 50%, but the operation of the comparator COM starts quickly.

  When 2 × VF <Vin (p−p), the fluctuation of the average voltage Vref becomes large, and the duty ratio of the modulation wave is shifted from 50%, and an error is likely to occur in the output data from the comparator COM. Further, since noise is applied to the average voltage Vref, the S / N ratio is deteriorated and the sensitivity is deteriorated.

  When Vin (p−p) <VF, the operation start of the comparator COM is delayed.

  The temperature characteristic of the forward voltage VF of the diode is −2 mV / ° C., and it is assumed that VF = 0.6 V at 25 degrees Celsius. When considering ± 65 ° C. from this temperature, VF = 0.73V at −40 degrees Celsius and VF = 0.47V at +90 degrees Celsius, resulting in a variation of 0.26V. For this reason, it is difficult to set so that the relationship 2 × VF = Vin (pp) is established.

  As described above, according to the comparative example, the temperature characteristic of the forward voltage VF of the diode is greatly influenced by the characteristics of the charge / discharge circuit, and since the voltage VF is large, a large amplitude is required for the input signal voltage Vin. It cannot be used under voltage.

Embodiment 2
A comparator circuit according to the second embodiment of the present invention will be described with reference to FIG.

  The second embodiment is different from the first embodiment in that a variable gain operational amplifier OP3 is connected in series between the input terminal IN and the connection point of the resistors R1 and R2.

  The level of the input signal voltage Vin1 input from the input terminal IN is varied by the gain variable operational amplifier OP3, and is output to the subsequent stage as the input signal voltage Vin2.

  According to the second embodiment, even when the input signal voltage Vin1 given from the low-pass filter 107 shown in FIG. 1 varies and fluctuates, the level can be varied by the variable gain operational amplifier OP3. It is possible to make the rise of the average voltage Vref faster by adjusting so that 2 × V1 (or V2) = Vin2 (p−p).

  Other elements that are the same as those in the first embodiment are denoted by the same reference numerals and description thereof is omitted.

  Next, the comparator circuit in which the charge / discharge circuit is not provided and the comparator circuit according to the second embodiment will be described in comparison with a graph showing the characteristics thereof.

  Here, on the premise that the power supply voltage operates sufficiently even at a low voltage of 3V, the average voltage Vref in the input signal voltage Vin is set to 1.0V, and the charge / discharge start voltage is set to 0.2V.

  FIG. 7A shows the waveforms of the input signal voltage Vin (= 0.4 Vp-p) and the generated average voltage Vref in the comparator circuit not provided with the charge / discharge circuit, and FIG. 7 shows the output voltage waveform from the comparator circuit. Each is shown in (b).

  In the configuration in which the charge / discharge circuit is not provided, the rise of the average voltage Vref is slow, and accordingly, it takes time until the output is obtained from the comparator circuit.

  The waveform of the input signal voltage Vin (= 0.4 Vp-p) and the generated average voltage Vref in the comparator circuit according to the second embodiment is shown in FIG. 8A, and the output voltage waveform from the comparator circuit is shown in FIG. ) Respectively.

  In this case, the average voltage Vref rises quickly and reaches a duty ratio of 50% in a short time.

  In the comparator circuit according to the second embodiment, the waveform of the average voltage Vref when the input signal voltage Vin is 0.2 Vp-p is shown in FIG. 9A, and the output voltage waveform from the comparator circuit is shown in FIG. Respectively.

  In this case, the rise of the average voltage Vref is fast, but more time is required until the duty ratio reaches 50% than when the input signal voltage Vin is 0.4 Vp-p.

  Furthermore, in the comparator circuit according to the second embodiment, the waveform of the average voltage Vref when the input signal voltage Vin is 0.6 Vp-p is shown in FIG. 10A, and the output voltage waveform from the comparator circuit is shown in FIG. ) Respectively.

  In this case, Vin−Vref (= 0.6 Vp−p)> 2 × V (= 0.2 V). The average voltage Vref rises quickly and the output waveform rises in a short time. However, since the average voltage Vref is not composed of only the DC component but includes the AC component, the level fluctuates, so the sensitivity varies with the output characteristics from the comparator circuit. Will be reduced.

  Thus, the relationship between the input signal voltage Vin and the charge / discharge start voltages V1 and V2 is important, and it is desirable that the relationship of 2 × V1 (or V2) = Vin (p−p) is established as much as possible.

  According to the second embodiment, the charge / discharge start voltages V1 and V2 can be arbitrarily set, so that charge / discharge is performed at high speed even when the amplitude of the input signal voltage Vin is reduced due to the low power supply. It is possible.

Embodiment 3
FIG. 11 shows the configuration of a comparator circuit according to the third embodiment of the present invention. In the second embodiment, the level of the input signal voltage Vin is made variable so that 2 × V1 (or V2) = Vin2 (p−p) is established.

  On the other hand, in the third embodiment, the charge / discharge start voltage is made variable at the stage of input to the operational amplifiers OP1 and OP2 in the charge / discharge circuit CDC3, thereby 2 × V1a (or V1b) = Vin2 (p−p). The voltages V1a and V1b are adjusted as variable voltages so that

  Other elements that are the same as those in the first embodiment are denoted by the same reference numerals and description thereof is omitted.

Embodiment 4
FIG. 12 shows a configuration of a comparator circuit according to the fourth embodiment of the present invention.

  In the first to third embodiments, the operational amplifiers OP1 and OP2 are used, and it is necessary to connect the diodes D1 and D2 to the output terminals to set the direction of charging or discharging.

  For this reason, the output voltage drops by the forward voltage VF due to the presence of the diodes D1 and D2, and the dynamic range of the charge / discharge operation is narrowed. For example, if the power supply voltage VCC is 3V and the forward voltage VF is 0.6V, the operation will be in the range of 0.6V to 2.4V.

  On the other hand, in the fourth embodiment, current output amplifiers OP11 and OP12 are used. Since no diode is connected to the output terminals of the current output amplifiers OP11 and OP12, the dynamic range is not narrowed, and in the above example, it can operate in the range of 0V to 3V.

  In FIG. 12, the current source is shown at the output terminals of the current output amplifiers OP11 and OP12. However, the concept is that the current output amplifiers OP11 and OP12 are of the current output type instead of being connected to the current source. Shall be shown.

  Here, in the first to third embodiments, the diodes D1 and D2 are used, and the dynamic range becomes narrow. However, unlike the comparative example, there is no effect on the charge / discharge start voltages V1, V2, and the temperature characteristics of the diode do not affect the charge / discharge start voltages V1, V2.

  In addition, in this Embodiment 4, about the other element same as the said Embodiment 1, the same number is attached | subjected and description is abbreviate | omitted.

  FIG. 13 shows a detailed circuit configuration of the charge / discharge circuit CDC4 in the fourth embodiment.

  A current source I1 and a resistor R21 are connected between the power supply terminal and the input terminal IN, and a voltage V1 is generated at the connection point. A current source I2 and a resistor R22 are connected between the input terminal IN and the ground terminal, and a voltage V2 is generated at the connection point.

  The current output amplifier OP11 is constituted by PNP type bipolar transistors T1 to T2 and NPN type bipolar transistors T3 to T6, and the voltage V1 is inputted. The current output amplifier OP12 is made of PNP type bipolar transistors T11 to T12 and T17 to T18, NPN. The bipolar transistors T13 to T16 are configured to receive the voltage V2, and the output terminals are respectively connected to the second input terminals of the comparator COM.

  The voltage V1 is between the current I1 flowing through the current source CS21 and the resistance value R21 of the resistor R21, and the voltage V2 is between the current I2 flowing through the current source CS22 and the resistance value R22 of the resistor R22, V1 = I1 × R21. , V2 = I2 × R22. Therefore, the charge / discharge start voltages of the current output amplifiers OP11 and OP12 can be set to desired values by using the current sources CS21 and CS22 as variable current sources and changing the currents I1 and I2.

  FIG. 14 shows voltage-current characteristics between the input signal voltage Vin−average voltage Vref and the charge / discharge current I in the comparator according to the fourth embodiment.

  Capacitor C is charged when voltage Vi-Vref exceeds V2, and discharged when it falls below -V1. Here, the current required for charging / discharging is ± I1 in FIG. 14, and it is desirable to set so as to operate within a linear range between the voltage Vi−Vref and the current I. Thereby, unlike a non-linear range, a fast response speed can be obtained.

  The above-described embodiments are merely examples and do not limit the present invention, and various modifications can be made within the technical scope of the present invention.

  Further, the comparator circuit according to the first to fourth embodiments can be applied to the comparator circuit 108 shown in FIG. 1 and used as an FSK receiving circuit.

For example, the FSK receiver circuit of the present invention is
An antenna for receiving signals;
A low noise amplifier for amplifying the signal received by the antenna;
A mixer for reducing the frequency of the signal output from the low noise amplifier;
An intermediate frequency filter that removes and outputs components other than the intermediate frequency from the signal output from the mixer;
An intermediate frequency amplifier that amplifies the signal output from the intermediate frequency filter;
A detector for detecting a signal output from the intermediate frequency amplifier;
A low pass filter that passes low frequency components from the signal detected by the detector;
A comparator circuit that outputs a result of comparing the voltage of the signal output from the low-pass filter and the average voltage of the signal;
The comparator circuit is
A comparator that compares the input signal voltage with a reference voltage obtained by smoothing the input signal using a resistor and a capacitor and outputs the result;
A discharge circuit for comparing the reference voltage with a first addition signal obtained by adding a first voltage to the input signal voltage, and discharging the capacitor when the first addition signal falls below the reference voltage;
A charging circuit that compares the reference voltage with a second addition signal obtained by adding a second voltage to the input signal voltage, and charges the capacitor when the second addition signal rises above the reference voltage; It is characterized by having.

1 is a block diagram showing a configuration of an FSK receiving circuit to which a comparator circuit according to Embodiment 1 of the present invention can be applied. FIG. 3 is a block diagram showing a configuration of a comparator circuit according to the first embodiment. The graph which showed the charging / discharging start voltage in the comparator circuit. The circuit diagram which showed the structure of the comparator circuit by a comparative example. The graph which shows the temperature dependence which the diode in the same comparator circuit brings. The block diagram which showed the structure of the comparator circuit by Embodiment 2 of this invention. The graph which shows the input signal voltage Vin = 0.4Vp-p, the average voltage, and the output voltage of a comparator in the comparator circuit which does not have a charging / discharging circuit. The graph which shows the input signal voltage Vin = 0.4Vp-p in the comparator by the said Embodiment 2, an average voltage, and the output voltage of a comparator. The graph which shows the input signal voltage Vin = 0.2Vp-p in the comparator by the said Embodiment 2, an average voltage, and the output voltage of a comparator. The graph which shows the input signal voltage Vin = 0.6Vp-p in the comparator by the said Embodiment 2, an average voltage, and the output voltage of a comparator. The block diagram which showed the structure of the comparator by Embodiment 3 of this invention. The block diagram which showed the structure of the comparator by Embodiment 4 of this invention. The circuit diagram which showed the structure of the current output amplifier in the comparator. The graph which showed the charging / discharging start voltage in the comparator.

Explanation of symbols

COM Comparator R1, R2 Resistor C Capacitors CDC1-CDC4 Charge / Discharge Circuit OP1, OP2 Operational Amplifier D1, D2 Diode

Claims (5)

A comparator that compares the input signal voltage with a reference voltage obtained by smoothing the input signal using a resistor and a capacitor and outputs the result;
A discharge circuit that compares a first addition signal obtained by adding a positive first voltage to the input signal voltage and the reference voltage, and discharges the capacitor when the first addition signal falls below the reference voltage. When,
A charging circuit that compares a second addition signal obtained by adding a negative second voltage to the input signal voltage and the reference voltage, and charges the capacitor when the second addition signal rises above the reference voltage. When,
A comparator circuit comprising:   2. The comparator circuit according to claim 1, further comprising variable voltage means for changing an input signal voltage inputted from the outside to a desired value and outputting it as the input signal voltage.   2. The first variable voltage means for changing the first voltage to a desired value, and the second variable voltage means for changing the second voltage to a desired value. The comparator circuit described. The discharge circuit is:
A first operational amplifier in which the first addition signal obtained by adding the first voltage to the input signal voltage is input to one input terminal, and the reference voltage is input to the other input terminal;
A cathode connected to an output terminal of the first operational amplifier, and a first diode to which the reference voltage is input to an anode;
The charging circuit is
A second operational amplifier in which the second addition signal obtained by adding the second voltage to the input signal voltage is input to one input terminal, and the reference voltage is input to the other input terminal;
4. The comparator circuit according to claim 1, further comprising: a second diode having an anode connected to an output terminal of the second operational amplifier and the reference voltage being input to a cathode. 5. The discharge circuit is:
A first current output amplifier in which the first addition signal obtained by adding the first voltage to the input signal voltage is input to one input terminal, and the reference voltage is input to the other input terminal;
A first current source that receives the reference voltage and outputs a current toward an output terminal of the first current output amplifier;
The charging circuit is
A second current output amplifier in which the second addition signal obtained by adding the second voltage to the input signal voltage is input to one input terminal, and the reference voltage is input to the other input terminal;
4. The comparator circuit according to claim 1, further comprising: a second current source that outputs a current from an output terminal of the second current output amplifier toward the capacitor. 5.

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