JP4895161B2 - Peak detection circuit and radiation measurement device - Google Patents

Description

  The present invention relates to a peak detection circuit and a radiation measurement apparatus that detect a peak value of a pulse signal or the like included in a signal under measurement. Specifically, even if the peak interval is narrow, the peak value of the signal under measurement can be measured efficiently. The present invention relates to a peak detection circuit and a radiation measurement apparatus that can be used.

  The peak detection circuit is used in an input unit of a measuring device that performs waveform analysis of a pulse signal or the like. For example, it is used in the input section of a multi-channel analyzer (hereinafter abbreviated as MCA) used in the field of radiation research.

  FIG. 3 is a diagram showing the configuration of a conventional radiation measurement apparatus that measures the energy of radiation from a sample to be measured and identifies the type of radiation source and the like (see, for example, Patent Documents 1 and 2). In FIG. 3, the radiation output from the sample 10 is input to the detector 11. The detector 11 detects the charge amount corresponding to the energy of the radiation, that is, specific to each radiation source, and outputs the detected charge amount. Further, a preamplifier (for example, a charge amplifier) 12 converts the amount of charge from the detector 11 into a voltage value proportional to the amount of charge. Further, the waveform shaping amplifier 13 converts the signal from the preamplifier 12 into a narrow pulse signal (generally, a Gaussian shape with a signal width FWHM (full width half maximum) = ˜1 [μs]). . Therefore, the peak value (peak value) of the pulse signal from the waveform shaping amplifier 13 and the charge amount from the detector 11 are proportional.

  Then, the MCA 14 measures the pulse signal input from the waveform shaping amplifier 13 to identify the type of radiation source (nuclide) of the sample. That is, information such as the energy of the radiation of the sample is included in the peak value (voltage value) of the pulse signal.

  FIG. 4 is a diagram illustrating a conventional configuration of a peak detection circuit used in an input unit of a measuring apparatus such as the MCA 14 (see, for example, Patent Document 3). In FIG. 4, the peak value of the input signal Vi input to the input terminal 21 is held by the peak hold circuit 22. Then, the peak hold signal Vo from the peak hold circuit 22 is applied to the AD converter 23 and converted into digital data. Further, the output data of the AD converter 23 is written in the memory 24. Then, an analysis circuit (not shown) subsequent to the peak detection circuit reads the output data from the memory 24 and performs the above-described analysis (identification of the type of radiation source and the like).

  Next, details of the peak hold circuit will be described. The non-inverting input terminal of the operational amplifier IC1 is connected to the input terminal 21 to which the input signal Vi is applied, and the output terminal thereof is connected to the anode of the diode D1. The inverting input terminal of the operational amplifier IC1 is connected to the cathode of the diode D1 and to the ground via the capacitor C. A non-inverting input terminal of the operational amplifier IC2 is connected to a connection point between the inverting input terminal of the operational amplifier IC1, the cathode of the diode D1, and the capacitor C. The inverting input terminal of the operational amplifier IC2 is connected to the output terminal, and the peak hold signal Vo is output from the output terminal. The switch SW is provided in parallel with the capacitor C and discharges the capacitor C.

The operation of such an apparatus will be described.
Here, FIG. 5 is a diagram illustrating the relationship between the input signal Vi and the peak hold signal Vo, where the horizontal axis is time and the vertical axis is amplitude. An example in which two pulse signals are input will be described. FIG. 5A shows a case where the interval between the pulse signals is sufficiently separated, FIG. 5B shows a case where the interval between the pulse signals is narrow, and FIG. 5C shows that the pulse signal is further further than in FIG. This is the case when they are close to each other.

  The capacitor C is charged by the input signal Vi. Even if the voltage of the input signal Vi drops below the charging voltage, the diode D1 prevents discharge, and as a result is proportional to the maximum value of the input signal Vi. The charging voltage is held in the capacitor C. A threshold detection circuit (not shown) monitors the voltage of the input signal Vi, and outputs a timing signal to the AD converter 23 after a predetermined time Δt when the threshold is exceeded.

  Further, the AD converter 23 stores, in the memory 24, output data obtained by AD converting the peak hold signal Vo based on the timing of the timing signal. The threshold detection circuit turns on the connection of the discharge switch SW to discharge the capacitor after the predetermined time Δt has elapsed and the AD conversion of the AD converter 23 has been completed. The switch SW is turned off.

Japanese Patent No. 2577386 Japanese Patent No. 2645196 JP-A-5-264610

  Thus, since the AD converter 23 performs AD conversion on the voltage held by the peak hold circuit 22, high-speed AD conversion is not required.

  However, in addition to the pulse width (in other words, the signal width) of the input signal Vi, a time required for peak hold (charging time) and a discharging time for preparing for the input of the next peak signal after AD conversion are required.

  For example, as shown in FIG. 5A, when the pulse signals are sufficiently separated, the next pulse signal is input after the discharge of the first pulse signal is completed. The peak value of can also be accurately measured.

  However, as shown in FIG. 5B, if the pulse signals are close, the second pulse signal exceeds the threshold value before the discharge of the first pulse signal is completed. Since the detection circuit turns off the switch SW regardless of the end of the discharge, charging of the next pulse signal is started. Therefore, an error occurs in the peak value of the second pulse signal.

  Further, as shown in FIG. 5C, if the second pulse signal exceeds the threshold value before the AD conversion of the first pulse signal is completed, both the first and second pulses are An error occurs in the peak value of the pulse signal.

  In order to cope with such a problem, conventionally, when the interval between pulse signals is narrow, a circuit that prevents the next pulse signal from being input to the input terminal Vi until the discharge of the previous pulse signal is completed. It was configured to prohibit input. That is, there is a problem that it is difficult to efficiently measure a pulse signal.

  For example, when measuring radiation as described above, there is no problem if the signal interval of radiation emitted from the sample is sufficient (signal frequency is low), but all radiation emitted when the signal frequency is high is measured. There is a problem that the measurement efficiency is lowered.

  Accordingly, an object of the present invention is to realize a peak detection circuit and a radiation measurement apparatus that can efficiently measure the peak value of a signal under measurement even when the peak interval is narrow.

The invention described in claim 1
In the peak detection circuit that detects the peak value of the signal under measurement,
A threshold value detection circuit for detecting that the amplitude of the signal under measurement exceeds a threshold value;
An AD converter that samples the signal under measurement and outputs digital data;
Sampling by the AD converter during a predetermined time based on the signal width of the signal under measurement and the sampling frequency of the AD converter after the threshold detection circuit detects that the threshold has been exceeded. And a maximum value detecting circuit for detecting a maximum value from the N digital data P1 to PN and outputting error data as an error when the digital data PN reaches the maximum value. Is.
The invention according to claim 2 is the invention according to claim 1,
The maximum value detection circuit is
A digital comparison circuit for comparing the digital data from the AD converter with the other digital data;
A data holding circuit that receives digital data from the AD converter and outputs output data to the digital comparison circuit as the other digital data;
And a control signal output circuit that updates output data of the data holding circuit to digital data from the AD converter based on a comparison result of the digital comparison circuit.
The invention described in claim 3
In a radiation measurement device that measures radiation output from a sample,
A detector for detecting radiation from the sample;
A signal conversion means for converting the signal from the detector into a pulse-shaped signal under measurement having a peak value corresponding to the magnitude of the detected physical quantity;
The peak detection circuit according to claim 1 or 2 is provided for detecting a peak value of the signal under measurement from the signal conversion means.

The present invention has the following effects.
According to the first and second aspects, the threshold value detection circuit detects that the amplitude of the signal under measurement has exceeded the threshold value, and the maximum value detection circuit is predetermined after the threshold value detection circuit detects. Since the maximum value is detected from the digital data sampled by the AD converter within this time, the peak value of the signal under measurement can be efficiently detected and measured even when the peak interval is narrow.
According to the third aspect, since the peak detection circuit according to the first or second aspect is used in the radiation measuring apparatus, even if the signal frequency of the radiation output from the sample is high and the event interval is narrow, almost all of the output radiation is All can be measured. Thereby, it can measure efficiently.

Embodiments of the present invention will be described below with reference to the drawings.
[First embodiment]
FIG. 1 is a block diagram showing a first embodiment of the present invention. Here, the same components as those in FIG. In FIG. 1, instead of the peak hold circuit 22 and the AD converter 23, a buffer 30, a threshold detection circuit 31, an AD converter 32, a digital comparison circuit 33, latch circuits 34 and 35, a control signal output circuit 36, and a clock A portion 37 is provided. The illustration of the memory 24 is omitted.

  The buffer 30 receives the input signal Vi from the input terminal 21, performs noise removal, waveform shaping, and the like on the input signal Vi and outputs the result to the threshold detection circuit 31 and the AD converter 32. The input signal Vi is a signal under measurement including a pulse signal having a peak value.

  The threshold detection circuit 31 monitors the amplitude of the input signal Vi, and outputs a detection signal to the control signal output circuit 36 when a predetermined level (threshold) is exceeded.

  The AD converter 32 samples the input signal Vi (for example, sampling rate 100 [MS / s], resolution 14 [bit], etc.), converts it into digital data, and outputs it to one input terminal of the digital comparison circuit 33. To do.

  The digital comparison circuit 33 has two inputs, and controls a high level signal when the digital data value at one input terminal is larger than the digital data value at the other input terminal, and controls a low level signal when the value is small. The signal is output to the signal output circuit 36.

  The latch circuit 34 receives the digital data from the AD converter to the data input terminal, updates the output data in accordance with the control signal of the control signal output circuit 36, and the other input terminal of the latch circuit 35 and the digital comparison circuit 33 in the subsequent stage. Output to.

  The latch circuit 35 receives the output data from the latch circuit 34 in the previous stage to the data input terminal, updates the output data in accordance with the control signal of the control signal output circuit 36, and writes it in the memory 24 as peak value data. Here, the latch circuits 34 and 35 are data holding circuits.

  Based on the level from the digital comparison circuit 33, the control signal output circuit 36 outputs a control signal for causing the latch circuits 34 and 35 to update output data, that is, a clock for the latch circuits 34 and 35. When the control signal output circuit 36 determines that the peak value data is not normal, the control signal output circuit 36 writes data indicating an error in the memory 24. Here, the digital comparison circuit 33, the latch circuits 34 and 35, and the control signal output circuit 36 constitute a maximum value detection circuit.

  The clock unit 37 supplies a clock to the AD converter 32, the digital comparison circuit 33, and the control signal output circuit 36.

  The operation of such an apparatus will be described. Here, FIG. 2 is a diagram showing timing for sampling a pulse signal of the input signal Vi (for example, a Gaussian pulse shape and a signal width of FWHM≈1 [μs]). The horizontal axis is time, and the vertical axis is the amplitude of the input signal Vi.

  Prior to the measurement, the pulse width of the pulse signal and the sampling frequency of the AD converter 32 (that is, the clock frequency of the clock unit 37) are input to the control signal output circuit 36 from an input means (not shown). The Then, the control signal output circuit 36 obtains the number of samples (N) used for detecting the peak value of the pulse signal from the signal width and sampling frequency of the pulse signal. Further, the threshold value of the threshold value detection circuit 31 is obtained from the signal width, and the threshold value is set in the threshold value detection circuit 31. The time for performing N samplings is hereinafter referred to as a window. Also, the number of samples N = window × sampling speed of the AD converter.

Next, the operation during measurement will be described.
Before the pulse signal is input to the input terminal 21, the control signal output circuit 36 resets the latch circuits 34 and 35 and sets the value of the output data to “0”. The control signal output circuit 36 outputs a low level signal to the clock input terminals of the latch circuits 34 and 35.

  When the pulse signal is input, the threshold detection circuit 31 outputs the detection signal to the control signal output circuit 36 when the amplitude of the input signal Vi input through the buffer 30 exceeds a predetermined level. Using this detection signal as a sampling start point, the control signal output circuit 36 starts counting the sampling number of the AD converter 32 based on the clock of the clock unit 37.

  On the other hand, the AD converter 32 samples the input signal Vi input through the buffer 30 in synchronization with the clock signal of the clock unit 37 and outputs it as digital data to the data input terminals of the digital comparison circuit 33 and the latch circuit 34. Output. Here, digital data included in the window, that is, digital data sampled by the AD converter during a predetermined time after the threshold detection circuit 31 outputs the detection signal is defined as Pn, and n = 1 to 1. N.

  Then, the digital comparison circuit 33 synchronizes with the clock signal of the clock unit 37, and the digital data Pn to one input terminal and the digital data Pmax to the other input terminal (the maximum value among P1 to Pn-1). If Pn> Pmax, a high level signal is output to the control signal output circuit 36, and if Pn ≦ Pmax, a low level signal is output to the control signal output circuit 36.

  Further, when the control signal output circuit 36 receives a high level signal from the digital comparison circuit 33, the control signal output circuit 36 updates the output data to the latch circuit 34, specifically, the signal level of the clock input terminal of the latch circuit 34. Is updated to a high level to update the data, and the signal level is returned to the low level before the next sampling is started. Then, the latch circuit 34 outputs the output data to the data input terminal of the latch circuit 35 and the other input terminal of the digital comparison circuit 33. As a result, the digital data Pmax having the maximum value among the digital data P1 to Pn is output from the latch circuit 34.

  As described above, when an input signal Vi of a predetermined level or higher is input, the digital data from P1 to PN-1 are compared one by one, and the maximum digital data Pmax from P1 to PN-1 is The data is output to the data input terminal of the latch circuit 35. When PN reaches the maximum value, that is, when the comparison result of the digital comparison circuit 33 with respect to the digital data PN is at a high level, the control signal output circuit 36 determines that there is no peak value in the window and the error data Is written into the memory 24. When PN is not the maximum value, the control signal output circuit 36 updates the data by setting the signal level of the clock input terminal of the latch circuit 35 to the high level, and updates the output data of the latch circuit 35 to the digital data Pmax. The peak value data is written in the memory 24 (white circle digital data in FIG. 2).

  When the comparison of all digital data is completed, the control signal output circuit 36 resets the output data of the latch circuits 34 and 35 to “0” and outputs a low level signal to the clock input terminals of the latch circuits 34 and 35. . And it waits until the next pulse signal is input.

  Thus, the threshold value detection circuit 31 detects that the amplitude of the signal under measurement exceeds the threshold value, and the maximum value detection circuit uses the detection signal from the threshold value detection circuit 31 as a reference, Since the maximum value is detected from the digital data P1 to PN sampled by the AD converter 32 within a predetermined time, as shown in FIG. 4, until the discharge of the previous pulse signal is completed, the next pulse is detected. There is no need to prohibit input so that the signal is not input to the input terminal Vi, and even if the peak interval is narrow, the peak value of the signal under measurement can be detected and measured efficiently.

The present invention is not limited to this, and may be as shown below.
The peak detection circuit shown in FIG. 1 may be applied to a radiation measurement apparatus that measures radiation emitted from the sample 10 by using the MCA data input unit shown in FIG. That is, the detector 11 detects the radiation from the sample 10, and the signal conversion means (preamplifier 12, waveform shaping amplifier 13) corresponds the signal from the detector 11 to the magnitude of the detected charge amount. The signal to be measured is converted into a Gaussian pulse-shaped signal to be measured, and the peak detection circuit detects the peak value of the signal to be measured from the signal conversion means. Note that the signal width (FWHM) of the pulse signal is input from the signal changing means to the peak detection circuit in advance.

  As described above, since the peak detection circuit shown in FIG. 1 is used in the radiation measuring apparatus, even if the signal frequency of the radiation output from the sample 10 is high and the event interval is narrow, almost all of the emitted radiation is measured. Can do. Thereby, it can measure efficiently.

  Moreover, although the example used for the data input part of MCA was shown, you may use for the apparatus which measures the peak value of a to-be-measured signal, for example, the measuring apparatus of a waveform measuring apparatus. In addition to the radiation spectrum measurement, it may be used in a measuring device that measures a peak height value in precision time interval measurement, various energy measurements, and the like. For example, in the precise time interval measurement, the time interval information may be converted into charges by the detector 11, converted into a voltage having an amplitude proportional to the charge amount by the signal conversion means, and the peak value may be detected by the peak detection circuit.

  In the apparatus shown in FIG. 1, the configuration using the latch circuits 34 and 35 is shown as an example of the data holding circuit. However, any device can be used as long as it can hold the maximum value of digital data. (Delay flip-flop) etc.

  In the apparatus shown in FIG. 1, the configuration in which the last digital data PN in the window is determined to be the maximum value is shown. However, the last digital data PN may be output as the maximum value. In this case, the latch circuit 35 may not be provided.

It is the block diagram which showed the 1st Example of this invention. It is a timing diagram of the apparatus shown in FIG. It is the figure which showed the structure of the conventional radiation measuring device. It is the figure which showed the structure of the conventional peak detection circuit. FIG. 5 is a timing diagram of the apparatus shown in FIG. 4.

Explanation of symbols

31 Threshold detection circuit 32 AD converter 33 Digital comparison circuit 34, 35 Latch circuit 36 Control signal output circuit

Claims (3)

In the peak detection circuit that detects the peak value of the signal under measurement,
A threshold value detection circuit for detecting that the amplitude of the signal under measurement exceeds a threshold value;
An AD converter that samples the signal under measurement and outputs digital data;
Sampling by the AD converter during a predetermined time based on the signal width of the signal under measurement and the sampling frequency of the AD converter after the threshold detection circuit detects that the threshold has been exceeded. And a maximum value detecting circuit for detecting a maximum value from the N digital data P1 to PN and outputting error data as an error when the digital data PN reaches the maximum value. Peak detection circuit. The maximum value detection circuit is
A digital comparison circuit for comparing the digital data from the AD converter with the other digital data;
A data holding circuit that receives digital data from the AD converter and outputs output data to the digital comparison circuit as the other digital data;
2. The peak detection according to claim 1, further comprising: a control signal output circuit that updates output data of the data holding circuit to digital data from the AD converter based on a comparison result of the digital comparison circuit. circuit. In a radiation measurement device that measures radiation output from a sample,
A detector for detecting radiation from the sample;
A signal conversion means for converting the signal from the detector into a pulse-shaped signal under measurement having a peak value corresponding to the magnitude of the detected physical quantity;
3. A radiation measuring apparatus comprising: a peak detecting circuit according to claim 1 for detecting a peak value of a signal under measurement from the signal converting means.

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