JP4893962B2 - Semiconductor test equipment - Google Patents

Description

  The present invention relates to a semiconductor test apparatus, and more particularly to a relay diagnosis in a semiconductor test apparatus configured to supply power to a semiconductor to be measured (hereinafter referred to as a DUT) from a power supply module via a plurality of switches and relays. It is.

  Some semiconductor test apparatuses are configured to supply power to a DUT from a power supply module via a plurality of switches and relays. FIG. 5 is a block diagram showing an example of such a conventional semiconductor test apparatus. From a common power supply module DPS (Device Power Supply) having two output systems, a plurality of switches S * and relays RL ** (* Represents a subscript) and the two DUT1 and DUT2 mounted on the DUT interface DIF are supplied individually or simultaneously via the connection unit CU.

In FIG. 5, the power supply module DPS has the following functions.
1) Voltage application function for applying voltage to DUT 2) Current measurement function for measuring current consumed by DUT 3) Voltage measurement function for measuring potential of power terminal of DUT

  The voltage application system is configured to invert and amplify the output voltage of the D / A converter DAC with a gain determined by the ratio of the resistors R2 and R3 by the operational amplifier U1, and apply it to the power supply terminals of the DUT1 and DUT2.

  Resistors R2 and R3 are connected in series to the output terminal of the D / A converter DAC, and the connection midpoint of these resistors R2 and R3 is connected to the inverting input terminal of the operational amplifier U1. The non-inverting input terminal of the operational amplifier U1 is connected to the common potential point. Relays RL1F, RL2F, and RL-DF are connected to the output terminal of the operational amplifier U1 through a resistor R1.

  One end of the resistor R1 is connected to the non-inverting input terminal of the operational amplifier U3, and the other end is connected to the inverting input terminal of the operational amplifier U3. The resistor R1 converts the output current of the operational amplifier U1 into a voltage, and this converted voltage is input to the input terminal of the A / D converter ADC via a series circuit of the operational amplifier U3 and the switch S1.

  The other end of the resistor R3 is connected to the output terminal of the operational amplifier U2 that is buffer-connected. The output terminal of the operational amplifier U2 is also connected to the input terminal of the A / D converter ADC via the switch S2.

  The output data of the A / D converter ADC is input to the control circuit CTL. The control circuit CTL is connected to the microprocessor MPU and also to the D / A converter DAC.

  The microprocessor MPU is connected to the host computer HC via the tester bus TB.

  Relays RL-DS, RL1S, and RL2S are connected to the non-inverting input terminal of the operational amplifier U2. Relays RL1F and RL2F are output system relays that branch the force line into two branches, and relays RL1S and RL2S are output system relays that branch the sense line into two.

  The relay RL1S is connected to one end of the cable W1S of the connection unit CU via the connector CN1S, the relay RL2S is connected to one end of the cable W2S of the connection unit CU via the connector CN2S, and the relay RL1F is connected to the connection unit via the connector CN1F The relay RL2F is connected to one end of the cable W1F of the connection unit CU via the connector CN2F.

  The other end of the cable W1S of the connection unit CU is connected to the power terminal Vcc of the DUT1 mounted on the DUT interface DIF via the connector CN11, and the other end of the cable W2S of the connection unit CU is connected to the DUT interface DIF via the connector CN21. The other end of the cable W1F of the connection unit CU is connected to the power supply terminal Vcc of the DUT 1 mounted on the DUT interface DIF via the connector CN12, and connected to the power supply terminal Vcc of the connection unit CU. The other end of the cable W2F is connected to the power supply terminal Vcc of the DUT 2 mounted on the DUT interface DIF via the connector CN22.

  The diagnosis block DGB (Diagnosis Block) is used to calibrate the voltage application accuracy and voltage / current measurement accuracy of the power supply module DPS or to perform function diagnosis and accuracy diagnosis.

  In the diagnostic block DGB, one end of the relay RLD1 is connected to a connection point between the relays RL-DF and RLD2, and the other end of the relay RLD1 is connected to a connection point between the relays RL-DS and RLD3. The other end of the relay RLD2 is connected to a common potential point through the reference resistor R10 together with the other end of the relay RLD3. One end of the relay RLD4 is connected to a connection point between the relays RL-DS, RLD1, and RLD3, and the other end of the relay RLD4 is connected to a common potential point via a reference voltage source U10. And the connection point of these relays RL-DS, RLD1, RLD3, and RLD4 is connected to the input terminal of the A / D converter ADC via the switch S3.

  In FIG. 5, the diagnostic block DGB includes a relay RL of a connection system connected to the connection point side of the operational amplifier U2 of the relays RL1F, RL2F / relays RL1S, RL2S of the output system having two force lines / sense lines. Although only one DPS is connected via -DS and RL-DF, generally, a configuration in which a plurality of DPS circuits are connected is used, and calibration and diagnosis are performed while switching the DPS. Further, there are a configuration in which a diagnostic block DGB is included in a printed board assembly in which a plurality of DPSs are mounted, and a configuration in which the diagnostic block DGB is mounted on a card different from the DPS circuit and a plurality of DPS cards are connected.

  In the circuit configuration of FIG. 5, for example, when power is selectively supplied to DUT1, a path for supplying power only to DUT1 is formed by closing relays RL1S and RL1F of the output system and opening relays RL2S and RL2F. The

  On the other hand, when power is selectively supplied to the DUT 2, a path for supplying power only to the DUT 2 is formed by opening the relays RL1S and RL1F of the output system and closing the relays RL2S and RL2F.

  Further, when supplying power to DUT1 and DUT2 simultaneously, by closing relays RL1S and RL1F of the output system and also closing relays RL2S and RL2F, a power supply path to DUT1 and a power supply path to DUT2 are formed simultaneously. The

  FIG. 6 is a block diagram showing the main part of another example of a conventional semiconductor test apparatus, and the same reference numerals are given to the parts common to FIG. The difference from FIG. 5 is the connection position of the diagnostic block DGB with the DPS circuit. In FIG. 6, the output block is connected between the relays RL1F and RL2F / relays RL1S and RL2S and the connection unit CU.

  In FIG. 6, one end of the relay RLD1 is connected to the connection point of the relays RL1DF, RL2DF, and RLD2, and the other end of the relay RLD1 is connected to the connection point of the relays RL1DS, RL2DS, and RLD3. The other end of relay RL1DF is connected to the connection point between relay RL1F and connector CN1F, the other end of relay RL2DF is connected to the connection point between relay RL2F and connector CN2F, and the other end of relay RL1DS is connected to relay RL1S and connector CN1S. The other end of the relay RL2DS is connected to a connection point between the relay RL2S and the connector CN2S.

  Patent Document 1 describes the configuration of an IC tester diagnostic device and an IC tester diagnostic method.

JP 2002-333470 A

  However, according to the circuit configuration of FIG. 5, when the connection unit CU and the DUT interface DIF are disconnected, the relays RL1S and RL1F of the output system and the relays RL2S and RL2F are not connected in series. It becomes impossible to detect the presence or absence of failure.

  On the other hand, according to the circuit configuration of FIG. 6, even if the connection unit CU and the DUT interface DIF are disconnected, the relays RL1S and RL1F of the output system are connected via the relays RL1DF, RL2DF, RL1DS, and RL2DS of the connection system. Since the relays RL2S and RL2F can be connected in series, it is possible to detect the presence or absence of a failure in these series paths. However, when a failure is detected, the cause is due to a failure in one of the relays RL1S, RL1F, RL2S, RL2F in the output system. It cannot be specified whether the failure is caused by any of the relays RL1DF, RL2DF, RL1DS, and RL2DS of the connection system connecting the diagnostic block DGB.

  The present invention solves such problems, and its purpose is to identify whether a relay in the DC power supply output system to the DUT or the diagnostic block connection system has a failure with a relatively simple circuit configuration. It is to realize a semiconductor test apparatus that can be used.

  In order to achieve such a problem, the invention according to claim 1 of the present invention is a series circuit of a force line and a relay in which a power supply module and power terminals of a plurality of DUTs are branched, and a branched sense line and a relay. In a semiconductor test apparatus in which a diagnostic block is connected to the force line and the sense line via a relay, the force line and the sense line connected to the power terminal of each DUT are connected to the force line and the sense line via a relay. It is characterized by being connected via a resistor at each position on the DUT side.

  According to a second aspect of the present invention, in the semiconductor test apparatus according to the first aspect, a relay is connected between ends of the resistors connecting the force line and the sense line.

  According to the present invention, a faulty relay can be identified by switching a plurality of routes by combining ON / OFF of the relay.

  Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing the main part of one embodiment of the present invention, and the same reference numerals are given to the parts common to FIG. The difference between FIG. 1 and FIG. 5 is that resistors 101 and 102 are connected between the relays RL1F and RL2F / relays RL1S and RL2S of the output system and the connection unit CU.

  That is, one end of the resistor 101 is connected between the relay RL1S and the connector CN1S, the other end of the resistor 101 is connected between the relay RL1F and the connector CN1F, and one end of the resistor 102 is connected between the relay RL2S and the connector CN2S. The other end of the resistor 102 is connected between the relay RL2F and the connector CN2F. The resistance values of the resistors 101 and 102 need to be sufficiently larger than the path impedance from the relays CN1S, CN1F, CN2S, CN2F to the power supply terminal of the DUT so as not to affect the voltage application accuracy of the power supply module DPS. In this embodiment, it is set to about 10 kΩ.

FIG. 2 is an explanatory diagram of the route in the configuration of FIG. 1, and routes 1 to 4 are set by selectively turning on relays and switches.
<Route 1>
In path 1, relays RL1S and RL1F and switch S2 are selectively turned on.
Thus, a path of D / A converter DAC → operational amplifier U1 → relay RL1S → resistor R101 → relay RL1F → operational amplifier U2 → switch S2 → A / D converter ADC is formed.

  Here, if the relays RL1S and RL1F have not failed, a predetermined expected voltage corresponding to the set output voltage of the D / A converter DAC is output as the output of the operational amplifier U2. Therefore, by measuring the output voltage of the operational amplifier U2 with the A / D converter ADC, it is possible to diagnose whether the relays RL1S and RL1F in the path 1 are faulty.

<Route 2>
In the route 2, the relays RL2S and RL2F and the switch S2 are selectively turned on.
Thereby, a path of D / A converter DAC → operational amplifier U1 → relay RL2S → resistor R102 → relay RL2F → operational amplifier U2 → switch S2 → A / D converter ADC is formed.

  Here, if the relays RL2S and RL2F have not failed, a predetermined expected voltage corresponding to the set output voltage of the D / A converter DAC is output as the output of the operational amplifier U2. Therefore, by measuring the output voltage of the operational amplifier U2 with the A / D converter ADC, it is possible to diagnose whether or not the relays RL2S and RL2F in the path 2 are faulty.

<Route 3>
In the path 3, the relays RL1F, RL2F, RL1S, and RL2S of the output system are all turned off, and the relays RL-DS and RLD4 and the switch S2 are selectively turned on.
As a result, a path of the reference voltage source U10 → the relay RL-DS → the operational amplifier U2 → the switch S2 → the A / D converter ADC is formed.

  Here, if the relays RL-DS and RLD4 have not failed, the set output voltage of the reference voltage source U10 is output as the output of the operational amplifier U2. Therefore, by measuring the output voltage of the operational amplifier U2 with the A / D converter ADC, it is possible to diagnose whether or not the relays RL-DS and RLD4 in the path 3 are faulty.

<Route 4>
After confirming that the relay RL-DS has not failed on the path 3, the diagnosis on the path 4 is performed. In the path 4, all the relays RL1F, RL2F, RL1S, and RL2S of the output system are turned off, and the relays RL-DS, RL-DF, RLD1, and the switch S3 are selectively turned on.

  As a result, a feedback loop consisting of operational amplifier U1 → relay RL-DF → relay RLD1 → operational amplifier U2 → resistor R3 → operational amplifier U1 is formed, and D / A converter DAC → operational amplifier U1 → relay RL-DF. A path of relay RLD1 → switch S3 → A / D converter ADC is formed.

  Here, if the relays RL-DF and RLD1 have not failed, the A / D converter ADC can measure a predetermined expected voltage corresponding to the set output voltage of the D / A converter DAC. The presence or absence of a failure of the relays RL-DF and RLD1 can be diagnosed.

  FIG. 3 is a block diagram showing a main part of another embodiment of the present invention, and the same reference numerals are given to parts common to FIG. 3 is different from FIG. 1 in that a relay RL101 is connected between a connection point of the resistor 101 and the connector CN1S and a connection point of the resistor 102 and the connector CN2S in FIG.

  FIG. 4 is an explanatory diagram of the route in the configuration in FIG. Here, the paths 11 and 12 are equivalent to the paths 1 and 2 in FIG. 2, and their description is omitted.

<Route 13>
In the path 13, the relays RL1F and RL2S of the output system, the switch S2, and the relay RL101 are selectively turned on.
Thereby, a path of D / A converter DAC → operational amplifier U1 → relay RL1F → relay RL101 → relay RL2S → operational amplifier U2 → switch S2 → A / D converter ADC is formed.

  Here, if the relays RL1F, RL2S, and RL101 are not malfunctioning, a predetermined expected voltage corresponding to the set output voltage of the D / A converter DAC is output as the output of the operational amplifier U2, and therefore the output of the operational amplifier U2 By measuring the voltage with the A / D converter ADC, it is possible to diagnose whether the relays RL1F, RL2S, and RL101 in the path 13 are faulty.

<Route 14>
In the path 14, the relays RL1S and RL2F of the output system, the switch S2, and the relay RL101 are selectively turned on.
As a result, a path of D / A converter DAC → operational amplifier U1 → relay RL2F → relay RL101 → relay RL1S → operational amplifier U2 → switch S2 → A / D converter ADC is formed.

  Here, if the relays RL2F, RL1S, and RL101 are not faulty, a predetermined expected voltage corresponding to the set output voltage of the D / A converter DAC is output as the output of the operational amplifier U2, and therefore the output of the operational amplifier U2 By measuring the voltage with the A / D converter ADC, it is possible to diagnose whether or not the relays RL2F, RL1S, and RL101 in the path 13 have failed.

  Further, when it is detected that there is a relay failure on the route 11 or the route 12, it is possible to identify the failed relay by performing a diagnosis on the route 13 or the route 14.

  Further, when a relay failure is not detected in the route 11 or the route 12 and a relay failure is detected in the route 13 or the route 14, it can be specified that the relay RL101 is in failure.

  In the above embodiment, an example has been described in which power is supplied from one DPS circuit to two DUTs via a branched force line and relay series circuit and a branched sense line and relay series circuit. The number of DUTs may be three or more, the number of force lines and sense lines is increased according to the number of DUTs, relays are connected in series, and the force lines and sense lines connected to the power terminals of each DUT are connected. The connection may be made via a resistor at a position closer to the DUT than the relay.

  As described above, according to the present invention, it is possible to realize a semiconductor test apparatus that can specify whether a relay of a DC power supply output system to a DUT or a diagnostic block connection system has failed.

It is a block diagram which shows the principal part of one Example of this invention. FIG. 2 is a route explanatory diagram in the configuration of FIG. 1. It is a block diagram which shows the principal part of the other Example of this invention. FIG. 3 is a route explanatory diagram in the configuration of FIG. 2. It is a block diagram which shows an example of the conventional semiconductor test apparatus. It is a block diagram which shows the principal part of the other example of the conventional semiconductor test apparatus.

Explanation of symbols

DUT Semiconductor to be measured DPS Power supply module DIF DUT interface DAC D / A converter U1-U3 Operational amplifier S * Switch RL ** Relay ADC A / D converter DGB Diagnostic block R101, R102 Resistor

Claims (2)

A power supply module and power terminals of a plurality of DUTs are connected via a branched force line and relay series circuit, and a branched sense line and relay series circuit, and the force line and the sense line are connected to the diagnostic block via a relay. In the semiconductor test equipment connected to
A semiconductor test apparatus, wherein a force line and a sense line connected to a power supply terminal of each DUT are connected via a resistor at a position closer to the DUT than the relay.   The semiconductor test apparatus according to claim 1, wherein a relay is connected between ends of resistors connecting the force line and the sense line.

Images