JP4871777B2 - Etching solution and transistor manufacturing method - Google Patents

Etching solution and transistor manufacturing method Download PDF

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JP4871777B2
JP4871777B2 JP2007106775A JP2007106775A JP4871777B2 JP 4871777 B2 JP4871777 B2 JP 4871777B2 JP 2007106775 A JP2007106775 A JP 2007106775A JP 2007106775 A JP2007106775 A JP 2007106775A JP 4871777 B2 JP4871777 B2 JP 4871777B2
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明久 高橋
悟 高澤
暁 石橋
幸平 佐久間
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Ulvac Inc
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Description

本発明は金属のエッチングに関し、特に、トランジスタの配線膜をエッチングする技術に関する。   The present invention relates to metal etching, and more particularly to a technique for etching a wiring film of a transistor.

近年では、トランジスタの高速化のために、現状のポリシリコンのゲート電極を、低抵抗の金属のゲート電極に変更したいという要望があり、低抵抗の金属としては銅が有望視されている。
液晶表示装置の薄膜トランジスタ(TFT)では、ゲート電極はガラス基板表面に密着して配置されるが、純銅の薄膜はガラス基板に対する接着力が弱く、剥離してしまうという問題がある。
In recent years, there has been a demand to change the current polysilicon gate electrode to a low-resistance metal gate electrode in order to increase the speed of the transistor, and copper is promising as a low-resistance metal.
In a thin film transistor (TFT) of a liquid crystal display device, a gate electrode is disposed in close contact with the surface of a glass substrate, but a thin film of pure copper has a problem that the adhesive strength to the glass substrate is weak and peels off.

他方、CuOやCu2O等の銅酸化物を含有する銅酸化物薄膜は、ガラス基板に対して接着力は強いものの、抵抗値が大きいため、銅酸化物薄膜をゲート電極に採用するメリットが無い。 On the other hand, a copper oxide thin film containing a copper oxide such as CuO or Cu 2 O has a strong resistance to a glass substrate, but has a large resistance value, so there is a merit of adopting the copper oxide thin film as a gate electrode. No.

そこで、銅配線膜を、下層部分を銅酸化物薄膜、上層部分を純銅薄膜の二層構造とし、この二層構造の銅配線膜によってゲート電極や蓄積容量電極を構成させる試みがなされている。
二層構造の銅配線膜は、一般に、銅酸化物薄膜と純銅薄膜の積層膜を、エッチング液で所定形状にパターニングして形成される。
Therefore, an attempt has been made to configure the copper wiring film as a two-layer structure having a copper oxide thin film as a lower layer portion and a pure copper thin film as an upper layer portion, and to constitute a gate electrode or a storage capacitor electrode with the copper wiring film having this two-layer structure.
A copper wiring film having a two-layer structure is generally formed by patterning a laminated film of a copper oxide thin film and a pure copper thin film into a predetermined shape with an etching solution.

一般に、銅を主成分とする薄膜のエッチングには、硝酸系エッチング液、塩化第二鉄系エッチング液、過硫酸アンモニウム系エッチング液、塩化銅系エッチング液、クロム酸−硫酸系エッチング液等が用いられる。   In general, for etching a thin film containing copper as a main component, a nitric acid-based etching solution, a ferric chloride-based etching solution, an ammonium persulfate-based etching solution, a copper chloride-based etching solution, a chromic acid-sulfuric acid-based etching solution, and the like are used. .

これらの中でも、硝酸系エッチングは、ゲート電極のような薄膜のエッチングに特に優れている。硝酸系エッチング液中では、下記反応式(1)に示すように、硝酸から酸素が遊離する。
2HNO3 → H2O+ 2NO2 + O……反応式(1)
遊離した酸素は、下記反応式(2)に示すように銅と反応して酸化銅が生成される
Cu +O → CuO……反応式(2)
酸化銅は塩基性化合物であるから、下記反応式(3)に示すように硝酸と反応して硝酸銅となる。
CuO+2HNO3→Cu(NO32 + H2O……反応式(3)
硝酸系エッチング液は水溶液であり、硝酸銅は水溶液中で電離して硝酸イオンと銅イオンとなり、その結果銅がエッチング液中に溶解した状態になる。このように、銅は一旦酸化銅になってから溶解するから、銅酸化物薄膜は、純銅薄膜よりもエッチング速度が速い。
Among these, nitric acid-based etching is particularly excellent for etching a thin film such as a gate electrode. In the nitric acid-based etchant, oxygen is liberated from nitric acid as shown in the following reaction formula (1).
2HNO 3 → H 2 O + 2NO 2 + O ... Reaction formula (1)
The liberated oxygen reacts with copper to produce copper oxide as shown in the following reaction formula (2): Cu + O → CuO ... reaction formula (2)
Since copper oxide is a basic compound, it reacts with nitric acid to become copper nitrate as shown in the following reaction formula (3).
CuO + 2HNO 3 → Cu (NO 3 ) 2 + H 2 O …… Reaction formula (3)
The nitric acid-based etching solution is an aqueous solution, and copper nitrate is ionized in the aqueous solution to become nitrate ions and copper ions, and as a result, the copper is dissolved in the etching solution. Thus, since copper once becomes copper oxide and then melts, the copper oxide thin film has a higher etching rate than the pure copper thin film.

図6は積層膜150をレジスト層155の開口159パターンに沿って硝酸系エッチング液でパターニングした時の模式的断面図を示しており、銅酸化物薄膜151は、純銅薄膜152に比べて、開口159内に露出する側面がオーバーエッチングされ、積層膜150の下層部分の幅が狭くなるアンダーカットと呼ばれる現象が起こり、積層膜150の割れや、ガラス基板156からの剥離が起こりやすくなる。   FIG. 6 is a schematic cross-sectional view when the laminated film 150 is patterned with a nitric acid-based etchant along the opening 159 pattern of the resist layer 155, and the copper oxide thin film 151 has a larger opening than the pure copper thin film 152. The side surface exposed in 159 is over-etched, and a phenomenon called undercut occurs in which the width of the lower layer portion of the laminated film 150 becomes narrow, and the laminated film 150 is easily cracked or peeled off from the glass substrate 156.

また、硝酸系エッチング液に変え、上述した塩化第二鉄系エッチング液、過硫酸アンモニウム系エッチング液、塩化銅系エッチング液、クロム酸−硫酸系エッチング液等を用いてもアンダーカット現象は生じ、同じエッチング液でアンダーカットを起こさずに、銅酸化物の含有量の異なる銅薄膜をエッチングするのは困難であった。
特開平7−66423号公報 特開2003−129260号公報 特開2004−43895号公報
In addition, the undercut phenomenon occurs when the above-described ferric chloride etching solution, ammonium persulfate etching solution, copper chloride etching solution, chromic acid-sulfuric acid etching solution, etc. are used instead of the nitric acid etching solution. It was difficult to etch copper thin films having different copper oxide contents without causing undercutting with an etching solution.
JP-A-7-66423 Japanese Patent Laid-Open No. 2003-129260 JP 2004-43895 A

本発明は上記課題を解決するために成されたものであり、その目的は割れや剥離を起こさずに積層膜をエッチングする技術を提供することである。   The present invention has been made to solve the above problems, and an object of the present invention is to provide a technique for etching a laminated film without causing cracking or peeling.

本発明者等が、硝酸系エッチング液を希釈して積層膜のエッチングを行ったところ、エッチング速度が遅くなる上、純銅薄膜と銅酸化物薄膜のエッチング速度の差は逆に大きくなり、アンダーカット現象は防止されなかった。   When the inventors of the present invention diluted the nitric acid-based etchant to etch the laminated film, the etching rate was slow, and the difference in the etching rate between the pure copper thin film and the copper oxide thin film increased conversely, resulting in an undercut. The phenomenon was not prevented.

本発明者等が更に鋭意検討を行ったところ、硝酸系エッチング液に、燐酸と、塩酸とを添加すれば、純銅膜と銅酸化薄膜のエッチング速度の差が縮まり、アンダーカット現象が防止されることを見出した。   As a result of further intensive studies by the present inventors, if phosphoric acid and hydrochloric acid are added to the nitric acid-based etching solution, the difference in etching rate between the pure copper film and the copper oxide thin film is reduced, and the undercut phenomenon is prevented. I found out.

係る知見に基づいて成された本発明は、銅酸化物を含有する第一の銅薄膜と、前記第一の銅薄膜よりも前記銅酸化物の含有量が少ない第二の銅薄膜とが積層された積層膜のエッチングに用いるエッチング液であって、硫酸と、硝酸と、酢酸と、塩酸と、燐酸とを含有する水溶液で構成されたエッチング液である。
本発明は、ゲート電極と、ゲート絶縁膜と、チャネル半導体層と、ドレイン半導体層と、ソース半導体層とを有し、前記ゲート電極は、ガラス基板の表面に密着する第一の銅薄膜と、前記第一の銅薄膜の表面に配置され、前記第一の銅薄膜よりも銅酸化物の含有量が少なくされた第二の銅薄膜とからなる積層膜を、パターニングして形成された薄膜トランジスタを製造する薄膜トランジスタ製造方法であって、前記積層膜の前記第二の銅薄膜の表面に、所定形状の開口が形成されたレジスト層を配置し、前記開口の底面に露出する前記積層膜に、硫酸と、硝酸と、酢酸と、燐酸と、塩酸とを含有する水溶液からなるエッチング液を接触させて前記積層膜をパターニングするトランジスタ製造方法である。

The present invention made on the basis of such knowledge is a lamination of a first copper thin film containing a copper oxide and a second copper thin film containing less copper oxide than the first copper thin film. An etching solution used for etching the laminated film is an etching solution composed of an aqueous solution containing sulfuric acid, nitric acid, acetic acid, hydrochloric acid, and phosphoric acid.
The present invention includes a gate electrode, a gate insulating film, a channel semiconductor layer, a drain semiconductor layer, and a source semiconductor layer, the gate electrode being in close contact with the surface of the glass substrate; A thin film transistor formed by patterning a laminated film that is disposed on the surface of the first copper thin film and is made of a second copper thin film that contains less copper oxide than the first copper thin film. A method of manufacturing a thin film transistor, comprising: disposing a resist layer having an opening having a predetermined shape on a surface of the second copper thin film of the stacked film; and applying sulfuric acid to the stacked film exposed on a bottom surface of the opening And a method of manufacturing a transistor in which the stacked film is patterned by bringing an etching solution made of an aqueous solution containing nitric acid, acetic acid, phosphoric acid, and hydrochloric acid into contact with each other.

本発明は上記のように構成されており、本発明のエッチング液の構成材料のうち、硝酸が銅を溶解する溶解成分であり、硝酸は銅を酸化させてから溶解するので、硝酸に対する溶解速度(エッチング速度)は、銅酸化物の含有量が多い程早くなる。
燐酸と塩酸は単体では銅を不溶(難溶)であるが、エッチング液に燐酸と塩酸を加えると、純銅のエッチング速度を遅くせず、銅酸化物のエッチング速度を遅くする。
The present invention is configured as described above, and among the constituent materials of the etching solution of the present invention, nitric acid is a dissolving component that dissolves copper, and nitric acid dissolves after oxidizing copper, so the dissolution rate in nitric acid (Etching rate) increases as the copper oxide content increases.
Phosphoric acid and hydrochloric acid alone are insoluble (slightly soluble) in copper. However, when phosphoric acid and hydrochloric acid are added to the etching solution, the etching rate of pure copper is not slowed, and the etching rate of copper oxide is slowed.

従って、銅酸化物のエッチング速度は純銅のエッチング速度に対して遅くなり、エッチング速度の差が小さくなるので、第一、第二の銅薄膜の積層膜を膜厚方向にエッチングする際に、アンダーカットが起こりにくくなる。   Accordingly, the etching rate of the copper oxide is slower than the etching rate of pure copper, and the difference between the etching rates is reduced. Therefore, when etching the laminated film of the first and second copper thin films in the film thickness direction, Cut is less likely to occur.

尚、塩酸は銅酸化物のエッチング速度を減速し、燐酸は銅酸化物のエッチング速度を加速する傾向があるので、塩酸と燐酸の含有量を変えることで、酸化銅のエッチング速度を調整することができる。   Since hydrochloric acid tends to slow down the etching rate of copper oxide and phosphoric acid tends to accelerate the etching rate of copper oxide, the etching rate of copper oxide can be adjusted by changing the contents of hydrochloric acid and phosphoric acid. Can do.

硫酸と酢酸は単体では銅を不溶(難溶)であるが、pH緩衝効果があり、エッチング液に添加すると、エッチング液のpHが所定値で安定する。
尚、本発明で第一、第二の銅薄膜は、銅を主成分とする膜であって、金属元素として銅だけを含有する場合と、銅を主成分とし、Zr、Mg、Ni、Ti等他の添加金属を1種類以上含有する場合とがある。
Although sulfuric acid and acetic acid alone are insoluble (slightly soluble) in copper, they have a pH buffering effect, and when added to an etching solution, the pH of the etching solution is stabilized at a predetermined value.
In the present invention, the first and second copper thin films are films containing copper as a main component, and contain only copper as a metal element, and include copper as a main component, Zr, Mg, Ni, Ti. In some cases, it contains one or more other additive metals.

本発明のエッチング液は、第一、第二の銅薄膜が添加金属を含有する場合も、添加金属を含有しない場合と比べてエッチング速度が変わらないので、エッチングの際にアンダーカットが起こらない。
本発明のエッチング液には、必要に応じて、界面活性剤、他のpH緩衝剤等の添加剤を添加することもできる。
In the etching solution of the present invention, even when the first and second copper thin films contain an additive metal, the etching rate does not change as compared with the case where the additive metal does not contain an additive metal.
If necessary, additives such as surfactants and other pH buffering agents can be added to the etching solution of the present invention.

銅酸化物薄膜と純銅薄膜のエッチング速度の差を縮め、アンダーカットを防止する。基板から剥離し難く、割れの無い銅電極が形成されるので、TFTの信頼性が高い。   The etching rate difference between the copper oxide thin film and the pure copper thin film is reduced to prevent undercutting. Since a copper electrode that does not easily peel from the substrate and does not crack is formed, the reliability of the TFT is high.

本発明方法を図面を用いて説明する。
図1(a)の符号10は処理対象基板を示しており、処理対象基板10は、ガラス基板11と、ガラス基板11の表面に形成された第一の銅薄膜51と、第一の銅薄膜51の表面に形成された第二の銅薄膜52とを有している。
The method of the present invention will be described with reference to the drawings.
The code | symbol 10 of Fig.1 (a) has shown the process target board | substrate, the process target board | substrate 10 is the 1st copper thin film 51 formed in the surface of the glass substrate 11, the glass substrate 11, and the 1st copper thin film. And a second copper thin film 52 formed on the surface of 51.

第一の銅薄膜51は、例えば、真空雰囲気中に酸素ガスを供給しながら銅ターゲットをスパッタリングして成膜されており、膜中には酸化第一銅(Cu2O)、酸化第二銅(CuO)等の銅酸化物を含有している。
第二の銅薄膜52は、例えば、酸素ガスを排気した真空雰囲気で、酸素ガスを供給せずに、銅ターゲットをスパッタリングして成膜されており、膜中には銅酸化物が無いか、あったとしても第一の銅薄膜51に比べ含有量が少ない。
The first copper thin film 51 is formed, for example, by sputtering a copper target while supplying oxygen gas in a vacuum atmosphere, and cuprous oxide (Cu 2 O), cupric oxide is contained in the film. It contains a copper oxide such as (CuO).
For example, the second copper thin film 52 is formed by sputtering a copper target without supplying oxygen gas in a vacuum atmosphere in which oxygen gas is exhausted, and there is no copper oxide in the film. Even if it exists, there is little content compared with the 1st copper thin film 51. FIG.

第一、第二の銅薄膜51、52の積層膜50をエッチングする工程について説明すると、第二の銅薄膜52の表面に、所定形状の開口が形成されたレジスト層を配置し、開口底面に第二の銅薄膜52の表面を露出させる。   The step of etching the laminated film 50 of the first and second copper thin films 51 and 52 will be described. A resist layer having an opening of a predetermined shape is disposed on the surface of the second copper thin film 52, and the opening bottom surface is disposed. The surface of the second copper thin film 52 is exposed.

硝酸を含む水溶液に、燐酸と、塩酸とを加え、本発明のエッチング液を作成し、該エッチング液にレジスト層が配置された状態の処理対象基板10を浸漬させるか、該エッチング液をレジスト層に向けて噴霧して、レジスト層の開口底面に露出する第二の銅薄膜52にエッチング液を接触させると、第一、第二の銅薄膜51、52のうち、レジスト層で覆われた部分はエッチング液に溶解しないが、開口底面に位置する部分はエッチング液に溶解して除去される。   Phosphoric acid and hydrochloric acid are added to an aqueous solution containing nitric acid to prepare the etching solution of the present invention, and the substrate 10 to be processed in a state where the resist layer is disposed in the etching solution, or the etching solution is used as a resist layer. When the etching solution is brought into contact with the second copper thin film 52 exposed to the bottom of the opening of the resist layer by spraying toward the bottom, a portion of the first and second copper thin films 51 and 52 covered with the resist layer Is not dissolved in the etching solution, but the portion located at the bottom of the opening is removed by dissolving in the etching solution.

本発明のエッチング液は、第一、第二の銅薄膜51、52をエッチングする速度が変わらないので、第一の銅薄膜51はオーバーエッチングされずに、レジスト層で覆われた部分が残り、残った第一、第二の銅薄膜51、52で、ゲート電極15や蓄積容量電極12のような電極膜が形成される(図1(b))。   Since the etching solution of the present invention does not change the etching rate of the first and second copper thin films 51 and 52, the first copper thin film 51 is not over-etched, and the portion covered with the resist layer remains. The remaining first and second copper thin films 51 and 52 form an electrode film such as the gate electrode 15 and the storage capacitor electrode 12 (FIG. 1B).

ゲート電極15と蓄積容量電極12の、ガラス基板11と密着する側の面には酸を含有する第一の銅薄膜51が配置されているから、ゲート電極15と蓄積容量電極12はガラス基板11に対する密着性が高い。
ゲート電極15と蓄積容量電極12は、第一の銅薄膜51の他に、酸素を含有しない第二の銅薄膜52を有しているから、抵抗値が小さい。
Since the first copper thin film 51 containing an acid is disposed on the surface of the gate electrode 15 and the storage capacitor electrode 12 that is in close contact with the glass substrate 11, the gate electrode 15 and the storage capacitor electrode 12 are connected to the glass substrate 11. High adhesion to
Since the gate electrode 15 and the storage capacitor electrode 12 have the second copper thin film 52 not containing oxygen in addition to the first copper thin film 51, the resistance value is small.

図1(b)はゲート電極15と蓄積容量電極12を形成後、レジスト層を剥離した状態を示している。
図1(c)の符号20は図1(b)のゲート電極15と、ゲート絶縁膜14と、チャネル半導体層16と、ソース及びドレイン半導体層25、26と、ソース及びドレイン電極21、22とを有する薄膜トランジスタを示している。
FIG. 1B shows a state where the resist layer is peeled after the gate electrode 15 and the storage capacitor electrode 12 are formed.
Reference numeral 20 in FIG. 1C denotes the gate electrode 15, the gate insulating film 14, the channel semiconductor layer 16, the source and drain semiconductor layers 25 and 26, and the source and drain electrodes 21 and 22 in FIG. FIG.

ここでは、チャネル半導体層16は、ソース及びドレイン半導体層25、26と同じ導電型であるが、不純物濃度が低くなっており、ゲート電極15に電圧を印加すると、チャネル半導体層16のゲート絶縁膜14を介してゲート電極15と接触する部分に低抵抗な蓄積層が形成され、該蓄積層を介してソース半導体層25とドレイン半導体層26が電気的に接続される。   Here, the channel semiconductor layer 16 has the same conductivity type as the source and drain semiconductor layers 25 and 26, but has a low impurity concentration, and when a voltage is applied to the gate electrode 15, the gate insulating film of the channel semiconductor layer 16 A storage layer having a low resistance is formed in a portion in contact with the gate electrode 15 through 14, and the source semiconductor layer 25 and the drain semiconductor layer 26 are electrically connected through the storage layer.

チャネル半導体層16は、ソース及びドレイン半導体層25、26と反対の導電型であってもよく、この場合、ゲート電極15に電圧を印加すると、チャネル半導体層16のゲート絶縁膜14を介してゲート電極15と接触する部分に、ソース及びドレイン半導体層25、26と同じ導電型の反転層が形成され、該反転層によってソース半導体層25とドレイン半導体層26とが電気的に接続される。
なお、図1(c)は薄膜トランジスタ20が形成された処理対象基板10の表面に、層間絶縁膜24と、画素電極27が形成された状態を示している。
The channel semiconductor layer 16 may have a conductivity type opposite to that of the source and drain semiconductor layers 25 and 26. In this case, when a voltage is applied to the gate electrode 15, the gate semiconductor layer 16 is gated through the gate insulating film 14 of the channel semiconductor layer 16. An inversion layer having the same conductivity type as that of the source and drain semiconductor layers 25 and 26 is formed in a portion in contact with the electrode 15, and the source semiconductor layer 25 and the drain semiconductor layer 26 are electrically connected by the inversion layer.
FIG. 1C shows a state in which an interlayer insulating film 24 and a pixel electrode 27 are formed on the surface of the processing target substrate 10 on which the thin film transistor 20 is formed.

画素電極27はドレイン電極22に接続されており、ソース半導体層25とドレイン半導体層26とを電気的に接続すると、ソース電極21からドレイン電極22に電流が流れ、画素電極27に電圧が印加される。   The pixel electrode 27 is connected to the drain electrode 22. When the source semiconductor layer 25 and the drain semiconductor layer 26 are electrically connected, a current flows from the source electrode 21 to the drain electrode 22, and a voltage is applied to the pixel electrode 27. The

図2の符号4は、画素電極27上に液晶41を配置し、ガラス基板42の表面に対向電極45が形成されたパネル40を、対向電極45が画素電極27の真上に位置するように配置した液晶表示装置を示しており、画素電極27と対向電極45に印加する電圧を制御し、液晶41の光透過率を制御することができる。   Reference numeral 4 in FIG. 2 denotes a panel 40 in which the liquid crystal 41 is arranged on the pixel electrode 27 and the counter electrode 45 is formed on the surface of the glass substrate 42, so that the counter electrode 45 is positioned directly above the pixel electrode 27. The liquid crystal display device is shown, and the voltage applied to the pixel electrode 27 and the counter electrode 45 can be controlled to control the light transmittance of the liquid crystal 41.

<比較例1>
硫酸(H2SO4)を20容量%、硝酸(HNO3)を10容量%、酢酸(CH3COOH)を30容量%、水(H2O)を40容量%含有する水溶液を比較例1のエッチング液とした。即ち、比較例1のエッチング液の組成は、硫酸10容量部、硝酸5容量部、酢酸15容量部、水20容量部である。
<Comparative Example 1>
Comparative Example 1 An aqueous solution containing 20% by volume of sulfuric acid (H 2 SO 4 ), 10% by volume of nitric acid (HNO 3 ), 30% by volume of acetic acid (CH 3 COOH), and 40% by volume of water (H 2 O) Etching solution. That is, the composition of the etching solution of Comparative Example 1 is 10 parts by volume of sulfuric acid, 5 parts by volume of nitric acid, 15 parts by volume of acetic acid, and 20 parts by volume of water.

<実施例1>
比較例1のエッチング液に、燐酸濃度85容量%の燐酸水溶液1.25mlと、塩酸濃度35容量%の塩酸水溶液5mlを加え、実施例1のエッチング液を作成した。即ち、実施例1のエッチング液の組成は、硫酸10容量部、硝酸5容量部、酢酸部15容量部、燐酸1.0625容量部、塩酸1.75容量部、水23.4375容量部である。
<Example 1>
To the etching solution of Comparative Example 1, 1.25 ml of a phosphoric acid aqueous solution having a phosphoric acid concentration of 85% by volume and 5 ml of a hydrochloric acid aqueous solution having a hydrochloric acid concentration of 35% by volume were added to prepare the etching solution of Example 1. That is, the composition of the etching solution of Example 1 is 10 parts by volume of sulfuric acid, 5 parts by volume of nitric acid, 15 parts by volume of acetic acid, 1.0625 parts by volume of phosphoric acid, 1.75 parts by volume of hydrochloric acid, and 23.4375 parts by volume of water. .

<実施例2>
上記実施例1のエッチング液に、更に水を5ml加えて実施例2のエッチング液を作成した。即ち、実施例2のエッチング液の組成は、硫酸10容量部、硝酸5容量部、酢酸部15容量部、燐酸1.0625容量部、塩酸1.75容量部、水28.4375容量部である。
<Example 2>
An etching solution of Example 2 was prepared by adding 5 ml of water to the etching solution of Example 1 above. That is, the composition of the etching solution of Example 2 is 10 parts by volume of sulfuric acid, 5 parts by volume of nitric acid, 15 parts by volume of acetic acid, 1.0625 parts by volume of phosphoric acid, 1.75 parts by volume of hydrochloric acid, and 28.4375 parts by volume of water. .

比較例1と実施例1、2の各エッチング液に、膜厚300nmの純銅薄膜と、膜厚300nmの銅酸化物(CuO、Cu2Oを含む)薄膜を浸漬し、液温20℃、40℃の条件で、それぞれエッチング速度を求めた。 A 300-nm-thick pure copper thin film and a 300-nm-thick copper oxide (including CuO, Cu 2 O) thin film are immersed in the etching solutions of Comparative Example 1 and Examples 1 and 2, and the liquid temperature is 20 ° C., 40 The etching rate was determined under the condition of ° C.

図3〜5は比較例1、実施例1、2のエッチング液の液温と、エッチング速度の関係をグラフ化したものである。図3を見ると、比較例1のエッチング液を用いた場合には、銅酸化物薄膜と純銅薄膜のエッチング速度に差があり、エッチング液の温度を40℃と高くしてエッチング速度を速めた場合には、銅酸化物薄膜のエッチング速度が純銅薄膜の約1.5倍にもなった。
これに対し、図4、5を見ると、実施例1、2のエッチング液を用いた場合には、液温20℃ではエッチング速度に差が無くなった。
3 to 5 are graphs showing the relationship between the etching temperature and the etching rate of Comparative Example 1 and Examples 1 and 2. FIG. Referring to FIG. 3, when the etching solution of Comparative Example 1 was used, there was a difference in the etching rate between the copper oxide thin film and the pure copper thin film, and the etching rate was increased to 40 ° C. to increase the etching rate. In some cases, the etching rate of the copper oxide thin film was about 1.5 times that of the pure copper thin film.
On the other hand, in FIGS. 4 and 5, when the etching solutions of Examples 1 and 2 were used, there was no difference in the etching rate at a liquid temperature of 20 ° C.

液温40℃の場合、実施例1は銅酸化物薄膜のエッチング速度が純銅薄膜のエッチング速度の1.2倍程度まで低下した。実施例2は逆に純銅薄膜の方が銅酸化物薄膜よりも遅くなった。いずれの場合も、液温40℃でのエッチング速度の差は比較例1よりも小さく、本発明のエッチング液は銅酸化物のエッチング速度が、純銅のエッチング速度に対して遅くすることが分かった。   In the case of a liquid temperature of 40 ° C., in Example 1, the etching rate of the copper oxide thin film decreased to about 1.2 times the etching rate of the pure copper thin film. In contrast, in Example 2, the pure copper thin film was slower than the copper oxide thin film. In either case, the difference in the etching rate at a liquid temperature of 40 ° C. was smaller than that in Comparative Example 1, and it was found that the etching rate of the copper oxide in the etching solution of the present invention was slower than the etching rate of pure copper. .

また、比較例1のエッチング液では、液温20℃の場合も40℃の場合も、銅酸化物膜は割れながらエッチングされる傾向があるのに対し、実施例1のエッチング液は、液温40℃で銅酸化物薄膜をエッチングする際の割れが比較例1に比べて少なく、実施例2のエッチング液は、液温40℃で銅酸化物薄膜をエッチングする際に割れが確認されなかった。   Moreover, in the etching liquid of Comparative Example 1, the copper oxide film tends to be etched while being cracked at both the liquid temperature of 20 ° C. and 40 ° C., whereas the etching liquid of Example 1 has a liquid temperature. There were few cracks when etching a copper oxide thin film at 40 ° C. compared to Comparative Example 1, and the etching liquid of Example 2 was not confirmed when etching the copper oxide thin film at a liquid temperature of 40 ° C. .

以上のことから、本発明のエッチング液は、銅酸化物の含有量の異なる銅薄膜のエッチング速度の差が小さく、しかも、エッチング中に銅酸化物薄膜の割れが少ないことが確認された。   From the above, it was confirmed that the etching solution of the present invention has a small etching rate difference between copper thin films having different copper oxide contents, and that the copper oxide thin film has few cracks during etching.

(a)〜(c):TFTを製造する工程を説明する断面図(A)-(c): Sectional drawing explaining the process of manufacturing TFT 液晶表示装置の一例を説明する断面図Sectional drawing explaining an example of a liquid crystal display device 比較例1のエッチング液を用いた場合のエッチング速度と液温の関係を示すグラフThe graph which shows the relationship between the etching rate at the time of using the etching liquid of the comparative example 1, and liquid temperature 実施例1のエッチング液を用いた場合のエッチング速度と液温の関係を示すグラフThe graph which shows the relationship between the etching rate at the time of using the etching liquid of Example 1, and liquid temperature 実施例2のエッチング液を用いた場合のエッチング速度と液温の関係を示すグラフThe graph which shows the relationship between the etching rate at the time of using the etching liquid of Example 2, and liquid temperature アンダーカット現象を模式的に示す断面図Sectional view schematically showing the undercut phenomenon

符号の説明Explanation of symbols

11……ガラス基板 15……ゲート電極 14……ゲート絶縁膜 16……チャネル半導体層 21……ソース電極 22……ドレイン電極 25……ソース半導体層 26……ドレイン半導体層 50……積層膜 51……第一の銅薄膜 52……第二の銅薄膜   DESCRIPTION OF SYMBOLS 11 ... Glass substrate 15 ... Gate electrode 14 ... Gate insulating film 16 ... Channel semiconductor layer 21 ... Source electrode 22 ... Drain electrode 25 ... Source semiconductor layer 26 ... Drain semiconductor layer 50 ... Multilayer film 51 …… First copper thin film 52 …… Second copper thin film

Claims (2)

銅酸化物を含有する第一の銅薄膜と、
前記第一の銅薄膜よりも前記銅酸化物の含有量が少ない第二の銅薄膜とが積層された積層膜のエッチングに用いるエッチング液であって、
硫酸と、硝酸と、酢酸と、塩酸と、燐酸とを含有する水溶液で構成されたエッチング液。
A first copper thin film containing copper oxide;
An etching solution used for etching a laminated film in which the second copper thin film having a lower copper oxide content than the first copper thin film is laminated,
An etching solution composed of an aqueous solution containing sulfuric acid, nitric acid, acetic acid, hydrochloric acid, and phosphoric acid.
ゲート電極と、ゲート絶縁膜と、チャネル半導体層と、ドレイン半導体層と、ソース半導体層とを有し、
前記ゲート電極は、ガラス基板の表面に密着する第一の銅薄膜と、前記第一の銅薄膜の表面に配置され、前記第一の銅薄膜よりも銅酸化物の含有量が少なくされた第二の銅薄膜とからなる積層膜を、パターニングして形成された薄膜トランジスタを製造する薄膜トランジスタ製造方法であって、
前記積層膜の前記第二の銅薄膜の表面に、所定形状の開口が形成されたレジスト層を配置し、
前記開口の底面に露出する前記積層膜に、硫酸と、硝酸と、酢酸と、燐酸と、塩酸とを含有する水溶液からなるエッチング液を接触させて前記積層膜をパターニングするトランジスタ製造方法。
A gate electrode, a gate insulating film, a channel semiconductor layer, a drain semiconductor layer, and a source semiconductor layer;
The gate electrode is disposed on the surface of the first copper thin film and the first copper thin film in close contact with the surface of the glass substrate, and the content of copper oxide is less than that of the first copper thin film. A thin film transistor manufacturing method for manufacturing a thin film transistor formed by patterning a laminated film composed of two copper thin films,
On the surface of the second copper thin film of the laminated film, a resist layer in which an opening having a predetermined shape is formed,
A method of manufacturing a transistor, comprising: patterning the laminated film by bringing an etching solution made of an aqueous solution containing sulfuric acid, nitric acid, acetic acid, phosphoric acid, and hydrochloric acid into contact with the laminated film exposed on a bottom surface of the opening.
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