JP4866114B2 - MEMORY CONTROLLER, NONVOLATILE MEMORY DEVICE, NONVOLATILE MEMORY SYSTEM, AND MEMORY CONTROL METHOD - Google Patents

Description

  The present invention relates to a nonvolatile storage device such as a semiconductor memory card having a rewritable nonvolatile memory as a data storage medium, a memory controller incorporated therein, and a nonvolatile storage system in which an access device is added as a component. And a memory control method in the memory controller.

  Nonvolatile storage devices having a rewritable nonvolatile memory are widely used mainly for semiconductor memory cards. Nonvolatile storage devices using this semiconductor memory card are combined with a digital still camera, a personal computer, or the like. The demand for non-volatile storage systems is increasing. Currently, there are various types of semiconductor memory cards.

  The memory card includes a flash memory that stores data and a memory controller LSI that controls the flash memory. The memory controller LSI is a device that controls reading and writing of data to and from the flash memory in response to reading and writing instructions of an access device such as a digital still camera. Typical flash memories include NAND type and AND type.

  In these memory chips, there are a plurality of blocks serving as data erasing units, and there are a plurality of pages serving as data writing units in one block. That is, the size of the page that is the writing unit is smaller than the size of the block that is the erasing unit. In addition, since the number of defective blocks that cannot be read or written increases as writing and erasing are repeated in the flash memory, it is necessary to continue using the flash memory while avoiding the generated defective blocks. As a method for avoiding a bad block, there is a method as disclosed in Patent Document 1.

In this method, when an error occurs, new error information is added to the original error information to update the error information. Next, the error information area storing the error information is once erased, and the updated error information is written in the error information area. In this way, error information is rewritten to avoid the use of defective blocks.
Patent No. 36060939

  When data smaller than the page capacity is written to a page which is a unit of writing, a blank portion where no data is written is generated on the page. In order to make effective use of this blank portion, data can be added to the blank portion until the page capacity is satisfied. However, in practice, an upper limit is set for the number of times data can be written to the same page in consideration of the characteristics of the flash memory.

  In the configuration as in Patent Document 1, since only one error information area is secured on the flash memory, the procedure for updating error information in the error information area is to first delete the existing error information, and then update the error information area. The updated error information is written. In such an update procedure, if an error occurs during erasing or writing, or if the power is cut off due to an external factor, the previous error information that existed in the error information area before erasing is already lost. As a result, the error information cannot be recovered.

  In order to prevent the loss of error information due to power interruption as described above, a method of adding error information without losing data in the error information area is conceivable. However, since the error information is very small compared to the page capacity that is one writing unit in the error information area, even if the error information is added up to the maximum number of times, the error information does not satisfy the page capacity, so the data is written. An empty space is generated. As described above, the capacity of the error information area included in the capacity of the flash memory is not effectively used.

  The present invention makes effective use of the capacity of the nonvolatile memory when storing error information, and the error information immediately before being written even if an error or power interruption occurs when updating the error information. The purpose is not to lose.

In order to solve this problem, the memory controller according to the present invention has a plurality of blocks which are data erasing units, and the block has a plurality of data blocks holding data and addresses of defective blocks in the plurality of blocks. A memory controller that controls writing and reading of data to and from a nonvolatile memory including a plurality of management blocks to be registered,
Control that acquires management blocks cyclically one by one except for blocks whose addresses are registered as defective blocks in the plurality of management blocks, and registers the addresses of newly generated defective blocks in the acquired management blocks It has the part.

  In order to solve this problem, a nonvolatile memory device according to the present invention includes a plurality of blocks that are data erasing units, and the blocks include a plurality of data blocks that hold data and defective blocks in the plurality of blocks. A non-volatile memory device comprising: a non-volatile memory including a plurality of management blocks for registering addresses; and a memory controller that controls writing and reading of data to and from the non-volatile memory, wherein the memory controller is The management block is acquired cyclically one by one except for the block in which the address is registered as a defective block in the plurality of management blocks, and the address of the newly generated defective block is registered in the acquired management block. It has a control part.

  In order to solve this problem, the nonvolatile storage system of the present invention includes a plurality of blocks which are data erasing units, and the blocks include a plurality of data blocks holding data and defective blocks in the plurality of blocks. A non-volatile memory including a plurality of management blocks for registering addresses; a memory controller that controls writing and reading of data to and from the non-volatile memory; and An access device for instructing writing and reading, wherein the memory controller cycles through each of the plurality of management blocks except for a block in which an address is registered as a defective block. Newly acquired management block, and the address of the newly generated bad block It is characterized in that it has a control unit to be registered in the acquired management block.

  Here, when the address of the bad block is registered in one management block among the plurality of management blocks, the control unit is scheduled to register the management block in the management block if it becomes a bad block. The addresses of all the defective blocks including the addresses of the defective blocks may be registered in another management block acquired cyclically.

  Here, when the address of the bad block is registered in the management block, the control unit, when the management block becomes a bad block, includes all the addresses of the bad block that were scheduled to be registered in the management block. Registration of the address of the defective block may be performed up to the maximum number of retries for another management block acquired cyclically.

  Here, when searching for a management block in which the latest data exists from the plurality of management blocks, the control unit checks the number of defective blocks registered in each management block, and determines the management block with the largest number. It may be determined that the management block includes the latest data.

  Here, the control unit also writes the number of defective blocks when registering the address of the defective block in the management block, and writes to the management block when searching for a management block having the latest data from the plurality of management blocks. The management block in which the latest data exists may be determined from the number of defective blocks.

  Here, when updating the data of the management block, the control unit writes to the other management block acquired cyclically, confirms that the written data has no error, and then updates the data of the original management block. Data may be erased.

  Here, when the control unit searches for a management block in which the latest data is present from the plurality of management blocks, the control unit separately updates the first information that needs to be updated regardless of the occurrence of a defective block. When the updated first information is written in the management block, the counter value updated when the updated first information is the latest and the largest number of registered bad blocks is determined to be the latest management block. You may do it.

  Here, the first information may be information indicating a correspondence relationship between a logical address and a physical address of the nonvolatile memory.

  Here, the controller checks a check code calculated from at least the address information of the defective block, the first information, and the counter when searching for a management block having the latest data. A management block in which the latest data exists may be searched by excluding the management block whose code is invalid.

  Here, the control unit divides the management block into a plurality of areas equal to or less than the number of pages, which is a data writing unit of the management block, and sequentially writes data to the plurality of areas for one management block, Another management block may be newly used after data is written in all the plurality of areas.

  Here, the control unit divides the management block into a plurality of areas equal to or less than the number of pages, which is a data writing unit, and sequentially writes data to the plurality of areas for one management block, After data is written to all the plurality of areas, another management block is newly used, and when writing data to the first area among the plurality of areas formed by dividing the management block, When the defective block address and the first information are written and the first information is updated, the updated first information may be written in the next area.

  Here, the nonvolatile memory may be a flash memory.

  In order to solve this problem, a memory control method according to the present invention includes a plurality of blocks which are data erasing units, and the blocks include a plurality of data blocks holding data and addresses of defective blocks in the plurality of blocks. A memory control method for controlling writing and reading of data to and from a non-volatile memory including a plurality of management blocks for registering a memory block, excluding blocks whose addresses are registered as defective blocks in the plurality of management blocks The management block is acquired cyclically one by one, and the address of the newly generated defective block is registered in the acquired management block.

  Here, when the address of the bad block is registered in one management block of the plurality of management blocks, if the management block becomes a bad block, the bad block that was scheduled to be registered in the management block You may make it register the address of all the bad blocks containing an address in another management block acquired cyclically.

  Here, when registering the address of the defective block in the management block, if the management block becomes a defective block, the addresses of all the defective blocks including the address of the defective block scheduled to be registered in the management block May be registered up to the maximum number of retries for another management block acquired cyclically.

  Here, when searching for a management block in which the latest data exists from the plurality of management blocks, the number of defective blocks registered in each management block is checked, and the management block with the largest number has the latest data. You may make it judge that it is a management block.

  Here, the number of defective blocks is also written when registering the address of the defective block in the management block, and when the management block having the latest data is searched from the plurality of management blocks, the defect written in the management block The management block in which the latest data exists may be determined from the number of blocks.

  Here, when updating the data of the management block, it writes to the other management block acquired cyclically, confirms that the written data has no error, and then erases the data of the original management block It may be.

  Here, when searching for a management block having the latest data from the plurality of management blocks, the update to the other management block is performed in accordance with the update of the first information that needs to be updated regardless of the occurrence of the bad block. The counter value updated when the first information is written is the latest, and the largest number of registered bad blocks may be determined as the latest management block.

  Here, the first information may be information indicating a correspondence relationship between a logical address and a physical address of the nonvolatile memory.

  Here, when searching for a management block in which the latest data exists, at least the check information calculated from the address information of the defective block, the first information, and the counter is inspected, and the check code is invalid. A management block in which the latest data exists may be searched by excluding the management block.

  Here, the management block is divided into a plurality of areas equal to or less than the number of pages, which is a unit for writing data in the management block, and data is sequentially written in the plurality of areas for one management block, and data is stored in all the plurality of areas Alternatively, another management block may be newly used after.

  Here, the management block is divided into a plurality of areas equal to or less than the number of pages, which is a unit for writing data in the management block, and data is sequentially written in the plurality of areas for one management block, and data is stored in all the plurality of areas. When a new management block is newly used and data is written in the first area among the plurality of areas formed by dividing the management block, the address of the defective block and the first block are written. When the first information is written and the first information is updated, the updated first information may be written in the next area.

  Here, the nonvolatile memory may be a flash memory.

  According to the present invention as described above, when error information such as an address of a defective block is updated, the address information of the updated defective block is written in another location on the memory and the error information is accumulated. Even a flash memory with an upper limit on the number of times data is written to one page can be used effectively. Furthermore, when updating the management block information, even if an error or power interruption occurs, the previous error information already written in the management block is not lost, and an excellent memory controller and non-volatile storage device A nonvolatile storage system and a memory control method can be realized.

  Next, an embodiment of the present invention will be described. FIG. 1 is a configuration diagram showing a nonvolatile memory system in the present embodiment. The nonvolatile storage system 100 includes an access device 101 that instructs writing and reading of data, and a nonvolatile storage device 102. The non-volatile storage device 102 includes a non-volatile memory 110 configured by a flash memory that stores user data sent from the access device 101 and data used for managing the user data, and a non-volatile memory 110 according to an instruction from the access device 101. And a memory controller 103 that controls writing and reading of data. The memory controller 103 includes a control unit including a buffer 105, a ROM 108, a RAM 107, and a CPU 106, a host I / F 104, and a nonvolatile memory I / F 109.

  In the memory controller 103, the host I / F 104 transmits and receives user data and various commands to and from the access device 101, and the nonvolatile memory I / F 109 transmits user data and management to and from the nonvolatile memory 110. For transmitting and receiving data. The ROM 108 stores a program for executing processing of the memory controller, and the RAM 107 is used when executing the program stored in the ROM 108. The buffer 105 temporarily accumulates data from the access device 101 and the nonvolatile memory 110 and supplements the RAM 107. The CPU 106 uses the RAM 107 to execute a program stored in the ROM 108, and realizes writing, reading, and erasing of data in the nonvolatile memory 110 via the nonvolatile memory I / F 109.

  FIG. 2 is a configuration diagram of the nonvolatile memory 110 in the present embodiment. The nonvolatile memory 110 is a flash memory composed of a plurality of blocks. Each block is a data erasing unit. For example, in a flash memory having a memory capacity of 1 Gbyte, if the data erasure unit is 512 kbytes, there are 2048 blocks. This figure shows that the plurality of blocks are divided into a management area 201 and a data area 202, and that both areas each include a plurality of blocks. A block in the management area 201 is called a management block, and a block in the data area 202 is called a data block. In this figure, the management area 201 includes blocks from MB-1 to MB-m, and the data area 202 includes blocks from DB-1 to DB-n. Each block is composed of a plurality of pages, and each page is a data writing unit. As shown in the figure, the block MB-2 includes pages from MP-1 to MP-s. Each block has the same configuration regardless of the management area 201 and the data area 202. If the page capacity is 2 kbytes, there are 256 pages in one block.

  Each page can be written once or multiple times, but it is not possible to erase only one page of data. That is, in erasing data, data in a block that is an erasing unit must be erased at once. Therefore, in the previous example, 256 pages of data are erased at once. However, once erased, writing can be performed once or multiple times in page units.

  FIG. 3 is a configuration diagram of the data block DB-i (i = 1 to n). Similar to the management block described above, the data block is composed of a plurality of pages from DP-1 to DP-s, and each page includes a data section 301 for storing user data sent from the access device 101, The redundant unit 302 stores a logical address corresponding to user data. That is, the memory controller 103 distinguishes one page into the data part 301 and the redundant part 302 and uses each page.

  FIG. 4 is a configuration diagram of the management block MB-j (j = 1 to m). The management block is also composed of a plurality of pages from MP-1 to MP-s as described above, and the first page, MP-1, is a first indicating the correspondence between the logical address and the physical address of the data block. Are stored, and an address table, which is information on the above, and defective block address information indicating addresses of blocks that have become unusable after an error has occurred in writing or erasing of the nonvolatile memory 110. The defective block address information includes addresses of defective blocks in both the management area 201 and the data area 202. Further, MP-1 also stores the number of defective blocks indicating the number of defective blocks included in the defective block address information, a counter, and a check code on the first page. The check code is for verifying an error in the data written on the page. Each page from MP-1 to MP-s stores a check code for the data on the page. Address tables and check codes are stored in pages other than MP-1. The counter is incremented when the updated address table is written to the first page of another management block after the address table is updated. The counter has a number of bits that can uniquely identify a value indicating that the management block holds the newest data among the plurality of management blocks. The check code is for checking the validity of the data in the page and is stored in each page. An example of this is CRC (Cyclic Redundancy Check), but an ECC code such as an RS (Reed-Solomon) code capable of error correction and detection can also be used.

  The procedure for changing usage to another management block will be described below. In FIG. 4, the management block first stores each piece of information in the initial state in the first page MP-1. Subsequently, when the data in the data area 202 is rewritten and the correspondence between the logical address and the physical address changes, the address table is updated, and the updated updated address table and check code are written in MP-2 on the next page. When the address table is subsequently updated, the latest address table is sequentially written on the next page. As described above, if only the information of the address table and the check code is stored in the pages other than the first page, the processing at the time of updating the address table can be speeded up. Further, although the number of defective blocks is stored in the first page, it is possible to save the trouble of counting the defective blocks by referring to the defective block address information and to speed up the processing.

  FIG. 5 shows a method of using the management block of the management area 201 in the present embodiment. In the figure, MB-1, MB-2, and MB-3 are numbered in order from the first management block, and the management blocks are used cyclically one by one from the first management block MB-1. Therefore, data is not written to a plurality of management blocks at the same time. This figure shows a state where MB-4 is used after MB-2 by skipping the management block of MB-3 which is a bad block. As described above, a plurality of management blocks exist in the management area, and each has the configuration shown in FIG. There are two reasons for changing the use from the currently used management block to another management block, one is updating the address table, and the other is updating the bad block address information.

  In the update of the address table that is the first trigger, the updated address table is sequentially written to a new page in the management block as described above. If not, it is written together with the other data described above on the first page of another management block. That is, the updated address table is written in the first page of another management block, and a value incremented from the value of the immediately preceding management block is written in the counter value. Other defective block address information and the number of defective blocks are the same as the data of the immediately preceding management block, and the check code corresponding to the written data is written. When the first page of another new management block is used in this way and the address table is updated next time, the updated address table is written to the next page of the first page.

  The case where the bad block address information which is the second trigger is updated will be described. When a defective block is generated, the address of the defective block is newly added to the defective block address information, and the defective block address information is updated, the defective block address information on the first page of the management block must be rewritten. At that time, the updated defective block address information is written to the first page of another new management block without erasing the data of the first page. In this first page, the number of defective blocks updated in accordance with the defective block address information is written. Other address tables and counters are the same as the data of the first page of the immediately preceding management block. A check code corresponding to the written data is written.

  When changing to another management block, the counter value is updated when the address table is updated, and the number of defective blocks is updated when the bad block address information is updated. According to this, a management block having the same counter value and a different number of defective blocks, or a management block having the same number of defective blocks and a different counter value, is generated. However, if both the counter and the number of defective blocks are used, the latest management block currently used can be specified.

  Next, data write processing in the nonvolatile storage system of the present embodiment will be described. FIG. 6 is a flowchart showing management block search processing of the nonvolatile storage device 102. When power is supplied from the access device 101 to the nonvolatile memory device 102, the memory controller 103 of the nonvolatile memory device 102 performs initialization processing such as acquisition of address information and memory erasure. Following this initialization process, a search for a management block in which the latest data exists is started as shown in FIG.

  First, the first management block is set as a target block (S601). Next, the data of the first page of the target block is read (S602). Then, it is determined whether or not the target block is an erased block (S603). If it is not an erased block, it is checked whether or not the check code is correct in order to determine whether or not the read data is correct (S604). If the check code is correct, it is next determined whether or not the number of defective blocks is the maximum among the management blocks searched so far (S605). Next, if the number of defective blocks is maximum, it is determined whether or not the counter is the latest value among the management blocks searched so far (S606). If it is the latest value, the target block is assumed to be the latest management block (S607). Then, it is determined whether or not the target block is the final management block (S608). If it is not the final management block, the next management block is set as a target block (S609), and the process returns to S602 to continue the search process. If it is the last management block, the search process is terminated. In this way, the latest data exists in the latest management block held at the end of the search process, and the data is held on the RAM or buffer to search the management block of the nonvolatile storage device. Finish the process. If the management block has been erased in S603, the check code is invalid in S604, the number of defective blocks is not the maximum in S605, or the counter is not the latest in S606, the management block Since the block is not a management block having the latest data, the process proceeds to S608.

  FIG. 7 is a flowchart showing processing when data is written to the nonvolatile memory 110. When data is written in the nonvolatile memory (S701), it is determined whether or not there is an error in the written data (S702). If there is an error, the address of the data block is registered in the defective block address information (S703). If it is written correctly and there is no error, the address table is updated (S704), and the process is terminated.

  The procedure for registering the address of the data block in the bad block address information performed in S703 will be described with reference to the flowchart of FIG. If there is an error in the data written in the data block, the memory controller 103 reads the address table from the page storing the latest address table of the management block in which the latest data exists on the buffer or RAM (S801). ). Then, the latest information of the defective block address information, the number of defective blocks, and the counter in the first page of the management block is read (S802). Subsequently, the address of the new defective block is added to the defective block address information read in S802 (S803), and the number of defective blocks read in S802 is incremented (S804). After that, a new management block is acquired (S805). A new management block is acquired cyclically within the management area 201, but is acquired by excluding the defective block registered in the defective block address information. Next, the address table read in S801, the counter read in S802, the updated bad block address information, the bad block address, and the check code corresponding to these data are written in the first page of the new management block ( S806). Then, it is determined whether or not there is an error (S807). If there is no error, the registration of the bad block address information is successful, and the data of the immediately preceding management block is erased subsequently. If there is an error, it is determined whether or not the current acquisition of a new management block exceeds the maximum number of retries for management block acquisition (S808). The maximum number of retries is predetermined, and indicates the upper limit of the number of attempts to acquire a new management block when an error is detected in S807 and a new management block cannot be acquired. If not, the process returns to S803 again, the address of the data block in which the error is confirmed in S807 is added to the bad block address information as a bad block address, and the same processing is repeated thereafter. When returning to S803, it is necessary to return while holding the address table, bad block address information, number of bad blocks, and counter held in the buffer or RAM. If the maximum number of retries is exceeded, registration of bad block address information has failed, an error is returned to the access device, and the process is terminated.

  In some cases, the process ends with a failure, but it may be better than continuing the retry. Since the probability of occurrence of an error in the nonvolatile memory 110 using the flash memory is small, there is a possibility that another abnormality such as a power supply abnormality has occurred when the error occurs continuously several times. Even if an error occurs due to an abnormality other than the memory, adding the block to the defective block address makes it impossible to use a normal block that should not be an error. Since this is a big problem, it is an effective method to judge by the maximum number of retries as in S808, and to give up registering the address of the defective block when exceeding it.

  The address table update procedure performed in S704 will be described with reference to FIGS. 9A and 9B. First, the memory controller 103 reads the address table from the page in which the latest address table of the management block in which the latest data exists is stored in the buffer or RAM (S901). Then, the contents of the read address table are updated on the buffer or RAM (S902). Next, it is determined whether there is an empty page for writing a new address table in the management block in which the latest data exists (S903). If it exists, the updated address table is written in the empty page (S904). If there is no free page, it is necessary to write to a new management block. For this purpose, the data of the first page of the management block in which the latest data exists is read, and the latest information on the defective block address information, the number of defective blocks, and the counter is acquired (S905). Next, the counter value is incremented (S906), and a new management block is acquired (S907). At this time, a new management block is obtained by excluding the defective block registered in the defective block address information. Thus, the defective block address information, the number of defective blocks, the updated address table, the counter, and the check code corresponding to these data are written in the first page of the new management block (S908).

  Next, as shown in FIG. 9B, after writing in S904 or S908, it is determined whether or not there is an error in the written data (S909). If there is no error, the update of the address table is successful and the process is terminated. If there is an error, the data of the first page of the management block having the latest data is read (S910). However, if the data has already been read in S905, the processing in S910 may be skipped. Next, the bad block address information of the management block is registered (S911), and it is determined whether there is an error in the data written at this time (S912). If there is an error, it is determined whether or not the registration of the current bad block address information exceeds the maximum number of retries (S913). If not, the process returns to S911 to register the bad block address information again. If the maximum number of retries has been exceeded, registration of bad block address information has failed, an error is returned to the access device, and the process is terminated. If there is no error in S912, the address table update processing is terminated.

  The contents of S911 are as shown in FIG. 10, and S1001, 1002, 1003, and 1004 perform the same processing as S803, 804, 805, and 806 of FIG. To do.

  As described above, data is written to the data block through registration of the defective block address or update of the address table. According to the present embodiment, since the old management block is erased immediately after the writing to the new management block is successful, even if an error or power interruption occurs during the process, at least one before and after the update The management block data is stored in the nonvolatile memory 110 and remains. For this reason, the data immediately before the update is not erased at the same time due to an error when the updated data is written to the memory or the power is cut off. Further, even when an error occurs when erasing the management block and the management block becomes a bad block, the management block is added to the bad block address information by the processing shown in FIGS. 9 and 10. It will not be used later. Furthermore, since the bad block address information is accumulated by updating and written on the page as one unit, the capacity of the page can be used effectively.

  In the present embodiment of the present invention, the address table, the defective block address information, the number of defective blocks, and the counter are arranged on the first page of the management block, but are not necessarily on the first page. Further, both the address table and the bad block address information are stored in one page, but it may be configured to store using a plurality of pages. Further, the bad block address information and the number of bad blocks are registered only once in one management block. However, when a new bad block occurs in the data area 202 or when the management area 201 disappears, a new bad block is created. If an error occurs, if there is an empty page in the latest management block, it can be registered in the latest management block a plurality of times. Further, although the management block is configured by one block, it is also possible to configure a plurality of blocks as one management block.

  The memory controller, nonvolatile memory device, nonvolatile memory system, and memory control method of the present invention have high reliability in address management of defective blocks, and can use memory capacity effectively. The present invention is useful as a recording / playback application for portable AV equipment such as a still picture recording / playback apparatus and moving picture recording / playback apparatus, or a portable communication equipment such as a mobile phone.

1 is a configuration diagram illustrating a nonvolatile memory system in an embodiment of the present invention. FIG. It is the block diagram which showed the non-volatile memory in embodiment of this invention. It is the block diagram which showed the data block in embodiment of this invention. It is the block diagram which showed the management block in embodiment of this invention. It is explanatory drawing of the management area | region in embodiment of this invention. It is a flowchart of the newest management block search in embodiment of this invention. It is a flowchart which shows the process after the data writing in embodiment of this invention. It is a flowchart of registration of the address of the bad block which generate | occur | produced in the data area in embodiment of this invention. It is a flowchart of the update of the address table in embodiment of this invention. It is a flowchart of the update of the address table in embodiment of this invention. It is a flowchart which shows the registration process of the bad block address information of the management block in embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Nonvolatile storage system 101 Access apparatus 102 Nonvolatile storage apparatus 103 Memory controller 104 Host I / F
105 buffer 106 CPU
107 RAM
108 ROM
109 Nonvolatile memory I / F
110 Nonvolatile memory

Claims (48)

A non-volatile memory having a plurality of blocks as data erasing units, the block including a plurality of data blocks for holding data and a plurality of management blocks for registering addresses of defective blocks in the plurality of blocks A memory controller for controlling data writing and reading,
Control that acquires management blocks cyclically one by one except for blocks whose addresses are registered as defective blocks in the plurality of management blocks, and registers the addresses of newly generated defective blocks in the acquired management blocks A memory controller. The controller is
When registering a bad block address in one management block of the plurality of management blocks, if the management block becomes a bad block, the address of the bad block that was scheduled to be registered in the management block is The memory controller according to claim 1, wherein addresses of all the defective blocks included are registered in another management block acquired cyclically. The controller is
When registering a bad block address in the management block, if the management block becomes a bad block, registration of all bad block addresses including the bad block address scheduled to be registered in the management block 3. The memory controller according to claim 2, wherein the memory controller is performed up to the maximum number of retries for another management block acquired cyclically. The controller is
When searching for a management block having the latest data from the plurality of management blocks, the number of defective blocks registered in each management block is checked, and the management block having the largest number is managed with the latest data. The memory controller according to claim 1, wherein the memory controller is determined to be a block. The controller is
When registering the address of a bad block in the management block, the number of bad blocks is also written, and when searching for a management block having the latest data from the plurality of management blocks, the number of bad blocks written in the management block The memory controller according to claim 4, wherein a management block in which the latest data exists is determined. The controller is
When updating the data of the management block, writing to the other management block acquired cyclically, confirming that the written data has no error, and then erasing the data of the original management block The memory controller according to any one of claims 1 to 5. The controller is
When searching for a management block having the latest data from the plurality of management blocks, the update is performed to another management block in accordance with the update of the first information that needs to be updated regardless of the occurrence of a bad block. The counter value updated when the first information is written is the latest, and the largest number of registered bad blocks is determined as the latest management block. The memory controller according to any one of 1 to 6.   The memory controller according to claim 7, wherein the first information is information indicating a correspondence relationship between a logical address and a physical address of the nonvolatile memory. The controller is
When searching for a management block in which the latest data exists, a check block calculated from at least the address information of the bad block, the first information, and the counter is inspected, and the check block is invalid 9. The memory controller according to claim 7 or 8, wherein a management block in which the latest data exists is searched by excluding. The controller is
The management block is divided into a plurality of areas equal to or less than the number of pages, which is a unit for writing data in the management block, data is sequentially written to the plurality of areas for one management block, and data is stored in all the plurality of areas The memory controller according to claim 1, wherein another management block is newly used after the data is written. The controller is
The management block divides the management block into a plurality of areas equal to or less than the number of pages as a data writing unit, sequentially writes data to the plurality of areas for one management block, and data is stored in all the plurality of areas. Is written, use another management block,
When writing data to the first area among the plurality of areas formed by dividing the management block, writing the address of the defective block and the first information, and updating the first information The memory controller according to claim 7, wherein the updated first information is written in a next area.   The memory controller according to claim 1, wherein the nonvolatile memory is a flash memory. A non-volatile memory including a plurality of blocks that are data erasure units, the block including a plurality of data blocks that hold data, and a plurality of management blocks that register addresses of defective blocks in the plurality of blocks;
A non-volatile storage device comprising: a memory controller that controls writing and reading of data to and from the non-volatile memory;
The memory controller is
Control that acquires management blocks cyclically one by one except for blocks whose addresses are registered as defective blocks in the plurality of management blocks, and registers the addresses of newly generated defective blocks in the acquired management blocks A non-volatile memory device comprising: a storage unit. The control unit of the memory controller
When registering a bad block address in one management block of the plurality of management blocks, if the management block becomes a bad block, the address of the bad block that was scheduled to be registered in the management block is The nonvolatile storage device according to claim 13, wherein addresses of all defective blocks included are registered in another management block acquired cyclically. The control unit of the memory controller
When registering a bad block address in the management block, if the management block becomes a bad block, registration of all bad block addresses including the bad block address scheduled to be registered in the management block 15. The nonvolatile memory device according to claim 14, wherein the non-volatile storage device is performed up to the maximum number of retries for another management block acquired cyclically. The control unit of the memory controller
When searching for a management block having the latest data from the plurality of management blocks, the number of defective blocks registered in each management block is checked, and the management block having the largest number is managed with the latest data. The nonvolatile memory device according to claim 13, wherein the nonvolatile memory device is determined to be a block. The control unit of the memory controller
When registering the address of a bad block in the management block, the number of bad blocks is also written, and when searching for a management block having the latest data from the plurality of management blocks, the number of bad blocks written in the management block The non-volatile storage device according to claim 16, wherein a management block in which the latest data exists is determined. The control unit of the memory controller
When updating the data of the management block, writing to the other management block acquired cyclically, confirming that the written data has no error, and then erasing the data of the original management block The non-volatile memory device according to any one of claims 13 to 17. The management block of the non-volatile memory has the first information that needs to be updated regardless of the occurrence of a defective block, and the first information that has been updated to another management block as the first information is updated. Counter information that is updated when the information is written,
The control unit of the memory controller
When searching for a management block in which the latest data is present from the plurality of management blocks, the counter having the latest counter value and the largest number of registered bad blocks is determined to be the latest management block. The non-volatile memory device according to claim 13, wherein the non-volatile memory device is a non-volatile memory device.   The nonvolatile memory device according to claim 19, wherein the first information is information indicating a correspondence relationship between a logical address and a physical address of the nonvolatile memory. The management block holds a check code calculated from at least the address information of the bad block, the first information, and the counter,
When searching for a management block in which the latest data exists, the control unit of the memory controller inspects the check code, excludes a management block in which the check code is invalid, and determines a management block in which the latest data exists. The non-volatile memory device according to claim 19, wherein the non-volatile memory device is searched. The management block includes a plurality of pages that are data write units,
The control unit of the memory controller divides the management block into a plurality of areas equal to or less than the number of pages, sequentially writes data in the plurality of areas for one management block, and writes data in all the plurality of areas. The non-volatile memory device according to claim 13, wherein another management block is newly used after being generated. The management block includes a plurality of pages that are data write units,
The control unit of the memory controller divides the management block into a plurality of areas equal to or less than the number of pages, sequentially writes data in the plurality of areas for one management block, and writes data in all the plurality of areas. After that, another management block is newly used,
When writing data to the first area among the plurality of areas formed by dividing the management block, writing the address of the defective block and the first information, and updating the first information The non-volatile storage device according to claim 19, wherein the updated first information is written in a next area.   24. The nonvolatile memory device according to claim 13, wherein the nonvolatile memory is a flash memory. A non-volatile memory including a plurality of blocks that are data erasure units, the block including a plurality of data blocks that hold data, and a plurality of management blocks that register addresses of defective blocks in the plurality of blocks;
A memory controller that controls writing and reading of data to and from the nonvolatile memory;
An access device that instructs the memory controller to write and read data to and from the nonvolatile memory,
The memory controller is
Control that acquires management blocks cyclically one by one except for blocks whose addresses are registered as defective blocks in the plurality of management blocks, and registers the addresses of newly generated defective blocks in the acquired management blocks A non-volatile storage system, comprising: The control unit of the memory controller
When registering a bad block address in one management block of the plurality of management blocks, if the management block becomes a bad block, the address of the bad block that was scheduled to be registered in the management block is 26. The nonvolatile storage system according to claim 25, wherein addresses of all bad blocks included are registered in another management block acquired cyclically. The control unit of the memory controller
When registering a bad block address in the management block, if the management block becomes a bad block, registration of all bad block addresses including the bad block address scheduled to be registered in the management block 27. The nonvolatile storage system according to claim 26, wherein the non-volatile storage system is performed up to the maximum number of retries for another management block acquired cyclically. The control unit of the memory controller
When searching for a management block having the latest data from the plurality of management blocks, the number of defective blocks registered in each management block is checked, and the management block having the largest number is managed with the latest data. The nonvolatile storage system according to any one of claims 25 to 27, wherein the nonvolatile storage system is determined to be a block. The control unit of the memory controller
When registering the address of a bad block in the management block, the number of bad blocks is also written, and when searching for a management block having the latest data from the plurality of management blocks, the number of bad blocks written in the management block 29. The non-volatile storage system according to claim 28, wherein a management block in which the latest data exists is determined. The control unit of the memory controller
When updating the data of the management block, writing to the other management block acquired cyclically, confirming that the written data has no error, and then erasing the data of the original management block The nonvolatile memory system according to any one of claims 25 to 29. The management block of the non-volatile memory has the first information that needs to be updated regardless of the occurrence of a defective block, and the first information that has been updated to another management block as the first information is updated. Counter information that is updated when the information is written,
The control unit of the memory controller
When searching for a management block in which the latest data is present from the plurality of management blocks, the counter having the latest counter value and the largest number of registered bad blocks is determined to be the latest management block. The non-volatile storage system according to any one of claims 25 to 30, wherein   32. The nonvolatile storage system according to claim 31, wherein the first information is information indicating a correspondence relationship between a logical address and a physical address of the nonvolatile memory. The management block holds a check code calculated from at least the address information of the bad block, the first information, and the counter,
When searching for a management block in which the latest data exists, the control unit of the memory controller inspects the check code, excludes a management block in which the check code is invalid, and determines a management block in which the latest data exists. The non-volatile storage system according to claim 31 or 32, wherein search is performed. The management block includes a plurality of pages that are data write units,
The control unit of the memory controller divides the management block into a plurality of areas equal to or less than the number of pages, sequentially writes data in the plurality of areas for one management block, and writes data in all the plurality of areas. 34. The non-volatile storage system according to claim 25, wherein another management block is newly used after being registered. The management block includes a plurality of pages that are data write units,
The control unit of the memory controller divides the management block into a plurality of areas equal to or less than the number of pages, sequentially writes data in the plurality of areas for one management block, and writes data in all the plurality of areas. After that, another management block is newly used,
When writing data to the first area among the plurality of areas formed by dividing the management block, writing the address of the defective block and the first information, and updating the first information The non-volatile storage system according to claim 31, wherein the updated first information is written in a next area.   36. The nonvolatile storage system according to any one of claims 25 to 35, wherein the nonvolatile memory is a flash memory. A non-volatile memory having a plurality of blocks as data erasing units, the block including a plurality of data blocks for holding data and a plurality of management blocks for registering addresses of defective blocks in the plurality of blocks A memory control method for controlling data writing and reading,
A management block is obtained cyclically one by one except for a block whose address is registered as a bad block in the plurality of management blocks,
A memory control method comprising registering an address of a newly generated defective block in the acquired management block.   When registering a bad block address in one management block of the plurality of management blocks, if the management block becomes a bad block, the address of the bad block that was scheduled to be registered in the management block is 38. The memory control method according to claim 37, wherein addresses of all bad blocks included are registered in another management block acquired cyclically.   When registering a bad block address in the management block, if the management block becomes a bad block, registration of all bad block addresses including the bad block address scheduled to be registered in the management block 39. The memory control method according to claim 38, wherein the step is performed up to the maximum number of retries for another management block acquired cyclically. When searching for a management block in which the latest data exists from the plurality of management blocks, examine the number of defective blocks registered in each management block,
40. The memory control method according to claim 37, wherein the management block having the largest number is determined to be a management block in which the latest data exists. Write the number of bad blocks when registering the address of the bad block in the management block,
The management block in which the latest data exists is determined from the number of defective blocks written in the management block when searching for a management block in which the latest data exists from the plurality of management blocks. Item 41. The memory control method according to Item 40. When updating the data of the management block, write to another management block acquired cyclically,
42. The memory control method according to claim 37, wherein after confirming that there is no error in the written data, the data in the original management block is erased.   When searching for a management block having the latest data from the plurality of management blocks, the management block is updated to another management block in accordance with the update of the first information that needs to be updated regardless of the occurrence of a bad block. The counter value updated when the first information is written is the latest, and the largest number of registered bad blocks is determined to be the latest management block. 43. The memory control method according to any one of -42.   44. The memory control method according to claim 43, wherein the first information is information indicating a correspondence relationship between a logical address and a physical address of the nonvolatile memory. When searching for a management block in which the latest data exists, at least a check code calculated from the address information of the bad block, the first information, and the counter is checked,
45. The memory control method according to claim 43 or 44, wherein a management block in which the latest data exists is searched by excluding a management block having an invalid check code. The management block is divided into a plurality of areas equal to or less than the number of pages that are data write units of the management block;
Write data sequentially to the plurality of areas for one management block,
46. The memory control method according to claim 37, wherein another management block is newly used after data is written to all of the plurality of areas. The management block is divided into a plurality of areas equal to or less than the number of pages that are data write units of the management block;
Write data sequentially to the plurality of areas for one management block,
After data is written to all of the plurality of areas, another management block is newly used,
Of the plurality of areas formed by dividing the management block, when writing data to the first area, write the address of the defective block and the first information,
46. The memory control method according to claim 43, wherein, when the first information is updated, the updated first information is written in a next area.   48. The memory control method according to claim 37, wherein the nonvolatile memory is a flash memory.

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