JP4857019B2 - Imaging apparatus and imaging method - Google Patents

Description

  The present invention relates to an imaging apparatus and an imaging method, and more particularly to an imaging technique that clamps an optical black level as a black reference for a pixel output signal.

  In general, when displaying or recording a still image or a moving image captured by a solid-state imaging device such as a CMOS or CCD, an optical black pixel (optical black) of the imaging device is used as a reference for the brightness of the pixel output signal. (Hereinafter referred to as OB) level is used. OB refers to a pixel output that is shielded from light in the light receiving pixel portion of the image sensor and does not depend on incident light.

  A feedback clamp circuit that is commonly used in a digital camera or the like as a clamp circuit that clamps the OB level as a black reference of the pixel output signal will be briefly described.

  For example, a pixel output signal output from a solid-state imaging device such as a CMOS is input to an analog front end processing (AFE) IC. In AFEIC, a pixel output signal input via its input terminal is input to a circuit called a CDS (correlated double sampling) circuit to remove reset noise and the like, and then input to an offset adder circuit to obtain a predetermined value. The offset voltage is added. The offset addition output is input to a variable amplifier for correcting the output sensitivity variation of the solid-state imaging device or switching the sensitivity setting of the imaging device.

  The output from the variable amplifier is input to an ADC (analog-to-digital converter) and converted into an N-bit digital signal. This digital signal is output from its output terminal as an output signal of AFEIC, and is fed back to clamp the black level.

  The fed back digital signal is input to the error calculation unit, the difference between the OB level and the target value of the OB level included in the digital signal is detected, and a correction value corresponding to the detected difference is output. The correction value is input to a current DAC (digital-analog converter) and converted into an analog current value. The extraction of the OB level, the error calculation, and the conversion to the analog current value are performed based on the OB clamp pulse synchronized with the readout timing of the OB pixel input from the AFEIC OBP input terminal.

  The output of the current DAC is input to a clamp capacitor for holding the clamp level connected to the clamp capacitor connection terminal of the AFEIC. By charging / discharging the output current of the current DAC to / from the capacitor, the extracted OB correction level is charged / discharged with a predetermined time constant composed of the current value and the capacitor, and the output is input to the offset addition circuit. The feedback control is subtracted.

  By the way, the clamp capacitor connection terminal in the clamp circuit has a high output impedance, and even when a minute inter-terminal leakage current occurs, the voltage for clamping the OB level to an appropriate level cannot be held in the clamp capacitor. . For this reason, when a leak current occurs in the clamp capacitor connection terminal due to humidity or the like, the black level fluctuates with time, and screen unevenness called shading occurs in the output image.

  For such clamp capacitor connection terminals with high output impedance, conventionally, measures such as sealing the terminals with moisture-proof resin have been taken to prevent an increase in leakage current at high humidity. It was. Further, Patent Document 1 below discloses a method for reducing leakage current by using both terminals of the clamp capacitor connection terminal as non-connection terminals.

  In addition, it is possible to correct shading caused by leaks by blackening correction processing that is used as a correction method for image quality degradation such as dark current noise generated in the image sensor and pixel defects due to minute scratches unique to the image sensor. It is. In other words, by using the captured image data that has been stored with the image sensor exposed and the black image data that has been read after the charge storage has been performed in the same manner as in the actual shooting without exposing the image sensor. The fixed pattern noise generated by the leak can be corrected.

JP 2000-151898 A

  However, the method of resin-sealing the clamp capacitor connection terminal leads to an increase in assembly man-hours. In addition, once the resin is sealed, it is difficult to disassemble, and there is a high possibility that parts will be damaged during repair and maintenance, and parts may need to be replaced.

  In addition, in the method in which both ends of the clamp capacitor connection terminal are not connected, the pitch between the terminal leads has been narrowed due to the downsizing of the package and the increase in the number of terminals in recent years. It has become difficult to reduce this.

  In addition, in the method of shooting in the non-exposure state after performing the main shooting and correcting the fixed pattern noise including the shading by the arithmetic processing using the image data obtained by the shooting, the shooting interval is set during continuous shooting. Will become bigger. That is, since black images are taken, the shooting interval of the M-th frame and the (M + 1) -th frame is increased by the black image shooting time during continuous shooting regardless of the occurrence of leaks. There was a problem that usability deteriorated.

  The present invention has been made in view of such circumstances, and an object of the present invention is to prevent image quality deterioration due to leakage and obtain a good image.

An image pickup apparatus according to the present invention includes an image pickup device that converts an optical image of a subject into an electrical signal and outputs a pixel output signal, and outputs a black pixel that is optically shielded by the image pickup device. A clamp means for clamping the optical black level of the image pickup device with reference to the above, and a DC signal different from the pixel output signal to the clamp means during a period when the image pickup operation using the image pickup device is not performed. A signal supply means to be supplied; a leak detection means for detecting a leak amount generated in the clamp capacitor when the DC signal is supplied by the signal supply means; and a period during which an imaging operation using the image sensor is performed And a correction processing means for correcting image data obtained from the pixel output signal based on the leak amount detected by the leak detection means. It is characterized in.
In the imaging method according to the present invention, the imaging element is optically shielded during a period in which an imaging operation using an imaging element that converts an optical image of a subject into an electrical signal and outputs a pixel output signal is not performed. By supplying a direct current signal different from the pixel output signal to the clamping means for clamping the optical black level of the image pickup device with a clamping capacitor based on the output of the black pixel, the amount of leakage generated in the clamping capacitor is reduced. A leak detection step for detecting, a photoelectric conversion step for converting an optical image of a subject into an electrical signal in a period during which an imaging operation using the image sensor is performed, and an image obtained from the pixel output signal after the photoelectric conversion And a correction processing step of correcting the data based on the leak amount detected in the leak detection step.

  According to the present invention, a DC signal can be supplied to the clamping means, and the leak amount is accurately detected without reading the pixel output signal by detecting the leak amount when the DC signal is supplied. be able to. By correcting the image data obtained from the pixel output signal based on the detected leak amount, it is possible to prevent image quality deterioration due to the leak and obtain a good image free from image noise caused by the leak.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 is a block diagram illustrating a configuration example of a feedback clamp type imaging apparatus according to the first embodiment of the present invention. FIG. 1 illustrates a characteristic configuration of the imaging apparatus according to the first embodiment. The overall configuration of the imaging device will be described later.

  In FIG. 1, reference numeral 1A denotes a solid-state image sensor such as a CMOS image sensor or a CCD image sensor, which converts an optical image of a subject into an electrical signal. A pixel output signal output from the solid-state imaging device 1A is input to the analog front-end processing (AFE) IC 2A. In the AFEIC 2A, a pixel output signal input via the input terminal 21 is input to a circuit 22 called a CDS (correlated double sampling) circuit, and reset noise and the like are removed. The output of the CDS circuit 22 is supplied to the input changeover switch 23.

  The input selector switch 23 has one input terminal connected to the output terminal of the CDS circuit 22 and the other input terminal connected to the reference voltage (AVREF) 24 inside the AFEIC 2A. The input selector switch 23 is controlled by a switching signal ISEL input to the switching signal input terminal 25. The input selector switch 23 has an output terminal connected to an input terminal of the offset addition circuit 26. The input selector switch 23 constitutes a signal supply means in the present invention, and the reference voltage (AVREF) corresponds to a DC signal in the present invention.

  In the present embodiment, it is assumed that the output of the CDS circuit 22 is connected to the offset addition circuit 26 via the input changeover switch 23 when the switching signal ISEL is at a high level (“H”). Further, it is assumed that the reference voltage (AVREF) 24 is connected to the offset addition circuit 26 via the input changeover switch 23 when the switching signal ISEL is at the low level (“L”).

  When the pixel output is read (the signal ISEL is “H”), the output of the CDS circuit 22 is input to the offset addition circuit 26 via the input changeover switch 23 and a predetermined offset voltage is added, and the offset addition output is variable amplifier ( PGA) 27. When the leak amount is detected (the signal ISEL is “L”), the reference voltage (AVREF) 24 inside the AFEIC 2A is input to the offset addition circuit 26 via the input changeover switch 23. The leak detection operation in this embodiment will be described later.

  The variable amplifier 27 is a gain variable means for correcting the output sensitivity variation of the solid-state imaging device 1A and switching the sensitivity setting of the imaging device. Hereinafter, the clamping operation in the imaging device will be described simply and clearly. Therefore, it is assumed that the gain is simply handled as 1.

  An output from the variable amplifier 27 is input to an N-bit ADC (analog-digital converter) 28 and converted into an N-bit digital signal. The converted digital signal is output from the output terminal 29 as an output signal of the AFEIC 2A, and is fed back to clamp the black level.

  The fed back digital signal is input to the error calculation unit 30. The error calculation unit 30 detects the difference between the OB level included in the input digital signal and the target value of the OB level, and outputs a correction value corresponding to the detected difference. This correction value is input to a current DAC (digital-analog converter) 31A and converted into an analog current value.

  An OB clamp pulse OBP synchronized with the readout timing of the OB pixel is input to the error calculation unit 30 and the current DAC 31A from the OBP input terminal 32 of the AFEIC 2A. During the period when the OB clamp pulse OBP is “H”, OB level extraction, error calculation, and driving of the current DAC 31A are performed.

  The output of the current DAC 31A is inputted to the clamp level holding capacitor 3 connected to the clamp capacitor connection terminal 33 of the AFEIC 2A, and the capacitor 3 is charged and discharged with the output current. As a result, the extracted OB correction level is charged / discharged at a predetermined time constant determined by the current value and the clamping capacitor 3, and the output is supplied to the offset addition circuit 26 as a subtraction value via the buffer circuit 34. Input and subtracted. As a result, the OB output is clamped to a predetermined level and output.

  Here, the feedback loop gain amount is proportional to the offset clamp period corresponding to the current amount of the current DAC 31 </ b> A and the charging time of the capacitor 3, and is given in an inversely proportional relationship to the capacitance of the capacitor 3. The feedback loop gain amount is an offset correction amount with respect to a unit error amount corrected in one offset clamp operation.

  That is, the offset correction amount corrected by one offset clamp operation increases as the current DAC 31A current amount increases and the offset clamp period increases. On the other hand, the offset correction amount corrected by one offset clamp operation decreases as the capacitance of the capacitor 3 increases.

Next, a leak detection operation and a leak correction amount calculation method in this embodiment will be described.
FIGS. 2A and 2B are diagrams for explaining a leak detection operation in the present embodiment. 2A and 2B show waveforms of the OB clamp pulse OBP and the clamp voltage when the reference voltage (AVREF) 24 in the AFEIC 2A is connected to the offset addition circuit 26 via the input changeover switch 23. ing.

  FIG. 2A is a waveform diagram when no leakage occurs at the clamp capacitor connection terminal 33. As described above, during the period when the OB clamp pulse OBP is “H”, the OB clamp operation is executed, and the error calculation unit 30 calculates the error and drives the current DAC 31A. That is, the error calculation unit 30 calculates an error, an analog current corresponding to the error is output from the current DAC 31A, and the clamp capacitor 3 is set to a voltage Vt at which the output of the ADC 28 becomes a predetermined target value OBt at the OB level. Charge and discharge. Here, the voltage Vt is given by the following equation (1), where K is the sensitivity of the ADC 28 (digital output value per unit input voltage).

  After the clamp operation is completed, the input signal is constant at the reference voltage (AVREF). Therefore, for example, as shown in FIG. 2A, the clamp voltage remains at the voltage Vt even after time t1 and t2 have elapsed. . That is, when no leak occurs at the clamp capacitor connection terminal 33, the clamp voltage does not vary even after a predetermined time has elapsed, and remains at the voltage Vt.

  FIG. 2B is a waveform diagram when a leak occurs in the clamp capacitor connection terminal 33. As described above, during the period when the OB clamp pulse OBP is “H”, the OB clamp operation is executed, and the error calculation unit 30 calculates the error and drives the current DAC 31A. That is, the capacitor 3 for clamping is charged / discharged by the current DAC 31A to the voltage Vt at which the output of the ADC 28 becomes a predetermined target value OBt.

  After the clamp operation, if a leak occurs at the clamp capacitor connection terminal 33, the clamp voltage cannot be held, and the clamp voltage varies from the voltage Vt as shown in FIG. End up.

  The voltage fluctuation amount ΔV1 after the elapse of time t1 is expressed by the following equation (2), where C is the capacitance of the clamping capacitor 3, Vleak is the leak voltage, and Rleak is the leak resistance. Here, the leak voltage Vleak is a voltage at the leak destination of the clamp capacitor connection terminal 33, and the leak resistance Rleak is a resistance value to the leak destination voltage Vleak.

  Similarly, the voltage fluctuation amount ΔV2 after the elapse of time 2t1 is expressed by the following formula (3).

  The output value of the ADC 28 becomes a value that fluctuates int (ΔV1 × K) with respect to the target value OBt after a lapse of time t1 from the end of the clamping operation, and int (ΔV2 × with respect to the target value OBt after the lapse of time 2t1. K) It becomes a fluctuating value. Here, K is the sensitivity of ADC 28 (digital output value per unit input voltage), and int (x) is an integer value obtained by rounding off the value “x”.

  Next, a method for obtaining the leakage voltage Vleak and leakage resistance Rleak of the clamp capacitor connection terminal 33 based on the output of the ADC 28 when the reference voltage (AVREF) is connected will be described.

  When the reference voltage (AVREF) is connected, the leakage voltage Vleak and the leakage resistance Rleak can be obtained from the output values of the ADC 28 at two or more points after a predetermined period of time has elapsed after the clamping operation is completed. For example, the leak voltage Vleak and the leak resistance Rleak of the clamp capacitor connection terminal 33 can be easily obtained by using the output values of the ADC 28 at two points after the time t1 and the time 2t1.

  The OB clamp operation is performed in a state where the reference voltage (AVREF) is connected to the input of the clamp circuit (the input of the offset addition circuit 26), and the output value of the ADC 28 after the elapse of time t1 after the operation ends is OB1, and the time 2t1 Assume that the output value of the ADC 28 after the lapse is OB2. In this case, the clamp voltage variation ΔV1 after the elapse of time t1 is approximately expressed by the following equation (4), and the clamp voltage variation ΔV2 after the elapse of time 2t1 is approximately expressed by the following equation (5).

  Based on these relational expressions (4) and (5) and the above-described expressions (2) and (3), the leakage resistance Rleak and the leakage voltage Vleak can be obtained by the following expressions (6) and (7).

  Next, a correction processing method for image output using the leakage resistance Rleak and the leakage voltage Vleak obtained as described above in the photographing operation of the imaging apparatus according to the present embodiment will be described.

FIG. 3 is a diagram illustrating a configuration example of the entire imaging apparatus according to the present embodiment, and illustrates a configuration of an electronic still camera as an example.
In FIG. 3, reference numeral 1 denotes a solid-state imaging device for receiving a subject image via a photographing lens 13 and photoelectrically converting the subject image, 2 is an analog front-end processing (AFE) IC, and 3 is connected to an AFEIC 2. It is a capacitor for clamping. Here, the solid-state imaging device 1, the AFEIC 2, and the clamping capacitor 3 correspond to the solid-state imaging device 1A, the AFEIC 2A, and the clamping capacitor 3 shown in FIG.

  Reference numeral 4 denotes a buffer memory for temporarily storing image data and correction data. Reference numeral 5 denotes an image processing circuit for generating a predetermined image signal using the image data and correction data stored in the buffer memory 4. . 6 is a recording circuit for recording the image signal generated by the image processing circuit 5 on a recording medium, 7 is a recording medium (for example, a memory card) on which the image signal is recorded, and 8 is a photographing lens 13 at the in-focus position. It is a drive circuit for driving. Reference numeral 9 denotes a control circuit for controlling each circuit in the imaging apparatus such as the AFEIC 2, the image processing circuit 5, and the recording circuit 6.

  Further, 10 is an AF circuit for automatically detecting the focus, 11 is an AE circuit for determining the exposure of the photographed image, and 12 is a release switch for instructing execution of the photographing operation.

  Next, the photographing operation by the imaging device in the first embodiment will be described. FIG. 4 is a flowchart showing the photographing operation according to the first embodiment.

  When starting the operation of the imaging apparatus, in step S1, when a power switch (not shown) is operated and the power is turned on to start up the imaging apparatus, in step S2, a battery check or a lens is attached to the imaging apparatus. An initial operation such as confirmation is performed.

  Next, when the first stroke switch (SW1) in the release switch 12 is turned on in step S3, a first stroke signal corresponding to the operation is output. In step S4, the control circuit 9 causes the AE circuit 11 to output. To work. The AE circuit 11 performs a photometric operation to obtain an exposure value. Next, in step S5, the control circuit 9 causes the AE circuit 10 to perform a distance measurement operation.

  Subsequently, in step S6, a leak amount detection operation is executed. In the leak amount detection operation, the control circuit 9 executes the clamp operation by switching the input of the clamp circuit in the AFEIC 2 to the reference power supply (AVREF) by the control signal. The control circuit 9 acquires the output value of the ADC 28 after the elapse of time t1 and t2 after execution of the clamping operation, and calculates the leakage resistance Rleak and the leakage voltage Vleak. The calculation method of the leakage resistance Rleak and the leakage voltage Vleak is as described above.

  Next, in step S7, the control circuit 9 generates correction data using the leakage resistance Rleak and leakage voltage Vleak calculated in step S6, and expands them in the buffer memory 4.

Here, the correction data generation operation will be described.
FIG. 5 is a diagram showing the waveforms of the OB clamp pulse OBP and the clamp voltage at the time of pixel output reading when a leak occurs. That is, an operation waveform in the state where the output of the CDS circuit 22 is connected to the offset addition circuit 26 via the input changeover switch 23 in the AFEIC 2 is shown.

  At the time of pixel output readout, first, a vertical OB clamping operation is performed so that an output value related to a vertical OB portion that is a light shielding area in the vertical direction in the solid-state imaging device 1 becomes a predetermined target value OBt. Here, in the vertical OB clamp operation, the clamp capacitor 3 is charged up to the clamp voltage Vs at which the OB output becomes the target value OBt.

  In the vertical OB clamp operation, a feedback loop gain Fvob sufficient to charge the clamp capacitor 3 to the clamp voltage Vs is set. That is, a sufficient length is secured for the vertical OB clamp period tvob.

  Next, when reading out effective pixel rows in the solid-state image sensor 1, horizontal light-shielding areas arranged for each row of the image sensor 1 in order to eliminate minute variations such as dark current unevenness in each row. The horizontal OB clamping operation for each row is performed using the horizontal OB portion. Here, the horizontal OB clamping period is “thob”, and offset correction is performed with the feedback loop gain Fhob.

  Next, a change in clamp voltage when a leak occurs in the leak resistance Rleak and the leak voltage Vleak during the pixel output read operation will be described.

  First, the clamp capacitor 3 is charged up to the clamp voltage Vs by the vertical OB clamp operation in which a sufficiently large feedback loop gain Fvob is set. Subsequently, pixel output reading of the 0th row including the effective pixel portion is started. At this time, the fluctuation amount ΔV (0) of the clamp voltage after reading out one row is obtained by the following equation (8). Here, 1H corresponds to a period required for reading one row excluding the horizontal OB clamp period as shown in FIG.

  Vs is an offset clamp voltage for the OB output to be the target value OBt. When calculating equation (8), a value obtained from the design value of the OB output in advance is stored in a storage means (not shown), and the value may be used for calculation. In practice, the output level of the OB unit varies depending on the temperature or the like, but for this, Vs may be converted using temperature information from a thermometer (not shown) and used in the calculation. . Thereby, correction with higher accuracy is possible.

  When the pixel output reading of the effective pixel portion in the 0th row is completed, the clamping operation is performed again using the horizontal OB portion in the 1st row. Since an error of ΔV (0) occurs due to the leak, the clamp voltage after execution of the horizontal OB clamp operation in the first row is obtained by multiplying the error amount ΔV (0) by the feedback loop gain Fhob (ΔV (0 ) × Fhob) approaches the target voltage. Therefore, the clamp voltage fluctuation amount ΔV (1) after the pixel output readout of the first row is finished is expressed by the following equation (9).

  Similarly, the amount of variation ΔV (N) in the clamp voltage after the completion of the pixel output readout on the Nth row is expressed by the following equation (10).

  That is, at the end of reading for each row, an offset occurs with respect to the target value of the clamp level by the error voltage ΔV (N) at the clamped optical black level, and as a result, shading occurs in the vertical direction. In other words, if the offset amount corresponding to the error voltage at the end of reading is subtracted from the output image for each row, it is possible to approximately correct the clamp voltage fluctuation for each row, that is, the shading in the vertical direction, caused by the leak. . Here, the offset amount ΔVSHD (N) corresponding to the error voltage at the end of reading for each row is obtained by the following equation (11), where the sensitivity of the ADC 28 is K.

  ΔVSHD (N) given by this equation (11) is one-dimensional correction data in the vertical direction. The obtained one-dimensional correction data ΔVSHD (N) is developed in the buffer memory. At this time, for example, the one-dimensional correction data is repeatedly developed in the horizontal direction by the same number of columns as the actual image. That is, the correction data is developed as image data in which the one-dimensional correction data ΔVSHD (N) is arranged in the horizontal direction.

  Returning to FIG. 4, after the correction data is generated and expanded in the buffer memory 4 as described above, the process proceeds to step S8. In step S8, when the first stroke switch (SW1) is maintained in the ON state, the second stroke switch (SW2) in the release switch 12 is turned on while the control circuit 9 holds the focus position and exposure value data. The standby state is entered, and the process proceeds to step S9. On the other hand, when the first stroke switch (SW1) is in the OFF state, the process proceeds to step S3.

  When the second stroke switch (SW2) is turned on in step S9, a photographing operation is performed in step S10. Specifically, when the second stroke switch (SW2) is turned on, the control circuit 9 outputs a control signal to open and close a shutter mechanism (not shown). Thereby, the subject is exposed in the image sensor 1, and the subject image is photoelectrically converted. The photoelectrically converted subject image is output from the image sensor 1 as a pixel output signal, converted into digital data (photographing data) by the AFEIC 2, and then temporarily stored in the buffer memory 4.

  In step S11, based on the control by the control circuit 9, the image processing circuit 5 subtracts the correction data from the shooting data stored in the buffer memory 4 to generate leak-corrected image data. Convert. The control circuit 9 records the converted image data on the recording medium 7 using the recording circuit 6 and ends the operation.

  According to the first embodiment of the present invention, the amount of leakage generated at the clamp capacitor connection terminal 33 is detected using the reference power supply (AVREF) inside the AFEIC 2 without reading out the pixel output signal from the image sensor 1. It becomes possible. This makes it possible to accurately detect the amount of leak that has occurred. Further, correction data is generated based on the detected leak amount, and correction of vertical shading caused by the leak is performed by executing correction of shooting data obtained from the pixel output signal using the generated correction data. Is possible. Therefore, it is possible to prevent image quality deterioration due to leakage and obtain a good image free from image noise caused by leakage without taking measures against leakage such as resin sealing that deteriorates assembly workability.

  In the first embodiment described above, the leak amount detection operation is performed after the first stroke switch (SW1) in the release switch 12 is pressed. However, the present invention is not limited to this. For example, correction data may be generated and developed by detecting the leak amount when the imaging apparatus is powered on. Further, for example, a leak amount detection period may be set within the charge accumulation time for the image sensor at the time of photographing, and the leak amount detection operation may be performed within the charge accumulation period for each photographing.

(Second Embodiment)
Next, a second embodiment will be described.
The second embodiment of the present invention described below is different from the first embodiment in that a solid-state imaging device (for example, a CMOS image sensor) has means for switching between a pixel output and a reference voltage output.

  FIGS. 6A and 6B are block diagrams illustrating a configuration example of the second embodiment. In FIGS. 6A and 6B, blocks having the same functions as those in the first embodiment shown in FIG. FIG. 6A is a block diagram illustrating a configuration example of a feedback clamp type imaging apparatus according to the second embodiment, and FIG. 6B is an internal configuration of a solid-state imaging element of the imaging apparatus according to the second embodiment. FIG. 6A and 6B, the characteristic configuration of the imaging apparatus according to the second embodiment is illustrated as in the first embodiment. In addition, the overall configuration of the imaging apparatus according to the second embodiment is the same as that of the first embodiment.

  In FIG. 6A, reference numeral 1B denotes a solid-state image sensor such as a CMOS image sensor. A pixel output signal output from the solid-state image sensor 1B is input to an analog front-end processing (AFE) IC 2B. A detailed configuration of the solid-state imaging device 1B will be described later.

  In the AFEIC 2B, a pixel output signal input via the input terminal 21 is input to the CDS circuit 22 to remove reset noise and the like, and then input to the offset addition circuit 26 to add a predetermined offset voltage. The offset addition output is input to the variable amplifier 27. The output from the variable amplifier 27 is input to the ADC 28 and converted into an N-bit digital signal. The converted digital signal is output from the output terminal 29 as an output signal of the AFEIC 2B and clamps the black level. Provide feedback.

  The fed back digital signal is input to the error calculation unit 30 to detect a difference between the OB level and the target value of the OB level included in the digital signal, and a correction value corresponding to the detected difference is output. . This correction value is input to the current DAC 31A and converted into an analog current value. Here, the OB clamp pulse OBP is input from the OBP input terminal 32 of the AFEIC 2B to the error calculation unit 30 and the current DAC 31A, and the OB level extraction and error calculation are performed during the period when the OB clamp pulse OBP is “H”. Then, the current DAC 31A is driven.

  The output of the current DAC 31A is input to the clamp capacitor 3 connected to the clamp capacitor terminal 33 of the AFEIC 2B. By charging / discharging the capacitor 3 with the output current of the current DAC 31A, the extracted OB correction level is charged / discharged with a current value and a time constant determined by the capacitor 3, and the output is subtracted via the buffer circuit 34. Is input to the offset adding circuit 26 and subtracted. As a result, the OB output is clamped to a predetermined level and output.

Next, a leak detection operation and a leak amount detection method in the second embodiment will be described.
As shown in FIG. 6B, in the solid-state imaging device 1B according to the second embodiment, the pixel unit 41 includes a photoelectric conversion unit that converts an optical image into an electric signal, a pixel amplifier, and the like, and includes, for example, a MOS transistor. . This pixel group is selected and driven by a vertical scanning circuit 42 and a horizontal scanning circuit 43 that can be randomly accessed. The charge accumulated in the pixel unit 41 is subjected to charge-voltage conversion by the pixel amplifier, and then input to the noise removal circuit 45 through the vertical signal line 44 to remove the noise of the pixel amplifier and output to the horizontal signal line 46. The

  The horizontal signal line 46 is connected to one input end of the output changeover switch 47, and the reference power supply (SVREF) 48 inside the solid-state imaging device 1 B is connected to the other input end of the output changeover switch 47. The output changeover switch 47 is controlled by a changeover signal OSEL input to the output changeover signal input terminal 49. An output end of the output changeover switch 47 is connected to an input end of the output circuit 50. The output changeover switch 47 constitutes the signal supply means in the present invention, and the reference power supply (SVREF) corresponds to the DC signal in the present invention.

  In the present embodiment, it is assumed that the horizontal signal line 46 is connected to the output circuit 50 via the output changeover switch 47 when the changeover signal OSEL is “L”. Therefore, when the switching signal OSEL is “L”, the output signal from the pixel unit 41 sequentially read out by the horizontal scanning circuit 43 applies a predetermined gain via the horizontal signal line 46 and the output circuit 50, and then The signals are sequentially output from the output terminal 51.

  Further, it is assumed that the reference power supply (SVREF) 48 is connected to the output circuit 50 via the output changeover switch 47 when the changeover signal OSEL is “H”. Therefore, when the switching signal OSEL is “H”, the reference power supply (SVREF) of the solid-state imaging device 1 is sequentially output from the output terminal 51 after applying a predetermined gain via the output circuit 50.

  During the leak amount detection operation, the reference power source (SVREF) 48 inside the image sensor 1 is connected to the output circuit 50 via the output changeover switch 47, and the reference power source (SVREF) 48 is connected to the output circuit 50 in the OB state. Execute the clamping operation. The control circuit 9 of the imaging apparatus calculates the leakage voltage Vleak and the leakage resistance Rleak based on the amount of fluctuation of the clamping voltage after the time t1 and t2 have elapsed after the end of the OB clamping operation. Then, the control circuit 9 generates correction data for the pixel output by the calculated leak voltage Vleak and the leak resistance Rleak, and corrects the shooting data by using the correction data at the time of shooting to generate image data after leak correction. . Since each of the leak amount detection method, the correction data generation method, and the correction processing operation in the second embodiment is basically the same as that of the first embodiment, detailed description thereof will be omitted.

  As described above, during the leak amount detection operation, the reference power source (SVREF) inside the image sensor 1B is input to the output circuit, and the reference power source in the image sensor 1B can be output as the output of the image sensor 1B. The same effect as that of the first embodiment can be obtained. That is, it becomes possible to correct the shading caused by the leak, and it is possible to prevent the image quality from being deteriorated due to the leak and obtain a good image without taking a leak countermeasure such as resin sealing which deteriorates the assembly workability.

(Third embodiment)
Next, a third embodiment will be described.
In the third embodiment of the present invention, an external switching circuit (switch circuit) is used as means for switching an input signal to the analog front-end processing (AFE) IC when a leak amount is detected. It is different from the embodiment.

  FIG. 7 is a block diagram illustrating a configuration example of a feedback clamp type imaging apparatus according to the third embodiment, and illustrates a characteristic configuration of the imaging apparatus according to the third embodiment. In FIG. 7, blocks having the same functions as those shown in FIGS. 1, 6, and the like are denoted by the same reference numerals, and redundant description is omitted.

  In FIG. 7, reference numeral 61 denotes a switch circuit that switches connection to the input terminal 21 of the AFEIC 2B. The switch circuit 61 has one input terminal connected to the output terminal of the solid-state imaging device 1 </ b> A and the other input terminal connected to an external reference power supply (VREF) 62. The switch circuit 61 is controlled by a control signal SEL from a control circuit (not shown). The output terminal of the switch circuit 61 is connected to the input terminal 21 of the AFEIC 2B. The switch circuit 61 constitutes a signal supply means in the present invention, and the reference power supply (VREF) corresponds to a DC signal in the present invention.

  In the present embodiment, when the control signal SEL is “H”, the output of the solid-state imaging device 1A is connected to the input terminal 21 of the AFEIC 2B via the switch circuit 61. When the control signal SEL is “L”, the external reference power supply (VREF) is connected to the input terminal 21 of the AFEIC 2B via the switch circuit 61.

  That is, when the leak amount is detected, the control signal SEL is controlled to “L”, and the leak amount is calculated in a state where the external reference power supply (VREF) 62 is connected to the AFEIC 2B via the switch circuit 61. Further, at the time of pixel output readout, the control signal SEL is controlled to “H”, and the solid-state imaging device 1 is connected to the AFEIC 2B via the switch circuit 61.

  The OB clamp operation is executed when the external reference power supply (VREF) 62 is connected to the AFEIC 2B. After the OB clamp operation is finished, the leakage voltage Vleak and the leak voltage Vleak The leak resistance Rleak is calculated. Then, correction data for the pixel output is generated by the calculated leak voltage Vleak and the leak resistance Rleak, and at the time of shooting, the correction data is used to correct the shooting data to generate leak corrected image data. Since each of the leak amount detection method, the correction data generation method, and the correction processing operation in the third embodiment is basically the same as that of the first embodiment, detailed description thereof is omitted.

  As described above, the switch circuit 61 that can switch the input to the AFEIC 2B to the reference power source (VREF) or the output of the image sensor 1A is provided outside the image sensor 1A and the AFEIC 2B, and the reference power source (VREF) is supplied to the AFEIC 2B during the leak amount detection operation. Supply. As a result, the same effects as those of the first and second embodiments described above can be obtained, and it is possible to prevent image quality deterioration due to leakage without taking measures against leakage such as resin sealing that deteriorates assembly workability. Can be obtained. In addition, by providing the switch circuit 61 outside the image sensor and the AFEIC, the image sensor and the AFEIC are configured with the conventional image sensor and AFEIC that do not have the means for detecting the leak amount as shown in the first and second embodiments. Even in the imaging apparatus, it is possible to easily detect the leak amount.

(Fourth embodiment)
Next, a fourth embodiment will be described.
FIG. 8 is a block diagram illustrating a configuration example of a feedback clamp type imaging apparatus according to the fourth embodiment of the present invention, and FIG. 9 is a flowchart illustrating a photographing operation by the imaging apparatus according to the fourth embodiment.

  FIG. 8 shows a characteristic configuration of the imaging apparatus according to the fourth embodiment. In FIG. 8, blocks having the same functions as those shown in FIG. In addition, overlapping explanation is omitted. The overall configuration of the imaging apparatus according to the fourth embodiment is the same as that of the first embodiment.

  The imaging apparatus according to the fourth embodiment is different from the first embodiment in that a current DAC 31B capable of switching the current amount is provided in the analog front end processing (AFE) IC 2C instead of the current DAC 31A.

  In the imaging device according to the fourth embodiment, the current DAC 31B for charging the clamp capacitor 3 during the OB clamp operation can switch the current amount according to the input signal IDAC_SEL from the current amount switching signal input terminal 71. For example, when the input signal IDAC_SEL is “L”, the OB clamping operation is executed with the normal current value Idac, and when the input signal IDAC_SEL is “H”, the current amount 4Idac is four times the normal current value. The OB clamping operation is executed at

  In other words, the imaging apparatus according to the fourth embodiment can select a feedback loop gain amount during the OB clamping operation as a normal value or a value four times that during normal operation according to the input signal IDAC_SEL. . As a result, when a leak of a predetermined amount or more is detected in the leak detection operation, the offset that can be corrected by one clamping operation by switching the current amount of the current DAC 31B in a direction to increase the feedback loop gain larger than normal. The amount can be increased. As a result, it is possible to reduce the fluctuation amount of the clamp voltage caused by the leak and reduce the shading amount due to the leak.

With reference to FIG. 9, a photographing operation in the fourth embodiment will be described.
In the flowchart shown in FIG. 9, the processes in steps S101 to S106 and steps S109 to S112 are the same as the processes in steps S1 to S6 and steps S8 to S11 shown in FIG. To do.

  In step S107, the control circuit 9 determines whether or not the leak amount detected in step S106 is an allowable level. Whether or not the leak amount is within an allowable range is determined by whether or not the difference between the OB clamp level of the first row and the OB clamp level of the last row at the time of pixel output reading is within a predetermined amount. It ’s fine. For example, when the difference in the OB clamp level between the first row and the last row is within 10 LSB, the control circuit 9 may determine that the leak amount is at an allowable level. Here, the difference in the OB clamp level between the first row and the last row can be calculated from the leak resistance Rleak and the leak voltage Vleak detected in step S106.

As a result of the determination in step S107, if the control circuit 9 determines that the leak is outside the allowable level (greater than or equal to the allowable value), in step S108, the control circuit 9 controls the input signal IDAC_SEL to “H” and sets the current DAC 31B. The output current amount is switched to 4 times the normal current value. That is, when it is determined that the leak amount exceeds the allowable level, the control circuit 9 selects a value that is four times the normal value of the feedback loop gain amount during the OB clamp operation. As a result, it is possible to reduce the fluctuation amount of the clamp voltage caused by the leak. Then, the process proceeds to step S109.
On the other hand, as a result of the determination in step S107, if it is determined that the leak is within the allowable level, the current amount of the current DAC 31B is kept at the normal setting, and the process proceeds to step S109.

  Although not shown, when the process proceeds to step S109, the control circuit 9 generates correction data based on the leak resistance Rleak and the leak voltage Vleak detected in step S106 and develops them in the buffer memory 4.

  According to the fourth embodiment, the same effects as those of the first embodiment described above can be obtained. Further, when the leak amount occurring at the clamp capacitor connection terminal 33 is detected and it is determined that a leak exceeding the allowable value (level) has occurred, the feedback loop gain during the OB clamp operation is increased. To switch the amount of current DAC31B. Thereby, fluctuations in the clamp voltage due to leakage can be reduced, and a good image can be obtained.

  Further, when it is determined that no leak occurs or is within the allowable value, the OB clamp operation can be executed with the normal feedback loop gain, and the operating current can be reduced. In this case, since there is no need to increase the feedback loop gain, the occurrence of a clamp error due to the influence of random noise or the like which is a concern by increasing the feedback loop gain can be suppressed at normal times.

  In the above description, the feedback loop gain amount after the change when the leak amount is determined to be greater than or equal to the allowable value is set to four times the normal value, but is not limited to this, and is not limited to this. The feedback loop gain amount is arbitrary as long as it is larger than one time.

(Fifth embodiment)
Next, a fifth embodiment will be described.
Since the configuration of the imaging apparatus according to the fifth embodiment of the present invention is the same as that of the imaging apparatus according to the first embodiment shown in FIGS. 1 and 3, the description of the configuration is omitted and only the operation will be described.

  FIG. 10 is a flowchart illustrating a shooting operation performed by the imaging apparatus according to the fifth embodiment. In the flowchart shown in FIG. 10, the processes in steps S201 to S208 are the same as the processes in steps S1 to S9 shown in FIG. In the leakage amount detection operation in step S206, the control circuit 9 detects the leakage resistance Rleak and the leakage voltage Vleak, generates correction data based on the detected leakage resistance Rleak and leakage voltage Vleak, and generates the buffer memory 4 Expand to.

  When the second stroke switch (SW2) in the release switch 12 is turned on in step S208, a photographing operation for the main image is performed in step S209. Specifically, when the second stroke switch (SW2) is turned on, the control circuit 9 outputs a control signal to open and close a shutter mechanism (not shown). Thereby, the subject is exposed in the image sensor 1, and the subject image is photoelectrically converted. The photoelectrically converted subject image is output from the image sensor 1 as a pixel output signal, converted into digital data (photographing data) by the AFEIC 2, and then temporarily stored in the buffer memory 4.

  Next, in step S210, the control circuit 9 determines whether or not the leak amount is at an allowable level. Whether or not the leak amount is within the allowable range may be determined based on whether or not the difference in the OB clamp level between the first row and the last row at the time of pixel output reading is within a predetermined amount. For example, when the difference in the OB clamp level between the first row and the last row is within 10 LSB, the control circuit 9 may determine that the leak amount is at an allowable level. Here, the difference in the OB clamp level between the first row and the last row can be calculated from the leak resistance Rleak and the leak voltage Vleak detected in step S206.

  If it is determined in step S210 that the leak amount is within the allowable level, the image processing circuit 5 stored in the buffer memory 4 is stored in the buffer memory 4 based on the control by the control circuit 9 in step S213. Digital data at the time of image shooting is converted into predetermined image data. The control circuit 9 records the converted image data on the recording medium 7 using the recording circuit 6 and ends the operation.

  On the other hand, as a result of the determination in step S210, when it is determined that the leak amount is outside the allowable level (over the allowable value), the process proceeds to step S211 and the control circuit 9 performs the main operation with the shutter mechanism closed. Take a black image at the same time as the image. That is, when it is determined that the leak amount is outside the allowable level, the control circuit 9 performs a black image photographing operation with the solid-state imaging device 1 in a non-exposed state. The black image data obtained by this black image shooting is converted into digital data by the AFEIC 2 and then temporarily stored in the buffer memory 4.

  Next, in step S212, based on the control by the control circuit 9, the image processing circuit 5 subtracts the digital data at the time of shooting the black image from the digital data at the time of shooting the main image stored in the buffer memory 4 to obtain a so-called black image. Pull correction processing is performed. Then, the digital data after the black correction is stored in the buffer memory 4. Next, in step S213, based on the control by the control circuit 9, the image processing circuit 5 converts the black-corrected digital data stored in the buffer memory 4 into predetermined image data. Recording on the recording medium 7 ends the operation.

  According to the fifth embodiment, the same effects as those of the first embodiment described above can be obtained. Furthermore, when it is determined that a leak exceeding the allowable value (level) has occurred, shading correction due to leak can be corrected by performing so-called blackening correction processing, and there is no image noise caused by the leak. Can be obtained. Also, if it is determined that there is no leak or is within an allowable level, blacking correction is not performed, so the shooting interval between the M-th frame and the (M + 1) -th frame during continuous shooting is black image shooting. It is possible to take a picture without stretching.

(Other embodiments of the present invention)
Software for realizing the functions of the embodiments for a device (CPU or MPU) in an apparatus or system connected to the various devices so as to operate various devices to realize the functions of the above-described embodiments. What was implemented by supplying the program and operating the various devices in accordance with the program stored in the computer of the system or apparatus is also included in the scope of the present invention.
In this case, the program itself realizes the functions of the above-described embodiments, and the program itself constitutes the present invention. Further, means for supplying the program to the computer, for example, a recording medium storing the program constitutes the present invention. As a recording medium for storing such a program, for example, a flexible disk, a hard disk, an optical disk, a magneto-optical disk, a CD-ROM, a magnetic tape, a nonvolatile memory card, a ROM, or the like can be used.
Further, by executing the program supplied by the computer, not only the functions of the above-described embodiments are realized, but the program is jointly operated with an OS (operating system) or other application software running on the computer. Needless to say, such a program is included in the embodiment of the present invention even when the functions of the above-described embodiment are realized.
Further, after the supplied program is stored in the memory provided in the function expansion board of the computer or the function expansion unit connected to the computer, the CPU or the like provided in the function expansion board or function expansion unit based on the instructions of the program Needless to say, the present invention includes a case where part or all of the actual processing is performed and the functions of the above-described embodiments are realized by the processing.

  It should be noted that the above-described embodiments are merely examples of implementation in carrying out the present invention, and the technical scope of the present invention should not be construed as being limited thereto. . That is, the present invention can be implemented in various forms without departing from the technical idea or the main features thereof.

It is a block diagram which shows the structural example of the imaging device in 1st Embodiment. It is a figure which shows the waveform of the OB clamp pulse at the time of leak detection operation | movement, and a clamp voltage. It is a block diagram which shows the structural example of the whole imaging device in this embodiment. 3 is a flowchart illustrating a shooting operation of the imaging apparatus according to the first embodiment. It is a figure which shows the waveform of the OB clamp pulse at the time of pixel output reading, and a clamp voltage. It is a block diagram which shows the structural example of the imaging device in 2nd Embodiment. It is a block diagram which shows the structural example of the imaging device in 3rd Embodiment. It is a block diagram which shows the structural example of the imaging device in 4th Embodiment. 10 is a flowchart illustrating a shooting operation of the imaging apparatus according to the fourth embodiment. 16 is a flowchart illustrating a shooting operation of the imaging apparatus according to the fifth embodiment.

Explanation of symbols

1A, 1B Solid-state image sensor 2A, 2B, 2C Analog front end processing IC
3 Capacitor for Clamp 4 Buffer Memory 5 Image Processing Circuit 9 Control Circuit 12 Release Switch 23 Input Switch 24 Reference Voltage 26 Offset Adder Circuit 28 ADC
30 Error calculator 31A, 31B Current DAC
47 Output switch 48 Reference power supply 61 Switch circuit 62 Reference power supply

Claims (11)

An image sensor that converts an optical image of a subject into an electrical signal and outputs a pixel output signal;
A clamping unit that includes a clamping capacitor and clamps an optical black level of the imaging device based on an output of a black pixel optically shielded by the imaging device;
A signal supply means for supplying a DC signal different from the pixel output signal to the clamp means in a period in which an imaging operation using the image sensor is not performed;
A leak detecting means for detecting a leak amount generated in the clamping capacitor when the DC signal is supplied by the signal supplying means;
Correction processing means for correcting image data obtained from the pixel output signal based on a leak amount detected by the leak detection means during a period in which an image pickup operation using the image pickup device is performed. An imaging device that is characterized. Correction data generation means for generating correction data based on the amount of leak detected by the leak detection means;
The imaging apparatus according to claim 1, wherein the correction processing unit corrects the image data using the correction data generated by the correction data generation unit.   The imaging apparatus according to claim 2, wherein the correction data is generated based on a fluctuation amount of the optical black level clamped at the end of reading of the pixel output signal for each row in the imaging element.   4. The imaging apparatus according to claim 2, wherein the correction data is one-dimensional correction data.   5. The one-dimensional correction data according to claim 4, wherein the one-dimensional correction data is one-dimensional data in a vertical direction obtained by a variation amount of the optical black level clamped at the end of reading out each row of the pixel output signal. Imaging device.   The image pickup apparatus according to claim 1, wherein the leak amount is detected by the leak detection unit within a charge accumulation period of the image pickup element.   The imaging apparatus according to claim 1, wherein the leak amount is detected by the leak detection unit when the imaging apparatus is powered on.   6. The imaging apparatus according to claim 1, wherein the leak amount is detected by the leak detection unit based on a first stroke signal of a release switch included in the imaging apparatus.   The said clamp means and the said signal supply means are comprised in the same integrated circuit, and the said DC signal is a reference voltage in the said integrated circuit, The any one of Claims 1-8 characterized by the above-mentioned. Imaging device.   The image pickup apparatus according to claim 1, wherein the signal supply unit is configured outside an integrated circuit that forms the image pickup element and the clamp unit. In a period in which an imaging operation using an imaging device that converts an optical image of a subject into an electrical signal and outputs a pixel output signal is not performed, the output of the black pixel that is optically shielded by the imaging device is used as a reference A leak detecting step of supplying a direct current signal different from the pixel output signal to the clamping means for clamping the optical black level of the image sensor using a clamping capacitor, and detecting a leakage amount generated in the clamping capacitor;
A photoelectric conversion step for converting an optical image of a subject into an electrical signal in a period in which an imaging operation using the imaging element is performed;
An image pickup method comprising: a correction processing step of correcting image data obtained from the pixel output signal after the photoelectric conversion based on a leak amount detected in the leak detection step.

Images