JP4853533B2 - Liquid crystal display element - Google Patents

Liquid crystal display element Download PDF

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JP4853533B2
JP4853533B2 JP2009052309A JP2009052309A JP4853533B2 JP 4853533 B2 JP4853533 B2 JP 4853533B2 JP 2009052309 A JP2009052309 A JP 2009052309A JP 2009052309 A JP2009052309 A JP 2009052309A JP 4853533 B2 JP4853533 B2 JP 4853533B2
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liquid crystal
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稔 山口
裕満 石井
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Casio Computer Co Ltd
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この発明は、垂直配向型の液晶表示素子に関する。   The present invention relates to a vertical alignment type liquid crystal display element.

垂直配向型の液晶表示素子は、間隙を存して対向する一対の基板の互いに対向する内面のうちの一方の基板の内面に、マトリックス状に配列された複数の画素電極と、前記複数の画素電極にそれぞれ対応させて設け、対応する画素電極に接続された複数の薄膜トランジスタと、前記薄膜トランジスタにゲート信号及びデータ信号を供給する複数の走査線及び信号線とを設け、他方の基板の内面に、前記複数の画素電極とそれぞれ対向する領域により複数の画素を形成する対向電極を設け、前記一対の基板の内面それぞれに垂直配向膜を設け、前記一対の基板間の間隙に、負の誘電異方性を有する液晶層を封入した構成となっている(特許文献1参照)。   The vertical alignment type liquid crystal display element includes a plurality of pixel electrodes arranged in a matrix on the inner surface of one of the opposing inner surfaces of a pair of substrates facing each other with a gap, and the plurality of pixels A plurality of thin film transistors provided corresponding to the electrodes and connected to the corresponding pixel electrodes, a plurality of scanning lines and signal lines for supplying gate signals and data signals to the thin film transistors, and an inner surface of the other substrate, A counter electrode for forming a plurality of pixels is provided by regions facing each of the plurality of pixel electrodes, a vertical alignment film is provided on each inner surface of the pair of substrates, and a negative dielectric anisotropy is formed in a gap between the pair of substrates. The liquid crystal layer having the property is enclosed (see Patent Document 1).

特許第2565639号公報Japanese Patent No. 2565639

前記垂直配向型の液晶表示素子は、複数の画素電極と対向電極とが互いに対向する領域からなる複数の画素毎に、前記電極間への電圧の印加により液晶分子を垂直配向状態から倒れ配向させて画像を表示するものであり、各画素の液晶分子は、前記電圧の印加により、前記電極面に向かって倒れ込むように配向する。   In the vertical alignment type liquid crystal display element, liquid crystal molecules are tilted from a vertical alignment state by applying a voltage between the electrodes for each of a plurality of pixels including regions where a plurality of pixel electrodes and a counter electrode face each other. The liquid crystal molecules of each pixel are aligned so as to fall down toward the electrode surface when the voltage is applied.

しかし、従来の垂直配向型液晶表示素子は、電圧の印加による液晶分子が倒れる方向が不安定であり、そのために、各画素の液晶分子の倒れ配向状態がばらついて、表示にざらつき感を生じる。   However, in the conventional vertical alignment type liquid crystal display element, the direction in which the liquid crystal molecules are tilted by application of a voltage is unstable. For this reason, the tilted alignment state of the liquid crystal molecules in each pixel varies, and the display is rough.

この発明は、各画素の液晶分子を電圧の印加により安定に倒れ配向させ、ざらつき感の無い良好な品質の画像を表示することができる垂直配向型の液晶表示素子を提供することを目的としたものである。   An object of the present invention is to provide a vertical alignment type liquid crystal display element capable of stably aligning and aligning liquid crystal molecules of each pixel by applying a voltage, and displaying a good quality image without a feeling of roughness. Is.

この発明の液晶表示素子は、誘電率異方性が負の液晶からなる液晶層を介して第1の基板と第2の基板とが対向するように配置され、
表示画素毎に画素電極が複数の電極部に区分され、前記表示画素毎に前記画素電極が薄膜トランジスタに接続されている液晶表示素子であって、
前記各電極部の中央に対応する位置に配置され、前記液晶層の厚さよりも低い高さに形成された凸部を有し、
前記凸部は、
前記薄膜トランジスタのゲートを覆うゲート絶縁膜と、
前記電極部よりも小さい形状で且つ下層から上層に向けて順に小さくなる形状になるように前記ゲート絶縁膜上に形成された複数の絶縁層と、
上下に隣接する前記絶縁層間に配置され、上層側に接する絶縁膜よりも大きい形状に形成された半導体膜または金属膜と、
を有していることを特徴とする。
また、この発明の液晶表示素子は、誘電率異方性が負の液晶からなる液晶層を介して第1の基板と第2の基板とが対向するように配置され、
前記液晶層の配向方向を区分けする複数の電極部を有した画素電極が表示画素毎に薄膜トランジスタに接続されるように形成されている液晶表示素子であって、
前記各電極部の中央に対応する位置に配置され、前記液晶層の厚さよりも低い高さに形成された凸部を有し、
前記凸部は、
前記薄膜トランジスタのゲートを覆うゲート絶縁膜と、
前記電極部よりも小さい形状で且つ下層から上層に向けて順に小さくなる形状になるように前記ゲート絶縁膜上に形成された複数の絶縁層と、
上下に隣接する前記絶縁層間に配置され、上層側に接する絶縁膜よりも大きい形状に形成された半導体膜または金属膜と、
を有していることを特徴とする。
また、この発明の液晶表示素子は、誘電率異方性が負の液晶からなる液晶層を介して第1の基板と第2の基板とが対向するように配置され、
前記液晶層の配向方向を区分けする複数のスリットが設けられた画素電極が表示画素毎に薄膜トランジスタに接続されるように形成されている液晶表示素子であって、
隣接する2つの前記スリット間の中央に対応する位置に配置され、前記液晶層の厚さよりも低い高さに形成された凸部を有し、
前記凸部は、
前記薄膜トランジスタのゲートを覆うゲート絶縁膜と、
前記画素電極よりも小さい形状で且つ下層から上層に向けて順に小さくなる形状になるように前記ゲート絶縁膜上に形成された複数の絶縁層と、
上下に隣接する前記絶縁層間に配置され、上層側に接する絶縁膜よりも大きい形状に形成された半導体膜または金属膜と、
を有していることを特徴とする。
また、この発明の液晶表示素子は、誘電率異方性が負の液晶からなる液晶層を介して第1の基板と第2の基板とが対向するように配置され、
表示画素毎に画素電極が薄膜トランジスタに接続され、
前記液晶層の配向方向を区分けする直線形状の凸部前記画素電極に対応する領域に前記表示画素毎に形成されている液晶表示素子であって、
前記凸部は、
前記薄膜トランジスタのゲートを覆うゲート絶縁膜と、
前記画素電極よりも小さい形状で且つ下層から上層に向けて順に小さくなる形状になるように前記ゲート絶縁膜上に形成された複数の絶縁層と、
上下に隣接する前記絶縁層間に配置され、上層側に接する絶縁膜よりも大きい形状に形成された半導体膜または金属膜と、を有し、
前記液晶層の厚さよりも低い高さに形成されていることを特徴とする。
The liquid crystal display element of the present invention is arranged so that the first substrate and the second substrate face each other through a liquid crystal layer made of a liquid crystal having a negative dielectric anisotropy,
A liquid crystal display element in which a pixel electrode is divided into a plurality of electrode portions for each display pixel, and the pixel electrode is connected to a thin film transistor for each display pixel ,
It is arranged at a position corresponding to the center of each electrode part, and has a convex part formed at a height lower than the thickness of the liquid crystal layer,
The convex portion is
A gate insulating film covering the gate of the thin film transistor;
A plurality of insulating layers formed on the gate insulating film so as to have a shape smaller than the electrode portion and gradually decreasing from the lower layer toward the upper layer;
A semiconductor film or a metal film, which is disposed between the insulating layers adjacent to each other above and below and formed in a shape larger than the insulating film in contact with the upper layer side;
It is characterized by having.
Further, the liquid crystal display element of the present invention is arranged so that the first substrate and the second substrate face each other through a liquid crystal layer made of a liquid crystal having a negative dielectric anisotropy,
A liquid crystal display element formed such that a pixel electrode having a plurality of electrode portions for dividing the alignment direction of the liquid crystal layer is connected to a thin film transistor for each display pixel,
It is arranged at a position corresponding to the center of each electrode part, and has a convex part formed at a height lower than the thickness of the liquid crystal layer,
The convex portion is
A gate insulating film covering the gate of the thin film transistor;
A plurality of insulating layers formed on the gate insulating film so as to have a shape smaller than the electrode portion and gradually decreasing from the lower layer toward the upper layer;
A semiconductor film or a metal film, which is disposed between the insulating layers adjacent to each other above and below and formed in a shape larger than the insulating film in contact with the upper layer side;
It is characterized by having.
Further, the liquid crystal display element of the present invention is arranged so that the first substrate and the second substrate face each other through a liquid crystal layer made of a liquid crystal having a negative dielectric anisotropy,
A liquid crystal display element formed such that a pixel electrode provided with a plurality of slits for dividing the alignment direction of the liquid crystal layer is connected to a thin film transistor for each display pixel,
It is disposed at a position corresponding to the center between two adjacent slits, and has a convex portion formed at a height lower than the thickness of the liquid crystal layer,
The convex portion is
A gate insulating film covering the gate of the thin film transistor;
A plurality of insulating layers formed on the gate insulating film so as to have a shape smaller than the pixel electrode and gradually decreasing from the lower layer toward the upper layer;
A semiconductor film or a metal film, which is disposed between the insulating layers adjacent to each other above and below and formed in a shape larger than the insulating film in contact with the upper layer side;
It is characterized by having.
Further, the liquid crystal display element of the present invention is arranged so that the first substrate and the second substrate face each other through a liquid crystal layer made of a liquid crystal having a negative dielectric anisotropy,
A pixel electrode is connected to the thin film transistor for each display pixel,
A liquid crystal display device in which the convex portion of the linear shape for dividing the orientation direction of the liquid crystal layer is formed on the display each pixel in a region corresponding to the pixel electrode,
The convex portion is
A gate insulating film covering the gate of the thin film transistor;
A plurality of insulating layers formed on the gate insulating film so as to have a shape smaller than the pixel electrode and gradually decreasing from the lower layer toward the upper layer;
A semiconductor film or a metal film that is disposed between the insulating layers adjacent to each other above and below and formed in a shape larger than the insulating film in contact with the upper layer side, and
The liquid crystal layer is formed at a height lower than the thickness of the liquid crystal layer.

この発明によれば、ざらつき感の無い良好な品質の画像を表示することができる。 According to the present invention , it is possible to display a good quality image without a rough feeling.

この発明の第1の実施例を示す液晶表示素子の一方の基板の一部分の平面図。1 is a plan view of a part of one substrate of a liquid crystal display device showing a first embodiment of the present invention; 第1の実施例の液晶表示素子の図1におけるII−II線に沿う拡大断面図。The expanded sectional view which follows the II-II line | wire in FIG. 1 of the liquid crystal display element of a 1st Example. 第1の実施例の液晶表示素子の図1におけるIII−III線に沿う拡大断面図。The expanded sectional view which follows the III-III line | wire in FIG. 1 of the liquid crystal display element of a 1st Example. 第1の実施例の液晶表示素子の1つの画素における電極間に電圧を印加しないときの液晶分子の配向状態を模式的に示した断面図。FIG. 3 is a cross-sectional view schematically showing an alignment state of liquid crystal molecules when no voltage is applied between electrodes in one pixel of the liquid crystal display element of the first embodiment. 第1の実施例の液晶表示素子の1つの画素における電極間に電圧を印加したときの液晶分子の配向状態を模式的に示した断面図。Sectional drawing which showed typically the orientation state of the liquid crystal molecule when a voltage is applied between the electrodes in one pixel of the liquid crystal display element of a 1st Example. 第1の実施例の液晶表示素子の1つの画素における電極間に電圧を印加したときの液晶分子の配向状態を模式的に示した平面図。The top view which showed typically the orientation state of the liquid crystal molecule when a voltage is applied between the electrodes in one pixel of the liquid crystal display element of a 1st Example. この発明の第2の実施例を示す液晶表示素子の一方の基板の一部分の平面図。The top view of a part of one board | substrate of the liquid crystal display element which shows 2nd Example of this invention. 第2の実施例の液晶表示素子の1つの画素における電極間に電圧を印加したときの液晶分子の配向状態を模式的に示した平面図。The top view which showed typically the orientation state of the liquid crystal molecule when a voltage is applied between the electrodes in one pixel of the liquid crystal display element of a 2nd Example. この発明の第3の実施例を示す液晶表示素子の一方の基板の一部分の断面図。Sectional drawing of a part of one board | substrate of the liquid crystal display element which shows the 3rd Example of this invention. 第3の実施例の変形例を示す液晶表示素子の一方の基板の一部分の断面図。Sectional drawing of a part of one board | substrate of the liquid crystal display element which shows the modification of a 3rd Example. この発明の第4の実施例を示す液晶表示素子の一方の基板の一部分の断面図。Sectional drawing of a part of one board | substrate of the liquid crystal display element which shows the 4th Example of this invention. この発明の第5の実施例を示す液晶表示素子の一方の基板の一部分の平面図。The top view of a part of one board | substrate of the liquid crystal display element which shows the 5th Example of this invention. 第5の実施例の液晶表示素子の図12におけるXIII−XIII線に沿う拡大断面図。The expanded sectional view which follows the XIII-XIII line | wire in FIG. 12 of the liquid crystal display element of a 5th Example. 第5の実施例の液晶表示素子の1つの画素における電極間に電圧を印加しないときの液晶分子の配向状態を模式的に示した断面図。Sectional drawing which showed typically the orientation state of the liquid crystal molecule when a voltage is not applied between the electrodes in one pixel of the liquid crystal display element of a 5th Example. 第5の実施例の液晶表示素子の1つの画素における電極間に電圧を印加したときの液晶分子の配向状態を模式的に示した断面図。Sectional drawing which showed typically the orientation state of the liquid crystal molecule when a voltage is applied between the electrodes in one pixel of the liquid crystal display element of a 5th Example. この発明の第6の実施例を示す液晶表示素子の一方の基板の一部分の平面図。The top view of a part of one board | substrate of the liquid crystal display element which shows the 6th Example of this invention.

(第1の実施形態)
図1〜図6はこの発明の第1の実施例を示しており、図1は液晶表示素子の一方の基板の一部分の平面図、図2及び図3は前記液晶表示素子の図1におけるII−II線及びIII−III線に沿う拡大断面図である。
(First embodiment)
1 to 6 show a first embodiment of the present invention. FIG. 1 is a plan view of a part of one substrate of a liquid crystal display element, and FIGS. 2 and 3 are II views of the liquid crystal display element in FIG. It is an expanded sectional view which follows the -II line and the III-III line.

この液晶表示素子は、薄膜トランジスタ(以下、TFTと記す)を能動素子としたアクティブマトリックス液晶表示素子であり、図1〜図3に示したように、予め定めた間隙を存して対向する一対の透明基板1,2と、前記一対の基板1,2の互いに対向する内面のうち、一方の基板、例えば表示の観察側(図2及び図3において上側)とは反対側の基板(以下、後基板という)1の内面に、行方向(図1において左右方向)及び列方向(図1において上下方向)にマトリックス状に配列させて設けられた複数の透明な画素電極3と、前記後基板1の内面に前記複数の画素電極3にそれぞれ対応させて設けられ、対応する画素電極3に接続された複数のTFT5と、前記後基板1の内面に設けられ、前記TFT5にゲート信号及びデータ信号を供給する複数の走査線14及び信号線15と、前記後基板1の内面に、前記複数の画素電極3のそれぞれの中央部に対応させて設けられ、前記画素電極3の他の領域に対応する基板内面よりも突出する複数の凸部13と、他方の基板、つまり観察側の基板(以下、前基板という)2の内面に設けられ、前記複数の画素電極3とそれぞれ対向する領域により複数の画素28を形成する一枚膜状の透明な対向電極20と、前記一対の基板1,2の内面それぞれに設けられた垂直配向膜25,26と、前記一対の基板1,2間の間隙に封入された負の誘電異方性を有する液晶層27とを備えている。   This liquid crystal display element is an active matrix liquid crystal display element in which a thin film transistor (hereinafter referred to as TFT) is an active element. As shown in FIG. 1 to FIG. 3, a pair of facing each other with a predetermined gap therebetween. Of the mutually opposing inner surfaces of the transparent substrates 1 and 2 and the pair of substrates 1 and 2, one substrate, for example, the substrate opposite to the display viewing side (upper side in FIGS. 2 and 3) (hereinafter, rear A plurality of transparent pixel electrodes 3 arranged in a matrix in the row direction (left-right direction in FIG. 1) and column direction (up-down direction in FIG. 1) on the inner surface of the substrate 1, and the rear substrate 1 And a plurality of TFTs 5 connected to the corresponding pixel electrodes 3, and provided on the inner surface of the rear substrate 1, and gate signals and data signals are supplied to the TFTs 5. A plurality of scanning lines 14 and signal lines 15 to be supplied, and an inner surface of the rear substrate 1 are provided corresponding to the respective central portions of the plurality of pixel electrodes 3 and correspond to other regions of the pixel electrodes 3. A plurality of convex portions 13 projecting from the inner surface of the substrate and an inner surface of the other substrate, that is, an observation-side substrate (hereinafter referred to as a front substrate) 2, and a plurality of regions are respectively provided to face the plurality of pixel electrodes 3. In the gap between the pair of substrates 1 and 2, the single-layer transparent counter electrode 20 that forms the pixel 28, the vertical alignment films 25 and 26 provided on the inner surfaces of the pair of substrates 1 and 2, respectively. And an encapsulated liquid crystal layer 27 having negative dielectric anisotropy.

前記複数のTFT5は、前記後基板1の基板面に形成されたゲート電極6と、前記ゲート電極6を覆って前記複数の画素電極3の配列領域の全域に形成された透明なゲート絶縁膜7と、前記ゲート絶縁膜7の上に前記ゲート電極6と対向させて形成されたi型半導体膜8と、前記i型半導体膜8のチャンネル領域となる中央部の上に形成されたブロッキング絶縁膜9と、前記i型半導体膜8の一側部と他側部の上にn型半導体膜10を介して形成されたドレイン電極11D及びソース電極11Sと、その上に形成されたオーバーコート絶縁膜12とからなっている。なお、図1では、前記オーバーコート絶縁膜12と垂直配向膜25を省略している。   The plurality of TFTs 5 include a gate electrode 6 formed on the substrate surface of the rear substrate 1 and a transparent gate insulating film 7 that covers the gate electrode 6 and is formed over the entire region of the plurality of pixel electrodes 3. And an i-type semiconductor film 8 formed on the gate insulating film 7 so as to face the gate electrode 6, and a blocking insulating film formed on a central portion serving as a channel region of the i-type semiconductor film 8. 9, a drain electrode 11D and a source electrode 11S formed on one side and the other side of the i-type semiconductor film 8 via an n-type semiconductor film 10, and an overcoat insulating film formed thereon It consists of twelve. In FIG. 1, the overcoat insulating film 12 and the vertical alignment film 25 are omitted.

前記複数の走査線14は、前記後基板1の板面上に、各画素電極行毎にその一側に沿わせて、各行の複数の画素電極3にそれぞれ対応する複数のTFT5のゲート電極6と一体に形成されている。   The plurality of scanning lines 14 are arranged on the plate surface of the rear substrate 1 along one side of each pixel electrode row, and the gate electrodes 6 of the plurality of TFTs 5 respectively corresponding to the plurality of pixel electrodes 3 in each row. And is integrally formed.

また、前記複数の信号線15は、前記ゲート絶縁膜7の上に、各画素電極列毎にその一側に沿わせて、各列の複数の画素電極3にそれぞれ対応する複数のTFT5のドレイン電極11Dと一体に形成されており、前記TFT5のオーバーコート絶縁膜12により覆われている。   The plurality of signal lines 15 are arranged on the gate insulating film 7 along one side of each pixel electrode column, and the drains of the plurality of TFTs 5 respectively corresponding to the plurality of pixel electrodes 3 in each column. It is formed integrally with the electrode 11D and is covered with the overcoat insulating film 12 of the TFT 5.

そして、前記複数の画素電極3は、前記ゲート絶縁膜7の上に、この画素電極3のTFT接続部を前記オーバーコート絶縁膜12の上に重ねて形成され、前記オーバーコート絶縁膜12に設けられたコンタクト孔において前記TFT5のソース電極11Sに接続されている。   The plurality of pixel electrodes 3 are formed on the gate insulating film 7 so that the TFT connection portions of the pixel electrodes 3 are stacked on the overcoat insulating film 12. The contact hole is connected to the source electrode 11S of the TFT5.

前記複数の画素電極3はそれぞれ、前記行方向の幅が、前記列方向の幅の実質的に整数分の1、例えば実質的に1/3の細長い矩形形状に形成され、且つ前記矩形形状をその長手方向に並ぶ実質的に正方形状の複数(この実施例では3つ)の電極部3a,3b,3cに区分するスリット4が設けられたITO膜等の透明導電膜からなっており、前記凸部13は、前記画素電極3の実質的に正方形状に形成された3つの電極部(以下、正方形状電極部という)3a,3b,3cの中央部(正方形状の中心部)にそれぞれ対応させて設けられている。   Each of the plurality of pixel electrodes 3 is formed in an elongated rectangular shape whose width in the row direction is substantially an integer of the width in the column direction, for example, substantially 1/3. It consists of a transparent conductive film such as an ITO film provided with slits 4 that are divided into a plurality of substantially square (three in this embodiment) electrode portions 3a, 3b, 3c arranged in the longitudinal direction, The convex portion 13 corresponds to a central portion (square central portion) of three electrode portions (hereinafter referred to as square electrode portions) 3a, 3b, 3c formed in a substantially square shape of the pixel electrode 3, respectively. Is provided.

なお、前記画素電極3のスリット4は、前記画素電極3の一側縁の近くから他側縁にわたって前記行方向と平行に設けられており、前記各電極部3a,3b,3cは、前記画素電極3の一側縁と前記スリット4の端部との間の部分において互いに繋がっている。   The slit 4 of the pixel electrode 3 is provided in parallel to the row direction from near one side edge of the pixel electrode 3 to the other side edge, and each of the electrode portions 3a, 3b, 3c They are connected to each other at a portion between one side edge of the electrode 3 and the end of the slit 4.

前記凸部13は、前記TFT5を構成する前記複数の膜6,7,8,9,10,11D及び11S,12の全て或いは一部と同じ膜の積層膜からなっている。   The convex portion 13 is made of a laminated film of the same film as all or part of the plurality of films 6, 7, 8, 9, 10, 11 D and 11 S, 12 constituting the TFT 5.

この実施例では、前記凸部13を、前記TFT5を構成する複数の膜の全てと同じ膜、つまり、前記ゲート電極6及び走査線14と同じ金属膜からなる下部金属膜6aと、前記ゲート絶縁膜7と、前記i型半導体膜8とブロッキング絶縁膜9及びn型半導体膜10と同じ半導体膜または絶縁膜からなる下部半導体膜8aと中間絶縁膜9a及び上部半導体膜10aと、前記ドレイン電極11D及びソース電極11Sと同じ金属膜からなる上部金属膜11aと、前記オーバーコート絶縁膜12と同じ絶縁膜からなる上部絶縁膜12aとの積層膜により形成している。   In this embodiment, the convex portion 13 is made of the same film as all of the plurality of films constituting the TFT 5, that is, the lower metal film 6 a made of the same metal film as the gate electrode 6 and the scanning line 14, and the gate insulation. A lower semiconductor film 8a, an intermediate insulating film 9a, an upper semiconductor film 10a made of the same semiconductor film or insulating film as the film 7, the i-type semiconductor film 8, the blocking insulating film 9, and the n-type semiconductor film 10, and the drain electrode 11D. The upper metal film 11a made of the same metal film as the source electrode 11S and the upper insulating film 12a made of the same insulating film as the overcoat insulating film 12 are formed.

なお、前記凸部13を形成する積層膜のうちのゲート絶縁膜7は、前記複数の画素電極3の配列領域の全域に形成されており、したがって、前記凸部13は、前記画素電極3の他の領域に対応する基板内面、つまり前記ゲート絶縁膜7の画素電極3に対応する領域のうちの前記凸部13に対応する部分以外の領域の膜面に対して、前記下部金属膜6a、下部半導体膜8a、中間絶縁膜9a、上部半導体膜10a、上部金属膜11a及び上部絶縁膜12aの各膜厚の合計値に相当する高さだけ突出している。   Note that the gate insulating film 7 in the laminated film forming the convex portion 13 is formed over the entire arrangement region of the plurality of pixel electrodes 3, and thus the convex portion 13 is formed on the pixel electrode 3. With respect to the inner surface of the substrate corresponding to the other region, that is, the film surface of the region other than the portion corresponding to the convex portion 13 in the region corresponding to the pixel electrode 3 of the gate insulating film 7, the lower metal film 6a, The lower semiconductor film 8a, the intermediate insulating film 9a, the upper semiconductor film 10a, the upper metal film 11a, and the upper insulating film 12a protrude by a height corresponding to the total value of the respective film thicknesses.

また、この実施例では、前記下部金属膜6aを予め定めた径の円形膜に形成し、前記ゲート絶縁膜7の前記下部金属膜6a上の盛上がり部の径に対して、前記下部半導体膜8aと中間絶縁膜9aと上部半導体膜10aとの3層膜の径と、前記上部金属膜11aの径と、前記上部絶縁膜12aの径を予め定めた比率で順次小さくすることにより、前記凸部13を、平面形状が円形で、且つ基部から頂部に向かって順次径が小さくなる、実質的に裁頭円錐状(周面が階段状の裁頭円錐状)の形状に形成している。   In this embodiment, the lower metal film 6a is formed in a circular film having a predetermined diameter, and the lower semiconductor film 8a is formed with respect to the diameter of the raised portion of the gate insulating film 7 on the lower metal film 6a. The convex portion is formed by sequentially decreasing the diameter of the three-layer film of the intermediate insulating film 9a and the upper semiconductor film 10a, the diameter of the upper metal film 11a, and the diameter of the upper insulating film 12a at a predetermined ratio. 13 is formed in a substantially truncated cone shape (a truncated cone shape having a stepped peripheral surface) having a circular planar shape and gradually decreasing in diameter from the base to the top.

そして、前記画素電極3は、前記ゲート絶縁膜7上に、前記凸部13を覆って、前記凸部13に対応する部分が前記凸部13以外の部分(ゲート絶縁膜7上に形成された部分)よりも突出した形状に形成されており、その上に、前記複数の画素電極3の配列領域の全域にわたって垂直配向膜25が形成されている。   The pixel electrode 3 is formed on the gate insulating film 7 so as to cover the convex portion 13 and a portion corresponding to the convex portion 13 is formed on a portion other than the convex portion 13 (on the gate insulating film 7. The vertical alignment film 25 is formed over the entire arrangement region of the plurality of pixel electrodes 3.

さらに、前記後基板1の内面には、前記複数の画素電極3との間に補償容量19を形成する容量電極16がさらに設けられている。なお、図1では、容量電極16を区別しやすくするために、前記容量電極16に対応する部分に平行斜線を施している。   Further, on the inner surface of the rear substrate 1, a capacitor electrode 16 that forms a compensation capacitor 19 with the plurality of pixel electrodes 3 is further provided. In FIG. 1, in order to easily distinguish the capacitive electrodes 16, the portions corresponding to the capacitive electrodes 16 are shaded in parallel.

この容量電極16は、ITO膜等の透明導電膜からなっており、前記後基板1の板面上に、前記画素電極3のTFT接続部を除く周縁部と前記スリット4とに対応させて形成され、前記画素電極3の3つの正方形状電極部3a,3b,3cの周縁部と前記ゲート絶縁膜7を介して対向し、前記画素電極3との間に、前記ゲート絶縁膜7を誘電層とする補償容量19を形成している。   The capacitor electrode 16 is made of a transparent conductive film such as an ITO film, and is formed on the plate surface of the rear substrate 1 so as to correspond to the peripheral portion excluding the TFT connection portion of the pixel electrode 3 and the slit 4. The gate insulating film 7 is opposed to the peripheral edge portions of the three square electrode portions 3a, 3b, 3c of the pixel electrode 3 with the gate insulating film 7 interposed therebetween, and the gate insulating film 7 is interposed between the pixel electrode 3 and the dielectric layer. Compensation capacitor 19 is formed.

なお、前記容量電極16は、前記画素電極3の周縁部に対応する枠状部の内周縁部が前記画素電極3の周縁部に対向し、前記枠状部の外周縁部が画素電極3の外方に張出すとともに、前記スリット4に対応する部分の両側縁部が前記画素電極3の各正方形状電極部3a,3b,3cの互いに隣合う縁部に対向する幅に形成されており、この容量電極16の前記画素電極3に対向する部分によって前記補償容量19が形成されている。   Note that the inner peripheral edge of the frame-shaped portion corresponding to the peripheral edge of the pixel electrode 3 is opposed to the peripheral edge of the pixel electrode 3, and the outer peripheral edge of the frame-shaped portion is the outer peripheral edge of the pixel electrode 3. Extending outward, both side edges of the part corresponding to the slit 4 are formed to have a width facing opposite edges of the square electrode parts 3a, 3b, 3c of the pixel electrode 3, The compensation capacitor 19 is formed by a portion of the capacitor electrode 16 facing the pixel electrode 3.

そして、前記複数の画素電極3にそれぞれ対応する容量電極16は、各画素電極行毎に、前記画素電極3のTFT接続側とは反対側において一体に繋がっており、さらに、各行の容量電極16は、前記複数の画素電極3の配列領域の外側の一端または両端に前記信号線15と平行に設けられた図示しない容量電極接続線に共通接続されている。   The capacitor electrodes 16 respectively corresponding to the plurality of pixel electrodes 3 are integrally connected to each pixel electrode row on the side opposite to the TFT connection side of the pixel electrode 3, and the capacitor electrodes 16 of each row are further connected. Are commonly connected to a capacitor electrode connection line (not shown) provided in parallel with the signal line 15 at one end or both ends outside the array region of the plurality of pixel electrodes 3.

一方、前基板2の内面には、前記後基板1の内面に設けられた複数の画素電極3と前基板2の内面に設けられた対向電極20とが互いに対向する領域からなる複数の画素28の間の領域に対向する遮光膜21と、前記複数の画素28にそれぞれ対応する赤、緑、青の3色のカラーフィルタ22R,22G,22Bが設けられており、前記カラーフィルタ22R,22G,22Bの上に前記対向電極20が形成され、その上に垂直配向膜26が形成されている。   On the other hand, on the inner surface of the front substrate 2, a plurality of pixels 28 having regions in which a plurality of pixel electrodes 3 provided on the inner surface of the rear substrate 1 and a counter electrode 20 provided on the inner surface of the front substrate 2 face each other. And a color filter 22R, 22G, 22B of three colors of red, green, and blue respectively corresponding to the plurality of pixels 28, and the color filters 22R, 22G, The counter electrode 20 is formed on 22B, and the vertical alignment film 26 is formed thereon.

そして、前記一対の基板1,2は、前記複数の画素電極3の配列領域を囲む図示しない枠状のシール材を介して接合されており、これらの基板1,2間の前記シール材で囲まれた間隙に、負の誘電異方性を有するネマティック液晶からなる液晶層27が封入されている。   The pair of substrates 1 and 2 are joined via a frame-shaped sealing material (not shown) surrounding the array region of the plurality of pixel electrodes 3, and are surrounded by the sealing material between the substrates 1 and 2. A liquid crystal layer 27 made of nematic liquid crystal having negative dielectric anisotropy is sealed in the gap.

なお、図示しないが、前記後基板1は、前記行方向と列方向の両方または一方の端部に、前基板2の外方に突出する張出部を有しており、前記複数の走査線14及び信号線15は、前記張出部に配列された複数のドライバ接続端子にそれぞれ接続され、前記各行の容量電極16が共通接続された容量電極接続線は、前記張出部に前記複数のドライバ接続端子と共に配列された容量電極端子に接続されている。   Although not shown, the rear substrate 1 has a protruding portion that protrudes outward from the front substrate 2 at both or one end in the row direction and the column direction, and the plurality of scanning lines. 14 and the signal line 15 are respectively connected to a plurality of driver connection terminals arranged in the overhanging portion, and the capacitor electrode connection lines in which the capacitor electrodes 16 of the respective rows are commonly connected are connected to the overhanging portion in the plurality of the plurality of driver connecting terminals. It is connected to the capacitor electrode terminals arranged together with the driver connection terminals.

さらに、前記後基板1の内面には、前記シール材による基板接合部の角部付近から前記張出部に導出され、前記ドライバ接続端子と並べて配列された対向電極端子(容量電極端子と同じ端子でも別の端子でもよい)に接続された対向電極接続線が設けられており、前記前基板2の内面に設けられた対向電極20は、前記基板接合部において前記対向電極接続線に接続され、この対向電極接続線を介して前記対向電極端子に接続されている。   Further, on the inner surface of the rear substrate 1, a counter electrode terminal (the same terminal as the capacitor electrode terminal) that is led out from the vicinity of the corner portion of the substrate bonding portion by the sealing material to the protruding portion and arranged side by side with the driver connection terminal Or a different terminal may be provided), and a counter electrode connection line connected to the inner surface of the front substrate 2 is connected to the counter electrode connection line at the substrate bonding portion, The counter electrode terminal is connected to the counter electrode terminal.

また、図では省略しているが、この液晶表示素子は、前記一対の基板1,2の外面にそれぞれ配置された一対の偏光板を備えている。なお、この液晶表示素子は、例えば、前記画素電極3と対向電極20との間に電圧印加しないときの表示が黒であるノーマリーブラックモードのものであり、前記一対の偏光板は、それぞれの透過軸を実質的に互いに直交させて配置されている。   Although not shown in the figure, the liquid crystal display element includes a pair of polarizing plates respectively disposed on the outer surfaces of the pair of substrates 1 and 2. The liquid crystal display element is of a normally black mode in which, for example, the display is black when no voltage is applied between the pixel electrode 3 and the counter electrode 20, and the pair of polarizing plates are respectively The transmission axes are arranged substantially perpendicular to each other.

この液晶表示素子は、前記複数の画素電極3と対向電極20とが互いに対向する領域からなる複数の画素28毎に、前記電極3,20間への電圧の印加により液晶分子を垂直配向状態から倒れ配向させて画像を表示するものであり、各画素28の液晶分子は、前記電圧の印加により、前記画素28の縁部から中央部に向かって倒れ込むように配向する。   In this liquid crystal display element, for each of a plurality of pixels 28 composed of regions where the plurality of pixel electrodes 3 and the counter electrode 20 face each other, a voltage is applied between the electrodes 3 and 20 to bring the liquid crystal molecules from a vertically aligned state. The liquid crystal molecules of each pixel 28 are aligned so as to fall from the edge of the pixel 28 toward the center by applying the voltage.

図4は、前記液晶表示素子の1つの画素28における前記電極3,20間に電圧を印加しないときの液晶分子の配向状態を模式的に示した断面図、図5は、前記1つの画素28における前記電極3,20間に電圧を印加したときの液晶分子の配向状態を模式的に示した断面図、図6は、前記1つの画素28における前記電極3,20間に電圧を印加したときの液晶分子の配向状態を模式的に示した平面図である。なお、図4及び図5では、前記凸部13を簡略化している。   FIG. 4 is a cross-sectional view schematically showing the alignment state of liquid crystal molecules when no voltage is applied between the electrodes 3 and 20 in one pixel 28 of the liquid crystal display element, and FIG. FIG. 6 is a cross-sectional view schematically showing an alignment state of liquid crystal molecules when a voltage is applied between the electrodes 3 and 20 in FIG. 6, and FIG. 6 shows a state in which a voltage is applied between the electrodes 3 and 20 in the one pixel 28. It is the top view which showed typically the orientation state of the liquid crystal molecule. 4 and 5, the convex portion 13 is simplified.

図4のように、前記電極3,20間に電圧を印加しないときは、前記液晶層27の液晶分子27aが、一対の基板1,2の内面にそれぞれ設けられた垂直配向膜25,26の垂直配向性により、前記凸部13に対応する部分以外の領域において、基板1,2面に対して実質的に垂直に配向し、前記凸部13に対応する部分では、後基板1側の前記凸部13の近傍の液晶分子27aが前記凸部13の頂面及び周面に対して実質的に垂直な方向に分子長軸を向けて配向し、前基板2の近傍の液晶分子27aが前記前基板2面に対して実質的に垂直に配向した状態に配向する。   As shown in FIG. 4, when no voltage is applied between the electrodes 3 and 20, the liquid crystal molecules 27a of the liquid crystal layer 27 are formed on the vertical alignment films 25 and 26 provided on the inner surfaces of the pair of substrates 1 and 2, respectively. Due to the vertical alignment property, the substrate is oriented substantially perpendicularly to the surfaces of the substrates 1 and 2 in a region other than the portion corresponding to the convex portion 13, and the portion on the rear substrate 1 side in the portion corresponding to the convex portion 13. The liquid crystal molecules 27a in the vicinity of the convex portion 13 are aligned with the molecular major axis in a direction substantially perpendicular to the top and peripheral surfaces of the convex portion 13, and the liquid crystal molecules 27a in the vicinity of the front substrate 2 are It is oriented in a state of being oriented substantially perpendicular to the front substrate 2 surface.

そして、前記液晶表示素子は、前記複数の画素電極3をそれぞれ、細長い矩形形状に形成され、且つ前記矩形形状をその長手方向に並ぶ実質的に正方形状の複数(3つ)の電極部3a,3b,3cに区分するスリット4が設けられた導電膜により形成し、前記複数の画素電極3が設けられた後基板1の内面に、前記画素電極3の複数の正方形状電極部3a,3b,3cの中央部にそれぞれ対応させて前記凸部13を設けているため、前記電極3,20間に電圧を印加すると、前記画素電極3の各正方形状電極部3a,3b,3cに対応する各領域の液晶分子27aがそれぞれ、前記凸部13の近傍の電位分布と各画素部の周辺部の液晶分子の挙動に誘導され、図5及び図6のように、前記各領域毎に、その領域の周縁部から中央部に向かって安定に倒れ配向する。   In the liquid crystal display element, the plurality of pixel electrodes 3 are each formed into an elongated rectangular shape, and a plurality of (three) electrode portions 3a each having a substantially square shape in which the rectangular shape is arranged in the longitudinal direction. A plurality of square electrode portions 3a, 3b, 3b of the pixel electrode 3 formed on the inner surface of the substrate 1 after the plurality of pixel electrodes 3 are provided. Since the convex portions 13 are provided in correspondence with the central portions of 3c, when a voltage is applied between the electrodes 3 and 20, each of the square electrode portions 3a, 3b and 3c of the pixel electrode 3 corresponding to the square electrode portions 3a, 3b and 3c. The liquid crystal molecules 27a in the region are respectively induced by the potential distribution in the vicinity of the convex portion 13 and the behavior of the liquid crystal molecules in the peripheral portion of each pixel portion, and as shown in FIG. 5 and FIG. From the peripheral edge of the Oriented fallen to a constant.

すなわち、前記液晶表示素子は、前記画素電極3を、前記凸部13を覆って形成しているため、前記電極3,20間への電圧の印加により前記画素電極3の各正方形状電極部3a,3b,3cに対応する各領域にそれぞれ生成する電界は、図5にその等電位線eを示したように、前記凸部13に対応する部分の電位が、前記領域の他の部分の電位に対して前基板2側に偏った電界である。   That is, in the liquid crystal display element, since the pixel electrode 3 is formed so as to cover the convex portion 13, each square electrode portion 3 a of the pixel electrode 3 is applied by applying a voltage between the electrodes 3 and 20. , 3b, 3c, the electric field generated in each region corresponds to the potential of the portion corresponding to the convex portion 13 as shown in the equipotential line e in FIG. The electric field is biased toward the front substrate 2 side.

そのため、前記液晶分子27aは、前記電圧の印加により、前記画素電極3の各正方形状電極部3a,3b,3cに対応する各領域毎に、前記等電位線eに沿って、前記領域の周縁部から中央部に向かって、前記凸部13の中心に対応する部分を倒れ込み方向の中心として安定に倒れ配向する。   Therefore, the liquid crystal molecules 27a are applied to the periphery of the region along the equipotential line e for each region corresponding to each of the square electrode portions 3a, 3b, 3c of the pixel electrode 3 by applying the voltage. From the portion toward the center portion, the portion corresponding to the center of the convex portion 13 is stably tilted with the portion in the tilting direction as the center.

このように、前記液晶表示素子は、一対の基板1,2のうち、複数の画素電極3が設けられた後基板1の内面に、前記複数の画素電極3のそれぞれの中央部に対応させて、前記画素電極3の他の領域に対応する基板内面よりも突出する複数の凸部13を設けているため、前記一対の基板1,2間の間隙に封入された負の誘電異方性を有する液晶層27の液晶分子27aを、前記複数の画素電極3と前基板2の内面に設けられた対向電極20とが互いに対向する領域からなる複数の画素28毎に、前記電極3,20間への電圧の印加により、前記画素28の縁部から中央部に向かって安定に倒れ配向させ、ざらつき感の無い良好な品質の画像を表示することができる。   As described above, the liquid crystal display element is disposed on the inner surface of the substrate 1 after the plurality of pixel electrodes 3 are provided in the pair of substrates 1 and 2 so as to correspond to the respective central portions of the plurality of pixel electrodes 3. Since the plurality of convex portions 13 projecting from the inner surface of the substrate corresponding to other regions of the pixel electrode 3 are provided, the negative dielectric anisotropy enclosed in the gap between the pair of substrates 1 and 2 is reduced. The liquid crystal molecules 27a of the liquid crystal layer 27 are provided between the electrodes 3 and 20 for each of the plurality of pixels 28 each having a region in which the plurality of pixel electrodes 3 and the counter electrode 20 provided on the inner surface of the front substrate 2 face each other. By applying a voltage to the pixel 28, it is possible to stably tilt and orient the pixel 28 from the edge toward the center, and display an image of good quality without a feeling of roughness.

しかも、前記液晶表示素子は、前記画素電極3を、前記凸部13を覆って形成しているため、前記液晶分子27aを、前記電圧の印加により前記画素28の縁部から中央部に向かってさらに安定に倒れ配向させ、より高品質の画像を表示することができる。   In addition, since the pixel electrode 3 is formed so as to cover the convex portion 13 in the liquid crystal display element, the liquid crystal molecules 27a are moved from the edge of the pixel 28 toward the center by applying the voltage. Furthermore, it is possible to stably tilt and align and display a higher quality image.

また、前記液晶表示素子は、前記複数の画素電極3をそれぞれ、細長い矩形形状に形成され、且つ前記矩形形状をその長手方向に並ぶ実質的に正方形状の複数の電極部3a,3b,3cに区分するスリット4が設けられた導電膜により形成し、前記凸部13を、前記画素電極3の前記複数の電極部3a,3b,3cの中央部にそれぞれ対応させて設けているため、前記液晶分子27aを、前記電圧の印加により、前記画素電極3の複数の電極部3a,3b,3cに対応する各領域毎に、その周縁部から中央部に向かって安定に倒れ配向させることができる。また、画素の高精細化のために画素電極の縦横比を大きくした場合でも、安定した配向状態が得られる。   Further, in the liquid crystal display element, the plurality of pixel electrodes 3 are each formed in an elongated rectangular shape, and the rectangular shapes are arranged in a plurality of substantially square electrode portions 3a, 3b, 3c arranged in the longitudinal direction thereof. The liquid crystal is formed by the conductive film provided with the slits 4 to be divided, and the convex portion 13 is provided in correspondence with the central portions of the plurality of electrode portions 3a, 3b, 3c of the pixel electrode 3, respectively. By applying the voltage, the molecules 27a can be stably tilted and oriented from the peripheral portion toward the center portion for each of the regions corresponding to the plurality of electrode portions 3a, 3b, 3c of the pixel electrode 3. Further, even when the aspect ratio of the pixel electrode is increased in order to increase the pixel definition, a stable alignment state can be obtained.

さらに、前記液晶表示素子は、前記凸部13を、前記TFT5を構成する複数の膜6,7,8,9,10,11D及び11S,12の全てと同じ膜、つまり、前記ゲート電極6及び走査線14と同じ金属膜からなる下部金属膜6aと、前記ゲート絶縁膜7と、前記i型半導体膜8とブロッキング絶縁膜9及びn型半導体膜10と同じ半導体膜または絶縁膜からなる下部半導体膜8aと中間絶縁膜9a及び上部半導体膜10aと、前記ドレイン電極11D及びソース電極11Sと同じ金属膜からなる上部金属膜11aと、前記オーバーコート絶縁膜12と同じ絶縁膜からなる上部絶縁膜12aとの積層膜により形成しているため、前記凸部13を、前記TFT5の形成工程を利用して、液晶表示素子の製造コストを増加させることなく形成することができる。   Further, in the liquid crystal display element, the convex portion 13 is formed on the same film as all of the plurality of films 6, 7, 8, 9, 10, 11 D and 11 S, 12 constituting the TFT 5, that is, the gate electrode 6 and The lower metal film 6a made of the same metal film as the scanning line 14, the gate insulating film 7, the lower semiconductor made of the same semiconductor film or insulating film as the i-type semiconductor film 8, the blocking insulating film 9 and the n-type semiconductor film 10. The film 8a, the intermediate insulating film 9a, the upper semiconductor film 10a, the upper metal film 11a made of the same metal film as the drain electrode 11D and the source electrode 11S, and the upper insulating film 12a made of the same insulating film as the overcoat insulating film 12 Therefore, the protrusion 13 is formed without increasing the manufacturing cost of the liquid crystal display element by using the formation process of the TFT 5. Door can be.

なお、上記実施例では、前記凸部13を、前記TFT5を構成する複数の膜の全てと同じ膜6a,7,8a,9a,10a,11a,12aの積層膜により形成しているが、前記凸部13は、前記TFT5を構成する複数の膜のうちの一部の膜と同じ膜、例えば前記下部金属膜6aと、前記ゲート絶縁膜7と、前記上部金属膜11aと、前記上部絶縁膜12aとの積層膜により形成してもよい。   In the above embodiment, the convex portion 13 is formed by a laminated film of the same films 6a, 7, 8a, 9a, 10a, 11a, and 12a as all of the plurality of films constituting the TFT 5. The protrusion 13 is the same film as a part of the plurality of films constituting the TFT 5, for example, the lower metal film 6a, the gate insulating film 7, the upper metal film 11a, and the upper insulating film. You may form by a laminated film with 12a.

(第2の実施形態)
図7及び図8はこの発明の第2の実施例を示しており、図7は液晶表示素子の一方の基板(後基板)の一部分の平面図、図8はこの実施例の液晶表示素子の1つの画素における電極間に電圧を印加したときの液晶分子の配向状態を模式的に示した平面図である。なお、図7において、上述した第1の実施例に対応するものには同符号を付し、同一のものについてはその説明を省略する。
(Second Embodiment)
7 and 8 show a second embodiment of the present invention. FIG. 7 is a plan view of a part of one substrate (rear substrate) of the liquid crystal display element, and FIG. 8 shows the liquid crystal display element of this embodiment. It is the top view which showed typically the orientation state of the liquid crystal molecule when a voltage is applied between the electrodes in one pixel. In FIG. 7, components corresponding to those of the first embodiment described above are denoted by the same reference numerals, and description of the same components is omitted.

この実施例の液晶表示素子は、複数の画素電極3をそれぞれ、細長い矩形形状に形成された透明導電膜により形成し、補償容量19を形成する容量電極16を前記画素電極3のTFT接続部を除く周縁部に対応させて設けるとともに、前記複数の画素電極3が設けられた後基板1の内面に、前記複数の画素電極3のそれぞれの中央部に対応させて、前記画素電極3の長手方向の略全長にわたる細長形状の凸部13aを設けたものであり、他の構成及び前記凸部13aの断面の構造は、第1の実施例と同じである。   In the liquid crystal display element of this embodiment, each of the plurality of pixel electrodes 3 is formed of a transparent conductive film formed in an elongated rectangular shape, and the capacitor electrode 16 that forms the compensation capacitor 19 is provided as a TFT connection portion of the pixel electrode 3. The pixel electrode 3 is provided in correspondence with the peripheral edge, and on the inner surface of the substrate 1 on which the plurality of pixel electrodes 3 are provided, corresponding to the center of each of the plurality of pixel electrodes 3, and in the longitudinal direction of the pixel electrode 3. Are provided with an elongated convex portion 13a extending over substantially the entire length, and the other configuration and the cross-sectional structure of the convex portion 13a are the same as those of the first embodiment.

この液晶表示素子は、前記凸部13aを、前記画素電極3の幅狭方向の中央部に対応させて、前記画素電極3の長手方向の略全長にわたって設けているため、前記液晶分子27aを、前記電極3,20間への電圧の印加により、図8のように前記画素28の長手方向の両側の縁部から中央部に向かって安定に倒れ配向させ、ざらつき感の無い良好な品質の画像を表示することができる。また、画素の高精細化のために画素電極の縦横比を大きくした場合でも、安定した配向状態が得られる。   In this liquid crystal display element, the convex portion 13a is provided over substantially the entire length in the longitudinal direction of the pixel electrode 3 so as to correspond to the central portion of the pixel electrode 3 in the narrow direction. By applying a voltage between the electrodes 3 and 20, as shown in FIG. 8, the pixel 28 is stably tilted and oriented from the edge on both sides in the longitudinal direction toward the center, and a good quality image without a feeling of roughness. Can be displayed. Further, even when the aspect ratio of the pixel electrode is increased in order to increase the pixel definition, a stable alignment state can be obtained.

(第3の実施形態)
図9はこの発明の第3の実施例を示す液晶表示素子の一方の基板(後基板)の一部分の断面図である。なお、図9において、上述した第1の実施例に対応するものには同符号を付し、同一のものについてはその説明を省略する。
(Third embodiment)
FIG. 9 is a sectional view of a part of one substrate (rear substrate) of a liquid crystal display device according to a third embodiment of the present invention. In FIG. 9, parts corresponding to those of the first embodiment described above are given the same reference numerals, and explanations of the same parts are omitted.

この実施例は、上記第1の実施例の液晶表示素子において、前記凸部13を、前記TFT5を構成する複数の膜の6,7,8,9,10,11D及び11S,12の全て或いは一部と同じ膜の積層膜(図では、TFT5を構成する複数の膜の全てと同じ膜6a,7,8a,9a,10a,11a,12aの積層膜)と、補償容量19を形成する容量電極16と同じ透明導電膜からなる導電膜16aとの積層膜により形成したものであり、この実施例によれば、前記凸部13を、前記TFT5及び前記補償容量19の形成工程を利用して、液晶表示素子の製造コストを増加させることなく形成することができる。   In this embodiment, in the liquid crystal display element of the first embodiment, the convex portion 13 is formed by using all the films 6, 7, 8, 9, 10, 11D and 11S, 12 of the plurality of films constituting the TFT 5 or A laminated film of the same film as a part (in the figure, a laminated film of the same films 6 a, 7, 8 a, 9 a, 10 a, 11 a, 12 a as all of the plurality of films constituting the TFT 5) and a capacitance for forming the compensation capacitor 19 The electrode 16 is formed of a laminated film of a conductive film 16a made of the same transparent conductive film. According to this embodiment, the protrusion 13 is formed by using the process of forming the TFT 5 and the compensation capacitor 19. The liquid crystal display element can be formed without increasing the manufacturing cost.

なお、この実施例では、前記容量電極16と同じ透明導電膜からなる導電膜16aを、後基板1の板面上に形成し、その上に前記TFT5のゲート電極6及び走査線14と同じ金属膜からなる下部金属膜6aを形成しているが、図10に示した第3の実施例の変形例のように、前記下部金属膜6aを後基板1の板面上に形成し、その上に前記導電膜16aを形成してもよい。   In this embodiment, a conductive film 16a made of the same transparent conductive film as the capacitor electrode 16 is formed on the plate surface of the rear substrate 1, and the same metal as the gate electrode 6 and the scanning line 14 of the TFT 5 is formed thereon. A lower metal film 6a made of a film is formed. As in the modification of the third embodiment shown in FIG. 10, the lower metal film 6a is formed on the plate surface of the rear substrate 1, and the upper metal film 6a is formed thereon. Alternatively, the conductive film 16a may be formed.

また、前記第3の実施例及びその変形例は、上述した第2の実施例の凸部13aにも適用することができる。   Further, the third embodiment and its modification can be applied to the convex portion 13a of the second embodiment described above.

(第4の実施形態)
図11はこの発明の第4の実施例を示す液晶表示素子の一方の基板(後基板)の一部分の断面図である。なお、図11において、上述した第1の実施例に対応するものには同符号を付し、同一のものについてはその説明を省略する。
(Fourth embodiment)
FIG. 11 is a sectional view of a part of one substrate (rear substrate) of a liquid crystal display device according to the fourth embodiment of the present invention. In FIG. 11, parts corresponding to those of the first embodiment described above are given the same reference numerals, and explanations of the same parts are omitted.

この実施例の液晶表示素子は、複数のTFT5を、ドレイン電極11D及びソース電極11Sとオーバーコート絶縁膜12との間に、透明な保護絶縁膜18を、TFT部から信号線15上にわたって設け、その保護絶縁膜18の前記信号線15を覆う部分の側縁部の上にITO膜等の透明導電膜からなる容量電極16を形成するとともに、前記オーバーコート絶縁膜12を前記TFT部から信号線15上にわたって前記保護絶縁膜18の略全体を覆う幅に形成し、画素電極3を、その縁部を前記オーバーコート絶縁膜12の縁部上に重ねて形成することにより、前記容量電極16と画素電極3の縁部との間に、前記オーバーコート絶縁膜12を誘電層とする補償容量19を形成したものであり、この実施例では、前記容量電極16を、前記画素電極3の外方に張出す外周縁部に、その全周及び隣合う容量電極16,16の繋がり部にわたって、金属膜からなる低抵抗膜17を積層した二層膜電極としている。   In the liquid crystal display element of this embodiment, a plurality of TFTs 5 are provided between the drain electrode 11D and the source electrode 11S and the overcoat insulating film 12, and a transparent protective insulating film 18 is provided over the signal line 15 from the TFT portion. A capacitor electrode 16 made of a transparent conductive film such as an ITO film is formed on the side edge of the protective insulating film 18 that covers the signal line 15, and the overcoat insulating film 12 is connected to the signal line from the TFT portion. 15 is formed to have a width that covers substantially the entire protective insulating film 18, and the pixel electrode 3 is formed so that its edge overlaps the edge of the overcoat insulating film 12. A compensation capacitor 19 having the overcoat insulating film 12 as a dielectric layer is formed between the edge of the pixel electrode 3 and in this embodiment, the capacitor electrode 16 is connected to the image electrode. The outer peripheral edge portion overhangs outwardly of the electrode 3, and its over connecting portion of the entire circumference and adjacent capacitor electrodes 16 and 16, two-layer membrane electrode formed by laminating a low-resistance film 17 made of a metal film.

なお、図11では、前記保護絶縁膜18の上に前記低抵抗膜17を形成し、その上に前記容量電極16を形成しているが、それと逆に、前記保護絶縁膜18の上に前記容量電極16を形成し、その上に前記低抵抗膜17を形成してもよい。   In FIG. 11, the low resistance film 17 is formed on the protective insulating film 18 and the capacitor electrode 16 is formed on the low resistance film 17. On the contrary, the capacitor electrode 16 is formed on the protective insulating film 18. The capacitor electrode 16 may be formed, and the low resistance film 17 may be formed thereon.

そして、この実施例では、複数の画素電極3が設けられた後基板1の内面に、前記画素電極3の複数の正方形状電極部3a,3b,3cの中央部にそれぞれ対応させて、前記TFT5を構成する複数の膜の全てと同じ膜、つまり、ゲート電極6及び走査線14と同じ金属膜からなる下部金属膜6aと、ゲート絶縁膜7と、i型半導体膜8とブロッキング絶縁膜9及びn型半導体膜10と同じ半導体膜または絶縁膜からなる下部半導体膜8aと中間絶縁膜9a及び上部半導体膜10aと、前記ドレイン電極11D及びソース電極11Sと同じ金属膜からなる上部金属膜11aと、前記オーバーコート絶縁膜12と同じ絶縁膜からなる上部絶縁膜12aと、前記保護絶縁膜18と同じ絶縁膜からなる第2の中間絶縁膜18aと、前記オーバーコート絶縁膜12と同じ絶縁膜からなる上部絶縁膜12aとの各膜と、前記低抵抗膜17が積層された容量電極16と同じ膜、つまり前記低抵抗膜17と同じ金属膜からなる中間金属膜17a及び前記容量電極16と同じ透明導電膜からなる導電膜16aとの積層膜からなる、実質的に裁頭円錐状(周面が階段状の裁頭円錐状)の形状に形成された凸部13を設け、その上に前記画素電極3を形成している。   In this embodiment, the TFT 5 is formed on the inner surface of the substrate 1 on which the plurality of pixel electrodes 3 are provided, corresponding to the center portions of the plurality of square electrode portions 3a, 3b, 3c of the pixel electrode 3, respectively. The same film as all of the plurality of films constituting the gate electrode, that is, the lower metal film 6a made of the same metal film as the gate electrode 6 and the scanning line 14, the gate insulating film 7, the i-type semiconductor film 8, the blocking insulating film 9 and a lower semiconductor film 8a made of the same semiconductor film or insulating film as the n-type semiconductor film 10, an intermediate insulating film 9a, an upper semiconductor film 10a, an upper metal film 11a made of the same metal film as the drain electrode 11D and the source electrode 11S, An upper insulating film 12a made of the same insulating film as the overcoat insulating film 12, a second intermediate insulating film 18a made of the same insulating film as the protective insulating film 18, and the overcoat film Each film of the upper insulating film 12a made of the same insulating film as the insulating film 12 and the same film as the capacitor electrode 16 on which the low resistance film 17 is laminated, that is, an intermediate metal film made of the same metal film as the low resistance film 17 17a and a convex part formed of a laminated film of the conductive film 16a made of the same transparent conductive film as the capacitor electrode 16 and having a substantially truncated cone shape (a circumferential surface having a stepped truncated cone shape). 13 is provided, and the pixel electrode 3 is formed thereon.

この実施例の液晶表示素子は、前記凸部13を、TFT5を構成する複数の膜の全てと同じ膜6a,7,8a,9a,10a,11a,17a,12aと、前記低抵抗膜17が積層された容量電極16と同じ膜17a,16aとの積層膜からなる凸部13を設けているため、前記凸部13を、前記TFT5及び前記補償容量19の形成工程を利用して、液晶表示素子の製造コストを増加させることなく形成することができる。   In the liquid crystal display element of this embodiment, the convex portion 13 is made up of the same films 6 a, 7, 8 a, 9 a, 10 a, 11 a, 17 a, 12 a as the plurality of films constituting the TFT 5, and the low resistance film 17. Since the convex portion 13 made of a laminated film of the same film 17 a and 16 a as the laminated capacitive electrode 16 is provided, the convex portion 13 is formed into a liquid crystal display by using the formation process of the TFT 5 and the compensation capacitance 19. It can be formed without increasing the manufacturing cost of the element.

なお、この実施例では、前記凸部13を、前記TFT5を構成する複数の膜の全てと同じ膜6a,7,8a,9a,10a,11a,17a,12aと、前記低抵抗膜17が積層された容量電極16と同じ膜17a,16aとの積層膜により形成しているが、前記凸部13は、前記TFT5を構成する複数の膜のうちの一部の膜と同じ膜、例えば前記下部金属膜6aと、前記ゲート絶縁膜7と、前記上部金属膜11aと、前記第2の中間絶縁膜18aと、前記上部絶縁膜12aとの各膜と、前記低抵抗膜17が積層された容量電極16と同じ膜17a,16aとの積層膜により形成してもよい。   In this embodiment, the convex portion 13 is formed by laminating the same films 6 a, 7, 8 a, 9 a, 10 a, 11 a, 17 a, 12 a and the low resistance film 17 as the plurality of films constituting the TFT 5. The convex portion 13 is formed of the same film as a part of the plurality of films constituting the TFT 5, for example, the lower part. Capacitance in which the metal film 6a, the gate insulating film 7, the upper metal film 11a, the second intermediate insulating film 18a, the upper insulating film 12a, and the low resistance film 17 are stacked. You may form by the laminated film of the film | membranes 17a and 16a same as the electrode 16. FIG.

また、この実施例の補償容量19及び凸部13の形成構造は、上述した第2の実施例にも適用することができる。   Moreover, the formation structure of the compensation capacitor 19 and the convex portion 13 of this embodiment can also be applied to the second embodiment described above.

(第5の実施形態)
図12〜図15はこの発明の第5の実施例を示しており、図1は液晶表示素子の一方の基板(後基板)の一部分の平面図、図13は前記液晶表示素子の図12におけるXIII−XIII線に沿う拡大断面図である。なお、図12及び図13において、上述した第1の実施例に対応するものには同符号を付し、同一のものについてはその説明を省略する。
(Fifth embodiment)
12 to 15 show a fifth embodiment of the present invention. FIG. 1 is a plan view of a part of one substrate (rear substrate) of the liquid crystal display element, and FIG. 13 is a plan view of the liquid crystal display element in FIG. It is an expanded sectional view which follows a XIII-XIII line. In FIG. 12 and FIG. 13, the same reference numerals are given to the components corresponding to the first embodiment described above, and the description of the same components is omitted.

この実施例の液晶表示素子は、複数の画素電極3が設けられた後基板1の内面に、前記画素電極3の複数の正方形状電極部3a,3b,3cの中央部にそれぞれ対応させて、画素28の各正方形状電極部3a,3b,3cの面積に対して予め定めた比率、例えば前記正方形状電極部3a,3b,3cの面積の25〜50%の面積を有する形状に形成された複数の凸部13を設けるとともに、前記後基板1の内面に、観察側(前基板2の外面側)から前記凸部13に対応する部分に入射した光を反射して前記観察側へ出射する反射表示部28aと、前記観察側とは反対側(後基板1の外面側)から入射した光を透過させて前記観察側へ出射する前記反射表示部28a以外の透過表示部28bとを複数の画素28毎に形成するための第1と第2の反射膜23,24を設けたものであり、他の構成は上記第1の実施例と同じである。   In the liquid crystal display element of this embodiment, the plurality of pixel electrodes 3 are provided on the inner surface of the substrate 1 so as to correspond to the central portions of the plurality of square electrode portions 3a, 3b, 3c of the pixel electrode 3, respectively. It is formed in a shape having a predetermined ratio with respect to the area of each square electrode portion 3a, 3b, 3c of the pixel 28, for example, 25 to 50% of the area of the square electrode portions 3a, 3b, 3c. A plurality of convex portions 13 are provided, and light incident on a portion corresponding to the convex portion 13 from the observation side (the outer surface side of the front substrate 2) is reflected on the inner surface of the rear substrate 1 and emitted to the observation side. The reflective display unit 28a and a plurality of transmissive display units 28b other than the reflective display unit 28a that transmit the light incident from the side opposite to the observation side (the outer surface side of the rear substrate 1) and emit the light to the observation side. First and second for forming every pixel 28 It is those in which a reflection film 23 and 24, other configurations are the same as those in the first embodiment.

この実施例において、前記凸部13は、上記第1の実施例と同じ積層膜からなっており、実質的に裁頭円錐状(周面が階段状の裁頭円錐状)に形成されている。   In this embodiment, the convex portion 13 is made of the same laminated film as that of the first embodiment, and is substantially formed in a truncated cone shape (a circumferential surface is a stepped cone shape). .

そして、この実施例では、前記凸部13を、前記TFT5を構成する複数の膜の全てと同じ膜の積層膜により形成し、且つ前記TFT5を構成する複数の膜のうちの一部の膜と、それと同じ膜からなる前記凸部13の形成膜、例えば、前記TFT5を構成する複数の膜のうちのドレイン電極11D及びソース電極11Sとオーバーコート絶縁膜12の2つの膜と、前記凸部13の形成膜のうちの前記ドレイン電極11D及びソース電極11Sと同じ金属膜からなる上部金属膜11aと前記オーバーコート絶縁膜12と同じ絶縁膜からなる上部絶縁膜12aの2つの膜とを、前記反射表示部28aの液晶層厚dが前記透過表示部14bの液晶層厚dの実質的に1/2になる膜厚に形成し、前記観察側から入射した光が液晶層27を往復して透過して前記観察側へ出射する前記反射表示部28aの液晶の複屈折異方性Δnと液晶層厚dとの積Δndを、前記透過表示部14bの積Δndの実質的に1/2に設定している。 In this embodiment, the convex portion 13 is formed of a laminated film of the same film as all of the plurality of films constituting the TFT 5, and a part of the plurality of films constituting the TFT 5 A film for forming the convex portion 13 made of the same film, for example, two films of the drain electrode 11D and the source electrode 11S and the overcoat insulating film 12 among the plurality of films constituting the TFT 5, and the convex portion 13 The two films of the upper metal film 11a made of the same metal film as the drain electrode 11D and the source electrode 11S and the upper insulating film 12a made of the same insulating film as the overcoat insulating film 12 are formed as the reflection film. formed in a substantially film thickness becomes 1/2 of the liquid crystal layer thickness d 2 of the liquid crystal layer thickness d 1 of the display unit 28a is the transmissive display portion 14b, the light incident from the observation side reciprocates through the liquid crystal layer 27 The product [Delta] nd 1 transmitted to the liquid crystal of the birefringence anisotropy Δn of the reflective display unit 28a for emitting to the observation side of the liquid crystal layer thickness d 1, substantially one of the product [Delta] nd 2 of the transmissive display portion 14b / 2 is set.

また、この実施例では、前記第1と第2の反射膜23,24を、前記凸部13を形成する積層膜のうちの、前記TFT5のゲート電極6及び走査線14と同じ金属膜からなる下部金属膜6aと、ドレイン電極11D及びソース電極11Sと同じ金属膜からなる上部金属膜11aとにより形成している。   In this embodiment, the first and second reflective films 23 and 24 are made of the same metal film as the gate electrode 6 and the scanning line 14 of the TFT 5 in the laminated film forming the convex portion 13. The lower metal film 6a and the upper metal film 11a made of the same metal film as the drain electrode 11D and the source electrode 11S are formed.

これらの反射膜23,24のうち、前記下部金属膜6aからなる第1の反射膜23は、前記裁頭円錐状の凸部13の基部の径に対応した径を有する円形膜に形成され、前記上部金属膜11aからなる第2の反射膜24は、前記第1の反射膜23よりも小さい径を有する円形膜に形成されており、前記第2の反射膜24は、前記観察側から入射して液晶層27を透過した光のうち、この第2の反射膜24に入射した光を前記観察側へ反射し、前記第1の反射膜23は、前記観察側から入射して液晶層27を透過した光のうち、前記第2の反射膜24の周囲を通って前記第1の反射膜23の外周部(第2の反射膜24の周囲に張出した部分)に入射した光を前記観察側へ反射する。   Of these reflective films 23 and 24, the first reflective film 23 made of the lower metal film 6a is formed into a circular film having a diameter corresponding to the diameter of the base of the truncated conical convex portion 13, The second reflective film 24 made of the upper metal film 11a is formed in a circular film having a smaller diameter than the first reflective film 23, and the second reflective film 24 is incident from the observation side. Of the light transmitted through the liquid crystal layer 27, the light incident on the second reflection film 24 is reflected to the observation side, and the first reflection film 23 is incident from the observation side and is incident on the liquid crystal layer 27. Of the light transmitted through the second reflection film 24 and incident on the outer peripheral portion of the first reflection film 23 (the portion protruding around the second reflection film 24) through the periphery of the second reflection film 24 Reflect to the side.

すなわち、前記画素28の前記画素電極3の各正方形状電極部3a,3b,3cにそれぞれ対応する複数の領域のうち、これらの領域の中央部の前記凸部13に対応する円形の領域により前記反射表示部28aが形成され、前記複数の領域の前記反射表示部28aの周囲の領域により前記透過表示部28bが形成されている。   That is, among the plurality of regions respectively corresponding to the square electrode portions 3a, 3b, and 3c of the pixel electrode 3 of the pixel 28, the circular region corresponding to the convex portion 13 at the center of these regions. A reflective display portion 28a is formed, and the transmissive display portion 28b is formed by a region around the reflective display portion 28a of the plurality of regions.

この液晶表示素子は、複数の画素電極3とTFT5と走査線14及び信号線15と複数の凸部13を、一対の基板1,2のうちの観察側とは反対側の後基板1の内面に設け、前記凸部13を、前記画素28の面積に対して予め定めた比率の面積を有する形状に形成し、前記後基板1に、前記観察側から前記凸部13に対応する部分に入射した光を反射して前記観察側へ出射する反射表示部28aと、前記観察側とは反対側から入射した光を透過させて前記観察側へ出射する前記反射表示部28a以外の透過表示部28bとを複数の画素28毎に形成するための反射膜23,24を設けているため、液晶表示素子の使用環境の光である外光を利用する反射表示と、前記液晶表示素子の観察側とは反対側に配置された図示しない面光源からの照明光を利用する透過表示とを行なうことができる。   This liquid crystal display element includes a plurality of pixel electrodes 3, TFTs 5, scanning lines 14, signal lines 15, and a plurality of convex portions 13, and the inner surface of the rear substrate 1 on the opposite side of the pair of substrates 1 and 2 from the observation side. The convex portion 13 is formed in a shape having an area with a predetermined ratio with respect to the area of the pixel 28, and is incident on the rear substrate 1 from the observation side to a portion corresponding to the convex portion 13 The reflective display unit 28a that reflects the emitted light and emits it to the observation side, and the transmissive display unit 28b other than the reflective display unit 28a that transmits the light incident from the opposite side to the observation side and emits it to the observation side Are provided for each of the plurality of pixels 28, so that a reflective display that uses external light, which is light in the usage environment of the liquid crystal display element, and an observation side of the liquid crystal display element, Is from a surface light source (not shown) placed on the opposite side It can be performed transmissive display and utilize.

また、この実施例では、前記反射膜23,24を、前記凸部13を形成する積層膜のうちの、前記TFT5のゲート電極6及び走査線14と同じ金属膜からなる下部金属膜6aと、ドレイン電極11D及びソース電極11Sと同じ金属膜からなる上部金属膜11aとにより形成しているため、前記反射膜23,24を、前記TFT5の形成工程を利用して、液晶表示素子の製造コストを増加させることなく形成することができる。   Further, in this embodiment, the reflective films 23 and 24 are formed of the lower metal film 6a made of the same metal film as the gate electrode 6 and the scanning line 14 of the TFT 5 in the laminated film forming the convex portion 13, and Since the drain electrode 11D and the upper metal film 11a made of the same metal film as the source electrode 11S are formed, the reflective films 23 and 24 are formed using the TFT 5 formation process, thereby reducing the manufacturing cost of the liquid crystal display element. It can be formed without increasing.

図14は、この実施例の液晶表示素子の1つの画素28における前記電極3,20間に電圧を印加しないときの液晶分子の配向状態を模式的に示した断面図、図15は、前記1つの画素28における前記電極3,20間に電圧を印加したときの液晶分子の配向状態を模式的に示した断面図である。なお、図14及び図15では、前記凸部13を簡略化している。   FIG. 14 is a cross-sectional view schematically showing the alignment state of liquid crystal molecules when no voltage is applied between the electrodes 3 and 20 in one pixel 28 of the liquid crystal display element of this embodiment, and FIG. 3 is a cross-sectional view schematically showing an alignment state of liquid crystal molecules when a voltage is applied between the electrodes 3 and 20 in one pixel 28. FIG. In FIGS. 14 and 15, the convex portion 13 is simplified.

図14のように、前記電極3,20間に電圧を印加しないときは、前記液晶層27の液晶分子27aが、一対の基板1,2の内面にそれぞれ設けられた垂直配向膜25,26の垂直配向性により、前記凸部13に対応する部分以外の領域において、基板1,2面に対して実質的に垂直に配向し、前記凸部13に対応する部分では、後基板1側の前記凸部13の近傍の液晶分子27aが前記凸部13の頂面及び周面に対して実質的に垂直な方向に分子長軸を向けて配向し、前基板2の近傍の液晶分子27aが前記前基板2面に対して実質的に垂直に配向した状態に配向する。   As shown in FIG. 14, when no voltage is applied between the electrodes 3 and 20, the liquid crystal molecules 27a of the liquid crystal layer 27 are formed on the vertical alignment films 25 and 26 provided on the inner surfaces of the pair of substrates 1 and 2, respectively. Due to the vertical alignment property, the substrate is oriented substantially perpendicularly to the surfaces of the substrates 1 and 2 in a region other than the portion corresponding to the convex portion 13, and the portion on the rear substrate 1 side in the portion corresponding to the convex portion 13. The liquid crystal molecules 27a in the vicinity of the convex portion 13 are aligned with the molecular major axis in a direction substantially perpendicular to the top and peripheral surfaces of the convex portion 13, and the liquid crystal molecules 27a in the vicinity of the front substrate 2 are It is oriented in a state of being oriented substantially perpendicular to the front substrate 2 surface.

また、前記電極3,20間に電圧を印加すると、前記画素電極3の各正方形状電極部3a,3b,3cに対応する各領域の液晶分子27aがそれぞれ、前記凸部13の近傍の電位分布と各画素部の周辺部の液晶分子の挙動に誘導され、図15のように、前記各領域毎に、その領域の周縁部から中央部に向かって安定に倒れ配向する。   When a voltage is applied between the electrodes 3 and 20, the liquid crystal molecules 27 a in the respective regions corresponding to the respective square electrode portions 3 a, 3 b and 3 c of the pixel electrode 3 are respectively distributed in potential in the vicinity of the convex portion 13. Induced by the behavior of the liquid crystal molecules at the periphery of each pixel portion, as shown in FIG. 15, each region is stably tilted and oriented from the peripheral portion to the central portion of the region.

すなわち、この液晶表示素子は、前記画素電極3を、前記凸部13を覆って形成しているため、前記電極3,20間への電圧の印加により前記画素電極3の各正方形状電極部3a,3b,3cに対応する各領域にそれぞれ生成する電界は、図15にその等電位線eを示したように、前記凸部13に対応する部分の電位が、前記領域の他の部分の電位に対して前基板2側に偏った電界である。   That is, in this liquid crystal display element, since the pixel electrode 3 is formed so as to cover the convex portion 13, each square electrode portion 3 a of the pixel electrode 3 is applied by applying a voltage between the electrodes 3 and 20. , 3b and 3c, the electric field generated in each region corresponds to the potential of the portion corresponding to the convex portion 13 as shown in the equipotential line e in FIG. The electric field is biased toward the front substrate 2 side.

そのため、前記液晶分子27aは、前記電圧の印加により、前記画素電極3の各正方形状電極部3a,3b,3cに対応する各領域毎に、前記等電位線eに沿って、前記領域の周縁部から中央部に向かって、前記凸部13の中心に対応する部分を倒れ込み方向の中心として安定に倒れ配向する。   Therefore, the liquid crystal molecules 27a are applied to the periphery of the region along the equipotential line e for each region corresponding to each of the square electrode portions 3a, 3b, 3c of the pixel electrode 3 by applying the voltage. From the portion toward the center portion, the portion corresponding to the center of the convex portion 13 is stably tilted with the portion in the tilting direction as the center.

したがって、この液晶表示素子は、前記液晶分子27aを、前記複数の画素28毎に、前記電極3,20間への電圧の印加により、前記画素28の縁部から中央部に向かって安定に倒れ配向させ、前記反射表示のときも、表示のときも、ざらつき感の無い良好な品質の画像を表示することができる。   Therefore, in this liquid crystal display element, the liquid crystal molecules 27a are stably tilted from the edge of the pixel 28 toward the center by applying a voltage between the electrodes 3 and 20 for each of the plurality of pixels 28. It is possible to display an image with a good quality without a feeling of roughness in both the reflective display and the display.

しかも、前記液晶表示素子は、前記画素電極3を、前記凸部13を覆って形成しているため、前記液晶分子27aを、前記電圧の印加により前記画素28の縁部から中央部に向かってさらに安定に倒れ配向させ、より高品質の画像を表示することができる。   In addition, since the pixel electrode 3 is formed so as to cover the convex portion 13 in the liquid crystal display element, the liquid crystal molecules 27a are moved from the edge of the pixel 28 toward the center by applying the voltage. Furthermore, it is possible to stably tilt and align and display a higher quality image.

なお、この実施例では、前記凸部13を、前記TFT5を構成する複数の膜の全てと同じ膜の積層膜により形成しているが、前記凸部13は、図9、図10及び図11に示した実施例と同じ積層膜により形成してもよい。   In this embodiment, the convex portion 13 is formed of a laminated film having the same film as all of the plurality of films constituting the TFT 5, but the convex portion 13 is formed of FIGS. 9, 10, and 11. You may form by the same laminated film as the Example shown in.

また、前記凸部13は、前記TFT5を構成する複数の膜のうちの一部の膜と同じ膜の積層膜により形成してもよく、その場合は、前記凸部13を、前記TFT5を構成する複数の膜のうちのゲート電極6及び走査線14と同じ金属膜からなる下部金属膜6aと、ドレイン電極11D及びソース電極11Sと同じ金属膜からなる上部金属膜11aとの少なくとも一方を含む積層膜により形成する。   The convex portion 13 may be formed of a laminated film that is the same film as a part of the plurality of films constituting the TFT 5, and in this case, the convex portion 13 constitutes the TFT 5. A stack including at least one of a lower metal film 6a made of the same metal film as the gate electrode 6 and the scanning line 14 and an upper metal film 11a made of the same metal film as the drain electrode 11D and the source electrode 11S. It is formed by a film.

(第6の実施形態)
図16はこの発明の第6の実施例を示す液晶表示素子の一方の基板(後基板)の一部分の平面図であり、この実施例の液晶表示素子は、上述した第2の実施例における画素電極3の長手方向の略全長にわたる細長形状の凸部13aを、画素28の面積に対して予め定めた比率(例えば25〜50%)の面積を有する形状に形成するとともに、前記凸部13aを、上述した第5の実施例の凸部13と同様に、反射表示部28aと、前記反射表示部28a以外の透過表示部28bとを複数の画素28毎に形成するための第1と第2の反射膜23,24の少なくとも一方を備えた構造としたものである。
(Sixth embodiment)
FIG. 16 is a plan view of a part of one substrate (rear substrate) of a liquid crystal display device according to the sixth embodiment of the present invention. The liquid crystal display device of this embodiment is a pixel in the second embodiment described above. The elongated convex portion 13a extending over substantially the entire length in the longitudinal direction of the electrode 3 is formed into a shape having an area with a predetermined ratio (for example, 25 to 50%) with respect to the area of the pixel 28, and the convex portion 13a is formed. As in the convex portion 13 of the fifth embodiment described above, the first and second for forming the reflective display portion 28a and the transmissive display portion 28b other than the reflective display portion 28a for each of the plurality of pixels 28. In this structure, at least one of the reflective films 23 and 24 is provided.

なお、上記第5及び第6の実施例では、前記反射膜23,24を、前記凸部13,13aを形成する積層膜のうちの少なくとも1つの金属膜により形成しているが、前記凸部13,13aを、透明な複数の膜により形成し、前記反射表示部28aと透過表示部28bとを複数の画素28毎に形成するための反射膜を、後基板1の外面に設けてもよい。   In the fifth and sixth embodiments, the reflection films 23 and 24 are formed of at least one metal film among the laminated films forming the protrusions 13 and 13a. 13 and 13a may be formed of a plurality of transparent films, and a reflective film for forming the reflective display portion 28a and the transmissive display portion 28b for each of the plurality of pixels 28 may be provided on the outer surface of the rear substrate 1. .

2…基板、3…画素電極、3a,3b,3c…電極部、4…スリット、5…TFT、6…ゲート電極、7…ゲート絶縁膜、8…i型半導体膜、9…ブロッキング絶縁膜、10…n型半導体膜、11D…ドレイン電極、11S…ソース電極、12…オーバーコート絶縁膜、16…容量電極、17…低抵抗膜、13,13a…凸部、6a…下部金属膜、8a…下部半導体膜、9a…中間絶縁膜、10a…上部半導体膜、11a…上部金属膜、12a…上部絶縁膜、16a…導電膜、17a…中間金属膜、18a…第2の中間絶縁膜、19…補償容量、20…対向電極、21…遮光膜、22R,22G,22B…カラーフィルタ、23,24…反射膜、25,26…垂直配向膜、27…液晶層、27a…液晶分子、28…画素、28a…反射表示部、28b…透過表示部。   DESCRIPTION OF SYMBOLS 2 ... Substrate, 3 ... Pixel electrode, 3a, 3b, 3c ... Electrode part, 4 ... Slit, 5 ... TFT, 6 ... Gate electrode, 7 ... Gate insulating film, 8 ... i-type semiconductor film, 9 ... Blocking insulating film, DESCRIPTION OF SYMBOLS 10 ... n-type semiconductor film, 11D ... Drain electrode, 11S ... Source electrode, 12 ... Overcoat insulating film, 16 ... Capacitance electrode, 17 ... Low resistance film, 13, 13a ... Convex part, 6a ... Lower metal film, 8a ... Lower semiconductor film, 9a ... intermediate insulating film, 10a ... upper semiconductor film, 11a ... upper metal film, 12a ... upper insulating film, 16a ... conductive film, 17a ... intermediate metal film, 18a ... second intermediate insulating film, 19 ... Compensation capacitance, 20 ... counter electrode, 21 ... light shielding film, 22R, 22G, 22B ... color filter, 23, 24 ... reflection film, 25, 26 ... vertical alignment film, 27 ... liquid crystal layer, 27a ... liquid crystal molecule, 28 ... pixel , 28a ... reflection display section 28b ... the transmissive display portion.

Claims (11)

誘電率異方性が負の液晶からなる液晶層を介して第1の基板と第2の基板とが対向するように配置され、
表示画素毎に画素電極が複数の電極部に区分され、前記表示画素毎に前記画素電極が薄膜トランジスタに接続されている液晶表示素子であって、
前記各電極部の中央に対応する位置に配置され、前記液晶層の厚さよりも低い高さに形成された凸部を有し、
前記凸部は、
前記薄膜トランジスタのゲートを覆うゲート絶縁膜と、
前記電極部よりも小さい形状で且つ下層から上層に向けて順に小さくなる形状になるように前記ゲート絶縁膜上に形成された複数の絶縁層と、
上下に隣接する前記絶縁層間に配置され、上層側に接する絶縁膜よりも大きい形状に形成された半導体膜または金属膜と、
を有していることを特徴とする液晶表示素子。
The first substrate and the second substrate are arranged to face each other through a liquid crystal layer made of a liquid crystal having a negative dielectric anisotropy,
A liquid crystal display element in which a pixel electrode is divided into a plurality of electrode portions for each display pixel, and the pixel electrode is connected to a thin film transistor for each display pixel ,
It is arranged at a position corresponding to the center of each electrode part, and has a convex part formed at a height lower than the thickness of the liquid crystal layer,
The convex portion is
A gate insulating film covering the gate of the thin film transistor;
A plurality of insulating layers formed on the gate insulating film so as to have a shape smaller than the electrode portion and gradually decreasing from the lower layer toward the upper layer;
A semiconductor film or a metal film, which is disposed between the insulating layers adjacent to each other above and below and formed in a shape larger than the insulating film in contact with the upper layer side;
A liquid crystal display element comprising:
前記半導体膜または前記金属膜は、下層側に接する絶縁膜の端面が露出する形状に形成されていることを特徴とする請求項1に記載の液晶表示素子。   The liquid crystal display element according to claim 1, wherein the semiconductor film or the metal film is formed in a shape in which an end face of an insulating film in contact with a lower layer side is exposed. 前記半導体膜または金属膜は、前記薄膜トランジスタを構成する何れかの膜と同一の材料で同時に形成されていることを特徴とする請求項1または2に記載の液晶表示素子。 3. The liquid crystal display element according to claim 1, wherein the semiconductor film or the metal film is formed of the same material as any of the films constituting the thin film transistor at the same time. 前記凸部における前記各絶縁層及び前記半導体膜または前記金属膜は、それぞれ円形形状に形成されていることを特徴とする請求項1からの何れかに記載の液晶表示素子。 Each of the insulating layer and the semiconductor film or the metal film in the convex portions, the liquid crystal display device according to any one of claims 1 to 3, respectively, characterized in that it is formed in a circular shape. 前記液晶層は、前記画素電極に対向するように配置された対向電極と前記画素電極との間に電圧が印加されていないときに、前記各基板面に対して液晶分子が垂直に配向するように設定されていることを特徴とする請求項1からの何れかに記載の液晶表示素子。 The liquid crystal layer is arranged such that liquid crystal molecules are aligned perpendicular to the substrate surfaces when no voltage is applied between the pixel electrode and the counter electrode disposed to face the pixel electrode. the liquid crystal display device according to any one of claims 1 to 4, characterized in that it is set to. 前記対向電極と同電位に設定される容量電極が、前記画素電極の下層側で且つ当該画素電極において隣接する2つの前記凸部間に配置されていることを特徴とする請求項に記載の液晶表示素子。 Capacitor electrodes which are set to the counter electrode and the same potential, according to claim 5, characterized in that it is arranged between two of said protrusions adjacent to each other in and the pixel electrode in the lower layer side of the pixel electrode Liquid crystal display element. 前記容量電極は、前記画素電極において隣接する2つの電極部間に介在するスリットを塞ぐように配置されていることを特徴とする請求項に記載の液晶表示素子。 The liquid crystal display element according to claim 6 , wherein the capacitor electrode is disposed so as to close a slit interposed between two adjacent electrode portions in the pixel electrode. 前記画素電極において前記各電極部は所定の接続部により電気的に接続されていることを特徴とする請求項1からの何れかに記載の液晶表示素子。 The liquid crystal display device according to any one of claims 1 to 7, wherein the electrode portions are electrically connected by a predetermined connecting portion in the pixel electrode. 誘電率異方性が負の液晶からなる液晶層を介して第1の基板と第2の基板とが対向するように配置され、
前記液晶層の配向方向を区分けする複数の電極部を有した画素電極が表示画素毎に薄膜トランジスタに接続されるように形成されている液晶表示素子であって、
前記各電極部の中央に対応する位置に配置され、前記液晶層の厚さよりも低い高さに形成された凸部を有し、
前記凸部は、
前記薄膜トランジスタのゲートを覆うゲート絶縁膜と、
前記電極部よりも小さい形状で且つ下層から上層に向けて順に小さくなる形状になるように前記ゲート絶縁膜上に形成された複数の絶縁層と、
上下に隣接する前記絶縁層間に配置され、上層側に接する絶縁膜よりも大きい形状に形成された半導体膜または金属膜と、
を有していることを特徴とする液晶表示素子。
The first substrate and the second substrate are arranged to face each other through a liquid crystal layer made of a liquid crystal having a negative dielectric anisotropy,
A liquid crystal display element formed such that a pixel electrode having a plurality of electrode portions for dividing the alignment direction of the liquid crystal layer is connected to a thin film transistor for each display pixel,
It is arranged at a position corresponding to the center of each electrode part, and has a convex part formed at a height lower than the thickness of the liquid crystal layer,
The convex portion is
A gate insulating film covering the gate of the thin film transistor;
A plurality of insulating layers formed on the gate insulating film so as to have a shape smaller than the electrode portion and gradually decreasing from the lower layer toward the upper layer;
A semiconductor film or a metal film, which is disposed between the insulating layers adjacent to each other above and below and formed in a shape larger than the insulating film in contact with the upper layer side;
A liquid crystal display element comprising:
誘電率異方性が負の液晶からなる液晶層を介して第1の基板と第2の基板とが対向するように配置され、
前記液晶層の配向方向を区分けする複数のスリットが設けられた画素電極が表示画素毎に薄膜トランジスタに接続されるように形成されている液晶表示素子であって、
隣接する2つの前記スリット間の中央に対応する位置に配置され、前記液晶層の厚さよりも低い高さに形成された凸部を有し、
前記凸部は、
前記薄膜トランジスタのゲートを覆うゲート絶縁膜と、
前記画素電極よりも小さい形状で且つ下層から上層に向けて順に小さくなる形状になるように前記ゲート絶縁膜上に形成された複数の絶縁層と、
上下に隣接する前記絶縁層間に配置され、上層側に接する絶縁膜よりも大きい形状に形成された半導体膜または金属膜と、
を有していることを特徴とする液晶表示素子。
The first substrate and the second substrate are arranged to face each other through a liquid crystal layer made of a liquid crystal having a negative dielectric anisotropy,
A liquid crystal display element formed such that a pixel electrode provided with a plurality of slits for dividing the alignment direction of the liquid crystal layer is connected to a thin film transistor for each display pixel,
It is disposed at a position corresponding to the center between two adjacent slits, and has a convex portion formed at a height lower than the thickness of the liquid crystal layer,
The convex portion is
A gate insulating film covering the gate of the thin film transistor;
A plurality of insulating layers formed on the gate insulating film so as to have a shape smaller than the pixel electrode and gradually decreasing from the lower layer toward the upper layer;
A semiconductor film or a metal film, which is disposed between the insulating layers adjacent to each other above and below and formed in a shape larger than the insulating film in contact with the upper layer side;
A liquid crystal display element comprising:
誘電率異方性が負の液晶からなる液晶層を介して第1の基板と第2の基板とが対向するように配置され、
表示画素毎に画素電極が薄膜トランジスタに接続され、
前記液晶層の配向方向を区分けする直線形状の凸部前記画素電極に対応する領域に前記表示画素毎に形成されている液晶表示素子であって、
前記凸部は、
前記薄膜トランジスタのゲートを覆うゲート絶縁膜と、
前記画素電極よりも小さい形状で且つ下層から上層に向けて順に小さくなる形状になるように前記ゲート絶縁膜上に形成された複数の絶縁層と、
上下に隣接する前記絶縁層間に配置され、上層側に接する絶縁膜よりも大きい形状に形成された半導体膜または金属膜と、を有し、
前記液晶層の厚さよりも低い高さに形成されていることを特徴とする液晶表示素子。
The first substrate and the second substrate are arranged to face each other through a liquid crystal layer made of a liquid crystal having a negative dielectric anisotropy,
A pixel electrode is connected to the thin film transistor for each display pixel,
A liquid crystal display device in which the convex portion of the linear shape for dividing the orientation direction of the liquid crystal layer is formed on the display each pixel in a region corresponding to the pixel electrode,
The convex portion is
A gate insulating film covering the gate of the thin film transistor;
A plurality of insulating layers formed on the gate insulating film so as to have a shape smaller than the pixel electrode and gradually decreasing from the lower layer toward the upper layer;
A semiconductor film or a metal film that is disposed between the insulating layers adjacent to each other above and below and formed in a shape larger than the insulating film in contact with the upper layer side, and
A liquid crystal display element having a height lower than the thickness of the liquid crystal layer.
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