JP4808055B2 - Signal processing device - Google Patents

Description

  The present invention relates to a signal processing device that detects a call signal and polarity reversal and executes processing corresponding to the detection.

  Conventionally, a communication device such as a facsimile device needs to detect a polarity reversal signal before receiving a telephone number when it is subscribed to a number display service in addition to a call signal detection. Each required a dedicated circuit. For this reason, it became a factor which hindered cost reduction, size reduction, and power saving.

  On the other hand, along with recent advances in semiconductor technology and isolation technology, devices that perform line control by substituting the function of a transformer with a semiconductor element or the like have appeared and are becoming popular. A semiconductor DAA (Data Access Arrangement) using these semiconductor elements is composed of a semiconductor, so that it is possible not only to replace a function of a conventional transformer but also to implement a higher function by mounting other functions. (For example, Patent Document 1).

  In a communication apparatus such as a facsimile apparatus using such a semiconductor DAA, the amount of change in the line voltage is monitored, and the rising and falling edges of the line voltage change are detected and binarized, so that the call signal and polarity inversion are performed. Can be detected. In addition, there is a type that can select half-wave rectification or full-wave rectification as the binarization method.

  Here, consider a detection device that includes means for binarizing and outputting a voltage fluctuation of a line by half-wave rectification or full-wave rectification, and outputting the binarized signal by a single signal line. FIG. 3 shows an example of the waveform of the calling signal and its binarized signal. The waveform obtained by ORing the binarization waveform of the rising detection of the half-wave rectification and the binarization waveform of the falling detection becomes the binarization waveform of the full-wave rectification. By measuring the time between rising edges of the binarized waveform, the frequency of the call signal is calculated, and it is determined whether or not it is a call signal. FIG. 4 shows the line voltage and the binarized waveform at the time of polarity reversal. That is, in the case of half-wave rectification, polarity inversion cannot be detected, and in order to detect polarity inversion of either polarity, it is necessary to set full wave.

  However, there are various call signal generators such as private branch exchanges (PBX) and TAs (terminal adapters) in the world, and some of them output a call signal close to a rectangular wave. As described above, it is necessary to set the full wave in order to detect the extreme opposition. However, in the full wave setting, when a rectangular wave paging signal is received as shown in FIG. 5, the paging frequency is normally detected. There is a problem that the call signal cannot be detected.

JP 2004-112680 A

  Thus, in the communication device using the conventional semiconductor DAA, in the case of half-wave rectification, polarity reversal cannot be detected, and in the case of full-wave rectification, there is a case where the calling frequency cannot be detected normally. There has been a demand for a method capable of reliably detecting both.

  The present invention has been made in view of the above, and an object of the present invention is to provide a signal processing apparatus capable of reliably performing polarity inversion / calling signal detection without providing a dedicated independent detection circuit. .

  In order to solve the above-described problems and achieve the object, the invention according to claim 1 is a binarization that binarizes an input signal by either half-wave rectification or full-wave rectification and outputs a binarized signal. In the standby state, the signal generating means sets the processing in the binarized signal generating means to full wave rectification, and the binary signal is triggered when the binarized signal becomes active during the full wave rectification setting. Full-wave / half-wave switching means for switching the processing in the digitized signal generating means to half-wave rectification, and determining whether or not the input signal is a paging signal based on the frequency detection of the binarized signal during this half-end rectification setting When determining that the input signal is the call signal or the polarity reversal by determining that the polarity is inverted when it is determined that the signal is not the call signal, and the determination result of the determination means is the call signal Performs the incoming call operation, and the determination means When the determination is polarity inversion, characterized in that it comprises a control means for performing a process corresponding to said polar reversal.

  The invention according to claim 2 is characterized in that the control means performs a number display reception operation as a process corresponding to polarity inversion.

  According to a third aspect of the present invention, the full wave / half wave switching means switches the processing in the binarized signal generating means from half wave rectification to full wave rectification at a predetermined timing after completion of the determination by the determination means. It is characterized by.

  The invention according to claim 4 is characterized in that the predetermined timing is the end of communication.

  Set to full-wave rectification in the standby state, switch to half-wave rectification triggered by the fact that the binarized signal becomes active during this full-wave rectification setting, and input based on the frequency detection of the binarized signal during half-end rectification setting Since it is determined whether the signal is a call signal, and when it is determined that the signal is not a call signal, it is determined that the polarity is reversed, so that it is determined whether the input signal is a call signal or a polarity reversal. There is an effect that the polarity inversion / calling signal can be accurately detected without requiring an independent dedicated circuit.

  Exemplary embodiments of an image forming apparatus including a signal processing apparatus according to the present invention will be described below in detail with reference to the accompanying drawings.

(First embodiment)
FIG. 1 is a block diagram showing the overall configuration of the image forming apparatus 1 according to the first embodiment of the present invention. As shown in FIG. 1, the image forming apparatus 1 includes a diode bridge 10, a cutting unit 11, a semiconductor DAA (silicon DAA) 12, a modem 13, a system control unit 14, a reading unit 15, and an image processing unit. 16 and a printing unit 17 at least.

  First, each part (diode bridge 10, cutting part 11, semiconductor DAA 12, modem 13 and system control part 14) surrounded by a dotted line in FIG. 1 will be described in detail with reference to FIG. FIG. 2 is a block diagram showing in detail the configuration of the diode bridge 10, the cutting unit 11, the semiconductor DAA 12, the modem 13, and the system control unit 14 shown in FIG.

  The diode bridge 10 is configured as shown in the figure, and is connected to the line to rectify the line current. The cutting unit 11 cuts a circuit between the primary side line control unit 120 and the diode bridge 10 of the semiconductor DAA 12 described later.

  The semiconductor DAA 12 includes a primary side line control unit 120, a data transfer circuit 121, and a secondary side serial I / F unit 122. The primary side line control unit 120 is disposed on the primary side of the line via the diode bridge 10 and operates by local power supply to exchange data with the secondary side to control the line and exchange transmission / reception data. Do. The primary side line control unit 120 includes a data transmission / reception unit 120a, a line closing recognition unit 120b, a line voltage detection unit 120c, and a binarized signal generation unit 120d.

  The data transmission / reception unit 120a receives data transmitted from the line and transmits data transmitted from the modem 13 described later to the line. The line closing recognition unit 120b recognizes the closing of the line based on a line closing signal sent from the system control unit 14 described later. The line voltage detector 120c divides and detects the line voltage with a capacitor or the like. The binarized signal generation unit 120d generates a binarized signal by binarizing an input signal input via a line using a predetermined binarization method (half wave or full wave).

  The data transfer circuit 121 is composed of a linear coupler, a transformer, a capacitor, and the like, and transmits and receives data with the primary and secondary sides insulated. The data delivery circuit 121 is, for example, insulated by a capacitor and performs data delivery using a linear coupler that is an insulated photoelectric element. The secondary serial I / F unit 122 is arranged on the secondary side, and exchanges data with the primary line control unit 120 through the serial I / F.

The modem 13 controls transmission and reception of data and performs network control and network recognition.

  The system control unit 14 includes a CPU (Central Processing Unit) 140, a memory 141, and the like. The system control unit 14 uses the RAM in the memory 141 as a work memory based on a program in the ROM of the memory 141. Each part is controlled to execute basic processing as the image forming apparatus 1 and to execute call signal detection processing (including incoming operation execution processing), which is a characteristic part of the present invention.

  The CPU 140 controls the entire image forming apparatus 1. The CPU 140 includes a binarized signal assert detection unit 140a, a frequency calculation unit 140b, a paging signal detection unit 140c, a half wave / full wave determination unit 140d, a half wave / full wave setting unit 140e, and an incoming call operation execution unit. 140f. The binarized signal assert detector 140a detects the assertion of the binarized signal output from the binarized signal generator 120d. The frequency calculating unit 140b calculates the frequency of the input signal using the binarized signal generated by the binarized signal generating unit 120e. The call signal detection unit 140c is input based on whether or not the frequency calculated by the frequency calculation unit 140b is within a preset frequency range (specifically, an appropriate (appropriate) frequency range that the call signal can take). Whether the signal is a ringing signal is detected. The half wave / full wave determination unit 140d determines whether the current setting is half wave rectification or full wave rectification. The half-wave / full-wave setting unit 140e detects “full-wave rectification” when the detection result of the half-wave / full-wave detection unit 140d detects “half-wave rectification”. In this case, the setting is changed to “half-wave rectification” at a predetermined timing. The incoming call operation execution unit 140f executes (starts) the incoming call operation when the detection result of the call signal detection unit 140c is detected as “calling signal”. The number display operation execution unit 140g executes the operation of receiving the number display information when the call signal detection unit 140c determines that the signal is a polarity inversion signal.

  The memory 141 includes, for example, a ROM (Read Only Memory), a RAM (Random Access Memory), and the like. The ROM includes a basic processing program and a call signal detection program (including an incoming operation execution process) of the image forming apparatus 1. And various data necessary for executing these programs (for example, an appropriate frequency range that can be taken by the call signal described above) are stored. The RAM is used as a work memory when executing various programs.

  Returning again to FIG. 1, the reading unit 15 scans and reads a document placed at a predetermined position of the image forming apparatus 1, thereby creating image data corresponding to the document. The image processing unit 16 processes image data (image data related to a document) received by the modem 13 via a line. The printing unit 17 prints the image data processed by the image processing unit 16 and restores the document.

  FIG. 6 is a flowchart showing an embodiment of the present invention.

  First, in the standby state, the full-wave / half-wave setting unit 104 d of the CPU 140 sets the full-wave / half-wave setting signal to full wave and outputs the full-wave / half-wave setting signal to the secondary serial I / F unit 122 of the semiconductor DAA 12. This full wave / half wave setting signal is input to the binarized signal generating unit 120d via the data transfer circuit 121, and the binarized signal generating unit 120d thereby sets the processing performed by itself to full wave rectification ( Step S100). After this setting, the binarized signal generating unit 120d performs full-wave rectification on the input signal, and the binarized signal that is the full-wave rectified output is passed through the data transfer circuit 121, the secondary serial I / F unit 122. Input to the CPU 140. When detecting that the binarized signal is asserted (step S110), the binarized signal assert detector 140a of the CPU 140 outputs the detection signal to the full / half wave setting unit 104d. The full wave / half wave setting unit 104d uses this as a trigger to switch the full wave setting of the binarized signal generation unit 120d to the half wave setting (step S120). That is, the full-wave / half-wave setting unit 104d outputs the full-wave / half-wave setting signal set to the half wave to the binarized signal generation unit 120d via the secondary side serial I / F unit 122 and the data transfer circuit 121. Thus, the binarized signal generation unit 120d sets the processing performed by itself to half-wave rectification. Therefore, thereafter, the binarized signal generation unit 120d performs half-wave rectification on the input signal, and the binarized signal that is the half-wave rectified output is sent to the data transfer circuit 121 and the secondary side serial I / F unit 122. To the CPU 140 via FIGS. 3 to 5 show waveforms after binarization when the ringing signal and the polarity inversion waveform are respectively full-wave rectified and half-wave rectified. Although FIGS. 3 to 5 show examples of H_active assertion, of course, there is no problem with L_active assertion.

  After the processing in the binarized signal generation unit 120d is switched to the half-wave setting, the frequency calculation unit 140c calculates the frequency of the binarized signal and inputs the calculated frequency to the paging signal detection unit 140d. The call signal detection unit 140d determines whether the frequency value input from the frequency calculation unit 140c is within an appropriate (appropriate) frequency range that the call signal can take, so that the input signal is the call signal. Whether or not (step S130). When the call signal detection unit 140d determines that the input signal is a call signal, the call signal detection unit 140d inputs the detection signal to the incoming call operation execution unit 140f. As a result, the incoming operation execution unit 140f performs the incoming operation (step S140). On the other hand, if the call signal detection unit 140d does not determine the call signal (step S130), it can be determined that the previous binarization signal is asserted by polarity inversion (step S150).

  Next, a number display service will be described as an example in which polarity reversal occurs during line on-hook.

  This number display service is a service that is available to the called party's communication equipment that is connected to the line subscribed to this service and has a function of receiving a telephone number, and sends a normal ringing signal (IR). Before the call is made, the telephone number is sent out.

  FIG. 7 shows the number display connection sequence.

  When the caller makes a call (S200), the central office inverts the polarities of the two telephone lines L1 and L2 (S210). The telephone station then sends an information receiving terminal activation signal (CAR) to the called party's telephone (S220). The telephone of the called party who has received this CAR closes the telephone line and sends a primary response signal to the telephone station (S230). When the telephone station detects the primary response signal, an information signal (modem signal) of the telephone number of the calling party's telephone is sent to the called party's telephone (S240). The telephone of the called party who has received this modem signal sends a reception completion signal to the telephone office (S250). This reception completion signal is the same signal as the on-hook when the handset is lowered. When the telephone station detects the reception completion signal, the normal call signal (IR) (see FIG. 5) is transmitted (S260), assuming that the telephone number transmission processing is completed. Here, CAR is a call signal with cadence ON / OFF: 0.5 sec / 0.5 sec. IR is a normal call signal, and its cadence is ON / OFF: 1 second / 2 seconds.

  FIG. 8 is a flowchart showing an operation example when the number display service is subscribed.

  First, in the standby state, the full-wave / half-wave setting unit 104 d of the CPU 140 sets the full-wave / half-wave setting signal to full wave and outputs the full-wave / half-wave setting signal to the secondary serial I / F unit 122 of the semiconductor DAA 12. This full wave / half wave setting signal is input to the binarized signal generating unit 120d via the data transfer circuit 121, and the binarized signal generating unit 120d thereby sets the processing performed by itself to full wave rectification ( Step S300). After this setting, the binarized signal generating unit 120d performs full-wave rectification on the input signal, and the binarized signal that is the full-wave rectified output is passed through the data transfer circuit 121, the secondary serial I / F unit 122. Input to the CPU 140. When detecting that the binarized signal is asserted (step S310), the binarized signal assert detection unit 140a of the CPU 140 outputs the detection signal to the full wave / half wave setting unit 104d. The full wave / half wave setting unit 104d uses this as a trigger to switch the full wave setting of the binarized signal generation unit 120d to the half wave setting (step S320). That is, the full-wave / half-wave setting unit 104d outputs the full-wave / half-wave setting signal set to the half wave to the binarized signal generation unit 120d via the secondary side serial I / F unit 122 and the data transfer circuit 121. Thus, the binarized signal generation unit 120d sets the processing performed by itself to half-wave rectification. Therefore, thereafter, the binarized signal generation unit 120d performs half-wave rectification on the input signal, and the binarized signal that is the half-wave rectified output is sent to the data transfer circuit 121 and the secondary side serial I / F unit 122. To the CPU 140 via

  After the processing in the binarized signal generation unit 120d is switched to the half-wave setting, the frequency calculation unit 140c calculates the frequency of the binarized signal and inputs the calculated frequency to the paging signal detection unit 140d. The call signal detection unit 140d determines whether or not the frequency value input from the frequency calculation unit 140c is within an appropriate (appropriate) frequency range that the call signal (IR) can take. It is determined whether it is a signal (IR) (step S330). If the call signal detection unit 140d determines that the input signal is the call signal (IR), the call signal detection unit 140d can determine that the previous binarization signal is asserted by the call signal (IR), and the detection signal is transmitted to the incoming operation execution unit 140f. To enter. Thereby, the incoming call operation executing unit 140f performs the incoming call operation (step S340). On the other hand, when the call signal detection unit 140d does not determine the IR but determines the CAR (step S350), it can be determined that the previous binarization signal is asserted by polarity inversion, and the call signal detection unit 140d Inputs a detection signal to the number display operation execution unit 140g. As a result, the number display operation execution unit 140g performs the sequence operation of the number display (step S360).

  In FIG. 8, it is first determined whether or not it is IR, but there is no problem even if it is determined first whether or not it is CAR.

  Thus, according to this embodiment, the full-wave rectification is set in the standby state, and the half-wave rectification is switched to the half-wave rectification triggered by the binarization signal becoming active during the full-wave rectification setting. Based on the frequency detection of the binarized signal, it is determined whether the input signal is a call signal, and when it is determined that the input signal is not a call signal, it is determined that the polarity of the number display is reversed. Since it is determined whether it is the polarity inversion of the number display or not, it is possible to accurately detect the polarity inversion / calling signal without requiring an independent dedicated circuit, and the number display receiving operation is properly performed after detecting the polarity inversion. Can be done.

(Second Embodiment)
FIG. 9 is a flowchart showing another embodiment when the number display service is subscribed. The procedure of FIG. 9 is the same as that of FIG. 8 until the execution of the incoming operation (S440) by the incoming operation execution unit 140e or the number display operation execution (S450) by the number display operation execution unit 140f. Since the standby state needs to be set to full wave, in this second embodiment, before returning to the standby state, the full wave / half wave setting unit 140e performs a predetermined timing in the same manner as described above. The rectification process in the binarized signal generation unit 120d is automatically returned from the half-wave setting to the full-wave setting, and step S460 is added. The predetermined timing may be, for example, the end of communication.

  In addition, since it is not necessary to consider the detection of the extreme contradiction in a line not subscribed to the number display service, if the procedure shown in FIG. 8 or FIG. 9 is performed, it takes time to detect a normal call signal. It will take. Therefore, the anti-polarity detection mode and the non-detection mode are provided, and in the extreme anti-detection mode, the half-wave setting is always set so that the call signal can be detected earlier.

1 is a block diagram illustrating an image forming apparatus according to a first embodiment. 1 is a detailed block diagram illustrating an image forming apparatus according to a first embodiment. It is a figure which shows the example of the waveform binarized by the waveform of the calling signal and half-wave rectification. It is a figure which shows the example of the waveform binarized by the line voltage waveform (polarity inversion) and half-wave rectification. It is a figure which shows the example of the waveform binarized by the waveform of the calling signal and full wave rectification. It is a flowchart which shows the operation | movement procedure of 1st Embodiment. It is a connection sequence at the time of number display service subscription. It is a flowchart which shows the operation | movement procedure at the time of number display service subscription. It is a flowchart which shows the operation | movement procedure at the time of the number display service subscription of 2nd Embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Image forming apparatus 10 Diode bridge 11 Cutting part 12 Semiconductor DAA
120 Primary side line control unit 120a Binary signal assert detection unit 120b Data transmission / reception unit 120c Line closure recognition unit 120d Line voltage detection unit 120e Binary signal generation unit 121 Data transfer circuit 122 Secondary side serial I / F Part 13 Modem 14 System control part 140 CPU
140a Binarization signal assert detection unit 140b Frequency calculation unit 140c Paging signal detection unit 140d Full wave / half wave determination unit 140e Full wave / half wave setting unit 140f Incoming operation execution unit 140g Number display operation execution unit 141 Memory 15 Reading unit 16 Image processing unit 17 Printing unit

Claims (4)

Binarized signal generating means for binarizing an input signal by half-wave rectification or full-wave rectification and outputting a binarized signal;
In the standby state, the processing in the binarized signal generating unit is set to full wave rectification, and the binarized signal generating unit is triggered by the binarized signal becoming active during the full wave rectification setting. A full-wave / half-wave switching means for switching the processing in half-wave rectification,
Based on the frequency detection of the binary signal during the half-end rectification setting, it is determined whether or not the input signal is a ringing signal. Determination means for determining whether the signal is a polarity reversal;
Control means for performing an incoming call operation when the determination result of the determination means is a call signal, and performing processing corresponding to the polarity reversal when the determination result of the determination means is polarity reversal;
A signal processing apparatus comprising:   The signal processing apparatus according to claim 1, wherein the control unit performs a number display reception operation as a process corresponding to polarity inversion.   The full-wave / half-wave switching means switches the processing in the binarized signal generating means from half-wave rectification to full-wave rectification at a predetermined timing after completion of the determination by the determination means. 3. The signal processing apparatus according to 2.   The signal processing apparatus according to claim 1, wherein the predetermined timing is a communication end time.

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