JP4788474B2 - Semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a multi-layer structure electrode, and an air bridge electrode in which an upper layer electrode intersects a lower layer electrode in the air, and a method for manufacturing the same.

  FIGS. 13 to 16 are explanatory views for sequentially explaining, for example, the structure of this type of conventional semiconductor device disclosed in Patent Document 1 and the steps of the manufacturing method thereof. FIG. 13A is a side sectional view, and FIG. Is a plan view.

  First, as shown in FIG. 13, a plurality of wiring electrodes 3 are formed on the interlayer insulating film 2a formed on the semiconductor substrate 1 by using, for example, a lift-off method, and another interlayer insulating film 2b is formed thereon. Then, a contact hole 2 c is opened at a predetermined position on the wiring electrode 3.

  Next, as shown in FIG. 14, a pattern is formed with a resist 4a on the interlayer insulating film 2b, an opening reaching the surface of the wiring electrode 3 is formed by etching on the contact hole 2c, and then power is supplied onto the resist 4a. The electrode layer 5 is formed on the entire surface by, for example, sputtering.

Next, as shown in FIG. 15, a pattern is formed with another resist 4b on the feeding electrode layer 5, and the air bridge electrode 6 is formed by using, for example, a plating method.
After that, as shown in FIG. 16, the uppermost resist 4b in FIG. 15 is removed, the unnecessary power supply electrode layer 5 is removed by, for example, ion milling, and finally the resist 4a under the air bridge electrode 6 is also removed. The air bridge electrode 6 is formed.

JP-A-5-343543

  Since this type of conventional semiconductor device is configured as described above, the cross-sectional area of the leg connecting portion 6a connected to the wiring electrode 3 of the air bridge electrode 6 is reduced in order to reduce the size of the air bridge electrode. Then, the water flow or the like used for cleaning the wafer surface during chip separation acts as an external force as indicated by an arrow A in FIG. 17, and as a result, as shown by an arrow B in FIG. There is a problem that the part connection part 6a is peeled off from the wiring electrode 3 to bend and break.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a structure of a semiconductor device that is difficult to be deformed or broken even when subjected to an external force such as a water flow, and a manufacturing method thereof.

A semiconductor device according to the present invention includes a plurality of wiring electrodes provided on a semiconductor substrate and an air bridge electrode provided between predetermined wiring electrodes among the plurality of wiring electrodes, and the air bridge electrode is integrally formed. The connection between the wiring electrode and the air bridge electrode has a formed leg portion and a flat portion, and a digging portion is formed in the wiring electrode, and the connection portion of the leg portion of the air bridge electrode is formed in the digging portion. There line by embedding the write unit, the digging portion is to be formed as a hollow portion of the wedge-shaped towards the outside.

  The semiconductor device according to the present invention is configured as described above, and the end of the leg connection portion of the air bridge electrode is embedded in the digging portion formed in the wiring electrode, so that the external force from the lateral direction is In addition, the contact area between the wiring electrode and the leg connection part is greatly increased compared to the conventional one, and the adhesive force is improved, so the strength of the air bridge electrode is improved and external force is applied. However, peeling and destruction are less likely to occur.

Embodiment 1 FIG.
Embodiment 1 of the present invention will be described below with reference to the drawings. 1 to 4 are explanatory views for sequentially explaining the structure of the semiconductor device according to the first embodiment and the steps of the manufacturing method thereof, in which (a) is a side sectional view and (b) is a plan view. In addition, the same code | symbol is attached | subjected to FIG.

  In the structure and manufacturing method of the first embodiment, first, as shown in FIG. 1, a plurality of wiring electrodes 3 are formed on an interlayer insulating film 2a formed on a semiconductor substrate 1 by using, for example, a lift-off method. Another interlayer insulating film 2b is formed thereon and a contact hole 2c is opened at a predetermined position on the wiring electrode 3.

  Next, after forming a pattern with the resist 4a on the interlayer insulating film 2b, an opening 4c is formed on the contact hole 2c by etching such as ion milling indicated by an arrow 7, and further, a dug portion is formed in the wiring electrode 3. 3b is formed and the resist 4a is removed. The depth of the dug portion 3b is set to be approximately half of the thickness of the wiring electrode 3.

  Next, as shown in FIG. 2, a pattern is formed again with the resist 4a on the interlayer insulating film 2b, and then the power supply electrode layer 5 is formed on the entire surface by sputtering, for example. At this time, the feed electrode layer 5 is formed in the digging portion 3b of the wiring electrode 3 in a shape having a U-shaped cross section as shown in FIG.

  Thereafter, as shown in FIG. 3, a pattern is formed on the power supply electrode layer 5 with a resist 4b, and the air bridge electrode 6 is formed using, for example, a plating method. The air bridge electrode 6 is composed of a flat layer 6a extending on the power supply electrode layer 5 and leg portions 6b embedded in the digging portion 3b of the wiring electrode 3 connected to the flat layer 6a.

  Thereafter, as shown in FIG. 4, after removing the uppermost resist 4b in FIG. 3, the unnecessary power supply electrode layer 5 is removed by, for example, ion milling, and finally the resist 4a under the air bridge electrode 6 is also removed. The air bridge electrode 6 is formed.

  The semiconductor device and the manufacturing method according to the first embodiment are configured as described above, and the end of the leg connection portion of the air bridge electrode is embedded in the digging portion formed in the wiring electrode. In addition to sufficiently resisting external force from the direction, the contact area between the wiring electrode and the leg connection part is greatly increased compared to the conventional one, improving the adhesive force, so the strength of the air bridge electrode is improved. Even if an external force is applied, peeling and destruction are less likely to occur.

Embodiment 2. FIG.
Next, a second embodiment of the present invention will be described with reference to the drawings. 5 and 6 are explanatory views for sequentially explaining the structure of the semiconductor device according to the second embodiment and the steps of the manufacturing method thereof, wherein (a) is a side sectional view and (b) is a plan view. In addition, the same code | symbol is attached | subjected to FIG.

  In the structure and manufacturing method of the second embodiment, as shown in FIG. 5, a plurality of wiring electrodes 3 are formed on an interlayer insulating film 2a formed on a semiconductor substrate 1 by using, for example, a lift-off method. Then, another interlayer insulating film 2 b is formed and a contact hole 2 c is opened at a predetermined position on the wiring electrode 3.

  Next, after forming a pattern with the resist 4a on the interlayer insulating film 2b, etching such as ion milling indicated by an arrow 7A is performed in an oblique direction to form an opening 4c on the contact hole 2c. 3, a digging portion 3 c made of a wedge-shaped hollow portion facing outward is formed, and the resist 4 a is removed.

  Thereafter, although not shown in the drawing, similarly to the above-described first embodiment, a pattern is formed again with the resist 4a on the interlayer insulating film 2b, and then the feeding electrode layer 5 is formed on the entire surface by, for example, sputtering. At this time, the feed electrode layer 5 is also formed on the inner surface of the wedge-shaped hollow portion in the digging portion 3c formed of the wedge-shaped hollow portion of the wiring electrode 3 as shown in FIG. Thereafter, a pattern is formed with a resist 4b on the feeding electrode layer 5, and the air bridge electrode 6 is formed by using, for example, a plating method. As shown in FIG. 6, the end of the leg portion 6 b of the air bridge electrode 6 is embedded in the digging portion 3 c formed of a wedge-shaped hollow portion of the wiring electrode 3.

  Next, as shown in FIG. 6, after removing the uppermost resist 4b (see FIG. 3), the unnecessary feeding electrode layer 5 is removed by, for example, ion milling, and finally the resist 4a under the air bridge electrode 6 is also removed. The air bridge electrode 6 is formed by removing.

  Since the semiconductor device and the manufacturing method according to the second embodiment are configured as described above, and the digging portion of the wiring electrode is formed as a wedge-shaped hollow portion, in addition to the effect of the first embodiment, the air bridge electrode The leg portion further increases the yield strength against the external force in the peeling direction.

Embodiment 3 FIG.
Next, a third embodiment of the present invention will be described with reference to the drawings. 7 to 9 are explanatory views for sequentially explaining the structure of the semiconductor device according to the third embodiment and the steps of the manufacturing method thereof, in which (a) is a side sectional view and (b) is a plan view. In addition, the same code | symbol is attached | subjected to FIG.

  In the structure and manufacturing method of the third embodiment, first, as shown in FIG. 7, an opening pattern 4e is formed at a predetermined position with a resist 4d on a semiconductor substrate 1, and a first digging is performed on the semiconductor substrate 1 by etching. The recessed portion 1a is formed. Next, after removing the resist 4d, as shown in FIG. 8, an interlayer insulating film 2a is formed on the semiconductor substrate 1, and a plurality of wiring electrodes are formed on the first digging portion 1a of the semiconductor substrate 1 and others. 3 is formed using, for example, a lift-off method, another interlayer insulating film 2b is formed thereon, and then an opening 2c is formed on the wiring electrode 3.

  At this time, the wiring electrode 3 is formed with a buried portion 3d buried in the first digging portion 1a and an exposed portion 3e exposed on the semiconductor substrate, and the lower surface of the buried portion 3d and the interlayer insulating film 2a. Is fitted into the first digging portion 1 a of the semiconductor substrate 1 as shown, and the second digging portion 3 b is formed in the exposed portion 3 e of the wiring electrode 3.

  Next, although not shown in the drawing, similarly to the first embodiment described above, a pattern is formed on the interlayer insulating film 2b with the resist 4a, and then the feeding electrode layer 5 is formed on the entire surface by, for example, sputtering. Thereafter, a pattern is formed with a resist 4b on the feeding electrode layer 5, and the air bridge electrode 6 is formed by using, for example, a plating method. The ends of the leg portions 6b of the air bridge electrode 6 are embedded in the digging portion 3b of the wiring electrode 3 as shown in FIG.

  Next, as shown in FIG. 9, after removing the uppermost resist 4b (see FIG. 3), the unnecessary feeding electrode layer 5 is removed by, for example, ion milling, and finally the resist 4a under the air bridge electrode 6 is also removed. The air bridge electrode 6 is formed by removing.

  Since the semiconductor device and the manufacturing method according to the third embodiment are configured as described above and the digging portion is formed in the semiconductor substrate, the digging portion is formed in the exposed portion of the wiring electrode without processing the wiring electrode itself. It can be formed, and it is possible to prevent peeling due to an increase in drag against lateral displacement and an increase in adhesion area.

Embodiment 4 FIG.
Next, a fourth embodiment of the present invention will be described with reference to the drawings. 10 to 12 are explanatory views for sequentially explaining the structure of the semiconductor device according to the fourth embodiment and the steps of the manufacturing method thereof, in which (a) is a side sectional view and (b) is a plan view. The same or corresponding parts as those in FIGS. 7 to 9 are denoted by the same reference numerals.

  In the structure and the manufacturing method of the fourth embodiment, as shown in FIG. 10, first, an opening pattern 4e is formed at a predetermined position with a resist 4d on a semiconductor substrate 1, and an anisotropic etching agent such as a tartaric acid aqueous solution is formed. Etching is used to form a first digging portion 1b made of a wedge-shaped hollow portion facing outward on the semiconductor substrate 1.

  Next, after removing the resist 4d, as shown in FIG. 11, an interlayer insulating film 2a is formed on the semiconductor substrate 1, and a plurality of wiring electrodes 3 are formed on the first digging portion 1b by, for example, a lift-off method. After forming another interlayer insulating film 2b thereon, an opening 2c is formed on the wiring electrode 3.

  At this time, the wiring electrode 3 is formed with a buried portion 3d buried in the first digging portion 1b and an exposed portion 3e exposed on the semiconductor substrate, and the bottom surface of the buried portion 3d and the interlayer insulating film 2a. Is fitted into the first digging portion 1 b of the semiconductor substrate 1 as shown in the figure, and the second digging portion 3 c is formed in the exposed portion 3 e of the wiring electrode 3.

  Next, although not shown in the drawing, similarly to the first embodiment described above, a pattern is formed on the interlayer insulating film 2b with the resist 4a, and then the feeding electrode layer 5 is formed on the entire surface by, for example, sputtering. Thereafter, a pattern is formed with a resist 4b on the feeding electrode layer 5, and the air bridge electrode 6 is formed by using, for example, a plating method. The ends of the leg portions 6b of the air bridge electrode 6 are embedded in the digging portion 3c of the wiring electrode 3 as shown in FIG.

  Next, as shown in FIG. 12, after removing the uppermost resist 4b (see FIG. 3), the unnecessary feeding electrode layer 5 is removed by, for example, ion milling, and finally the resist 4a under the air bridge electrode 6 is also removed. The air bridge electrode 6 is formed by removing.

  Since the semiconductor device and the manufacturing method according to the fourth embodiment are configured as described above, and the first digging portion including the wedge-shaped hollow portion facing outward is formed in the semiconductor substrate, the digging portion includes Since the embedded portion of the wiring electrode to be embedded also has a wedge shape, a sufficient proof strength can be obtained with respect to the external force in the peeling direction with respect to the leg portion of the air bridge electrode.

In addition, the processing method illustrated in the above description is not restricted to it, and it cannot be overemphasized that what kind of other method may be sufficient if the structure can be formed.
Further, the form of the air bridge electrode and the form of the wiring electrode are not limited to those shown in the drawings, and it is needless to say that other forms may be used as long as the same effect can be obtained.

BRIEF DESCRIPTION OF THE DRAWINGS It is explanatory drawing for demonstrating sequentially the structure of the semiconductor device by Embodiment 1 of this invention, and the step of the manufacturing method, (a) is a sectional side view, (b) is a top view. BRIEF DESCRIPTION OF THE DRAWINGS It is explanatory drawing for demonstrating sequentially the structure of the semiconductor device by Embodiment 1 of this invention, and the step of the manufacturing method, (a) is a sectional side view, (b) is a top view. BRIEF DESCRIPTION OF THE DRAWINGS It is explanatory drawing for demonstrating sequentially the structure of the semiconductor device by Embodiment 1 of this invention, and the step of the manufacturing method, (a) is a sectional side view, (b) is a top view. BRIEF DESCRIPTION OF THE DRAWINGS It is explanatory drawing for demonstrating sequentially the structure of the semiconductor device by Embodiment 1 of this invention, and the step of the manufacturing method, (a) is a sectional side view, (b) is a top view. 8A and 8B are explanatory views for sequentially explaining the structure of the semiconductor device according to the second embodiment of the present invention and the steps of the manufacturing method thereof, wherein FIG. 7A is a side sectional view and FIG. 8A and 8B are explanatory views for sequentially explaining the structure of the semiconductor device according to the second embodiment of the present invention and the steps of the manufacturing method thereof, wherein FIG. 7A is a side sectional view and FIG. 4A and 4B are explanatory views for sequentially explaining the structure of a semiconductor device according to a third embodiment of the present invention and the steps of the manufacturing method thereof, wherein FIG. 5A is a side sectional view and FIG. 4A and 4B are explanatory views for sequentially explaining the structure of a semiconductor device according to a third embodiment of the present invention and the steps of the manufacturing method thereof, wherein FIG. 5A is a side sectional view and FIG. 4A and 4B are explanatory views for sequentially explaining the structure of a semiconductor device according to a third embodiment of the present invention and the steps of the manufacturing method thereof, wherein FIG. 5A is a side sectional view and FIG. 8A and 8B are explanatory views for sequentially explaining the structure of a semiconductor device according to a fourth embodiment of the present invention and the steps of the manufacturing method thereof, wherein FIG. 7A is a side sectional view and FIG. 8A and 8B are explanatory views for sequentially explaining the structure of a semiconductor device according to a fourth embodiment of the present invention and the steps of the manufacturing method thereof, wherein FIG. 7A is a side sectional view and FIG. 8A and 8B are explanatory views for sequentially explaining the structure of a semiconductor device according to a fourth embodiment of the present invention and the steps of the manufacturing method thereof, wherein FIG. 7A is a side sectional view and FIG. It is explanatory drawing for demonstrating sequentially the structure of the conventional semiconductor device, and the step of the manufacturing method, (a) is a sectional side view, (b) is a top view. It is explanatory drawing for demonstrating sequentially the structure of the conventional semiconductor device, and the step of the manufacturing method, (a) is a sectional side view, (b) is a top view. It is explanatory drawing for demonstrating sequentially the structure of the conventional semiconductor device, and the step of the manufacturing method, (a) is a sectional side view, (b) is a top view. It is explanatory drawing for demonstrating sequentially the structure of the conventional semiconductor device, and the step of the manufacturing method, (a) is a sectional side view, (b) is a top view. It is explanatory drawing for demonstrating the problem of the conventional semiconductor device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate, 2a, 2b Interlayer insulation film, 2c Contact hole, 3 Wiring electrode, 4a, 4b Resist, 5 Feeding electrode layer, 6 Air bridge electrode,
6a Flat part, 6b Leg part, 7 Etching.

Claims (2)

A plurality of wiring electrodes provided on a semiconductor substrate and an air bridge electrode provided between predetermined wiring electrodes among the plurality of wiring electrodes, wherein the air bridge electrode is integrally formed with a leg portion and a flat portion. has a connection between the wiring electrode and the air-bridge electrode line physicians by forming a dug portion in the wiring electrodes, to embed the connecting portions of the legs of said air bridge electrode in the digging portion The semiconductor digging portion is formed as a wedge-shaped hollow portion facing outward .   2. The semiconductor device according to claim 1, wherein the depth of the dug portion is substantially half of the thickness of the wiring electrode.

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