JP4768398B2 - Low pass filter - Google Patents

Description

  The present invention relates to a low-pass filter.

  2. Description of the Related Art In recent years, mobile phones have been improved in functionality, and in addition to voice communication and data communication functions, a tuner that receives FM broadcasts and TV broadcasts is being installed. In a mobile phone with a tuner for TV broadcast reception, it is important that the transmission signal of the mobile phone does not affect the reception signal of TV broadcast. The reason is that a transmission signal having a large power transmitted from the antenna for voice communication and data communication may enter a TV broadcast receiving circuit and cause interference. In order to prevent such interference, a low-pass filter that passes a VHF / UHF band signal and suppresses a transmission band signal for voice communication and data communication is mounted on a circuit on the tuner side.

  A layered LC low-pass filter can be cited as one that realizes such a low-pass filter characteristic (see, for example, Patent Document 1). The laminated LC filter is a filter in which a conductor pattern is formed on a thin ceramic layer and a plurality of these are laminated to form an inductance and a capacitor, and predetermined connection is made. FIG. 36 shows a general equivalent circuit diagram of the multilayer LC low-pass filter, and FIG. 37 shows an example of pass characteristics of the multilayer LC low-pass filter. In FIG. 36, IN is a signal input terminal, OUT is a signal output terminal, L10 and L11 are inductances, and C10 to C14 are capacitors. In FIG. 37, Q of the inductances L10 and L11 is set to 30. An inductor (coil) has a resistance component at the same time as an inductance component, which is its main characteristic. Usually, the smaller the resistance component, the better the inductor. The ratio between the inductor component and the resistance component is expressed as a Q characteristic. A higher value means a more efficient inductor. When the frequency is f, the inductor value is L, and the effective resistance value is R, Q = 2πfL / R. As shown in FIG. 37, in the laminated LC low-pass filter, the VHF / UHF frequency band (90 MHz to 770 MHz) is a pass band, and the 800 MHz band CDMA transmission frequency band (898 MHz to 925 MHz) is an attenuation band.

JP 07-336176 A

  In the conventional laminated LC low-pass filter, since the attenuation pole is 1.3 GHz, there is a problem that the attenuation in the attenuation region (898 MHz to 925 MHz) is insufficient at about 9 dB. In addition, in the conventional multilayer LC low-pass filter, it is possible to bring the attenuation pole closer to the passband by increasing the number of stages and obtain a larger attenuation amount. However, increasing the number of stages increases the series resistance included in the inductance. As a result, the loss of the pass band also increases, which makes it difficult to obtain the required pass band insertion loss. Furthermore, the conventional multilayer LC low-pass filter has a problem that the outer shape of the filter increases as the number of elements increases. It is desirable that the filter mounted on the mobile phone is small, and a large filter is not suitable for the mobile phone.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a small low-pass filter having a low loss and a steep attenuation characteristic.

  The low-pass filter of the present invention includes a first filter, a second filter connected in parallel to the first filter, and a first filter inserted between the first and second filters and a signal input terminal. The first filter has a first terminal connected to the third filter, a second terminal connected to the signal output terminal, a third terminal and a fourth terminal. The second filter has a first terminal connected to a first terminal of the two-terminal pair SAW resonator, and a second terminal connected to the two-terminal pair. The first one-terminal pair SAW resonator connected to the second terminal of the SAW resonator, and the first chip inductor connected in parallel to the first one-terminal pair SAW resonator, The third filter has a first terminal connected to the signal input terminal, and a second terminal A second one-terminal pair SAW resonator connected to the first terminals of the first and second filters, and a second chip connected in parallel to the second one-terminal pair SAW resonator The two-terminal pair SAW resonator and the first and second one-terminal pair SAW resonators are formed on a piezoelectric substrate, and the first and second chip inductors are formed on the piezoelectric substrate. A first chip inductor of the ceramic package, wherein the signal input pad of the ceramic package and the signal input terminal on the piezoelectric substrate are connected via a wire for signal input terminal. An input pad and a first terminal of the first one-terminal pair SAW resonator are connected via a first chip inductor input wire, and the first chip inductor of the ceramic package is connected. A ductor output pad and a second terminal of the first one-terminal pair SAW resonator are connected via a first chip inductor output wire, and the second chip inductor input pad of the ceramic package and the second terminal A first terminal of the second one-terminal pair SAW resonator is connected via a second chip inductor input wire, and the second chip inductor output pad of the ceramic package and the second one-terminal pair The second terminal of the SAW resonator is connected via a second chip inductor output wire, and the signal output pad of the ceramic package and the signal output terminal on the piezoelectric substrate are connected to the signal output terminal wire. And the shortest distance between the signal input terminal wire and the first chip inductor input wire is the signal input terminal wire and the first chip inductor input wire. The shortest distance between the signal output terminal wire and the second chip inductor output wire is greater than the shortest distance between the second chip inductor input wires and the signal output terminal wire and the first chip inductor. It is characterized by being larger than the shortest distance between the output wires.

Further, in one configuration example of the low-pass filter of the present invention, the first and second chip inductors are connected to the ceramic so that a mutual induction coefficient between the first chip inductor and the second chip inductor is positive. It is to be placed in the package.
In addition, one configuration example of the low-pass filter of the present invention further includes a fourth filter inserted between the signal input terminal and the ground on the piezoelectric substrate, and the fourth filter includes the first filter The third terminal is connected to the signal input terminal and the second terminal is composed of a third one-terminal pair SAW resonator that is grounded.
Further, in one configuration example of the low pass filter of the present invention, the first grounding pad of the ceramic package and the second terminal of the third one-terminal pair SAW resonator are connected via the first grounding wire. A second grounding pad of the ceramic package and a second terminal of the third one-terminal pair SAW resonator are connected via a second grounding wire, and the third grounding pad of the ceramic package is connected. A grounding pad and a third terminal of the two-terminal pair SAW resonator are connected via a third grounding wire, and a fourth grounding pad of the ceramic package and a second terminal of the two-terminal pair SAW resonator are connected. 4 terminals are connected via a fourth grounding wire, the first grounding wire is disposed between the signal input terminal wire and the first chip inductor input wire, and the signal For input terminal The second grounding wire is arranged between the ear and the second chip inductor input wire, and the third output wire between the signal output terminal wire and the second chip inductor output wire. A ground wire is disposed, and the fourth ground wire is disposed between the signal output terminal wire and the first chip inductor output wire.
Further, in one configuration example of the low-pass filter of the present invention, the first chip inductor and the second chip inductor are located diagonally to the square with respect to the ceramic package having a square shape in plan view. First and second chip inductors are arranged in the ceramic package.

  According to the present invention, the first filter, the second filter connected in parallel to the first filter, and the third filter inserted between the first and second filters and the signal input terminal. The first filter is composed of a two-terminal pair SAW resonator, the second filter is composed of a first one-terminal pair SAW resonator and a first chip inductor, and the third filter is By comprising the two one-terminal-pair SAW resonators and the second chip inductor, the attenuation pole can be made close to the cutoff frequency, and the attenuation amount in the attenuation region can be improved. In the present invention, since the SAW resonator is used, the filter can be reduced in size. Further, in the present invention, it is not necessary to increase the number of stages in order to obtain a desired attenuation as in the case of the laminated LC filter, so that the insertion loss of the passband does not increase and the outer shape does not increase. In the present invention, the two-terminal-pair SAW resonator and the first and second one-terminal-pair SAW resonators are formed on the piezoelectric substrate, and the first and second chip inductors are ceramics incorporating the piezoelectric substrate. Mounted in the package, the shortest distance between the signal input terminal wire and the first chip inductor input wire is made larger than the shortest distance between the signal input terminal wire and the second chip inductor input wire, Based on the circuit configuration of the present invention, the shortest distance between the output terminal wire and the second chip inductor output wire is made larger than the shortest distance between the signal output terminal wire and the first chip inductor output wire. The low pass filter can be mounted in the ceramic package without impairing the steep attenuation characteristics. As a result, in the present invention, a small low-pass filter having a low loss and a steep attenuation characteristic can be realized.

  In the present invention, the first and second chip inductors are arranged in the ceramic package so that the mutual induction coefficient between the first chip inductor and the second chip inductor is positive. The first and second chip inductors can be mounted in the ceramic package without impairing the steep attenuation characteristics based on the circuit configuration.

  In the present invention, the attenuation amount in the attenuation region can be further increased by inserting the fourth filter between the signal input terminal and the ground.

  In the present invention, the first grounding pad of the ceramic package and the second terminal of the third one-terminal pair SAW resonator are connected via the first grounding wire, and the second of the ceramic package is connected. The grounding pad and the second terminal of the third one-terminal pair SAW resonator are connected via a second grounding wire, and the third grounding pad of the ceramic package and the second terminal of the two-terminal pair SAW resonator are connected. 3 terminals are connected via a third grounding wire, and the fourth grounding pad of the ceramic package and the fourth terminal of the two-terminal pair SAW resonator are connected via a fourth grounding wire. The first grounding wire is disposed between the signal input terminal wire and the first chip inductor input wire, and the second is interposed between the signal input terminal wire and the second chip inductor input wire. Place the grounding wire and signal A third grounding wire is disposed between the force terminal wire and the second chip inductor output wire, and a fourth grounding wire is provided between the signal output terminal wire and the first chip inductor output wire. By arranging the wire, the attenuation in the attenuation region can be further increased.

  Further, according to the present invention, the first and second chip inductors are placed in the ceramic package so that the first chip inductor and the second chip inductor are located on the diagonal of the square with respect to the ceramic package having a square shape in plan view. By disposing in this manner, the attenuation amount in the attenuation region can be further increased.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is an equivalent circuit diagram of a low-pass filter according to an embodiment of the present invention. The low-pass filter in FIG. 1 includes a first filter 1, a second filter 2, a third filter 3, and a fourth filter 4. In FIG. 1, IN is a signal input terminal, and OUT is a signal output terminal.

  FIG. 2 shows a plan view of the first filter 1. The first filter 1 includes a two-terminal pair SAW (Surface Acoustic Wave) resonator 11. The two-terminal-pair SAW resonator 11 is formed by forming a transmission IDT (interdigital transducer) 150 and a reception IDT 151 on a piezoelectric substrate, and further arranging reflectors 152 and 153 on both sides thereof. . As is well known, the IDT has two comb-shaped opposing electrode parts made of metal, and each electrode part has a plurality of electrode fingers protruding alternately toward the opposing electrode parts.

  1 and 2, reference numeral 12 denotes a first terminal of the two-terminal pair SAW resonator 11 (input terminal of the filter 1), and reference numeral 14 denotes a second terminal of the two-terminal pair SAW resonator 11 (output terminal of the filter 1). , 13 is a third terminal of the two-terminal pair SAW resonator 11, and 15 is a fourth terminal of the two-terminal pair SAW resonator 11. The third terminal 13 and the fourth terminal 15 are grounded.

  The first filter 1 transmits a signal between the input terminal 12 and the output terminal 14 when the frequency of the standing wave generated between the two reflectors 152 and 153 matches the resonance frequency of the IDTs 150 and 151. Operates as a narrow band pass filter. An example of the pass characteristic of the first filter 1 is shown in FIG.

  FIG. 4 shows a plan view of the third filter 3. The third filter 3 includes a one-terminal pair SAW resonator 31 and a chip inductor 32 connected in parallel to the one-terminal pair SAW resonator 31. The one-terminal-pair SAW resonator 31 is formed by forming one IDT 310 on a piezoelectric substrate and further arranging reflectors 311 and 312 on both sides thereof. The chip inductor 32 can be broadly divided into a multilayer chip inductor in which a winding is formed by laminating a plurality of green sheets made of ferrite or the like on which a conductor layer is printed, and a winding chip inductor in which a conductive wire is spirally wound. There are types. 1 and 4, reference numeral 33 denotes a first terminal of the one-terminal pair SAW resonator 31 (input terminal of the IDT 310), reference numeral 34 denotes a second terminal of the one-terminal pair SAW resonator 31 (output terminal of the IDT 310), and 35. Is an input terminal of the chip inductor 32, and 36 is an output terminal of the chip inductor 32.

  An example of the pass characteristic of the third filter 3 is shown in FIG. The third filter 3 shows the characteristics of a bandpass filter having two attenuation poles. However, in FIG. 5, only the attenuation pole on the low frequency side of about 0.9 GHz is shown, and the attenuation pole on the high frequency side at a position exceeding 1 GHz is omitted. When the first filter 1 and the third filter 3 are connected in series, and the pass band (0.9 to 1 GHz) of the first filter 1 is set between the two attenuation poles of the third filter 3, As shown in FIG. 6, the attenuation pole of the 3rd filter 3 arises in the position of about 0.9 GHz and 1 GHz of the both sides of the pass band of the 1st filter 1, and the attenuation amount of a pass band vicinity is improved. I understand.

  A configuration similar to a filter in which filters 1 and 3 are connected in series (hereinafter referred to as series filters 1 and 3) is disclosed in Japanese Patent Application Laid-Open No. 56-47116. In the filter disclosed in Japanese Patent Laid-Open No. 56-47116, a transversal filter is used as the surface acoustic wave element, and a ceramic resonator is used as the piezoelectric resonator. On the other hand, in the series filters 1 and 3 of this embodiment, the two-terminal pair SAW resonator 11 is used instead of the transversal filter, and the one-terminal pair SAW resonator 31 is used instead of the piezoelectric resonator. However, the point that these are formed on the same piezoelectric substrate is different from the filter of JP-A-56-47116.

  Next, in the present embodiment, a low-pass filter having a very steep attenuation characteristic is realized by connecting the second filter 2 in parallel with the first filter 1 in the series filters 1 and 3. . Similar to the third filter 3, the second filter 2 includes a one-terminal pair SAW resonator 21 and a chip inductor 22 connected in parallel to the one-terminal pair SAW resonator 21. In FIG. 1, reference numeral 23 denotes a first terminal (IDT input terminal) of the one-terminal pair SAW resonator 21, 24 denotes a second terminal (IDT output terminal) of the one-terminal pair SAW resonator 21, and 25 denotes a chip inductor. 22 is an input terminal, and 26 is an output terminal of the chip inductor 22.

  A specific example of the pass characteristic of the low-pass filter of FIG. 1 will be described later, and the operation of this low-pass filter will be described. First, the first filter 1 will be considered. Since the first filter 1 includes acoustic coupling, it is difficult to directly perform the analysis by the image parameter method used for the analysis of the LC filter. First, in order to return to the analysis by the image parameter method, the following conversion is performed. In general, a symmetric two-terminal pair circuit can be transformed into a symmetric lattice type circuit as shown in FIG. 7, where Zeven is the impedance when the even mode is excited and Zodd is the impedance when the odd mode is excited.

  Even mode excitation is the application of a voltage having the same magnitude and phase to both ends of a two-terminal pair circuit, and odd mode excitation is the application of a voltage having the same magnitude and opposite phase to both ends of a two-terminal pair circuit. Is to apply. The even mode impedance Zeven and the odd mode impedance Zodd are ratios of the voltage and the inflowing current in the respective excitation modes. In addition, the values of the even mode impedance Zeven and the odd mode impedance Zodd can be easily calculated by a circuit simulator. The symmetrical lattice type circuit shown in FIG. 7 can be easily transformed into a T type circuit as shown in FIG. For the T-type circuit of FIG. 8, if the image impedance is Z0 and the propagation constant is θ, the following equation is established.

  According to the image parameter theory, when θ is an imaginary number, it becomes a passband, and when it is a real number, it becomes a passband, and when the even mode impedance Zeven and odd mode impedance Zodd have different signs, the passband is attenuated. It becomes an area. In order to check the sign of the even mode impedance Zeven and the odd mode impedance Zodd, the sign of the reactance part of the impedance may be checked. FIG. 9 and FIG. 10 show the reactance characteristics of the even-mode impedance Zeven and the odd-mode impedance Zodd for the first filter 1. FIG. 10 is an enlarged view of the band of 0.9 to 1 GHz in FIG.

  According to FIGS. 9 and 10, the frequency band having the opposite sign of the even mode impedance Zeven and the odd mode impedance Zodd is the pass band of the filter characteristic, and the frequency band of the same sign is the attenuation band. The above description assumes that the circuit is a symmetric circuit in order to explain the principle of operation. In an actual circuit, the logarithms of the IDTs 150 and 151 may be different, and the symmetry may be lost. However, even in this case, in principle, this is an extension of the above description, and the filter characteristics are directly calculated and desired. What is necessary is just to design so that it may become the characteristic of.

  Reactance characteristics when only the chip inductor 22 of the second filter 2 is connected to the first filter 1 are shown in FIGS. FIG. 12 is an enlarged view of the band of 0.9 to 1 GHz in FIG. It can be seen that by connecting the chip inductor 22 in parallel to the first filter 1, the sign of the odd mode impedance Zodd is almost inverted and is different from the even mode impedance Zeven. The pass characteristic at this time is as shown in FIG. 13, and a pass band is formed except for a part of the band (near 0.94 GHz) where the even mode impedance Zeven and the odd mode impedance Zodd have the same sign. .

  14 and 15 show reactance characteristics when the one-terminal pair SAW resonator 21 is connected in parallel, that is, when the second filter 2 is connected to the first filter 1 in parallel. FIG. 15 is an enlarged view of the band of 0.7 to 1 GHz in FIG. When the second filter 2 is connected in parallel to the first filter 1, a peak determined by the one-terminal pair SAW resonator 21 and the chip inductor 22 appears, and the even-mode impedance Zeven and the odd-mode impedance Zodd have the same frequency band, That is, it can be seen that the attenuation range is expanded.

  FIG. 16 shows the pass characteristics when the second filter 2 is connected in parallel to the first filter 1. In this embodiment, by connecting a chip inductor 22 in parallel to the first filter 1, it is possible to convert from a narrow-band pass filter to a low-pass filter. Further, the first filter 1 has a one-terminal pair SAW resonator. By connecting 21 in parallel, a low-pass filter having a steep shoulder characteristic and a wide attenuation range can be realized.

  If the third filter 3 having the characteristics shown in FIG. 5 is connected in series to the configuration in which the filters 1 and 2 are connected in parallel, the amount of attenuation in the attenuation region of the low-pass filter can be increased. Note that the end frequency on the high frequency side of the attenuation region of the low-pass filter of the present embodiment is substantially determined by the first filter 1, and the end frequency on the low frequency side of the attenuation region is the terminal of the chip inductor 22 and one terminal. Determined by the pair SAW resonator 21. Further, by appropriately setting the attenuation pole frequency of the third filter 3, the frequency characteristic of the attenuation region can be set.

  Furthermore, by inserting the fourth filter 4 between the signal input terminal IN and the ground, the attenuation amount of the attenuation region of the low-pass filter can be further increased. The fourth filter 4 includes a one-terminal pair SAW resonator 41. Similar to the one-terminal pair SAW resonator 31, the one-terminal pair SAW resonator 41 is formed by forming one IDT on a piezoelectric substrate and further arranging reflectors on both sides thereof. In FIG. 1, 42 is a first terminal of the one-terminal pair SAW resonator 41, and 43 is a second terminal of the one-terminal pair SAW resonator 41.

Next, a design method for the low-pass filter of this embodiment will be described. First, preconditions such as the following (a) to (d) are defined.
(A) The filter characteristics of the ladder-type filter are determined by the impedance relationship between the serial arm that is an element inserted between the input / output terminals and the parallel arm that is an element inserted between the input / output terminals and the ground.
(B) In this embodiment, the low-pass filter cannot be decomposed into a serial arm and a parallel arm, and thus cannot be said to be a ladder type filter. Therefore, the image impedance method used in the description of the operation of the ladder filter cannot be directly applied.
(C) For this reason, the present embodiment introduces the concept of even mode impedance and odd mode impedance.
(D) The filter characteristics are determined by the sign of the imaginary part of the even mode impedance and the odd mode impedance. That is, when the imaginary part Im | Zeven | of the even mode impedance and the imaginary part Im | Zodd | of the odd mode impedance have different signs, a pass band is obtained, and when Im | Zeven | and Im | Zodd | Thus, an attenuation pole occurs when Im | Zeven | and Im | Zodd | have the same value.

  Hereinafter, a filter in which the first filter 1 and the second filter 2 are connected in parallel will be considered. FIG. 17 shows the imaginary part Im | Zeven | of the even mode impedance and the imaginary part Im | Zodd | of the odd mode impedance of a filter in which the second filter 2 is connected to the first filter 1 in parallel. FIG. 18 shows the pass characteristics of the filter in the case of FIG. The imaginary part Im | Zeven | of the even mode impedance is mainly determined by the value of the element of the first filter 1, and the imaginary part Im | Zodd | of the odd mode impedance is mainly determined by the value of the element of the second filter 2. Determined.

  In FIG. 17, the even mode impedance of the band is lower than the frequency P1 where the imaginary part Im | Zodd | of the odd mode impedance becomes zero and the band higher than the frequency P2 where the imaginary part Im | Zeven | of the even mode impedance becomes zero. Since the imaginary part Im | Zeven | and the imaginary part Im | Zodd | of the odd mode impedance have different signs, these bands become the pass band.

  On the other hand, since the imaginary part Im | Zeven | of the odd mode impedance and the imaginary part Im | Zodd | of the odd mode impedance have the same sign between the frequencies P1 and P2, the band between the frequencies P1 and P2 is attenuated. It becomes an area. In particular, in the band B shown by the broken line in FIG. 17, a plurality of frequencies are generated in which the imaginary part Im | Zeven | of the even mode impedance and the imaginary part Im | Zodd | of the odd mode impedance have the same value, and an attenuation pole is formed. .

  In order to obtain a desired pass band and attenuation band, the frequency P1 is adjusted so as to be a target cutoff frequency (end frequency on the high band side of the pass band), and the imaginary part Im | Zeven | The band B where the imaginary part Im | Zodd | of the mode impedance has the same value may be adjusted so as to match the desired attenuation range. For this purpose, first, the resonance wavelength λ1 of the IDTs 150 and 151 of the first filter 1 is adjusted, and the frequency P2 is set to be close to the end frequency on the high band side of the attenuation band. Next, the resonance wavelength λ2 of the IDT of the second filter 2 is adjusted so that the band B in FIG. 17 matches the frequency range of the target attenuation region. At this time, the relationship of λ2 <λ1 is satisfied.

  FIG. 19 shows reactance characteristics when λ2> λ1 in a filter in which the second filter 2 is connected in parallel to the first filter 1, and FIG. 20 shows the pass characteristics at this time. As shown in FIG. 19, when λ2> λ1, there is no band B in which the imaginary part Im | Zeven | of the even mode impedance and the imaginary part Im | Zodd | of the odd mode impedance are continuously the same value, Im | Zeven | and Im | Zodd | match only two points between the frequencies P1 and P2. For this reason, the attenuation poles are separated, and the attenuation amount in the attenuation region is deteriorated as compared with the case of FIG. 18 (FIG. 20).

  When the resonance wavelength λ2 of the IDT of the second filter 2 is changed, P1 that determines the end frequency on the high pass side of the passband changes. Therefore, the length of the chip inductor 22 is adjusted so that P1 is as described above. Set to the desired cutoff frequency. By this operation, the band B in which the imaginary part Im | Zeven | of the even mode impedance and the imaginary part Im | Zodd | of the odd mode impedance have the same value changes, so the wavelength λ2 is adjusted. The adjustment of the length of the chip inductor 22 and the adjustment of the IDT resonance wavelength λ2 of the second filter 2 are repeated until a desired characteristic is satisfied.

  The crossing width of the electrode fingers of the IDT of the first filter 1 and the second filter 2 and the logarithm of the electrode fingers affect the impedance of the pass band and the slope of the band B. The slope of Im | Zeven | determined by the cross width of the electrode fingers of the IDTs 150 and 151 of the first filter 1 and the number of pairs of electrode fingers, and the Im determined by the slope of the electrode fingers of the IDT of the second filter 2 and the number of pairs of electrode fingers The slope of | Zodd | is adjusted so as to match, and the pass band is appropriately set to have a desired characteristic impedance (usually 50Ω). Although the above adjustment can be performed manually, it is preferable to determine an appropriate error function and search for an optimal combination by a computer.

  In the above description of the design method, the resonance wavelength of the IDT 150 and the resonance wavelength of the IDT 151 of the first filter 1 are set to the same value, but may be set to different values. The reactance characteristics in this case are shown in FIG. When the resonance wavelengths of IDT 150 and IDT 151 are different from each other, the band B where the imaginary part Im | Zeven | of the even mode impedance and the imaginary part Im | Zodd | Can be realized.

  When the distance between the IDT 150 and the IDT 151 of the first filter 1 is adjusted, the band in which the imaginary part Im | Zeven | of the even mode impedance and the imaginary part Im | Zodd | of the odd mode impedance become the same value is further expanded. And the attenuation range can be further expanded. The reactance characteristics in this case are shown in FIG. For this adjustment, it is preferable to set the distance between the IDT 150 and the IDT 151 to be generally 0.5λ from 0.7λ to about 0.9λ.

  The third filter 3 has a pass characteristic as shown in FIG. Therefore, in the filter in which the second filter 2 is connected in parallel to the first filter 1 and the third filter 3, if the pass band and the attenuation band coincide with each other and they are connected in cascade, more The amount of attenuation increases, which is preferable.

  Next, the mounting structure of the low-pass filter of this embodiment will be described. If the low-pass filter of FIG. 1 is mounted by the conventional method, it will become like FIG. In the example of FIG. 23, the ceramic package 501 and the two chip inductors 22 and 32 are soldered on the printed circuit board 500. The ceramic package 501 is provided with components other than the chip inductors 22 and 32 among the components of the low-pass filter of FIG. In FIG. 23, reference numeral 502 denotes a foot pattern connected to a pad (not shown) formed on the bottom surface of the ceramic package 501 by solder, 503 and 504 denote wirings connecting the ceramic package 501 and the chip inductor 22, and 505 and 506 denote This wiring connects the ceramic package 501 and the chip inductor 32.

  FIG. 24 shows the pass characteristics of the low-pass filter shown in FIG. As is clear from FIG. 24, a low-loss pass band from DC (direct current) to 710 MHz and an attenuation band of 40 dB or more are formed in the vicinity of 910 MHz. However, in the mounting structure as shown in FIG. 23, a certain distance is required for mounting the ceramic package 501 and the chip inductors 22 and 32, and the mounting area tends to increase. Further, if the ceramic package 501 and the chip inductors 22 and 32 are not mounted on the printed circuit board 500, the final filter characteristics cannot be evaluated, which may cause a problem in quality control.

  Further, the connection between the chip inductor 22 and the one-terminal pair SAW resonator 21 in the ceramic package 501 and the connection between the chip inductor 32 and the one-terminal pair SAW resonator 31 in the ceramic package 501 are provided in the ceramic package 501. The wiring and wirings 503 to 506 on the printed circuit board 500 are necessary, and the wiring length becomes very long. Therefore, it is difficult to further reduce the insertion loss of the low-pass filter.

  In order to solve these problems, the chip inductors 22 and 32 are mounted in a ceramic package. FIG. 25 shows an example of pass characteristics of the low-pass filter when the chip inductors 22 and 32 are mounted in a ceramic package. In the example of FIG. 25, it can be seen that the attenuation amount in the region A on the low frequency side in the attenuation region is deteriorated as compared with the pass characteristic shown in FIG.

  As a result of examining the cause of the deterioration of the attenuation amount by simulation, it was found that mutual induction occurred between the chip inductors and between the wires used for wiring, and the attenuation characteristics deteriorated. FIG. 26 shows an equivalent circuit of the low-pass filter of FIG. 1 considering the inductance of the wire in the ceramic package. In FIG. 26, 16 is a signal input terminal wire, 17 is a signal output terminal wire, 27 is a wire connecting the input terminal of the chip inductor 22 and the input terminal of the one-terminal pair SAW resonator 21, and 28 is the chip inductor 22. Are connected to the output terminal of the one-terminal pair SAW resonator 21, 37 are connected to the input terminal of the chip inductor 32 and the input terminal of the one-terminal pair SAW resonator 31, and 38 is the chip inductor 32. Are connected to the output terminal of the one-terminal-pair SAW resonator 31. In FIG. 26, the wires 16, 17, 27, 28, 37, and 38 are represented as inductors because they exhibit inductance.

  A simulation was conducted to see how the characteristics of the low-pass filter change when there is mutual induction between the above wires. First, the mutual induction α between the wires 16 and 27 was examined. FIG. 27 shows the pass characteristic of the low-pass filter of FIG. 26 when there is no mutual induction α between the wires 16 and 27, and M> 0 (M is a mutual induction coefficient, here M = 0.13). FIG. 28 shows the pass characteristics of the low-pass filter of FIG.

In introducing the mutual induction coefficient M, the directions of the currents I16, I17, I27, I28, I37, and I38 flowing through the wires 16, 17, 27, 28, 37, and 38 are defined as shown in FIG. .
In the example of FIG. 28, the attenuation amount in the low frequency side region A of the attenuation region is deteriorated as compared with the case of FIG. 27 as in the case of FIG. 25, and the mutual induction α greatly affects the attenuation characteristic of the low-pass filter. It can be seen that Similarly, the mutual induction α ′ between the wires 17 and 38 greatly affects the attenuation characteristic of the low-pass filter.

  Next, the mutual induction β between the chip inductors 22 and 32 will be examined. FIG. 29 shows the pass characteristics of the low-pass filter of FIG. 26 when a mutual induction β of M> 0 (here, M = 0.3) occurs between the chip inductors 22 and 32, and M <0 (here, M = 0). FIG. 30 shows the pass characteristics of the low-pass filter of FIG. 26 when the mutual induction β of −0.3) occurs.

  In the examples of FIGS. 29 and 30, the attenuation amount in the low frequency side region A of the attenuation region is deteriorated compared to the case of FIG. 27 in both cases, and in order to obtain a desired attenuation characteristic, the mutual induction β It can be seen that there is a need to reduce. However, when the mutual induction coefficient M is positive (FIG. 29), the degree of steep deterioration of the attenuation characteristic is less than when the mutual induction coefficient M is negative (FIG. 30), so it is difficult to eliminate the influence of the mutual induction β. In this case, the chip inductors 22 and 32 are arranged so that the mutual induction coefficient M is positive, that is, the magnetic flux generated from the chip inductor 22 and the magnetic flux generated from the chip inductor 32 are strengthened rather than making the mutual induction coefficient M negative. It turns out that it is preferable.

FIG. 31 is a plan view showing the mounting structure of the present embodiment in consideration of the effects of mutual inductions α, α ′, and β. In FIG. 31, 100 is a ceramic package made of alumina or the like, 101 is a piezoelectric substrate made of LiTaO ₃ or the like, 102 is a signal input pad (signal input terminal IN in FIG. 26), and 103 is a one-terminal pair SAW resonance via a wire. A first grounding pad 104 connected to the second terminal 43 of the child element 41, a second grounding pad 104 connected to the second terminal 43 of the one-terminal pair SAW resonator 41 via a wire, 105 Is a second chip inductor input pad connected to the input terminal 35 of the second chip inductor 32 via a wire, and 106 is a second chip connected to the output terminal 36 of the second chip inductor 32 via a wire. The chip inductor output pad 107 is a first chip inductor input connected to the input terminal 25 of the first chip inductor 22 through a wire. The pad 108 is a first chip inductor output pad connected to the output terminal 26 of the first chip inductor 22 via a wire, and 109 is the third terminal 13 of the two-terminal pair SAW resonator 11 via the wire. 3 is a third grounding pad connected to, 110 is a fourth grounding pad connected to the fourth terminal 15 of the two-terminal pair SAW resonator 11 via a wire, and 111 is a signal output pad (FIG. 26). Signal output terminal OUT).

  Reference numerals 112 to 117 denote wirings formed on the piezoelectric substrate 101, and reference numeral 112 denotes a wiring for connecting the first terminal 42 of the one-terminal pair SAW resonator 41 and the first terminal 33 of the one-terminal pair SAW resonator 31. , 113 is a wiring connected to the second terminal 43 of the one-terminal pair SAW resonator 41, 114 is the second terminal 34 of the one-terminal pair SAW resonator 31, and the first terminal of the two-terminal pair SAW resonator 11 12 and a wiring for connecting the first terminal 23 of the one-terminal pair SAW resonator 21, and 115 a second terminal 24 of the one-terminal pair SAW resonator 21 and a second terminal 14 of the two-terminal pair SAW resonator 11. , 116 is a wiring connected to the third terminal 13 of the two-terminal pair SAW resonator 11, and 117 is a wiring connected to the fourth terminal 15 of the two-terminal pair SAW resonator 11. Reference numerals 118 to 121 denote wirings formed on the ceramic package 100, 118 denotes a wiring connected to the input terminal 35 of the second chip inductor 32, and 119 denotes a connection to the output terminal 36 of the second chip inductor 32. 120 is a wiring connected to the input terminal 25 of the first chip inductor 22, and 121 is a wiring connected to the output terminal 26 of the first chip inductor 22. For example, AlCu (0.5%) is used as the material of the electrodes, wirings, and pads of the resonators of the filters 1 to 4 formed on the piezoelectric substrate 101. Moreover, you may use not only AlCu but a various metal and alloy.

  122 is a signal input terminal wire (wire 16 in FIG. 26) for connecting the signal input pad 102 and the wiring 112, 123 is a first ground wire for connecting the first ground pad 103 and the wiring 113, Reference numeral 124 denotes a second grounding wire for connecting the second grounding pad 104 and the wiring 113, and reference numeral 125 denotes a second chip inductor input wire for connecting the second chip inductor input pad 105 and the wiring 112 ( 26 is a second chip inductor output wire (wire 38 in FIG. 26) for connecting the second chip inductor output pad 106 and the wiring 114, and 127 is a first chip inductor input. A first chip inductor input wire (wire 27 in FIG. 26) and 128 for connecting the pad 107 and the wiring 114 are the first chip inductor. The first chip inductor output wire (wire 28 in FIG. 26) for connecting the data output pad 108 and the wiring 115, and the third ground wire 129 for connecting the third ground pad 109 and the wiring 116 , 130 is a fourth ground wire for connecting the fourth ground pad 110 and the wiring 117, and 131 is a signal output terminal wire for connecting the signal output pad 111 and the wiring 115 (wire 17 in FIG. 26). It is. Reference numerals 220 and 320 denote marks representing the winding polarities of the chip inductors 22 and 32.

  FIG. 32 is a perspective view for explaining a method of connecting the pads of the ceramic package 100 and the wiring of the piezoelectric substrate 101 and a method of mounting the chip inductor 32 on the ceramic package 100. In FIG. 32, a part of the ceramic package 100 is seen through. The chip inductor 32 is connected to the wirings 118 and 119 using the conductive paste 132. Similarly, the chip inductor 22 is mounted on the ceramic package 100.

  The wiring 119 and the second chip inductor output pad 106 are connected via a via hole 133. The same applies to the connection between the wiring 118 and the second chip inductor input pad 105, the connection between the wiring 120 and the first chip inductor input pad 107, and the connection between the wiring 121 and the first chip inductor output pad 108. To be done via via holes. The second chip inductor output pad 106 and the wiring 114 on the piezoelectric substrate 101 are connected via a second chip inductor output wire 126.

  In the present embodiment, in order to reduce the influence of mutual induction α, α ′, β, the signal input terminal wire 122 (wire 16 in FIG. 26) and the first chip inductor input wire 127 (wire in FIG. 26). 27) is made shorter than the shortest distance between the signal input terminal wire 122 and the second chip inductor input wire 125 (wire 37 in FIG. 26), and the signal output terminal wire 131 (wire 17 in FIG. 26). ) And the second chip inductor output wire 126 (wire 38 in FIG. 26) is the shortest distance between the signal output terminal wire 131 and the first chip inductor output wire 128 (wire 28 in FIG. 26). The chip inductors 22 and 32 are arranged so that the mutual induction coefficient M between the chip inductors 22 and 32 is positive.

  The winding polarities of the chip inductors 22 and 32 are taken into consideration so that the mutual induction coefficient M is positive, that is, the magnetic flux generated from the chip inductor 22 and the magnetic flux generated from the chip inductor 32 mutually strengthen. In the present embodiment, a planar type having a high Q is adopted as the chip inductors 22 and 32, and the chip inductors 22 and 32 are arranged so that the marks 220 and 320 indicating the winding polarity are opposite to each other.

  FIG. 33 shows the pass characteristics of the low-pass filter of FIG. 26 according to the layout of FIG. As apparent from FIG. 33, according to the layout of FIG. 31, it can be seen that the attenuation characteristics of the attenuation region are improved as compared with the example of FIG.

  In addition, the example of FIG. 25 shows the pass characteristic of the low-pass filter when a negative mutual induction β is generated between the chip inductors 22 and 32. In this case, since negative mutual induction β occurs, it is necessary to use chip inductors 22 and 32 having an inductance value larger than the designed value. On the other hand, in the example of FIGS. 31 and 33, since the positive mutual induction β is generated between the chip inductors 22 and 32, it is not necessary to use the chip inductors 22 and 32 having an inductance value larger than the design value. Since the series resistance of the chip inductors 22 and 32 can be reduced, the insertion loss of the low-pass filter can be reduced as compared with the case of FIG.

  As described above, according to the circuit configuration of the present embodiment, it is possible to obtain a very steep attenuation characteristic as compared with the conventional multilayer LC filter. In this embodiment, since the SAW resonator is used, the filter can be reduced in size. Furthermore, in the present embodiment, there is no need to increase the number of stages in order to obtain a desired attenuation as in the case of the laminated LC filter, so that the insertion loss of the passband does not increase and the outer shape does not increase. . According to the mounting structure of the present embodiment, the low-pass filter can be mounted in the ceramic package without impairing the steep attenuation characteristics based on the circuit configuration of the present embodiment. As a result, in the present embodiment, a small low-pass filter having a low loss and a steep attenuation characteristic can be realized. In this embodiment, compared to the low-pass filter shown in FIG. 23, the wiring length can be shortened, and the insertion loss can be reduced.

  In the present embodiment, the first ground wire 123 is provided between the signal input terminal wire 122 (wire 16 in FIG. 26) and the first chip inductor input wire 127 (wire 27 in FIG. 26). The second ground wire 124 is disposed between the signal input terminal wire 122 and the second chip inductor input wire 125 (wire 37 in FIG. 26), and the signal output terminal wire 131 (FIG. 26). The third ground wire 129 is disposed between the second chip inductor output wire 126 and the second chip inductor output wire 126 (wire 38 in FIG. 26), and the signal output terminal wire 131 and the first chip inductor output wire are output. A fourth grounding wire 130 is disposed between the wire 128 (the wire 28 in FIG. 26). With this arrangement, in the present embodiment, the amount of attenuation in the attenuation region of the low-pass filter can be further increased. In the circuit of FIG. 26, there is no problem even if the first grounding wire 123 and the second grounding wire 124 are combined together, but in order to realize the wire arrangement of the present embodiment, the first grounding wire 123 and the second grounding wire 124 are combined. Two grounding wires 123 and a second grounding wire 124 are provided.

  Note that the chip inductors 22 and 32 in the ceramic package 100 having a square shape in plan view may be disposed so as to be diagonally opposite to the square ceramic package 100. The layout in this case is shown in FIG. FIG. 35 shows the pass characteristics of the low-pass filter of FIG. 26 according to the layout of FIG. As shown in FIG. 34, if the chip inductors 22 and 32 are arranged at diagonal positions, the distance between the chip inductors 22 and 32 is increased, and the mutual induction β between the chip inductors 22 and 32 can be reduced. As compared with the case of FIG. 31, the attenuation amount of the attenuation region of the low-pass filter can be further increased.

  In this embodiment, planar chip inductors 22 and 32 whose winding axis is perpendicular to the paper surface of FIG. 31 are used. However, a laterally wound chip whose winding axis is parallel to the paper surface of FIG. Inductors 22 and 32 may be used. It is clear from the previous simulation result that mutual induction can be reduced by using one of the chip inductor 22 and the chip inductor 32 as a planar type and the other as a horizontal winding type.

  The present invention can be applied to, for example, a tuner circuit of a mobile phone with a TV broadcast receiving tuner.

1 is an equivalent circuit diagram of a low-pass filter according to an embodiment of the present invention. It is a top view of the 1st filter in an embodiment of the invention. It is a figure which shows one example of the passage characteristic of the 1st filter in embodiment of this invention. It is a top view of the 3rd filter in an embodiment of the invention. It is a figure which shows one example of the passage characteristic of the 3rd filter in embodiment of this invention. It is a figure which shows an example of the pass characteristic of the filter which connected the 1st filter and the 3rd filter in series. FIG. 5 is an equivalent circuit diagram of a symmetric lattice type circuit obtained by modifying a symmetric two-terminal pair circuit. FIG. 8 is an equivalent circuit diagram of a T-type circuit obtained by modifying the symmetric lattice type circuit of FIG. 7. It is a figure which shows one example of the reactance characteristic of even mode impedance and odd mode impedance about the 1st filter in embodiment of this invention. FIG. 10 is an enlarged view of FIG. 9. It is a figure which shows an example of the reactance characteristic at the time of connecting the phase line of a 2nd filter to the 1st filter in embodiment of this invention. It is the figure which expanded FIG. It is a figure which shows an example of the passage characteristic at the time of connecting only the phase line of a 2nd filter to the 1st filter in embodiment of this invention. It is a figure which shows an example of the reactance characteristic at the time of connecting a 2nd filter to a 1st filter in parallel in embodiment of this invention. It is the figure which expanded FIG. It is a figure which shows an example of the passage characteristic at the time of connecting a 2nd filter to a 1st filter in parallel in embodiment of this invention. It is a figure which shows the other example of the reactance characteristic at the time of connecting a 2nd filter in parallel with a 1st filter in embodiment of this invention. It is a figure which shows the other example of the passage characteristic at the time of connecting the 2nd filter in parallel with the 1st filter in embodiment of this invention. It is a figure which shows the other example of the reactance characteristic at the time of connecting a 2nd filter in parallel with a 1st filter in embodiment of this invention. It is a figure which shows the other example of the passage characteristic at the time of connecting the 2nd filter in parallel with the 1st filter in embodiment of this invention. It is a figure which shows the other example of the reactance characteristic at the time of connecting a 2nd filter in parallel with a 1st filter in embodiment of this invention. It is a figure which shows the other example of the reactance characteristic at the time of connecting a 2nd filter in parallel with a 1st filter in embodiment of this invention. It is a top view which shows a layout when the low-pass filter of FIG. 1 is mounted by the conventional method. FIG. 24 is a diagram illustrating an example of pass characteristics of the low-pass filter of FIG. 23. It is a figure which shows an example of the pass characteristic of a low pass filter at the time of mounting a chip inductor in a ceramic package. FIG. 2 is an equivalent circuit diagram of the low-pass filter of FIG. 1 in consideration of the inductance of the wire in the ceramic package. It is a figure which shows an example of the passage characteristic of the low pass filter of FIG. 26 when there is no mutual induction between wires. FIG. 27 is a diagram illustrating an example of pass characteristics of the low-pass filter of FIG. 26 when mutual induction occurs between wires. FIG. 27 is a diagram illustrating an example of pass characteristics of the low-pass filter of FIG. 26 when positive mutual induction occurs between chip inductors. FIG. 27 is a diagram illustrating an example of pass characteristics of the low-pass filter of FIG. 26 when negative mutual induction occurs between chip inductors. It is a top view which shows the layout of the low-pass filter of embodiment of this invention. It is a perspective view for demonstrating the connection method of the pad of a ceramic package, and the wiring of a piezoelectric substrate, and the mounting method to the ceramic package of a chip inductor. FIG. 32 is a diagram illustrating an example of pass characteristics of the low-pass filter of FIG. 31. It is a top view which shows the other layout of the low-pass filter of embodiment of this invention. FIG. 35 is a diagram illustrating an example of pass characteristics of the low-pass filter of FIG. 34. It is an equivalent circuit diagram of a conventional laminated LC low-pass filter. FIG. 37 is a diagram illustrating an example of pass characteristics of the multilayer LC low-pass filter of FIG. 36.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... 1st filter, 2 ... 2nd filter, 3 ... 3rd filter, 4 ... 4th filter, 11 ... 2 terminal pair SAW resonator, 21, 31, 41 ... 1 terminal pair SAW resonator, 22, 32 ... Chip inductor, 100 ... Ceramic package, 101 ... Piezoelectric substrate, 102 ... Signal input pad, 103 ... First ground pad, 104 ... Second ground pad, 105 ... Second chip inductor input 106, second chip inductor output pad, 107, first chip inductor input pad, 108, first chip inductor output pad, 109, third ground pad, 110, fourth pad. Grounding pads, 111... Signal output pads, 122... Signal input terminal wires, 123... First grounding wires, 124. Inductor input wire, 126 ... second chip inductor output wire, 127 ... first chip inductor input wire, 128 ... first chip inductor output wire, 129 ... third ground wire, 130 ... first 4 grounding wires, 131... Signal output terminal wires.

Claims (5)

A first filter; a second filter connected in parallel to the first filter; and a third filter inserted between the first and second filters and a signal input terminal. ,
The first filter has a first terminal connected to the third filter, a second terminal connected to a signal output terminal, and a two-terminal pair SAW in which the third terminal and the fourth terminal are grounded. Consisting of a resonator,
The second filter has a first terminal connected to a first terminal of the two-terminal pair SAW resonator, and a second terminal connected to a second terminal of the two-terminal pair SAW resonator. 1 one-terminal-pair SAW resonator and a first chip inductor connected in parallel to the first one-terminal-pair SAW resonator,
The third filter has a first one-terminal pair SAW resonance in which a first terminal is connected to the signal input terminal and a second terminal is connected to the first terminals of the first and second filters. And a second chip inductor connected in parallel to the second one-terminal-pair SAW resonator,
The two-terminal pair SAW resonator and the first and second one-terminal pair SAW resonators are formed on a piezoelectric substrate, and the first and second chip inductors incorporate the piezoelectric substrate. Mounted in the
A signal input pad of the ceramic package and the signal input terminal on the piezoelectric substrate are connected via a signal input terminal wire, and the first chip inductor input pad of the ceramic package and the first one terminal The first terminal of the pair of SAW resonators is connected via a first chip inductor input wire, and the first chip inductor output pad of the ceramic package and the first pair of SAW resonators of the first one-terminal pair of SAW resonators. Two terminals are connected via a first chip inductor output wire, and the second chip inductor input pad of the ceramic package and the first terminal of the second one-terminal-pair SAW resonator are the first ones. Two chip inductor input pads connected to the second chip inductor output pad of the ceramic package and the first chip inductor output pad. And a second output terminal of the SAW resonator are connected via a second chip inductor output wire, and the signal output pad of the ceramic package and the signal output terminal on the piezoelectric substrate output a signal. Connected through the terminal wire,
The shortest distance between the signal input terminal wire and the first chip inductor input wire is larger than the shortest distance between the signal input terminal wire and the second chip inductor input wire, and the signal output terminal A low-pass filter, wherein a shortest distance between the wire and the second chip inductor output wire is larger than a shortest distance between the signal output terminal wire and the first chip inductor output wire. The low-pass filter according to claim 1, wherein
The low-pass filter, wherein the first and second chip inductors are arranged in the ceramic package so that a mutual induction coefficient between the first chip inductor and the second chip inductor is positive. The low-pass filter according to claim 1, wherein
Furthermore, the piezoelectric filter has a fourth filter inserted between the signal input terminal and the ground,
The fourth filter comprises a third one-terminal pair SAW resonator in which a first terminal is connected to the signal input terminal and a second terminal is grounded. The low-pass filter according to claim 3,
The first ground pad of the ceramic package and the second terminal of the third one-terminal pair SAW resonator are connected via a first ground wire, and the second ground pad of the ceramic package And the second terminal of the third one-terminal pair SAW resonator are connected via a second grounding wire, and the third grounding pad of the ceramic package and the second terminal of the two-terminal pair SAW resonator are connected to each other. 3 terminals are connected via a third grounding wire, and the fourth grounding pad of the ceramic package and the fourth terminal of the two-terminal-pair SAW resonator are connected via a fourth grounding wire. Connected,
The first grounding wire is disposed between the signal input terminal wire and the first chip inductor input wire, and between the signal input terminal wire and the second chip inductor input wire. The second grounding wire is disposed between the signal output terminal wire and the second chip inductor output wire, and the signal output terminal wire The low-pass filter, wherein the fourth grounding wire is arranged between the first chip inductor output wire. The low-pass filter according to any one of claims 1 to 4,
The first and second chip inductors are placed in the ceramic package so that the first chip inductor and the second chip inductor are located diagonally to the square with respect to the ceramic package having a square shape in plan view. A low-pass filter characterized by being arranged in

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