JP4764687B2 - Design support system and information processing method - Google Patents

Description

The present invention relates to a design support system and an information processing method, and more particularly to an architecture design support system for a system LSI.

  Advances in process technology have increased the degree of integration of integrated circuits such as LSI (Large Scale Integrated Circuit), and a system that has been realized by mounting multiple chips (devices) on a board as a system LSI on one chip. It became possible to do. The functional modules mounted on the chip are also diversifying and the circuit scale is increasing. Accordingly, as a method for efficiently designing a system LSI, a design using a system description language such as SystemC or SpecC has become widespread from a design using a conventional hardware description language such as Verilog-HDL or VHDL (for example, Patent Document 1).

  Synopsys CoCentric and CoWare N2C are known as design support tools using system description languages. In a design support tool using a system description language, it is possible to design a system LSI by inputting a module described in the system description language on a block diagram input screen. When the design of the system LSI is completed, a simulation model is generated from the design support tool, the simulator is activated and the system simulation is performed, and the function and performance of the system LSI can be confirmed.

  Here, the module description in the system description language generally has three types of description levels described below depending on the abstraction level of the description.

<Transaction level (TL)>
The transaction level is an abstraction level for describing functions by capturing communication between modules. Since the operation is based on the communication start and end times and communication data, the simulation accuracy for the clock is very low. The simulation speed is very fast because the function is simulated by the event.

<Bus cycle accurate (BCA)>
Bus cycle accurate is a level of abstraction that describes functions as events between module inputs and outputs. The operation clock can be accurately simulated at the input unit and the output unit.

<Register transfer level (RTL)>
The register transfer level is an abstraction level for describing a circuit by capturing synchronous transfer between register files. The functional operation can be accurately simulated with respect to the operation clock, and the simulation accuracy is very high. Since the function is simulated every clock, the simulation speed is very slow.

  The higher the level of abstraction of the description, the faster the simulation speed, while the lower the level of abstraction, the higher the simulation accuracy. In the design of a system LSI, the module functions are refined from a description with a high level of abstraction to a description with a low level of abstraction. In general, a designer selects a module described with various degrees of abstraction and designs a system LSI.

  There is a design support system for designing a system LSI architecture by displaying a block diagram of a system LSI on a computer screen and editing it. Conventionally, since the design of a system LSI has been designed only with an RTL having a low abstraction level, most of such conventional design support systems have been targeted at the RTL as an abstraction level. However, recently, design support systems for BCA and TL with higher abstraction levels have appeared.

JP 2001-142927 A

  A design support system for BCA and TL with a high level of abstraction differs from a conventional design support system for RTL with a low level of abstraction. Holds more information about.

  A conventional design support system for RTL with a low level of abstraction, for functional modules, port information such as the number of ports at the boundary, name of each port, bit width, input / output direction, etc. It only holds information as a collection of signal lines.

  On the other hand, the design support system for BCA and TL having a high level of abstraction holds the following information in addition to the port information at the boundary portion of the functional module. That is, such a setting support system holds information such as which bus can be connected, whether the bus operates as a master or a slave, and what functions it has. The bus holds information such as protocol, arbitration algorithm, address assignment of connected functional modules, data transfer bit width, operating frequency, etc., in addition to the information of its constituent signals.

  However, in a design support system targeting a high level of abstraction, the number of parameters held in each module has increased due to the high level of abstraction of each functional module and bus module. Therefore, in the system design, the designer needs to set many parameters for each module. In particular, since the bus is a fundamental part of the system, the parameters relating to the bus are very important from the viewpoint of the entire system. In addition, optimal values of the parameters relating to the bus greatly vary depending on the number and type of functional modules connected to the bus. Therefore, in order to determine the bus parameter value, the designer needs to repeat a number of simulations and perform trial and error over a long time.

  The present invention has been made in view of such circumstances, and an object of the present invention is to be able to efficiently and appropriately determine parameters related to modules constituting a system to be designed.

A design support system according to the present invention is a system design support system configured by combining a bus and a functional module connected to the bus, and the functional module indicates a transfer band required by the functional module for the bus. Storage means for storing information for each functional module, selection means for selecting the bus and functional modules constituting the system to be designed, and parameters related to the bus selected by the selection means are selected. Parameter setting means for setting the function module selected by the means based on the function module information stored in the storage means, and the parameter setting means is requested by the function module connected to the bus to the bus. The above parameters are determined so that the specifications to be satisfied are satisfied. That.
Design support system of the present invention includes a selection means for selecting a bus and functions module to connect to the bus in order to configure the system to be designed, function indicating a transfer band which the function module requests the bus Storage means for storing module information for each functional module; first display control means for displaying the bus on the editing screen; and second display control means for displaying the functional module on the editing screen; And storing the parameters related to the bus by the storage means for the functional module selected by the selection means so that the transfer bandwidth required for the bus is satisfied when the functional module connected to the bus operates. And a parameter setting means for determining and setting based on the function module information being set.
An information processing method according to the present invention includes an information processing unit including a storage unit that stores, for each functional module, functional module information indicating a transfer bandwidth requested by the functional module to the bus, a selection unit, and a parameter setting unit. by the device, an information processing method of the design support system, the selection means comprises a selection step of selecting a bus and function modules to configure the system to be designed, the above parameter setting means, said selecting step A parameter setting step for setting the parameter related to the bus selected in step S5 based on the function module information stored in the storage unit for the function module selected in the selection step. In the parameter setting step, To ensure that the functional modules connected to the bus meet the specifications required for that bus. And determining the serial parameters.
A program according to the present invention causes a computer to execute each step of the information processing method .
The computer-readable recording medium of the present invention records the above program.

  According to the present invention, when determining a parameter related to a bus constituting a system to be designed, the parameter related to the bus is determined so that a specification required by the functional module connected to the bus is satisfied. To do. Therefore, the parameters can be determined efficiently and appropriately.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing a system configuration example of a design support system according to an embodiment of the present invention. The design support system according to the present embodiment performs (supports) architecture design of a system LSI in a system description language, and targets, for example, a high abstraction level BCA (bus cycle accurate) or TL (transaction level). .

  As illustrated in FIG. 1, the design support system according to the present embodiment includes an input device 10, a module information storage unit 20, a design processing unit 30, a display control unit 40, and a display device 50.

  The input device 10 is for inputting an external instruction or the like to the design support system, and is, for example, a pointing device such as a mouse or a trackball, a keyboard, or the like. Selection / arrangement of modules constituting the system to be designed and instructions by the designer to the design support system related to the connection are input via the input device 10.

  The module information storage unit 20 stores information on modules that can be used in the architecture design by the design support system. Module information stored in the module information storage unit 20 includes bus information 21 and functional module information 22.

  The bus information 21 is information related to the bus connecting the functional modules. As the bus information 21, information on the bus type and the operating frequency (default operating frequency) is stored for each bus. Furthermore, information such as bus configuration signals, protocols, arbitration algorithms, and address assignments are included as appropriate.

  The functional module information 22 is information relating to a functional module that realizes a predetermined functional operation. As the function module information 22, information on the type of function module (what function it has) and whether it operates as a master or a slave with respect to the bus is stored for each function module. As the function module information 22, data transfer band information required for the bus when operating as a master is stored for each function module. Furthermore, information about the boundary port information (number of ports at the boundary portion, names of each port, bit width, input / output direction, etc.), connectable buses, and the like are appropriately included.

  The design processing unit 30 performs processing related to architecture design by comprehensively controlling the design support system, and includes a module selection unit 31, a connection processing unit 32, and a parameter setting unit 33. The module selection unit 31 selects modules constituting the system to be designed. Specifically, the module is selected by reading out the module information corresponding to the instruction input from the input device 10 from the modules stored in the module information storage unit 20.

  The connection processing unit 32 connects the modules selected by the module selection unit 31 to each other, and connects the selected bus and the functional module connected thereto in accordance with an instruction input from the input device 10. In this way, architecture design is performed by connecting and combining a plurality of selected modules (bus and functional modules), and a system to be designed is configured.

  The parameter setting unit 33 sets parameters related to the buses constituting the design target system selected by the module selection unit 31. The parameter setting unit 33 determines a parameter that satisfies the specification (necessary performance, etc.) required for the bus by the functional module connected to the bus, and sets the determined parameter to the bus. Set to. In the following description, the case where the parameter is determined according to the data transfer bandwidth requested by the functional module to the bus is shown as an example, but the specification requested by the functional module to the bus is limited to the data transfer bandwidth. is not.

  The display control unit 40 displays a block diagram input screen, which is an editing screen related to architecture design, on the display device 50 configured by a known display or the like. On this block diagram input screen, as will be described later, selectable modules (buses and functional modules) and modules selected to constitute the system to be designed are displayed. The display control unit 40 updates the display as needed according to the processing performed by the design processing unit 30, and causes the display device 50 to display a block diagram input screen reflecting the processing.

  FIG. 2 is a diagram illustrating an example of a block diagram input screen in the design support system of the present embodiment. In FIG. 2, reference numeral 1 denotes an entire block diagram input screen in the design support system, which includes display areas of a system block diagram display portion 100, a function module selection portion 110, and a bus selection portion 120.

The system block diagram display portion 100 is a portion that displays a block diagram of a system to be designed.
Here, reference numeral 101 denotes a bus constituting a system to be designed. The bus 101 is a type of bus called “BusA”. Reference numeral 102 denotes a functional module constituting a system to be designed, which is connected to the bus 101 as a master. The function module 102 is a function module of the type “ModuleA”. Reference numeral 104 denotes a functional module that constitutes a system to be designed, and is connected to the bus 101 as a slave. The function module 104 is a function module of the type “ModuleC”.

  The function module selection part 110 is a part that displays all or part of the types of function modules that can be used in the design support system of the present embodiment. The selection of the function module displayed in the function module selection portion 110 can be executed as follows. That is, the type of any one functional module is selected by the input device 10 (for example, a mouse, a trackball, a keyboard, etc.) that is directly or indirectly connected to the computer on which the design support system is operating. Selection can be specified.

  The bus selection portion 120 is a portion that displays all or part of the types of buses that can be used in the design support system of the present embodiment. The selection of the bus displayed in the bus selection portion 120 can be executed as follows. That is, any one bus type can be selected by the input device 10 (for example, mouse, trackball, keyboard, etc.) that is directly or indirectly connected to the computer on which the design support system is operating. It can be specified.

  Next, an operation in designing a system LSI using a block diagram input screen by the design support system of the present embodiment will be described. In the following description, as an example, a mouse is used as the input device 10 and the system displayed on the block diagram input screen shown in FIG. 2 is designed.

  First, when the designer points and clicks “BusA” displayed in the bus selection portion 120 of the block diagram input screen using the mouse, the design processing unit 30 sets “BusA” as a bus that constitutes the system LSI to be designed. BusA ”is selected. Then, with the selected state of “BusA”, if an arbitrary position in the system block diagram display portion 100 of the block diagram input screen is pointed and clicked with the mouse, “BusA” is arranged as the bus 101.

  At this time, the parameter setting unit 33 sets parameters related to the bus 101, and sets the operating frequency of the bus 101 as 48 MHz, which is the default operating frequency of “BusA” held internally as information by the design support system. Set. After this (after setting the operating frequency), it is also possible to reset the operating frequency to an arbitrary value desired by the designer using a menu displayed by clicking the bus 101 with the mouse. .

  Next, the function that configures the system LSI to be designed by the design processing unit 30 when the designer points and clicks “ModuleA” displayed in the function module selection portion 110 of the block diagram input screen using the mouse. “ModuleA” is selected as the module. Then, when the “ModuleA” is selected, the upper left position of the bus 101 in the system block diagram display part 100 is pointed and clicked with the mouse, and “ModuleA” is arranged as the functional module 102.

  Next, when the designer points and clicks “ModuleC” displayed in the function module selection portion 110 using a mouse, the “ModuleC” is configured as a functional module constituting the system LSI to be designed by the design processing unit 30. Is selected. Then, when the “ModuleC” is selected, the position below the bus 101 in the system block diagram display portion 100 is pointed and clicked with the mouse, and “ModuleC” is arranged as the functional module 104.

  Next, the designer points the position of the functional module 102 with the mouse, places a button, points to the bus 101, and releases the button, so that the functional module 102 and the bus 101 are connected by the design processing unit 30. The function module 104 is also connected to the bus 101 in the same manner.

In the above-described operation, when the functional module 102 operating as a master with respect to the bus 101 is connected to the bus 101, the parameter setting unit 33 sets 32 or more and 2 of W satisfying the following expression (1). W is automatically determined as a power value.
Ua <(K × H × W) (1)

  Here, Ua is a requested data transfer band for the “Module A” bus 101 held in the design support system, and H is an operating frequency of the bus 101 that has already been set (48 MHz in this embodiment). Further, K is a data transfer band coefficient of “BusA” held in the design support system, and W is a data transfer signal bit width of the bus 101.

Here, for example, in this embodiment, if W satisfying the above equation (1) is 32, the parameter setting unit 33 sets the data transfer signal bit width of the bus 101 to 32 bits (32-bit). The data transfer band coefficient K of “BusA” is such that the following expression (2) expressed by using the operating frequency H of “BusA” and the signal bit width W for data transfer becomes the data transfer band of “BusA”. Has been determined.
K x H x W (2)

  The minimum value of W is obtained by the parameter setting unit 33 based on the above formula (1) and the like by the procedure described above. Therefore, the minimum data transfer signal bit width of the bus 101 that satisfies the data transfer bandwidth required by the functional module 102 connected as a master to the bus 101 is determined.

  Next, a case where the functional module 103 is added as shown in FIG. 3 to the system configured as described above will be described. FIG. 3 is a diagram illustrating a state in which the functional module 103 is added by performing the operation described below from the state illustrated in FIG.

  In the state shown in FIG. 2, the designer points and clicks “ModuleB” displayed in the function module selection portion 110 using the mouse. Then, “Module B” is selected by the design processing unit 30 as a functional module constituting the system LSI to be designed. Then, when the “Module B” is selected, the upper right position of the bus 101 in the system block diagram display portion 100 is pointed and clicked with the mouse, and “Module B” is arranged as the functional module 103.

  Next, the design processor 30 connects the functional module 103 and the bus 101 by the designer placing the point and button with the mouse and pointing the bus 101 and releasing the button.

As described above, when the functional module 103 operating as a master with respect to the bus 101 is connected to the bus 101, the parameter setting unit 33 sets 32 or more and 2 of Ws in which the following expression (3) is satisfied. W is automatically determined as a power value.
(Ua + Ub) <(K × H × W) (3)

  Here, Ua is a request data transfer band for the “ModuleA” bus 101 held in the design support system, and Ub is a request data transfer band for the “ModuleB” bus 101 in the same manner. H is the operating frequency H of the bus 101 that has already been set (48 MHz in the present embodiment), K is the data transfer band coefficient of “BusA” held in the design support system, and W is the data of the bus 101 This is the transfer signal bit width.

  Here, for example, in this embodiment, if W in which the above expression (3) is satisfied is 64, the parameter setting unit 33 causes the data transfer signal bit width of the bus 101 after adding the functional module 103 to be 64 bits (64 -bit).

  That is, when the function configuration 103 is added from the state shown in FIG. 2 and the system configuration is changed to the state shown in FIG. 3, the data transfer signal bit width of the bus 101 automatically changes from 32 bits to 64 bits. . At this time, the designer calculates a data transfer bandwidth required by the functional module 102 and the functional module 103 for the bus 101, or executes a simulation and analyzes the result. Therefore, it is not necessary for the designer himself to set the parameters of the bus 101.

  In the above-described example, when the function module 103 is added, the data transfer signal bit width of the bus 101 is automatically changed. However, there is a restriction on fixing the data transfer signal bit width to 32 bits. An example is described below. Such constraint conditions may be set in advance and stored in a predetermined storage unit.

  In the state shown in FIG. 2, a predetermined menu is displayed when the designer points and clicks the bus 101 displayed in the block diagram display portion 100 with the mouse. By selecting “fix bus data width” from the displayed menu items with the mouse, the data transfer signal bit width of the bus 101 is fixed to 32 bits.

  Thereafter, when the functional module 103 is connected to the bus 101 by the same operation as in the above-described example, the parameter setting unit 33 automatically determines H and W so that the above equation (3) is established. However, since the data transfer signal bit width W of the bus 101 is fixed at 32, the above equation (3) is established by changing the operating frequency H of the bus 101. At this time, the operating frequency H of the bus 101 is determined to be a value that is a multiple of the frequency designated in advance by the designer. In this embodiment, for example, assuming that it is a multiple of 48 MHz, which is the default operating frequency, the value of the operating frequency H of the bus 101 is 96.

Therefore, from the state shown in FIG. 2, when the function module 103 is added while the data transfer signal bit width of the bus 101 is fixed to 32 bits, the parameter setting unit 33 causes the operating frequency of the bus 101 to be changed from 48 MHz to 96 MHz. It changes automatically.
As described above, the data transfer bandwidth required by both the functional modules 102 and 103 connected to the bus 101 as a master for the parameters of the bus 101 such as the bit width or the operating frequency for data transfer is determined. It is possible to automatically determine the minimum value to be satisfied.

According to the present embodiment, when determining parameters related to a bus constituting the system to be designed, particularly parameters related to the data transfer band of the bus, the parameters related to the bus are automatically determined as follows. That is, the parameter setting unit 33 automatically determines a parameter related to the bus based on the data transfer bandwidth requested by the functional module connected to the bus to the bus. Further, when a functional module is added, the parameter setting unit 33 determines the parameter related to the bus based on the sum of the data transfer bandwidths requested by the plurality of functional modules connected to the bus to the bus. Is automatically re-determined and changed.
Thereby, it is possible to efficiently determine and set appropriate parameters according to the function modules automatically connected to the bus. Furthermore, it is not necessary for the designer himself / herself to calculate the data transfer bandwidth required for the bus by the functional module connected to the bus, or to execute a simulation and analyze the result.

(Other embodiments of the present invention)
In order to operate various devices to realize the functions of the above-described embodiments, program codes of software for realizing the functions of the above-described embodiments are provided to a computer in an apparatus or system connected to the various devices. What is implemented by operating the various devices according to a program supplied and stored in a computer (CPU or MPU) of the apparatus or system is also included in the scope of the present invention.
In this case, the program code of the software itself realizes the functions of the above-described embodiments, and the program code itself constitutes the present invention. Further, means for supplying the program code to the computer, for example, a recording medium storing the program code constitutes the present invention. As a recording medium for storing the program code, for example, a flexible disk, a hard disk, an optical disk, a magneto-optical disk, a CD-ROM, a magnetic tape, a nonvolatile memory card, a ROM, or the like can be used.
Further, by executing the program code supplied by the computer, not only the functions of the above-described embodiments are realized, but also the OS (operating system) or other application software in which the program code is running on the computer, etc. It goes without saying that the program code is also included in the embodiment of the present invention even when the functions of the above-described embodiment are realized in cooperation with the embodiment.
Further, after the supplied program code is stored in the memory provided in the function expansion board of the computer or the function expansion unit connected to the computer, the CPU provided in the function expansion board or function expansion unit based on the instruction of the program code Needless to say, the present invention includes the case where the functions of the above-described embodiment are realized by performing part or all of the actual processing.

FIG. 4 is a block diagram illustrating a hardware configuration example of a computer 400 capable of realizing the design support system illustrated in the present embodiment.
4, the computer 400 includes a CPU 401, a ROM 402, a RAM 403, a keyboard controller (KBC) 405 of a keyboard (KB) 409 as an input device, and a CRT of a CRT display (CRT) 410 as a display device. The controller (CRTC) 406, the disk controller (DKC) 407 of the hard disk drive (HD) 411 and the flexible disk drive (FD) 412, and the network interface card (NIC) 408 can communicate with each other via the system bus 404. Connected configuration.
The CPU 401 executes the software (program) stored in the ROM 402 or the hard disk drive 411 or the software (program) supplied from the flexible disk drive 412, so that each component connected to the system bus 404 is comprehensively executed. Control. In other words, the CPU 401 reads out and executes the processing program from the ROM 402, the hard disk drive 411, or the flexible disk drive 412 that is a program or data recording medium, thereby performing control for realizing the operation in the present embodiment.
The RAM 403 functions as a main memory and work area for the CPU 401.
A keyboard controller 405 controls an instruction input from a keyboard 409 or a pointing device (not shown).
A CRT controller 406 controls display of the CRT 410.
The disk controller 407 controls access to the hard disk drive 411 and the flexible disk drive 412 that store various applications, user files, network management programs, processing programs in the present embodiment, and the like.
The network interface card 408 exchanges data and the like bidirectionally with other devices on the network 413.

  The above-described embodiments are merely examples of implementation in carrying out the present invention, and the technical scope of the present invention should not be construed as being limited thereto. That is, the present invention can be implemented in various forms without departing from the technical idea or the main features thereof.

It is a block diagram which shows the system configuration example of the design support system in embodiment of this invention. It is a figure which shows an example of the block diagram input screen in this embodiment. It is a figure which shows the example of the block diagram input screen after a functional module addition. It is a figure which shows the hardware structural example of the computer which can implement | achieve the design support system in this embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Input device 20 Module information storage part 30 Design processing part 31 Module selection part 32 Connection processing part 33 Parameter setting part 40 Display control part 50 Display apparatus

Claims (8)

A system design support system configured by combining a bus and a functional module connected to the bus,
Storage means for storing, for each functional module, functional module information indicating a transfer bandwidth requested by the functional module to the bus;
Selection means for selecting the bus and functional modules constituting the system to be designed;
Parameter setting means for setting the parameter relating to the bus selected by the selection means based on the functional module information stored in the storage means for the functional module selected by the selection means ;
The design support system, wherein the parameter setting means determines the parameters so that a function module connected to the bus satisfies a specification required for the bus. Selection means for selecting a bus and functions module to connect to the bus in order to configure the system to be designed,
Storage means for storing, for each functional module, functional module information indicating a transfer bandwidth requested by the functional module to the bus;
First display control means for displaying the bus on the editing screen;
A second display control means for displaying the functional module on the editing screen;
The parameters related to the bus are stored by the storage unit for the functional module selected by the selection unit so that the transfer bandwidth required for the bus is satisfied when the functional module connected to the bus operates. And a parameter setting means for determining and setting based on the functional module information . 3. The design support system according to claim 1, wherein when a functional module is connected to the bus, a parameter related to the bus is automatically changed according to the connected functional module. The design support system according to any one of claims 1 to 3, wherein a parameter related to the bus is further determined so as to satisfy a preset constraint condition. The design support system according to any one of claims 1 to 4 , wherein the parameter relating to the bus is at least one of a data signal bit width and an operating frequency of the bus. System design support is provided by an information processing apparatus having storage means, selection means, and parameter setting means for storing, for each functional module, functional module information indicating a transfer bandwidth requested by the functional module to the bus. An information processing method for
It said selection means comprises a selection step of selecting a bus and function modules to configure the system to be designed,
A parameter setting step in which the parameter setting means sets the parameter relating to the bus selected in the selection step based on the functional module information stored in the storage means for the functional module selected in the selection step; Have
In the parameter setting step, an information processing method characterized by functional modules connected to the bus to determine the parameters such specifications required with respect to the bus are satisfied. The program for making a computer perform each process of the information processing method of Claim 6 . A computer-readable recording medium, wherein the program according to claim 7 is recorded.

Images