JP4742609B2 - Semiconductor package and printed wiring board mounted therewith - Google Patents

Description

  The present invention relates to a semiconductor package on which a high-speed transmission IC chip is mounted, and a printed wiring board on which the semiconductor package is mounted.

In high-speed transmission of semiconductor packages and printed wiring boards, different line lengths become a major problem in bus wiring that transfers data to a plurality of lines at the same time. For example, when the clock frequency is 1.0 [GHz], the period is T = 1/1 × 10 ⁹ = 1 [ns]. When it is considered that the temporal shift (skew) between the signals that are allowed to be transmitted to a plurality of lines at this time is suppressed to 5 [%] or less, the skew is 0.05 [ns]. The time of 0.05 [ns] varies depending on the line structure when converted to the line length, but is about 9 [mm] for the microstrip line. This line length is obviously short considering the line length obtained by adding the IC package and the PCB as well as the IC package alone. This can be said to be a length that has a great influence on the electrical characteristics because there is a possibility that transmission may become impossible unless a substrate is designed in consideration of waveform deviation due to skew. In the conventional structure, the bus wiring between the two IC packages mounted on the PCB can be drawn linearly in consideration of the line length. However, considering that mutual transmission is performed between the three IC packages, there is an oblique wiring, and it has been necessary to perform equal length wiring in consideration of a long transmission distance.

Known documents are shown below.
JP-A-6-334104

  The size of the IC package is 4 to 5 [cm] square, but when the IC chip is mounted in the middle and wiring is performed, the distance from the center is 2 to 2.5 [cm] at the shortest place, the most It becomes 2.8 to 3.5 [cm] in a long place. This distance is very strict to fit within the previously mentioned skew. Furthermore, the IC chip and the IC package alone do not operate the circuit, but are mounted on a PCB and operated by combining with various circuits. Considering so far, it is not within the skew. Currently, the meander wiring is used to adjust the skew between the IC package and the PCB. However, the influence of the reduction in wiring density, inductance, and crosstalk due to the meander wiring cannot be ignored in high-speed transmission. Therefore, by removing the meander pattern for equal-length wiring, high-speed transmission is possible. Further, since the meander pattern is eliminated, a line can be drawn in the space to improve the degree of integration or reduce the IC package. Can be done.

  In the above example, the frequency is set to 1 [GHz]. However, in recent years, the speed of the clock frequency has been increasing. If the clock frequency becomes 1 [GHz] or higher, skew adjustment in the IC package is very important. Become.

  It is an object of the present invention to provide a semiconductor package and a printed circuit board that satisfy a skew in high-speed transmission, improve a wiring density in a semiconductor package, and improve a mounting density on a printed wiring board.

The present invention has been made in view of such problems, and the invention of claim 1
A hexagonal semiconductor package in which six IC chips having a triangular shape are arranged and mounted so as to be adjacent to each other ,
Of the pins for electrical connection for mounting the semiconductor package, the pins on the outer periphery of the semiconductor package are arranged on hexagonal sides,
The pads on the sides facing the outer peripheral portion of the IC chip are arranged in parallel with the arrangement of the pins on the outer peripheral portion of the semiconductor package, and connected to the wiring on the semiconductor package by leads,
The wiring from the pads on the other two sides of the IC chip is connected to the wiring on the semiconductor package through a lead from between the pads on the side facing the outer peripheral portion,
The semiconductor package is characterized in that equal-length wiring can be performed between a pad on a side facing the outer peripheral portion of the IC chip and a pin on the outer peripheral portion of the semiconductor package.

  By using such a semiconductor package and mounting it on a printed wiring board so that the pin rows are parallel and opposed to each other, it is possible to perform equal-length wiring in one-to-one communication, and further, a semiconductor package having a hexagonal pin arrangement By mounting a large number of lines, equal-length wiring can be performed by one-to-two communication. Thereby, skew can be reduced and high-speed transmission can be endured. Further, the meander pattern can be reduced, whereby the wiring density in the semiconductor package can be improved and the mounting density on the printed wiring board can be improved.

In addition, by mounting such a triangular IC chip, equal-length wiring can be performed between the chip and the package, and the density can be further improved.

The invention of claim 2 of the present invention, in the printed wiring board in which a plurality mounting a semiconductor package according to claim 1, wherein the semiconductor package hexagonal one side arranged pin array on of the other semiconductor package The printed wiring board is characterized in that a semiconductor package is arranged and mounted so as to be parallel to and opposed to a pin row arranged on one side of the hexagon.

  By mounting in this way, equal-length wiring can be performed in one-to-one communication, and equal-length wiring can be performed in one-to-two communication, thereby reducing skew and withstanding high-speed transmission. Further, the meander pattern can be reduced, whereby the wiring density in the semiconductor package can be improved and the mounting density on the printed wiring board can be improved.

  The present invention is configured as described above and has the effects as described above, so that high-speed transmission is possible, the wiring density in the semiconductor package is improved, and the mounting density on the printed wiring board is improved. It can be a printed circuit board.

  Embodiments of a semiconductor package and a printed wiring board according to the present invention will be described with reference to the drawings.

FIG. 1 is an explanatory view showing an example of a semiconductor package of a reference example , FIG. 1 (a) is an explanatory view seen from the top surface, and FIG. 1 (b) is a schematic explanatory view seen from a cross section from the side surface. The semiconductor package 1 of the reference example is a hexagonal IC package, and an IC chip 4 is arranged at the center of one surface, and is wired by a transmission line 3 from the chip 4 to the periphery of the package. The transmission line is connected to the multilayer wiring layer via the via hole 8 (not shown in FIG. 1A), and is connected to the pin 2 on the other surface (lowermost layer) of the package. On the other surface of the package, an outermost peripheral pin (electrically connecting portion) 2 is arranged on a virtual hexagonal line 7. In this example, a rectangular IC chip 4 is mounted. Even if a rectangular IC chip is mounted on the hexagonal IC package 1, the IC chip 4 itself is about 20 [mm] square at most, so there is no effect on the equal-length wiring. Note that the pattern in FIG. 1A is for explanation, and only the outermost peripheral pin 2 is shown by a broken line in the lowermost layer. The explanatory view seen from the side of FIG. 4B is for explaining the wiring layer and the pin, and the pattern of FIG.

  In the example shown in FIG. 1, when the shortest line length is 2 to 2.5 [cm] in the hexagonal package, the longest line length is 2.3 to 2.9 [cm]. That is, when the hexagonal IC package is 4 to 5 [cm] in FIG. 1 and the distance between the top and bottom sides is 4 to 5 [cm], the shortest line is 4/2 to 5/2 = 2 to 2.5 [cm]. The longest line is (4 × 2) / (2 × √3) to (5 × 2) / (2 × √3) = 2.3 to 2.9 [cm].

  Here, if the top-to-bottom side of the hexagonal IC package is 4 [cm], the difference between the longest line and the shortest line is 2.3-2.0 = 0.3 [cm] = 3 [mm] ]. When the distance between the left and right ends of the hexagonal IC package is 4 [cm] in FIG. 1, the difference between the longest line and the shortest line is even smaller. This is within the line length of the skew mentioned earlier (skew when the clock frequency is 1 [GHz] (5 [%] or less; distance is 9 [mm] or less)), and skew within the hexagonal package. It can be said that the meander pattern for performing the adjustment is not necessary. The fact that the meander pattern is not required in the hexagonal package means that there is a margin between the wirings, and the IC package itself can be made small. This is advantageous over the conventional square package in terms of skew at the same clock frequency.

FIG. 2 is an explanatory view of the PCB on which the hexagonal IC package of this example is mounted as viewed from above. In the figure, the pin rows arranged on one side of the hexagon of the package 1 on the PCB 5 are parallel to and opposed to the pin rows arranged on one side of the hexagon of the other package 1. The package 1 is arranged and mounted on the board.

  The package 1 mounted on the PCB 5 is connected by a transmission line 6. Thus, by arranging the outermost peripheral pins 2 on the hexagonal line 7 and making the IC package 1 hexagonal, it becomes easy to make equal length wiring between the IC packages of 1: 3 at the maximum (chip a -Chip b, chip a-chip c, wiring between chip bc chips), and the mounting density mounted on the PCB 5 is also improved. However, the package does not necessarily need to be hexagonal, and the effects of the present invention can be obtained even if the sides that do not contribute to wiring are in other shapes. In addition, the pins may be arranged on the sides of the required virtual hexagon, and are not necessarily arranged on all sides.

  In the example in which the hexagonal package 1 is mounted on the PCB 5 shown in FIG. 2, by arranging the hexagonal package 1 as shown in the figure, two IC packages can perform equal length wiring with respect to one IC package. it can. As a result, the three IC packages are connected by equal-length wiring, and the three IC packages can perform bus communication. Further, by drawing wiring from each side of the hexagon to the hexagonal package, a maximum of six IC packages can be arranged for one IC package. This improves the mounting density. Further, the meander pattern is reduced due to the reduction of the equal length wiring, and the mounting density of the IC package is improved. Further, by making the PCB itself hexagonal, the same effect can be obtained for the connection between the PCBs.

FIG. 3A is an explanatory view of an example of the semiconductor package of the present invention as viewed from above, and FIG. 3B is an explanatory view of the triangular IC chip arranged in this example as viewed from above. In this example, the pads 9 of the triangular IC chip 400 are arranged on the triangular line 10. Six IC chips 400 are arranged in the package 100 so as to be adjacent to each other. In the figure (a), the pad 9 and the triangular line 10 are shown only on the side facing the outer periphery of the package 100. The pads 90 on the sides facing the outer peripheral portion are arranged in parallel with the arrangement of the pins 200 on the outer peripheral portion of the package 100 and are connected to the transmission line 300 by lead wires (not shown). Wiring from pads on the other two sides has leads connected to wiring on the package 1 from between the pads 90 on the side facing the outer peripheral portion (not shown). The arrangement of the pins 2 of the package and the wiring between the transmission line 3 and the pins 2 are the same as in the reference example.

  By mounting the IC chip 400 in which the pads 9 are arranged in a triangle in this manner on the package 100, the wiring from the pad 9 of the chip 400 has the same length between the pad 90 on the side facing the outer peripheral portion and the pin 200 of the package. Wiring can be performed and density can be further improved.

  Further, the semiconductor package of this example is arranged and mounted around the package of the above-described example example so that the pad row on one side of the triangle and the pin row on one side of the hexagonal example of the above example are parallel and opposite to each other. A printed wiring board. By mounting in this way, equal-length wiring can be performed between the chip and the package, and a printed wiring board with further improved density can be obtained.

  In this example, triangular ICs are arranged next to each other. However, for example, a configuration in which a triangular interposer is created and ICs are arranged thereon may be used. By doing so, the pad on the side facing the outer peripheral portion can be connected to the transmission line, and the pad on the other side can be directly connected to the internal multilayer wiring portion from the interposer.

  Further, it is not necessary to use six ICs as in this example, and the number may be reduced depending on the circuit used.

  Furthermore, a polygonal IC may be used instead of a triangle. When such ICs are arranged next to each other, there may be a gap, but in this case as well, the pads on the sides facing the outer periphery are arranged in parallel with the pin arrangement on the outer periphery of the package as described above. By connecting to the transmission line, the same effect can be obtained.

It is explanatory drawing which showed one example of the semiconductor package of a reference example , (a) is explanatory drawing seen from the upper surface, (b) is explanatory drawing seen from the side surface by the cross section. It is explanatory drawing which looked at PCB which mounted the hexagonal package of the reference example and the Example of this invention on the upper surface. BRIEF DESCRIPTION OF THE DRAWINGS It is explanatory drawing which showed the example of the semiconductor package of this invention, (a) is explanatory drawing seen from the upper surface, (b) is explanatory drawing which looked at the triangular-shaped IC chip arrange | positioned by this example from the upper surface.

Explanation of symbols

1 ... Hexagonal package 2 ... Pin (electrical connection)
3 ... Transmission line 4 ... IC chip 5 ... PCB
6 ... Transmission line in PCB 7 ... Virtual hexagonal line 8 ... Via hole 9 ... IC pad 10 ... Virtual triangular line 100 ... Hexagonal package 200 ... Pins (electrical connections)
300 ... Transmission line 400 ... IC chip 700 ... Virtual hexagonal line

Claims (2)

A hexagonal semiconductor package in which six IC chips having a triangular shape are arranged and mounted so as to be adjacent to each other ,
Of the pins for electrical connection for mounting the semiconductor package, the pins on the outer periphery of the semiconductor package are arranged on hexagonal sides,
The pads on the sides facing the outer peripheral portion of the IC chip are arranged in parallel with the arrangement of the pins on the outer peripheral portion of the semiconductor package, and connected to the wiring on the semiconductor package by leads,
The wiring from the pads on the other two sides of the IC chip is connected to the wiring on the semiconductor package through a lead from between the pads on the side facing the outer peripheral portion,
A semiconductor package characterized in that equal-length wiring can be performed between a pad on a side facing the outer peripheral portion of the IC chip and a pin on the outer peripheral portion of the semiconductor package. 2. A printed wiring board on which a plurality of semiconductor packages according to claim 1 are mounted, wherein a pin row arranged on one side of the hexagon of the semiconductor package is arranged on one side of the hexagon of another semiconductor package. A printed wiring board, wherein a semiconductor package is arranged and mounted so as to be parallel to and opposed to the arranged pin array.

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