JP4739249B2 - Amplifier and Doherty amplifier using the same - Google Patents

Description

  The present invention relates to an amplifier that amplifies a high-frequency signal and a Doherty amplifier using the same.

With the rapid development of wireless communication in recent years, not only voice communication but also data communication has been actively performed. Since data communication handles a large amount of information, a broadband modulated wave that enables high speed and large capacity communication is used. Since the power per unit frequency of the modulated wave is closely related to the error rate of the data, a large output is required for the amplifier to realize the desired error rate.
On the other hand, since the amount of information required for voice calls is relatively small and the required bandwidth is narrow, even when the power per unit frequency is the same as that for data communication, the amplifier does not require as much output as during data communication. For this reason, in wireless communication devices that switch between data communication and voice call functions, it is required to increase the gain and efficiency of the amplifier at the time of high output during data communication and to increase the efficiency at the time of low output during voice call. It has been.

  As a technique for improving the efficiency at the time of low output, there is a technique of reducing the gate voltage of the amplifier at the time of low output and bringing it close to class C. To achieve this, a digital control circuit is used to control the gate voltage from the outside of the amplifier, and the input power and output power are detected inside the amplifier, and the analog circuit is used to detect the gate voltage of the amplifier using this detected voltage. There is a method to control. Although the former requires a control circuit composed of a digital circuit or the like outside the amplifier, there is an advantage that no special circuit is required for the amplifier. On the other hand, the latter requires a detection circuit or the like inside the amplifier, but has the advantage that it can be realized with a relatively simple circuit.

A conventional semiconductor power amplifier has a circuit that increases the drain current according to the input power by changing the gate voltage of the transistor according to the RF input signal and suppresses the generation of distortion.
In this circuit, a Zener diode is connected in parallel with the signal line on the gate side of the FET. The RF signal input from the input terminal is branched to the gate terminal and the diode of the FET. The signal input to the gate of the FET is output to the output terminal after being amplified by the FET. The signal input to the diode is detected, smoothed by the capacitor, and a direct current is generated. The direct current changes the voltage generated in the resistor connected in series with the diode, and changes the voltage dividing ratio of the voltage dividing circuit determined by the resistor and the resistor. Thereby, the gate voltage of the FET is changed (see, for example, Patent Document 1).

Another conventional high-frequency power amplifier is a circuit that prevents destruction of the MOSFET due to an excessive gate voltage by providing a Zener diode as a voltage limiting element at the gate voltage application terminal of the FET.
In this circuit, the Zener diode is connected to the gate of the FET and the signal line through a resistor. Even if an excessive voltage is applied to the gate voltage application terminal, the voltage is limited to a constant voltage by a Zener diode that is a voltage limiting element, so that the destruction of the MOSFET can be prevented (for example, see Patent Document 2).

Another conventional amplifier has a circuit that uses a Schottky diode biased in the forward direction to change the gate voltage of the FET according to the temperature and keep the gain constant.
This circuit is a voltage dividing circuit composed of a diode and a resistor in order to apply a gate voltage to the FET according to temperature. This voltage dividing circuit is connected to the gate of the FET and the signal line via a DC feed choke inductor for separating the FET and the voltage dividing circuit at high frequency (see, for example, Patent Document 3).

  Another conventional amplifier is configured by applying the circuit described in Patent Document 3, and a resistor is used in place of the DC feed choke inductor disclosed in Patent Document 3. In addition, a capacitor is connected to a connection point between the diode and the resistor (for example, see Non-Patent Document 1).

JP-A-8-139542 JP-A-8-242128 JP 2001-320242 A Yamauchi, et al., “X-band MMIC power amplifier with built-in temperature compensation circuit”, Mitsubishi Electric Technical Report, Mitsubishi Electric Corporation, 2002, Vol. 76, No. 2, p. 51-54

However, in the semiconductor power amplifier of Patent Document 1, a Zener diode is connected in parallel with the signal line on the gate side of the FET, but the Zener diode is directly connected to the signal line and is connected to the ground via a capacitor. There is a problem that the RF loss is large.
In addition, since the zener diode is biased in the reverse direction, it appears as a resistance to the RF signal, and it is difficult to increase its resistance value, so that the loss is further increased.

In addition, since the diode is directly connected to the signal line, there is a problem that the matching condition of the FET is disturbed when the equivalent resistance of the diode changes due to the direct current flowing through the diode.
In addition, since a Zener diode in which a reverse bias is applied to the diode is used so that both ends of the diode have a constant voltage, a current of about several mA is consumed. Therefore, there is a problem that current is consumed in the bias circuit.

  In addition, the high frequency power amplifier of Patent Document 2 has a function of preventing destruction of the MOSFET due to an excessive gate voltage by a Zener diode, but does not have a function of changing the gate voltage according to input power.

The amplifier of Patent Document 3 has a function of changing the gate voltage of the FET according to the temperature and keeping the gain constant, but does not have a function of changing the gate voltage according to the input power.
In addition, a DC feed choke inductor is used to separate the FET and the voltage dividing circuit in terms of high frequency, and the RF signal is prevented from leaking into the voltage dividing circuit.

  Further, the amplifier of Non-Patent Document 1 does not have a function of changing the gate voltage according to the input power. A capacitor is connected to the connection point between the diode and the resistor to prevent the RF signal from leaking into the voltage dividing circuit.

  An object of the present invention is to provide an amplifier and a Doherty amplifier using the same that have very little RF loss, do not affect FET matching conditions even if the equivalent resistance of the diode changes, and consume less current in the bias circuit. Is to provide.

Amplifier according to the present invention, a field effect transistor which amplifies the input signal including the RF signal, a dividing circuit for dividing a voltage inputted from the outside to both ends of the circuit, a part of the input signal A connection circuit for guiding the divided voltage to the gate electrode of the field-effect transistor and introducing the divided voltage to at least one diode and a resistor connected in series. becomes, the diode is an equivalent resistance is changed by detecting a signal derived in together that is forward biased, the voltage divided the content is changed, the connection circuit, resistance or Rannahli, No capacitor is connected to the connection point between the voltage divider circuit and the connection circuit.

The effect of the amplifier according to the present invention is that the RF signal is led to the voltage dividing circuit via the resistor or inductor, so that the RF loss is very small, and the line to which the diode and the RF signal are input is the resistor or inductor. Therefore, even if the equivalent resistance of the diode changes, the matching condition of the field effect transistor is not affected.
In addition, since a diode biased in the forward direction is used, the current consumed by the voltage dividing circuit is 1 mA or less, which means that almost no current is consumed.

Embodiment 1 FIG.
1 is a circuit diagram showing a configuration of an amplifier according to Embodiment 1 of the present invention.
The amplifier 1 according to the first embodiment of the present invention receives a field effect transistor (hereinafter referred to as “FET”) 2 for amplifying a high-frequency signal (hereinafter referred to as “RF signal”), and an RF signal. Input terminal 3, output terminal 4 for outputting an RF signal amplified by FET 2, matching circuits 5 and 6 for matching impedances between input terminal 3 and FET 2, and between FET 2 and output terminal 4, gate voltage A gate voltage control circuit (Gate Voltage Control Circuit, hereinafter referred to as “GVCC” for short) 7 is provided.
The FET 2, the matching circuits 5 and 6, and the gate voltage control circuit 7 are integrated and integrally formed on the semiconductor substrate using a semiconductor process.

  The FET 4 includes a gate electrode 11 to which an RF signal is input, a drain electrode 12 to which the RF signal is output, and a source electrode 13 that is grounded. The gate electrode 11 is connected to the matching circuit 5, and the drain electrode 12 is connected to the matching circuit 6.

The gate voltage control circuit 7 includes a voltage dividing circuit 8 and a connection circuit 9 that supplies the voltage divided by the voltage dividing circuit 8 to the FET 2.
Voltage divider circuit 8 is connected, the high voltage supply terminal 15 to which the voltage V _g1 is supplied, the low-voltage supply terminal 16 to which the voltage V _g2 is lower than the voltage V _g1 is supplied, the positive electrode to the high voltage supply terminal 15 And a voltage dividing resistor 18 having one end connected to the diode 17 and the other end connected to the low voltage supply terminal 16. A bias supply terminal 19 is provided between the diode 17 and the voltage dividing resistor 18. The diode 17 operates as a voltage dividing resistor and a detection element. A plurality of diodes 17 may be connected in parallel so that the gate voltage changes only when a large input power is input.

Since the connection circuit 9 needs to detect the RF signal by the diode 17 of the voltage dividing circuit 8, the RF signal is guided to the voltage dividing circuit 8. Therefore, since the FET 2 and the voltage dividing circuit 8 are separated in high frequency, for example, a capacitor or a DC feed choke inductor cannot be used, the connection circuit 9 includes a connection resistor 21. Instead of the connection resistor 21, an inductor having an inductance that does not completely block the RF signal may be used.
The connection resistor 21 has one end connected to the bias supply terminal 19 and the other end connected to the gate electrode 11. The connection resistor 21 conducts an operation of guiding the RF signal to the voltage dividing circuit 8 and transmitting the divided voltage to the FET 2.

Next, the operation of the amplifier 1 according to the first embodiment will be described.
The RF signal input from the input terminal 3 passes through the matching circuit 5 and then branches to the connection resistor 21 and the FET 2. The signal input to the FET 2 is guided to the output terminal 4 after amplification. On the other hand, the signal guided to the connection resistor 21 is guided to the voltage dividing circuit 8.

At this time, a voltage is applied to the voltage dividing circuit 8 between the high voltage supply terminal 15 and the low voltage supply terminal 16 so that a desired bias voltage is applied to the gate electrode 11 of the FET 2. . Since the voltage V _g1 supplied to the high voltage supply terminal 15 is higher than the voltage V _g2 supplied to the low voltage supply terminal 16, the diode 17 is biased in the forward direction.

  The RF signal guided to the voltage dividing circuit 8 is detected by the diode 17 and a rectified current is generated. The equivalent resistance of the diode 17 is reduced by the rectified current, and the voltage dividing ratio determined by the diode 17 and the voltage dividing resistor 18 changes. When the voltage dividing ratio changes, the voltage between the diode 17 and the voltage dividing resistor 18 changes, and the voltage at the bias supply terminal 19 changes. This changed voltage is transmitted to the gate electrode 11. When the input power increases, the gate voltage applied to the FET 2 via the connection resistor 21 increases, and the drain current increases.

Next, how to use the voltage dividing circuit 8 will be described.
In the vicinity of the saturated power, the voltage V _g1 and the voltage V _g2 are adjusted in advance so that the gate voltage is the same as when the gate voltage control is not performed. Thereby, at the time of low output, the gate voltage is reduced, and the FET 2 can be operated to approach the class C bias.

FIG. 2 is a circuit configuration diagram of a GVCC-equipped amplifier that was prototyped for measurement.
Next, in order to confirm that the gate voltage is reduced and the drain current is reduced as the input power is reduced, the GVCC 7 is integrated on the semiconductor substrate on which the monolithic amplifier is formed, and an amplifier with GVCC is prototyped. Was measured. As shown in FIG. 2, the prototype amplifier with GVCC is a four-stage amplifier in which the final stage is composed of four, and the gate voltage of the final stage is controlled according to the input power. At the same time, in order to confirm the difference in drain current and input / output characteristics with respect to the presence or absence of GVCC7, an amplifier without GVCC was also prototyped.

FIG. 3 is a graph showing measurement results of the total drain current I total of the first to fourth stages and the drain current I _d4 of the fourth stage of each of the prototyped amplifier with GVCC and the amplifier without _GVCC . FIG. 4 is a graph showing measurement results of input / output characteristics of the prototyped amplifier with GVCC and the amplifier without GVCC.
With increasing input power _{P in,} the gain characteristics and the drain current is gradually changed, the idle current _I dq = 25mA / mm saturation power of the final stage which is set at the time of a small signal change in _I dq = 75mA / mm equivalent properties You can see that
Thus, the amplifier with GVCC can reduce the power consumption of the amplifier at low output while maintaining the gain in the saturation region.

In the amplifier 1 according to the first embodiment of the present invention, the RF signal is guided to the voltage dividing circuit 8 through the connection resistor 21, so that the RF loss is very small.
Further, since the diode 17 and the gate electrode 11 of the FET 2 are connected via the connection resistor 21, even if the equivalent resistance of the diode 17 changes, the matching condition of the FET 2 is not affected.

In addition, since the forward-biased diode 17 is used, the current consumed by the voltage dividing circuit 8 is 1 mA or less, and hardly consumes current.
Further, since the GVCC 7 has a very simple configuration and is small in size, it can be integrally formed with the monolithic amplifier using a semiconductor process. Therefore, an external gate voltage control circuit is not required, and the control of the gate voltage according to the input power can be realized by the amplifier alone.

Although the gate voltage control circuit 7 is integrally formed with the FET 2, it may be configured using individual parts.
Further, by adjusting the voltage applied to the high voltage supply terminal 15 and the low voltage supply terminal 16 in advance so that the gate voltage becomes the same as when the gate voltage control is not performed at the time of no signal input, The gate voltage may be raised to increase the drain current. As a result, it is possible to prevent a reduction in the saturation power of the amplifier and to improve the gain in the vicinity of the saturation region.

  In addition, when the connection position of the voltage dividing resistor 18 and the diode 17 in the voltage dividing circuit 8 is exchanged as in the amplifier 1B shown in FIG. 5, the gate voltage decreases with increasing input power, and the class C is near the saturation region. It is possible to move closer to the bias. The operating principle is that the equivalent resistance of the diode 17 decreases as the input power to the voltage dividing circuit 8 increases as in the amplifier 1 according to the first embodiment, so that the voltage dividing ratio changes and the gate voltage decreases. Is used. Thereby, the efficiency in the vicinity of the saturation region can be improved.

Embodiment 2. FIG.
FIG. 6 is a block diagram showing a configuration of a Doherty amplifier according to Embodiment 2 of the present invention.
The Doherty amplifier is an amplifier that employs a typical high-efficiency technique in a region where back-off is taken, and is used when, for example, an OFDM modulated wave having a large peak power with respect to the average power is amplified.
As shown in FIG. 6, the Doherty amplifier includes an input terminal 31, an output load 32, a carrier amplifier 33, a peak amplifier 34, a 90-degree phase adjuster 35, and a ¼ wavelength line 36.
The carrier amplifier 33 is biased to class AB. The peak amplifier 34 is an amplifier circuit with a voltage dividing circuit according to the first embodiment, and is biased to class C.
The 90-degree phase adjuster 35 adjusts the phase of the RF signal input to the input terminal 31 by 90 degrees and inputs it to the peak amplifier 34.

FIG. 7 is a diagram for explaining the operation principle of the Doherty amplifier according to the second embodiment.
Next, the operation of the Doherty amplifier according to the second embodiment will be described.
In the Doherty amplifier, as shown in FIG. 7 (a), the peak amplifier 34 biased to the class C is in a resting state when the output back-off is 6 dB or more, and only the carrier amplifier 33 operates.
On the other hand, as shown in FIG. 7B, when the output is smaller than the output back-off 6 dB, the two outputs of the carrier amplifier 33 and the peak amplifier 34 are combined to obtain a large output.
In this way, both large saturation power and high efficiency characteristics during back-off operation are achieved.

FIG. 8 is a graph showing the drain efficiency of the Doherty amplifier and the drain current of the peak amplifier with respect to the output power.
An operation when the GVCC 7 using the voltage dividing circuit 8 is applied to the peak amplifier 34 of the Doherty amplifier according to the second embodiment will be described.
In FIG. 8, a characteristic A indicated by a dotted line indicates the drain efficiency of the Doherty amplifier and the drain current of the peak amplifier to which the GVCC 7 using the voltage dividing circuit 8 is not applied, and a characteristic B indicated by a solid line indicates the drain efficiency of the Doherty amplifier and The theoretical value of the drain current of the peak amplifier is shown. A characteristic C indicated by a one-dot chain line indicates measured values of the drain efficiency of the Doherty amplifier to which GVCC 7 using the voltage dividing circuit 8 is applied and the drain current of the peak amplifier.

  Although the theoretical value of the drain efficiency of the Doherty amplifier has a peak at 6 dB back-off, the measured value of the drain efficiency of the Doherty amplifier without applying the GVCC 7 using the voltage dividing circuit 8 is lower than the theoretical value, and the peak is unclear. It is. In theory, it is assumed that the peak amplifier 34 is completely turned off in a small signal region of 6 dB back-off or more and the drain current is not consumed, but the GVCC 7 using the actual voltage dividing circuit 8 is used. Since the peak amplifier 34 of the Doherty amplifier that does not apply is biased to class C, current is consumed in a region of 6 dB or more.

In order to improve the drain efficiency, it is desired that the current is not consumed by the peak amplifier 34 in a small signal region of 6 dB or more, and the current increases rapidly in a large signal region of 6 dB or less.
Therefore, by reducing the gate voltage of the FET 2, current can be prevented from being consumed by the peak amplifier 34 in a small signal region of 6 dB or more. Or a decrease in saturation power occurs.

On the other hand, by applying the GVCC 7 using the voltage dividing circuit 8 to the peak amplifier 34 of the Doherty amplifier as in the present invention, the gate voltage is reduced in the small signal region of 6 dB or more compared with the case where the gate voltage control is not performed. This makes it possible to limit the drain current of the peak amplifier 34 in a small signal region of 6 dB or more.
Further, in the large signal region of less than 6 dB, the drain current of the peak amplifier 34 can be increased more quickly than in the case where the gate voltage control is not performed. Therefore, the gate voltage is simply reduced without performing the gate voltage control. Compared to the case, it is possible to prevent a decrease in saturation power and a gain in the Doherty amplifier.
Thus, by applying GVCC7 using the voltage dividing circuit 8 to the Doherty amplifier, high efficiency characteristics close to the theoretical value can be realized in the vicinity of 6 dB backoff.

  In the second embodiment, the case where the GVCC 7 is applied to the peak amplifier 34 has been described. However, the connection position of the voltage dividing resistor 18 and the diode 17 in the voltage dividing circuit 8 may be exchanged and applied to the carrier amplifier 33. As a result, the gate voltage can be controlled to be reduced with respect to the increase in output power, and the efficiency of the carrier amplifier 33 can be improved in the saturation region.

It is a circuit diagram which shows the structure of the amplifier which concerns on Embodiment 1 of this invention. It is a circuit block diagram of the amplifier with a voltage dividing circuit used for the measurement. It is a graph which shows the measurement result of the total drain current of the 1st stage to the 4th stage, and the drain current of the 4th stage of each of the prototyped amplifier with GVCC and the amplifier without GVCC. It is a graph which shows the measurement result of each input-output characteristic of a prototype amplifier with GVCC and an amplifier without GVCC. It is a circuit diagram which shows the structure of the other amplifier which concerns on Embodiment 1 of this invention. It is a block diagram which shows the structure of the Doherty amplifier which concerns on Embodiment 2 of this invention. 6 is a diagram for explaining an operation principle of a Doherty amplifier according to Embodiment 2. FIG. It is a graph which shows the drain efficiency of the Doherty amplifier with respect to output electric power, and the drain current of a peak amplifier.

Explanation of symbols

  1, 1B amplifier, 2 field effect transistor (FET), 3 input terminal, 4 output terminal, 5, 6 matching circuit, 7 gate voltage control circuit (GVCC), 8 voltage divider circuit, 9 connection circuit, 11 gate electrode, 12 Drain electrode, 13 Source electrode, 15 High voltage supply terminal, 16 Low voltage supply terminal, 17 Diode, 18 Voltage dividing resistor, 19 Bias supply terminal, 21 Connection resistance, 31 Input terminal, 32 Output load, 33 Carrier Amplifier, 34 Peak amplifier, 35 90 degree phase adjuster, 36 1/4 wavelength line.

Claims (3)

A field effect transistor for amplifying an input signal including an RF signal ;
A voltage dividing circuit that divides the voltage input from the outside across the circuit;
The divided voltage guides a portion of the input signal to the divider circuit and connecting circuit to the gate electrode of the field effect transistor,
Have
The voltage dividing circuit includes at least one diode and a resistor connected in series,
The diode is forward-biased and detects the derived signal, so that the equivalent resistance changes, and the divided voltage changes,
The connection circuit, resistance or Rannahli,
An amplifier, wherein a capacitor is not connected to a connection point between the voltage dividing circuit and the connection circuit.   2. The amplifier according to claim 1, wherein the voltage dividing circuit and the connection circuit are integrally formed with the field effect transistor.   3. A Doherty amplifier, wherein the amplifier according to claim 1 is used for at least one of a main amplifier and a peak amplifier.

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