JP4738602B2 - Substrate manufacturing method and display device manufacturing method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a display device and a manufacturing method thereof. The display device displays information by changes in brightness. As an example of the display device, there is a liquid crystal display device using liquid crystal or a display device using OLED (Organic Light Emitting Diode). A liquid crystal display device displays light and dark using the fact that the polarization state, scattering state, or wavelength characteristic of light passing through the liquid crystal layer changes depending on the voltage applied to the liquid crystal layer sandwiched between the substrates. It is. In addition, a display device using an OLED performs light and dark display by applying an electric field to a light emitting layer sandwiched between an anode and a cathode to emit light. As the light emitting layer, either a low molecular material or a high molecular material can be used.
[0002]
[Prior art]
Thin display devices typified by liquid crystal display devices, display devices using OLEDs, and plasma display panels are advantageous in terms of light weight, low power consumption, and space saving, and are being actively developed.
[0003]
A liquid crystal display device is provided with stripe electrodes on two substrates, a simple matrix type display device having matrix electrodes in which these substrates are arranged to face each other so that the stripe electrodes of each substrate intersect, and an active matrix type There are display devices. Active matrix liquid crystal display devices are widely used in display units of personal computers, televisions, navigation devices, portable terminals, and the like because each pixel can be individually switched to obtain high image quality.
[0004]
The active matrix method is classified into two types depending on the form of an element applied to each pixel. A two-terminal method using a non-linear element such as a diode and a three-terminal method using transistors such as TFT (Thin Film Transistor) and FET (Field Effect Transistor).
[0005]
The transistor includes a gate electrode provided so as to cross the semiconductor film, a source electrode provided in connection with the semiconductor film, and a drain electrode provided in connection with the semiconductor film. Among the transistors, amorphous silicon, polycrystalline silicon, or the like is used as the semiconductor film of the TFT. Single crystal silicon is used as the semiconductor film of the FET.
[0006]
In recent years, active matrix display devices have been improved in definition and higher quality images have been realized. Some of these display devices have not only a matrix circuit in a pixel portion but also a drive circuit called a driver for controlling scanning in the XY directions on the same substrate.
These matrix circuits and drive circuits are composed of TFTs, diodes, and the like, but these elements and wirings are miniaturized and the degree of integration is steadily increasing.
[0007]
As miniaturization and higher integration progress, multilayering becomes necessary. The base of the wiring or element is required to have high flatness. This is because the wiring is disconnected due to a slight unevenness, and the dielectric breakdown and characteristic variation of the element occur.
[0008]
Realization of high flatness is an indispensable element in achieving high reliability and yield, and making products that are price competitive.
[0009]
In a semiconductor integrated circuit using a silicon substrate, an interlayer insulating film is planarized by a technique called CMP (Chemical Mechanical Polish) to achieve the above-mentioned target.
[0010]
[Problems to be solved by the invention]
The problems to be solved by the present invention are shown below.
[0011]
In an active matrix display device using a glass substrate, an alkali-free borosilicate glass or quartz glass is used as an insulating substrate for forming a TFT.
[0012]
These glass substrates have scratches resulting from the molding of the substrate and scratches due to subsequent handling. The quartz substrate also has a cutting pattern called a saw mark at the time of cutting. Polishing these scratches and patterns before shipping.
[0013]
For the primary polishing of the scratches on the glass substrate, a coarse polishing cloth of about 100 μm to 2 mm is used. Examples of the polishing cloth include MH C14A, MHC14B, MH-C15A, MH N15A, and MH N24A manufactured by Rodel Nitta. As the abrasive, a cerium oxide-based material is used. This polishing itself also tends to cause undulations or minute scratches on the surface of the substrate.
[0014]
Secondary polishing of scratches on the glass substrate is performed with a fine polishing cloth. An abrasive having a small particle size is also used. For this reason, the wave | undulation and damage | wound of the surface of a board | substrate can be reduced compared with after primary polishing.
[0015]
However, waviness caused by polishing of the substrate and waviness due to a cutting pattern at the time of cutting like a quartz substrate may be targeted for a large substrate, and are not completely suppressed in terms of productivity and cost.
[0016]
Even when a semiconductor circuit is highly integrated on an insulating substrate such as a glass substrate, planarization of the interlayer insulating film by CMP is considered effective. However, the glass substrate has irregularities due to undulations and scratches, and there is a problem that CMP cannot be applied to the interlayer insulating film as it is.
[0017]
Next, as an example of a glass substrate, the undulation of a 1737 substrate manufactured by Corning will be described.
[0018]
The top view of FIG. 15A shows an arc-shaped undulation 113 confirmed on two 1737 substrates 112 bonded with a gap of several μm. Since the difference between the refractive index 1.52 of the two glass plates arranged opposite to each other and the refractive index 1 of the air existing in the gap is large, it corresponds to the difference in the distance of the gap due to the undulation of the glass surface. Thus, interference fringes of reflected light due to multiple interference can be confirmed concentrically.
[0019]
The undulation on the surface of the glass substrate is expressed in a cycle of 5 mm to 30 mm, and is easily recognized even with the resolution of the human eye.
[0020]
Next, the observation result on the liquid crystal panel when liquid crystal is injected between two 1737 substrates bonded with a gap of several μm will be described. An alignment film for aligning the liquid crystal in an arbitrary direction is used on the opposing surfaces of the two glass substrates.
[0021]
FIG. 15B schematically shows a cross-sectional view of the liquid crystal panel. An alignment film 102 is formed on the first glass substrate 100 and the second glass substrate 101 by a printing method. The liquid crystal 103 is injected after the alignment film is rubbed. The alignment film is SE7792 manufactured by Nissan Chemical Industries, and the liquid crystal is ZLI4792 manufactured by Merck. The liquid crystal has a 90 ° left-handed twist alignment.
[0022]
The liquid crystal panel is placed between two deflecting plates whose deflection axes are shifted from orthogonal to parallel, and one surface is illuminated with a backlight and observed from the other surface. As a result, a concentric pattern can be observed. This is because the thickness of the liquid crystal layer varies depending on the location due to the waviness of the substrate, the retardation (Δn · d) is not the same in the plane, and the light transmittance varies. Here, Δn is an optical anisotropy constant determined by the material of the liquid crystal, and d is the thickness of the liquid crystal layer.
[0023]
Furthermore, even when the liquid crystal panel is directly observed, concentric interference fringes due to multiple interference of reflected light can be confirmed. The reason why such concentric interference fringes are seen will be described in detail.
[0024]
The distance between the first glass substrate and the second glass substrate changes according to the undulation of the surface of the glass substrate. The light 104 reflected at the interface between the alignment film having a refractive index of 1.65 and the liquid crystal having a refractive index of 1.5 provided on the first glass substrate, the liquid crystal having a refractive index of 1.5, and the second glass substrate. And the light 105 reflected at the interface with the alignment film having a refractive index of 1.65. Depending on the distance between the first glass substrate and the second glass substrate, the interfered light may be strengthened or weakened. Due to the undulations on the surface of the glass substrate, the difference in the optical path length of the interfering light is different at each position of the substrate. For this reason, the interference fringes according to the wave | undulation of the 1st glass substrate and the 2nd glass substrate surface appear.
[0025]
FIG. 16 is used to estimate the relationship between the undulation depth and the wavelength of light strengthened by interference. FIG. 16 shows a cross section of the liquid crystal panel. An alignment film 102 is formed on the first glass substrate 106 and the second glass substrate 107. A liquid crystal 103 is provided between the alignment films.
[0026]
The refractive index of the liquid crystal is 1.5, and the undulation depth (ΔD) 112 of the first glass substrate 106 is 70.
It is assumed that the white light is incident on the liquid crystal panel. For simplicity, it is assumed that the second glass substrate 107 has no undulation. In the undulations, the light 108 reflected at the interface between the first substrate and the alignment film interferes with the light 109 reflected at the interface between the second substrate and the alignment film, and the first wavelength of visible light (Λ ₁ ) Strengthen each other. In addition, the light 110 reflected at the interface between the first substrate and the alignment film and the light 111 reflected at the interface between the second substrate and the alignment film interfere with each other in the undulation recess, and the second light of the visible light Wavelength (λ ₂ ) Strengthen each other.
[0027]
The refractive index (n) of the liquid crystal, the undulation depth (ΔD), and the first wavelength (λ ₁ ) And the second wavelength (
λ ₂ ), The difference (Δλ) is obtained, and nΔD = Δλ / 2. That is only 70
Even with a undulation of a depth of nm, the wavelengths strengthened by interference differ by 210 nm. In the undulation convex portion, when purple blue (wavelength: 450 nm) appears strong due to interference, red (wavelength: 660 nm) appears strong due to interference in the undulation concave portion. Furthermore, in practice, the change in interference color is complicated by the waviness of the second glass substrate.
[0028]
The same applies to a liquid crystal display device in which TFTs are formed on a glass substrate having a undulating surface. Concentric unevenness due to the undulation of the surface of the glass substrate is confirmed. This is because even if the wiring, the interlayer insulating film, and the semiconductor film are formed on the glass substrate, interference fringes caused by the difference in the optical path length of the interference light coming from the undulation of the glass surface are still formed.
[0029]
A problem in the case of applying a process of forming a TFT on a glass substrate and polishing an interlayer insulating film by CMP without reducing the undulation of the surface of the glass substrate will be described with reference to FIGS.
[0030]
FIG. 12A to FIG. 12B show one step in forming a TFT over a glass substrate 114 with waviness. FIG. 12A shows a first region of a cross section of the glass substrate. The width | variety of the 1st area | region 116 of a glass substrate is 5-30 mm. For simplicity, only the glass substrate 114 and the first interlayer insulating film 115 are shown. Reflecting the waviness of the surface of the glass substrate, there is waviness on the surface of the first interlayer insulating film.
[0031]
FIG. 12B shows a second region and a third region in the cross section of the glass substrate. The width of the second region 118 and the third region 119 of the glass substrate are both 5 μm to 100 μm. The second region is in the undulating convex portion, and the third region is in the undulating concave portion. A base film 120, a semiconductor film 117, a gate insulating film 121, a gate electrode 122, and a first interlayer insulating film 115 provided over a glass substrate are illustrated.
[0032]
As shown in FIG. 12A, even if there is a undulation on the surface of the glass substrate in the range of 5 mm to 30 mm, in a narrow region where two TFTs are provided as shown in FIG. The surface can be considered flat.
[0033]
Next, as shown in the cross-sectional views of FIGS. 13A to 13B, the first interlayer insulating film 115 is polished by CMP in order to flatten a surface on which a pixel electrode to be described later is formed. FIG. 13A shows a first region 116 in the cross section of the glass substrate. For simplicity, only the first interlayer insulating film 115 and the glass substrate 114 are shown. Since polishing is performed by CMP, the waviness on the surface of the first interlayer insulating film disappears.
[0034]
FIG. 13B shows a second region 118 and a third region 119 in the cross section of the glass substrate. The film thickness of the first interlayer insulating film 115 in the second region 118 is equal to the film thickness of the first interlayer insulating film 115 in the third region 119 by the depth of the undulations on the surface of the glass substrate. It is getting thinner.
[0035]
Next, as shown in the cross-sectional views of FIGS. 14A to 14B, a source electrode 123, a drain electrode 124, a second interlayer insulating film 125, and a pixel electrode 126 connected to the drain electrode are provided. FIG. 14A shows a first region 116 in the cross section of the glass substrate. For simplicity, only the glass substrate 114, the first interlayer insulating film 115, and the second interlayer insulating film 125 are shown. By polishing the first interlayer insulating film by CMP, the upper surface of the second interlayer insulating film forming the pixel electrode 126 is planarized.
[0036]
However, when the first interlayer insulating film is polished by CMP, a difference in film thickness of the first interlayer insulating film due to the undulation depth of the glass surface occurs after polishing. Even if the uniformity of the film thickness at the time of forming the first interlayer insulating film is ensured, if the undulation depth of the glass surface becomes rough, the effect is that the film thickness difference in the substrate of the first interlayer insulating film is increased. And appear. This difference causes a variation in parasitic capacitance within the substrate surface.
[0037]
As described above, when the TFT is formed without reducing the waviness of the glass substrate and the interlayer insulating film thereon is polished by CMP, the thickness of the interlayer insulating film varies. This is not only electrically connected to in-plane variation of parasitic capacitance, but also when the refractive index of this interlayer insulating film is different from the refractive index of the underlying film, it causes interference patterns and variations in transmitted light characteristics. Also become.
[0038]
So far, we have described the details of the problems caused by undulations, but there are differences in the height and width of scratches, but there are variations in display, parasitic capacitance and other parting of wiring, deviations in characteristics due to film thickness fluctuations, There is a problem such as an influence on the electrical characteristics due to the bias.
[0039]
[Means for Solving the Problems]
In order to solve the above problems, the following measures were taken.
[0040]
In order to suppress the influence caused by the undulation or scratch on the surface of the glass substrate, an insulating film having a refractive index close to that of the glass substrate may be formed and the insulating film may be polished without polishing the glass substrate itself.
[0041]
In the present invention, an insulating film such as a silicon oxide film or a silicon nitride film is formed on a glass substrate with a thickness of 0.05 μm to 5 μm, and this insulating film is planarized by CMP so that the surface of the glass substrate can be seen. It is characterized by eliminating electrical and optical problems caused by swells and scratches.
[0042]
Further, according to the present invention, an insulating film such as a silicon oxide film or a silicon nitride film is formed on a glass substrate with a thickness of 0.05 μm to 5 μm, and the insulating film is planarized by CMP, whereby the surface of the glass substrate is formed. Eliminate the swells and scratches seen in Thereafter, after forming a light shielding film of an arbitrary shape, an insulating film is further formed with a thickness of 0.05 μm to 5 μm, and this insulating film is flattened by CMP to flatten a step due to the film thickness of the light shielding film. . It is characterized in that TFTs with high yield can be manufactured by producing elements on the planarized laminated films to suppress variations in process and electrical characteristics.
[0043]
As an example, an insulating film formed on a glass substrate is silane (SiH) which is a reactive gas. _Four ) And dinitrogen monoxide (N ₂ A reactive gas such as O) is reacted in plasma to form a silicon oxynitride (SiON) film. Since it is formed by reacting gas, impurities are hardly mixed into the formed film.
[0044]
As an example of a method for forming an insulating film on a glass substrate, liquid TEOS (Tetra Ethoxy Silane) is vaporized and reacted with oxygen to form silicon oxide (SiO 2). ₂ ) A film is formed. Since it is formed by reacting gas, impurities are hardly mixed into the formed film.
[0045]
According to the present invention, when polishing the base film of the TFT formed on the glass substrate by CMP, if the polishing condition of the base film is established, the glass substrate on which the TFT is formed is changed from borosilicate glass to quartz. Can use a similar process.
[0046]
In addition, when polishing the TFT interlayer insulating film formed on the glass substrate, in order to suppress the change in the film thickness of the interlayer insulating film due to the undulation of the surface of the glass substrate, the insulating film is formed in contact with the glass substrate. Then, the insulating film may be polished. Then, a TFT may be formed on the insulating film. Of course, it is desirable to use an insulating film having the same refractive index as that of the glass substrate in order to suppress interference fringes caused by the undulation of the glass substrate.
[0047]
Of course, when polishing the insulating film formed on the glass substrate, it is preferable to establish the polishing conditions so that the undulation depth on the surface of the glass substrate is smaller than the undulation depth on the surface of the glass substrate.
[0048]
Further, when the substrate is warped, the convex portion of the warp is easily polished, and the concave portion of the warp is difficult to be polished.
[0049]
For this reason, it is necessary to optimize and polish the warpage of the glass substrate under the CMP conditions. As parameters for this optimization, the pressure applied to the substrate and the characteristics of the polishing cloth are effective. In addition, there are the presence / absence of adsorption of the substrate, the rotation speed of a polishing head and a rotating plate described later, and the like.
[0050]
Further, the warpage of the substrate can be corrected and the warpage can be reduced by using the warping direction and the stress property of the insulating film. In this case, the film forming surface of the substrate and the material of the insulating film are considered.
[0051]
This will be described with reference to FIG. FIG. 17 is a cross-sectional view showing warpage before and after providing an insulating film on a substrate. FIG. 17A shows a substrate having warpage, and FIG. 17B shows the warpage of the substrate after an insulating film is provided over the substrate shown in FIG. FIG. 17C illustrates a substrate having warpage, and FIG. 17D illustrates the warpage of the substrate after an insulating film is provided over the substrate illustrated in FIG.
[0052]
There is a substrate 131 having a single convex warp in the substrate of FIG. Then, as illustrated in FIG. 17B, an insulating film 132 having tensile stress is formed over the substrate 133 having a convex warp with a single cross section. The surface of the substrate is convex with respect to the insulating film, and the insulating film is formed on the surface of the convex substrate. Then, by appropriately adjusting the tensile stress of the insulating film, a force acts in the direction of correcting the warpage of the substrate, and the warpage of the substrate is reduced. As a result, the polished surface becomes flat when polished by CMP.
[0053]
There is a substrate 134 having a single concave warp in the substrate of FIG. Then, as illustrated in FIG. 17D, an insulating film 136 having a tensile stress is formed over the substrate 135 having a concave warp with a single cross section. The surface of the substrate on which the insulating film is formed is concave with respect to the insulating film, and the insulating film is formed on the surface of the concave substrate. Then, by appropriately adjusting the compressive stress of the insulating film, a force acts in the direction of correcting the warpage of the substrate, and the warpage of the substrate is reduced. As a result, the polished surface becomes flat when polished by CMP.
[0054]
The present invention based on the above description is shown below.
[0055]
Book The present invention is a method for manufacturing a substrate, which includes a first step of forming an insulating film over an insulating substrate and a second step of polishing the insulating film by CMP.
[0056]
Also, The present invention Description of [0055] The method for manufacturing a substrate is characterized in that the substrate having insulating properties is borosilicate glass.
[0057]
Also, The present invention Description of [0056] A method for manufacturing a substrate, wherein the insulating film is a silicon oxide film.
[0058]
[0055] ~ [0057] In the present invention described in 1), the insulating substrate includes a glass substrate. If the insulating film is polished on the glass substrate, impurities contained in the glass substrate can be prevented from being eluted by polishing and contaminating the CMP polishing apparatus. The present invention for polishing an insulating film on a glass substrate is effective when the substrate contains impurities such as boron and aluminum.
[0059]
If the polishing conditions for the insulating film provided on the glass substrate are established, the same polishing conditions can be applied regardless of whether the glass substrate is quartz or borosilicate glass.
[0060]
Also, [0057] If the silicon oxide film, which is a film of the same material as that of the glass substrate, that is, a film having a refractive index close to that of the glass substrate is formed as an insulating film as in the present invention described in the above, the interface between the insulating film and the glass substrate is used. Surface reflection, and interference fringes due to light reflected at the interface between the insulating film and the glass substrate can be prevented. The difference in refractive index between the glass substrate and the insulating film is desirably 0.05 or less.
[0061]
Also, The present invention includes a first step of forming an insulating film on an insulating substrate, and a second step of polishing the insulating film by CMP, and undulating the surface of the substrate in the first step. The insulating film after the polishing in the second step has a relatively thick film thickness on the wavy recess portion and a relatively thick film thickness on the waviness projection portion of the substrate. Is a thin substrate manufacturing method.
[0062]
Also, The present invention includes a first step of forming an insulating film on an insulating substrate and a second step of polishing the insulating film by CMP, and the surface of the substrate in the first step is 1 mm or more. The difference in height between the recess and the protrusion adjacent to each other at a distance of 30 mm or less is defined as a first height, and the surface of the insulating film after the polishing in the second step is adjacent at a distance of 1 mm to 30 mm. The difference in height between the recessed portion and the protruding portion is the second height, and the average of the second height is smaller than the average of the first height on the surface of the substrate. This is a feature of a method for manufacturing a substrate.
[0063]
Also, The present invention [0061] Or Description of [0062] Either First In this case, the substrate manufacturing method is characterized in that the insulating substrate is borosilicate glass.
[0064]
Also, The present invention Description of [0063] Wherein the insulating film is a silicon oxide film.
[0065]
[0061] Or Description of [0062] As described above, when an insulating film is formed on a substrate and polished, the surface waviness of the insulating film after polishing is desirably smaller than the waviness of the surface of the glass substrate. This reduces interference fringes in the liquid crystal display device and variations in TFT characteristics. Further, since the object to be polished is an insulating film formed by reacting reactive gas in plasma, impurities are hardly contained. Therefore, impurities contained in the insulating film by polishing are not eluted and the polishing apparatus is not contaminated.
[0066]
Also, The present invention [0061] Thru Description of [0064] Either First In the polishing in the second step, the substrate is sandwiched between a polishing cloth on a rotating surface plate and a polishing head above the polishing cloth, and the pressure applied to the substrate is 200 gf / cm. ² 400 gf / cm ² A substrate manufacturing method characterized by the following.
[0067]
Description of [0066] As described above, when an appropriate pressure is selected, the warp of the substrate is eliminated and the flatness of the surface of the substrate to be polished is improved. [0066] The details of the present invention will be described in detail in Examples 1 and 3.
[0068]
Also, The present invention includes an insulating substrate and an insulating film provided on the substrate, the surface of the insulating substrate has a undulation, and the insulating film is a depression of the undulation of the substrate. The substrate is characterized in that the film thickness is relatively thick at the portion, and the film thickness is relatively thin at the portion of the swell projection of the substrate.
[0069]
Also, The present invention includes a substrate having an insulating property and an insulating film provided on the substrate, and the heights of the recesses and the protrusions adjacent to each other at a distance of 1 mm to 30 mm on the surface of the substrate. The difference in height is the first height, the difference in height between the recessed portion and the protrusion portion adjacent to each other at a distance of 1 mm to 30 mm on the surface of the insulating film is the second height, and on the surface of the substrate, The average of the second height is smaller than the average of the first height.
[0070]
[0068] And [0069] As described in the present invention, it is desirable to reduce the undulation of the surface of the insulating film relative to the undulation of the surface of the substrate by providing an insulating film on the substrate and polishing the insulating film. of course, [0068] And [0069] If the structure of the present invention described in the above is used, it is possible to prevent impurities in the substrate from being eluted by polishing and contaminating the polishing apparatus.
[0071]
Also, The present invention [0068] Or Description of [0069] The substrate having the insulating property is borosilicate glass.
[0072]
Also, The present invention Description of [0071] The substrate is characterized in that the insulating film is a silicon oxide film.
[0073]
Also, The present invention includes a first step of forming a first insulating film on a substrate, a second step of polishing the first insulating film by CMP, and a first step of forming a transistor on the first insulating film. A method for manufacturing a display device including three steps.
[0074]
Also, The present invention Description of [0073] The method for manufacturing a display device, wherein the insulating substrate is borosilicate glass
[0075]
Also, The present invention Description of [0074] A method for manufacturing a display device, wherein the first insulating film is a silicon oxide film.
[0076]
Also, The present invention [0068] Thru Description of [0075] Either First The transistor includes a semiconductor film, a second insulating film, a first electrode overlapping the semiconductor film via the second insulating film, a second electrode and a third electrode connected to the semiconductor film And a third insulating film on the first electrode or above the first electrode is polished by CMP in a third step of forming the transistor.
[0077]
Description of [0073] This is characterized in that when a transistor, for example, a TFT is formed on a substrate, a base film (insulating film) of the TFT provided in contact with the substrate is planarized by CMP. If conditions for polishing the base film by CMP are established, it is not necessary to set conditions for polishing again by CMP even if the glass substrate to be used is changed. Further, when a glass substrate is used as the substrate as in claim 15, if a silicon oxide film having a refractive index close to that of the glass substrate is formed as the first insulating film, the first insulating film and the glass substrate It is possible to prevent the occurrence of interference fringes due to the light reflected at the interface and the light reflected at the interface between the first insulating film and another material film. The difference in refractive index between the glass substrate and the first insulating film is desirably 0.05 or less.
[0078]
In addition, the present invention The transistor can be a TFT. When the transistor is a TFT, the TFT may be a top gate type or a bottom gate type. The second insulating film functions as a gate insulating film. The first electrode functions as a gate electrode. The second electrode and the third electrode function as a source electrode or a drain electrode. Then, the interlayer insulating film (third insulating film) in contact with the gate electrode and over the gate electrode is polished by CMP. Alternatively, the interlayer insulating film (third insulating film) in contact with the insulating film on the gate electrode and above the gate electrode is polished by CMP.
[0079]
Description of [0073] If the swell of the glass substrate is planarized by the first insulating film by the method of Description of [0078] Thus, when a transistor, for example, a TFT is formed on the first insulating film, and the interlayer insulating film (third insulating film) of the TFT is polished by CMP, the interlayer insulating film generated from the undulation of the glass substrate A change in film thickness can be prevented.
[0080]
Also, The present invention includes a first step of forming a first insulating film on a substrate, a second step of polishing the first insulating film by CMP, and a first step of forming a transistor on the first insulating film. 3 steps, the surface of the substrate has undulations, and the insulating film after the polishing in the second step is relatively thick on the dent portion of the undulations of the substrate, In the method for manufacturing a display device, the film thickness is relatively thin on a portion of the swell protrusion of the substrate.
[0081]
Also, The present invention includes a first step of forming a first insulating film on a substrate, a second step of polishing the first insulating film by CMP, and a first step of forming a transistor on the first insulating film. 3 steps, the difference in height between the recessed portion and the projection portion adjacent to each other at a distance of 1 mm to 30 mm on the substrate surface in the first step is defined as a first height, and the second step The difference in height between the recessed portion and the protruding portion adjacent to each other at a distance of 1 mm to 30 mm on the surface of the insulating film after the polishing is defined as a second height, and the second height in the region where the transistor is formed. In the method for manufacturing a display device, the average of the heights is smaller than the average of the first heights.
[0082]
Also, The present invention [0080] Or Description of [0081] A method for manufacturing a display device, wherein the substrate is borosilicate glass.
[0083]
Also, The present invention [0082] Description The method for manufacturing a display device, wherein the first insulating film is a silicon oxide film.
[0084]
Also, The present invention [0080] Thru [0083] Description Either First The transistor includes a semiconductor film, a second insulating film, a first electrode overlapping the semiconductor film via the second insulating film, a second electrode and a third electrode connected to the semiconductor film And a third insulating film on the first electrode or above the first electrode is polished by CMP in a third step of forming the transistor.
[0085]
Also, The present invention [0080] Thru Description of [0084] In any one of the above, in the polishing in the second step, the substrate is sandwiched between a polishing cloth on a rotating surface plate and a polishing head above the polishing cloth, and the pressure applied to the substrate is 200 gf / cm ² 400 gf / cm ² The method for manufacturing a display device is characterized by the following.
[0086]
Also, The present invention includes a substrate, a first insulating film provided on the substrate, and a transistor on the first insulating film, the surface of the substrate has a wave, and the first insulating film The film is a display device characterized in that the film thickness is relatively thick in the dent portion of the swell and the film thickness is relatively thin in the swell projection portion.
[0087]
Also, The present invention includes a substrate, a first insulating film provided on the substrate, and a transistor on the first insulating film, and the depressions adjacent to each other at a distance of 1 mm to 30 mm on the surface of the substrate. The difference in height between the portion and the protrusion portion is defined as a first height, and the difference in height between the recess portion adjacent to the insulating film surface at a distance of 1 mm to 30 mm and the protrusion portion is defined as a second height. In the region where the transistor is formed, the average of the second height is smaller than the average of the first height.
[0088]
Also, The present invention [0086] Or Description of [0087] In the above, the substrate is a borosilicate glass.
[0089]
Also, The present invention Description of [0088] The display device is characterized in that the first insulating film is a silicon oxide film.
[0090]
Also, The present invention [0086] Thru Description of [0089] Either First The transistor includes a semiconductor film, a second insulating film, a first electrode overlapping with the semiconductor film via the second insulating film, a second electrode and a third electrode connected to the semiconductor film. And a third insulating film made of an inorganic material having a relatively small thickness on the first electrode or above the first electrode.
[0091]
Unevenness due to the thickness of the first electrode occurs on the surface of the third insulating film made of an inorganic material. Therefore, the surface of the third insulating film is planarized by polishing the third insulating film and planarizing the surface of the third insulating film.
[0092]
[0086] And Description of [0087] If the swell of the glass substrate is planarized by the first insulating film by the method of Description of [0090] Thus, when a transistor, for example, a TFT is formed on the first insulating film, and the interlayer insulating film (third insulating film) of the TFT is polished by CMP, the interlayer insulating film generated from the undulation of the glass substrate A change in film thickness can be prevented. In particular, the undulation of the surface of the glass substrate has a depth close to 0.5 μm, and due to the undulation of the surface of the glass substrate, the difference in film thickness of the interlayer insulating film after polishing by CMP is so large that it cannot be ignored in the substrate. In this case, the present invention is effective.
[0093]
Also, The present invention includes a light-shielding film selectively provided over a substrate, an insulating film covering the film having a pre-light-shielding property, and a semiconductor film provided on the insulating film, Is a display device characterized in that the film thickness is relatively thin above the light-shielding film.
[0094]
Also, The present invention Description of [0093] In the above, the substrate is a borosilicate glass.
[0095]
Also, The present invention Description of [0094] The display device is characterized in that the insulating film is a silicon oxide film.
[0096]
Also, The present invention includes a first step of selectively providing a light-shielding film on a substrate, a second step of providing a first insulating film so as to cover the light-shielding film, and the first insulating film. A method for manufacturing a display device, comprising: a third step of polishing the substrate by CMP; and a fourth step of providing a semiconductor film over the first insulating film.
[0097]
Also, The present invention Description of [0096] A method for manufacturing a display device, wherein the substrate is borosilicate glass.
[0098]
Also, The present invention Description of [0097] The method for manufacturing a display device, wherein the first insulating film is a silicon oxide film.
[0099]
Also, The present invention [0096] Thru Description of [0098] Either First In the method for manufacturing a display device, the first insulating film after the polishing in the third step is relatively thin on the light-shielding film.
[0100]
Also, The present invention [0096] Thru [0099] Description Either First And a display device manufacturing method comprising: a fifth step of forming a second insulating film over the semiconductor film; and a sixth step of polishing the second insulating film by CMP. It is.
[0101]
Also, The present invention [0096] Thru [0099] Description In any one of the above, in the polishing of the third step, the substrate is sandwiched between a polishing cloth on a rotating surface plate and a polishing head above the polishing cloth, and the pressure applied to the substrate is 200 gf / cm ² 400 gf / cm ² The method for manufacturing a display device is characterized by the following.
[0102]
[0093] ~ [0101] An example of the configuration of the present invention described in 1 will be described in detail in Example 3. Unevenness is caused by the film thickness of the light-shielding film provided on the substrate, but the first insulating film provided on the light-shielding film is polished by CMP to flatten the surface. The surface on which the semiconductor film is formed is flattened. The light-shielding film indicates a scanning line in Example 3, and the first insulating film indicates the first insulating film 603a.
[0103]
Also, According to the present invention, a first step of forming a first insulating film on a substrate having an insulating property, a second step of polishing the first insulating film by CMP, and a film having a light shielding property are selectively used. A third step of providing, a fourth step of forming a second insulating film so as to cover the light-shielding film, a fifth step of CMPing the second insulating film, and the second insulating film And a sixth step of providing a semiconductor film thereon.
[0104]
Also, The present invention is a method for manufacturing a display device, which includes a step of forming an insulating film and a step of CMPing the insulating film before forming a semiconductor layer in the step of manufacturing a TFT over an insulating substrate.
[0105]
Also, In the present invention, the substrate to be polished by CMP is a square substrate. This is because a rectangular substrate can be integrated with a higher density when a TFT of a display portion of a display device and a driver circuit portion are formed on the substrate than a circular substrate.
[0106]
The present invention can also be applied to a method of eliminating interference fringes due to waviness on the surface of a glass substrate in a simple matrix liquid crystal display device.
[0107]
Examples of the glass substrate used in the liquid crystal display device include soda lime glass, borosilicate glass, aluminosilicate glass, and quartz glass. The present invention can be applied not only to these glass substrates but also to other glass substrates.
[0108]
The present invention is not limited to the same configuration as described above. For example, [0073] , [0080] , Description of [0081] In FIG. 2, there is a substrate and an insulating film polished by CMP on the substrate. Further, an insulating film made of silicon oxynitride or silicon oxide is formed as a passivation film on the insulating film, and a TFT is formed on the passivation film. It is also possible to do. This is because the effect of the present invention is sufficient if the insulating film below the surface on which the TFT is to be formed is an object to be polished.
[0109]
Also, the present invention can be used in combination.
[0110]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the invention will be described with reference to FIGS. The configuration of the pixel TFT and the storage capacitor in the pixel portion and the TFT of the driver circuit provided around the display area will be described in detail. However, in order to simplify the description, a CMOS circuit which is a basic configuration circuit is illustrated in the drive circuit portion, and an n-channel TFT is illustrated in a cross section along a certain path in the pixel TFT of the pixel portion. To do. Further, referring to FIG. 11, a polishing process by CMP will be described.
[0111]
First, an insulating film such as a silicon oxide film or a silicon oxynitride film is formed on a substrate 200 made of glass such as barium borosilicate glass represented by Corning # 7059 glass or # 1737 glass or aluminoborosilicate glass. A first insulating film 201 is formed. The first insulating film functions as a base film. For example, SiH by plasma CVD method _Four , NH _Three , N ₂ A silicon oxynitride film 201a made of O is formed to 10 to 200 nm (preferably 50 to 100 nm) and similarly SiH _Four , N ₂ A silicon oxynitride film 201b formed from O is stacked to a thickness of 0.5 to 5 μm (preferably 1 to 5 μm). In this embodiment, the silicon oxynitride film 201b is formed with a thickness of 2.8 μm. Although the first insulating film 201 is shown as a two-layer structure, it may be formed as a single-layer film of the insulating film or a structure in which two or more layers are stacked. The first insulating film to be polished, the substrate, and the difference in refractive index of the film between the substrate and the first insulating film are preferably within a range of 0.05 or less (FIG. 1A). FIG. 1A shows a first region of a cross section of the substrate 200. The width of the first region is 5 to 30 mm.
[0112]
Next, the first insulating film 201b is polished by CMP using SPP600AT manufactured by Okamoto Machine Tool Co., Ltd. FIG. 11 is a perspective view of an apparatus for polishing by CMP. A polishing cloth 701 is pasted on a circular rotating surface plate 700 having a diameter of 80 cm. As the polishing cloth, an IC1000 single layer made by Rodel Nitta Co. is used. The material of the polishing cloth is urethane foam.
[0113]
The slurry 704 is supplied to the center of the rotating surface plate through the pipe 703, and the slurry spreads over the entire surface of the polishing cloth on the rotating surface plate by the rotation and swinging of the rotating surface plate. A slurry is a colloidal solution in which particles, liquid and chemicals are mixed. As the slurry, ILD1300 manufactured by Rodel Nitta is used. The ILD 1300 is a colloidal solution in which aqueous colloidal silica is dispersed in an ammonia-based solution. The rotating surface plate rotates 708 about the center of the rotating surface plate as a rotation axis. The rotation speed of the rotating platen is 30 rpm. Further, the rotating surface plate rotates 707 in three reciprocations in the horizontal direction while rotating.
[0114]
A circular metal polishing head 705 having a diameter of 30 cm sucks the glass substrate 706 by vacuum. A wafer suction pad 702 is provided between the glass substrate and the polishing head. As the wafer suction pad, NF200 manufactured by Rodel Nitta is used. There are holes in the wafer suction pad and the polishing head, and the glass substrate is sucked into the polishing head through the holes. The center of the polishing head is located between the center of the rotating surface plate and the circumference of the rotating surface plate. The polishing head rotates at 30 rpm with the center of the polishing head as the rotation axis.
[0115]
300 gf / cm ² Is applied to the substrate, and the substrate is pressed against the polishing cloth on the rotating surface plate. By changing the pressure of the polishing head, the polishing rate of the film to be polished can be adjusted.
[0116]
The polishing time is 1 to 2 minutes. Thus, the undulation depth of the surface of the first insulating film 201b can be reduced to 20 nm.
[0117]
In the present embodiment, the NF 200, which is a wafer suction pad provided in the polishing head, uses an elastic material. For this reason, the waviness on the back surface of the glass substrate is absorbed by the wafer suction pad. Also, the pressure on the substrate is 200 gf / cm ² By applying strongly as described above, the warp of the glass substrate is eliminated when polishing. If the glass substrate is warped during polishing, the convex portion of the warp is easily polished, so that uniform polishing is difficult when polishing the surface of the first insulating film on the glass substrate. become. Moreover, the pressure applied to the substrate is 400 gf / cm so as not to break the glass substrate by applying a strong force. ² The following is desirable. Furthermore, since the polishing cloth provided on the rotating surface plate is hard, it is possible to prevent waviness on the surface to be polished due to distortion of the polishing cloth. The IC1000 single layer, which is a polishing cloth, has a structure in which a cushioning material is not provided on the back surface and distortion is unlikely to occur. For this reason, when the 1st insulating film 201b provided on the glass substrate is grind | polished, the surface of the 1st insulating film after grinding | polishing is flat, and a wave | undulation is not observed on the surface of a 1st insulating film.
[0118]
Needless to say, since the first insulating film 201b is formed over the substrate 200 made of glass such as barium borosilicate glass or aluminoborosilicate glass, and the first insulating film is polished, the insulating film contains impurities. As long as it is not, the polishing rate is not likely to vary in the substrate, and the surface roughness can be suppressed to a small range.
[0119]
Thereby, the waviness on the surface of the first insulating film 201b disappears in the substrate. (FIG. 1 (B)). FIG. 1B shows a first region of the cross section of the substrate 200 after polishing by CMP. The first area includes a second area and a third area. The width of the second region and the third region is 5 to 100 μm. A driver circuit portion is provided in the second region 202, and a pixel portion is provided in the third region 203.
[0120]
The structure of the TFTs in the pixel portion and the driver circuit portion will be described with reference to FIG. FIG. 2 shows a cross section of the TFT in the driver circuit portion and a cross section of the TFT in the pixel portion. Due to the undulation of the substrate 200, the thickness of the first insulating film 201b after being polished by CMP differs between the driver circuit portion and the pixel portion.
[0121]
The semiconductor film is formed using a crystalline semiconductor film formed by using a laser crystallization method or a known thermal crystallization method from a semiconductor film having an amorphous structure. The semiconductor film is formed with a thickness of 25 to 80 nm (preferably 30 to 60 nm). There is no limitation on the material of the crystalline semiconductor film, but the crystalline semiconductor film is preferably formed of silicon or a silicon germanium (SiGe) alloy. Among the semiconductor films, the semiconductor films provided in the driver circuit portion are referred to as island-shaped semiconductor films 205 to 206, and the semiconductor films provided in the pixel portion are referred to as first semiconductor film 207 and second semiconductor film 208.
[0122]
In order to fabricate a crystalline semiconductor film by laser crystallization, a pulse oscillation type or continuous emission type excimer laser, YAG laser, YVO _Four Use a laser. When these lasers are used, it is preferable to use a method in which laser light emitted from a laser oscillator is linearly collected by an optical system and irradiated onto a semiconductor film. Crystallization conditions are appropriately selected by the practitioner. When an excimer laser is used, the pulse oscillation frequency is 30 Hz and the laser energy density is 100 to 400 mJ / cm. ² (Typically 200-300mJ / cm ² ). When a YAG laser is used, the second harmonic is used and the pulse oscillation frequency is 1 to 10 kHz, and the laser energy density is 300 to 600 mJ / cm. ² (Typically 350-500mJ / cm ² ) Then, laser light condensed linearly with a width of 100 to 1000 μm, for example, 400 μm, is irradiated over the entire surface of the substrate, and the superposition ratio (overlap ratio) of the linear laser light at this time is 80 to 98%.
[0123]
The second insulating film 209 is formed of an insulating film containing silicon with a thickness of 40 to 150 nm by using a plasma CVD method or a sputtering method. In this embodiment, a silicon oxynitride film with a thickness of 115 nm is formed. Of course, the gate insulating film is not limited to such a silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a laminated structure. For example, when a silicon oxide film is used, TEOS (Tetraethyl Ortho Silicate) and O ₂ The reaction pressure is 40 Pa, the substrate temperature is 300 to 400 ° C., and the high frequency (13.56 MHz) power density is 0.5 to 0.8 W / cm. ² And can be formed by discharging. The silicon oxide film thus manufactured can obtain good characteristics as a gate insulating film by thermal annealing at 400 to 500 ° C. thereafter.
[0124]
On the second insulating film 209, first conductive films 210 and 228 and second conductive films 211 and 225 are formed as first electrodes. In the present embodiment, the first conductive films 210 and 228 are formed of TaN with a thickness of 50 to 100 nm, and the second conductive films 211 and 225 are formed of W with a thickness of 100 to 300 nm. The first electrode functions as a gate electrode.
[0125]
In the present embodiment, the first conductive films 210 and 228 are TaN, and the second conductive films 211 and 225 are W. However, any element selected from Ta, W, Ti, Mo, Al, and Cu is used. Alternatively, an alloy material or a compound material containing the above element as a main component may be used. Alternatively, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus may be used. As a combination other than the present embodiment, the first conductive film is formed of tantalum (Ta), the second conductive film is formed of W, the first conductive film is formed of tantalum nitride (TaN), There are combinations in which the second conductive film is made of Al, the first conductive film is made of tantalum nitride (TaN), and the second conductive film is made of Cu.
[0126]
The third insulating film 212 is formed using a silicon oxynitride film with a thickness of 100 to 200 nm. The third insulating film has a two-layer structure of an inorganic insulating film, the lower third insulating film is a silicon oxynitride film with a thickness of 100 to 200 nm, and the upper third insulating film has a thickness of 1 to 3 μm. It may be provided. Then, the upper third insulating film can be polished by CMP to planarize unevenness caused by the first conductive film 210 and the second conductive film 211.
[0127]
As the fourth insulating film 213 made of an organic insulating material, an acrylic resin film or a polyimide resin film is formed with a thickness of 1.8 μm. The third insulating film and the fourth insulating film function as an interlayer insulating film. Next, an etching process for forming a contact hole is performed.
[0128]
A Ti film is formed to a thickness of 50 to 150 nm, a contact is formed with the semiconductor film that forms the source or drain region of the island-shaped semiconductor film, and aluminum (Al) is stacked on the Ti film to a thickness of 300 to 400 nm. Then, a Ti film or a titanium nitride (TiN) film is formed to a thickness of 100 to 200 nm to form a three-layer structure. Then, source wirings 214 to 216 that form contacts with the source region of the island-shaped semiconductor film and drain wirings 217 to 219 that form contacts with the drain region are formed in the driver circuit portion.
[0129]
In the pixel portion, a second electrode 220, a gate wiring 221, a third electrode 222, and a second capacitor electrode 223 are formed. The second electrode 220 is electrically connected to the source wiring 224 and the first semiconductor film 207. The third electrode functions as a drain electrode. Although not shown, the gate wiring 221 is electrically connected to the gate electrode 225 through a contact hole. The third electrode 222 is electrically connected to the drain region of the first semiconductor film 207. The second capacitor electrode 223 is electrically connected to the second semiconductor film 208.
[0130]
Thereafter, a transparent conductive film is formed over the entire surface, and a pixel electrode 227 is formed by patterning processing and etching processing using a photomask. The pixel electrode 227 is formed over the fourth insulating film 213, and a portion overlapping the third electrode 222 and the second capacitor electrode 223 of the pixel TFT is provided to form a connection structure.
[0131]
The material of the transparent conductive film is indium oxide (In ₂ O _Three ) Or indium tin oxide alloy (In ₂ O _Three -SnO ₂ ; ITO) or the like can be formed using a sputtering method, a vacuum deposition method, or the like. Etching treatment of such a material is performed with a hydrochloric acid based solution. However, in particular, etching of ITO is likely to generate a residue, so in order to improve etching processability, an indium oxide-zinc oxide alloy (In ₂ O _Three —ZnO) may also be used. Since the indium oxide-zinc oxide alloy has excellent surface smoothness and thermal stability with respect to ITO, the corrosion reaction with Al in contact with the end face of the third electrode 222 can be prevented. Similarly, zinc oxide (ZnO) is also a suitable material, and zinc oxide (ZnO: Ga) to which gallium (Ga) is added to further increase the transmittance and conductivity of visible light can be used.
[0132]
In this manner, an active matrix substrate corresponding to a transmissive liquid crystal display device can be completed.
[0133]
As described above, the driver circuit portion including the n-channel TFT 230, the p-channel TFT 231, and the n-channel TFT 232, and the pixel portion including the pixel TFT 229 and the storage capacitor 228 can be formed over the same substrate. In this specification, such a substrate is referred to as an active matrix substrate for convenience.
[0134]
The n-channel TFT 230 in the driver circuit portion includes a channel formation region 240, a third impurity region 241 (GOLD region) overlapping with the conductive layer 210 forming the gate electrode, and a fourth impurity region 242 (outside of the gate electrode). LDD region) and a first impurity region 243 functioning as a source region or a drain region. The p-channel TFT 231 includes a channel formation region 237, a fifth impurity region 238 overlapping with the conductive layer 210 forming a gate electrode, and a sixth impurity region 239 functioning as a source region or a drain region. The n-channel TFT 232 includes a channel formation region 233, a third impurity region 234 (GOLD region) overlapping with the conductive layer 210 forming the gate electrode, and a fourth impurity region 235 (LDD region) formed outside the gate electrode. And a first impurity region 236 functioning as a source region or a drain region.
[0135]
The pixel TFT 229 in the pixel portion includes a channel formation region 244, a third impurity region 245 (GOLD region) overlapping with the conductive layer 228 forming the gate electrode, and a fourth impurity region 246 (LDD region) formed outside the gate electrode. ) And a first impurity region 247 functioning as a source region or a drain region. In addition, an impurity element imparting p-type conductivity is added to the second semiconductor film 208 functioning as one electrode of the storage capacitor 228. A storage capacitor is formed by the first capacitor electrode 226 and the insulating layer therebetween (the same layer as the gate insulating film).
[0136]
The cross section taken along the chain line AA ′ and the chain line BB ′ in FIG. 2 corresponds to the cross section taken along the chain line AA ′ and the chain line BB ′ in FIG.
[0137]
The active matrix substrate of this embodiment can be used for a transmissive liquid crystal display device. When a conductive film having light reflectivity is used as the pixel electrode instead of the transparent conductive film, the active matrix substrate of this embodiment can be used for a reflective liquid crystal display device. As the conductive film having light reflectivity, it is preferable to use aluminum, an aluminum alloy, or silver because the reflectance can be increased.
[0138]
In the active matrix substrate of this embodiment, the surface undulation of the first insulating film 201b caused by the undulation of the glass substrate is planarized by polishing by CMP. Since the first insulating film is a silicon oxynitride film and has a refractive index close to that of the glass substrate, the occurrence of interference fringes due to the difference in film thickness of the first insulating film after polishing can be suppressed. it can. In this embodiment, the refractive index of the silicon oxynitride film that is the first insulating film is 1.50, and the refractive index of # 1737 that is the substrate is 1.52. 0.02 And small. Thereby, surface reflection at the interface between the silicon oxynitride film and the glass substrate can be suppressed, and interference fringes resulting from the undulation of the surface of the glass substrate can be suppressed.
[0139]
【Example】
[Example 1]
Example 1 shows another manufacturing method of a crystalline semiconductor film for forming a TFT semiconductor film of the active matrix substrate described in the embodiment. In this embodiment, a crystallization method using a catalytic element disclosed in Japanese Patent Application Laid-Open No. 7-130652 can also be applied. An example in that case will be described below.
[0140]
In the same manner as in the embodiment, a first insulating film is formed with a thickness of 2.8 μm on a glass substrate, and the first insulating film is polished by CMP. The first insulating film is a silicon oxynitride film. Next, an amorphous semiconductor film is formed with a thickness of 25 to 80 nm. For example, an amorphous silicon film is formed with a thickness of 55 nm. Then, an aqueous solution containing 10 ppm of the catalyst element in terms of weight is applied by a spin coating method to form a layer containing the catalyst element. Catalyst elements include nickel (Ni), germanium (Ge), iron (Fe), palladium (Pd), tin (Sn), lead (Pb), cobalt (Co), platinum (Pt), copper (Cu), gold (Au). For the layer 170 containing the catalyst element, the layer of the catalyst element may be formed to a thickness of 1 to 5 nm by a sputtering method or a vacuum deposition method in addition to the spin coating method.
[0141]
In the crystallization step, first, heat treatment is performed at 400 to 500 ° C. for about 1 hour, so that the hydrogen content of the amorphous silicon film is 5 atom% or less. Then, using a furnace annealing furnace, thermal annealing is performed at 550 to 600 ° C. for 1 to 8 hours in a nitrogen atmosphere. Through the above steps, a crystalline semiconductor film made of a crystalline silicon film can be obtained.
[0142]
If an island-like semiconductor film is produced from the crystalline semiconductor film thus produced, an active matrix substrate can be completed as in the embodiment. However, when a catalytic element that promotes crystallization of silicon is used in the crystallization step, a small amount (1 × 10 10) is contained in the island-shaped semiconductor film. ¹⁷ ~ 1x10 ¹⁹ atoms / cm ^Three Degree) catalyst element remains. Of course, it is possible to complete the TFT even in such a state, but it is more preferable to remove at least the remaining catalyst element from the channel formation region. One means for removing this catalytic element is a means that utilizes the gettering action of phosphorus (P).
[0143]
If there is a scratch on the surface to which the catalyst element is added, the catalyst element is segregated at the scratch, and the catalyst element remains even if gettering is performed by phosphorus. However, in the embodiment, the surface of the first insulating film is flattened by polishing the first insulating film by CMP using a fine polishing cloth to prevent defects due to scratches. For this reason, it is possible to prevent the catalyst element from remaining due to scratches on the surface to which the catalyst element is added and to exhibit good TFT characteristics.
[0144]
Further, when the glass substrate itself is polished, impurities contained in the glass substrate are eluted into the apparatus. In order to prevent contamination of the TFT due to impurities, an apparatus for polishing a glass substrate needs to specialize the object of polishing on the glass substrate or form a base film for the purpose of protection.
[0145]
In this embodiment, since the insulating film formed on the glass substrate is polished, the device is not contaminated by impurities eluted by polishing. For this reason, it is possible to use the polishing apparatus used in this embodiment for polishing an interlayer insulating film of a TFT or the like.
[0146]
[Example 2]
Embodiment 2 is characterized in that a conductive film is selectively formed over a substrate, a first insulating film is formed over the conductive film, and the first insulating film is polished by CMP to provide a semiconductor film. To do. This embodiment will be described with reference to FIGS.
[0147]
First, quartz glass is used as the substrate 600 having an insulating surface. A base film 601 is formed on the substrate. As the base film, a silicon oxide film is formed with a thickness of 10 nm to 250 nm.
[0148]
Next, a conductive film is formed as a light-shielding film over the base film, and patterning is performed, whereby the scanning line 602 is formed. This scanning line also functions as a light shielding film for protecting a semiconductor film to be formed later from light. Here, a stacked structure of a polysilicon film (film thickness of 50 nm) and a tungsten silicide (W—Si) film (film thickness of 100 nm) is used as the scanning line 602. The polysilicon film prevents contamination from the tungsten silicide to the substrate.
[0149]
Next, a first insulating film 603 covering the scan line 602 is formed with a thickness of 0.5 to 5 μm (preferably 1 to 5 μm). Here, a silicon oxynitride film with a thickness of 2800 nm is formed by a CVD method.
[0150]
Next, the first insulating film 603 is polished by CMP using SPP600AT manufactured by Okamoto Machine Tool Co., Ltd. A polishing cloth is pasted on a circular rotating surface plate having a diameter of 80 cm. As the polishing cloth, an IC1000 single layer made by Rodel Nitta Co. is used.
[0151]
As the slurry, ILD1300 manufactured by Rodel Nitta is used. The ILD 1300 is a colloidal solution in which aqueous colloidal silica is dispersed in an ammonia-based solution. The rotating surface plate rotates about the center of the rotating surface plate as a rotation axis. The rotation speed of the rotating platen is 30 rpm. Further, the rotating surface plate rotates three reciprocations in one minute in the horizontal direction while rotating.
[0152]
A circular metal polishing head having a diameter of 30 cm adsorbs the glass substrate in a vacuum. A wafer suction pad is provided between the glass substrate and the polishing head. As the wafer suction pad, NF200 manufactured by Rodel Nitta is used. The center of the polishing head is located between the center of the rotating surface plate and the circumference of the rotating surface plate. The polishing head is rotating at 30 rpm.
[0153]
300 gf / cm ² The pressure is applied to the substrate and the substrate is pressed against the polishing cloth on the rotating surface plate. By changing the pressure of the polishing head, the polishing rate of the film to be polished can be adjusted.
[0154]
The polishing time is 1 to 2 minutes.
[0155]
Polishing of the first insulating film 603 can be performed using the polishing conditions of Embodiment 1. Also in this embodiment, the undulation depth of the surface of the first insulating film can be suppressed to 20 nm.
[0156]
Next, a first passivation film having a thickness of 100 nm is provided. The first passivation film 604 forms a silicon nitride film. The silicon nitride film functions as a passivation film that prevents impurities in the substrate from entering an amorphous semiconductor film described later.
[0157]
A film polished by CMP is not a silicon oxynitride film having a refractive index close to that of the substrate and the base film, out of the first insulating film 603 that is a silicon oxynitride film and the first passivation film 604 that is a silicon nitride film. should not. If the silicon nitride film is polished by CMP, a difference in film thickness due to the waviness of the substrate occurs in the silicon nitride film, and coloring corresponding to the difference in film thickness occurs. In addition, the interface between the silicon nitride film and the silicon oxynitride film reflects the waviness of the surface of the substrate, resulting in interference fringes caused by light reflected at the interface between the silicon nitride film and the silicon oxynitride film. .
[0158]
Next, an amorphous semiconductor film is formed with a thickness of 10 to 100 nm. Here, an amorphous silicon film (amorphous silicon film) having a thickness of 69 nm is formed by LPCVD. Next, the amorphous silicon film (amorphous silicon film) is crystallized using the technique described in JP-A-8-78329 as a technique for crystallizing the amorphous silicon film. The technology described in this publication is to selectively add a metal element that promotes crystallization to an amorphous silicon film, and to perform a heat treatment to form a crystalline silicon film that starts from the added region. is there. Here, nickel is used as a metal element for promoting crystallization, and heat treatment (600 ° C., 12 hours) for crystallization is performed after heat treatment (450 ° C., 1 hour) for dehydrogenation.
[0159]
Next, Ni is gettered from the region used as the active layer of the TFT. A region to be an active layer of the TFT is covered with a mask (silicon oxide film), phosphorus (P) is added to part of the crystalline silicon film, and heat treatment (600 ° C., 12 hours in a nitrogen atmosphere) is performed.
[0160]
Next, after removing the mask, patterning is performed to remove unnecessary portions of the crystalline silicon film, so that semiconductor films 605 (605a and 605b) are formed. The semiconductor films 605a and 605b are the same semiconductor film. Note that FIG. 8A is a top view of the pixel after the semiconductor film is formed. A scanning line 602 and a semiconductor film 605 are illustrated.
[0161]
Next, in order to form a storage capacitor, a resist is formed and phosphorus is doped into a part of the semiconductor film (a region to be a storage capacitor) 605b.
[0162]
Next, the resist is removed to form an insulating film that covers the semiconductor film. Thereafter, in order to increase the capacity of the storage capacitor, a resist is formed, and the insulating film over the semiconductor film 605b in the region to be the storage capacitor is thinned.
[0163]
Next, thermal oxidation is performed to form a second insulating film (gate insulating film) 606. By this thermal oxidation, the final film thickness of the gate insulating film becomes 80 nm. Note that the thickness of the insulating film in the region serving as the storage capacitor is preferably 40 to 50 nm.
[0164]
Next, channel doping in which a p-type or n-type impurity is added at a low concentration in a region to be a channel region of the TFT is performed over the entire surface or selectively. This channel doping process is a process for controlling the TFT threshold voltage. Here, diborane (B ₂ H ₆ Boron is added by ion doping that is plasma-excited without mass separation. Of course, an ion plantation method that performs mass separation may be used.
[0165]
Next, the second insulating film is etched to form a contact hole reaching the scanning line.
[0166]
Next, a conductive film is formed and patterned to form a first electrode (gate electrode) 607a and a capacitor wiring 607b. Here, a stacked structure of a silicon film doped with phosphorus (film thickness 150 nm) and tungsten silicide (film thickness 150 nm) is used. Note that the first storage capacitor is formed of the capacitor wiring 607b and a part of the semiconductor film 605b using the second insulating film 606 as a dielectric.
[0167]
Note that FIG. 8B is a top view of the pixel after the gate electrode and the capacitor wiring are formed. The first electrode (gate electrode) 607 a is electrically connected to the scanning line 602 through the contact hole 801. A region where the semiconductor film 605 and the capacitor wiring 607b overlap with each other with the second insulating film interposed therebetween functions as a storage capacitor.
[0168]
Next, phosphorus is added at a low concentration in a self-aligning manner using the gate electrode and the capacitor wiring as a mask. The concentration of phosphorus in this low concentration region is 1 × 10 ¹⁶ ~ 5x10 ¹⁸ atoms / cm ^Three , Typically 1 × 10 ¹⁶ ~ 5x10 ¹⁸ atoms / cm ^Three Adjust so that
[0169]
Next, a resist is formed, and phosphorus is added at a high concentration using the resist as a mask to form a high-concentration impurity region serving as a source region or a drain region. The phosphorus concentration in this high concentration impurity region is 1 × 10 ²⁰ ~ 1x10 ^{twenty one} atoms / cm ^Three , Typically 2 × 10 ²⁰ ~ 5x10 ²⁰ atoms / cm ^Three Adjust so that Note that in the semiconductor film, a region overlapping with the gate electrode serves as a channel region, and a region covered with the resist serves as a low concentration impurity region and functions as an LDD region. Then, after adding impurities, the resist is removed.
[0170]
Next, although not shown here, in order to form a p-channel TFT used for a driver circuit formed over the same substrate as the pixel, a region that becomes an n-channel TFT is covered with a resist, and boron is added to form a source region. Alternatively, a drain region is formed.
[0171]
Next, after removing the resist, a second passivation film 608 is formed to cover the first electrode (gate electrode) 607a and the capacitor wiring 607b. Here, a silicon oxide film is formed with a thickness of 70 nm. Next, a heat treatment process for activating n-type or p-type impurities added to the semiconductor film at respective concentrations is performed. Here, heat treatment is performed at 950 ° C. for 30 minutes.
[0172]
Next, a third insulating film 609 made of an inorganic material is formed. The third insulating film functions as an interlayer insulating film. In this embodiment, a silicon oxynitride film is formed with a thickness of 800 to 3000 nm. Of course, the third insulating film can be polished by CMP to form a flat surface. Since the first insulating film has already been polished by CMP to form a flat surface, even if the third insulating film is polished by CMP, the difference in film thickness due to the waviness of the surface of the substrate is caused by CMP polishing. It does not occur in the third insulating film later.
[0173]
Next, after forming a contact hole reaching the semiconductor film, a second electrode 611 and a signal line 609 are formed. In this embodiment, the electrode and the signal line are a laminated film having a four-layer structure in which a Ti film is 60 nm, a TiN film is 40 nm, an aluminum film containing Si is 300 nm, and a TiN film 100 nm is continuously formed by sputtering.
[0174]
Note that FIG. 9A shows a top view of the pixel after forming the second electrode and the signal line. The signal line 610 is electrically connected to the semiconductor film through the contact hole 802. The second electrode 611 is electrically connected to the semiconductor film through the contact hole 803. A cross-sectional view of the pixel portion formed through the above steps is illustrated in FIG. A cross section obtained by cutting FIG. 9A along a chain line EE ′ and a chain line FF ′ is shown in the cross-sectional view of FIG.
[0175]
Next, hydrogenation treatment is performed at 350 ° C. for 1 hour.
[0176]
Next, a fourth insulating film 612 made of an organic resin material is formed. The fourth insulating film functions as an interlayer insulating film. Here, an acrylic resin film having a thickness of 1.0 μm is used. Next, a light-shielding conductive film is formed to a thickness of 100 nm over the interlayer insulating film, so that the light-shielding layer 613 is formed.
[0177]
Next, a fifth insulating film 614 is formed with a thickness of 100 nm. As the fifth insulating film, a silicon oxynitride film with a thickness of 100 nm to 300 nm is formed.
[0178]
Next, a contact hole reaching the electrode is formed. Next, after forming a 100 nm transparent conductive film (here, indium tin oxide (ITO) film), patterning is performed to form a pixel electrode. The distance between the first pixel electrode 615 and the second pixel electrode 616 is 2.0 μm.
[0179]
Note that the second storage capacitor 618 can be formed using the pixel electrode and the light-shielding film 613 as electrodes and the fifth insulating film 614 as a dielectric. As a result, two storage capacitors, the first storage capacitor 617 and the second storage capacitor, are formed in one pixel.
[0180]
A top view of the pixel portion after the pixel electrode is formed is shown in FIG. The second electrode 610 and the pixel electrode are electrically connected through the contact hole 804. FIG. 10B shows a cross section obtained by cutting the top view of FIG. 10A along a chain line EE ′ and a chain line FF ′.
[0181]
The substrate manufactured through the above steps is referred to as an active matrix substrate in this specification.
[0182]
This example is an example, and it is needless to say that the process is not limited to the process of this example. For example, as each conductive film, a conductive film made of tantalum (Ta), titanium (Ti), molybdenum (Mo), tungsten (W), chromium (Cr), or silicon (Si) may be used.
[0183]
The active matrix substrate of this embodiment can be used for a transmissive liquid crystal display device. Note that when a conductive film having a function of reflecting light is used as the pixel electrode instead of the transparent conductive film, the active matrix substrate of this embodiment can be used for a reflective liquid crystal display device.
[0184]
In addition, the refractive index of quartz glass used as the substrate 600 in this embodiment is 1.45, the refractive index of the silicon oxide film used as the base film 601 is 1.47, and the oxynitriding used as the first insulating film 603a. The refractive index of the silicon film is 1.50. Since the difference in refractive index between the first insulating film polished by CMP, the substrate, and the base film provided between the first insulating film and the substrate is 0.05 or less, the surface of the substrate It is possible to prevent the incident light from being reflected on the surface along the undulation, and to prevent the occurrence of interference fringes due to the undulation of the surface of the substrate.
[0185]
Of course, the active matrix substrate of this embodiment can also be applied to a display device using OLEDs. The light emitting layer may be either a low molecular material or a high molecular material. When a low molecular material is used, a vapor deposition method is used. When a high molecular material is used, a spin coating method, a printing method, an ink jet method, or the like is used. In this embodiment, the pixel electrode made of the ITO film is used as an anode, a light emitting layer is stacked on the anode, and a material such as MgAg or LiF is stacked on the light emitting layer as a cathode. If the active matrix substrate of this embodiment is used, a TFT element for driving an OLED can be formed on the surface of an insulating film with small undulation and surface roughness. Can be reduced and good display quality can be secured.
[0186]
[Example 3]
In this example, a process for manufacturing an active matrix liquid crystal display device from the active matrix substrate described in the embodiment will be described below. FIG. 3 is used for the description.
[0187]
First, an active matrix substrate is obtained according to the embodiment.
[0188]
Next, a transparent electrode 501 made of a transparent conductive film is formed over the light-transmitting substrate 500. The substrate having the above structure is referred to as a counter substrate in this embodiment.
[0189]
Next, an alignment film 502 is formed over the active matrix substrate and the counter substrate, and a rubbing process is performed. Further, spherical spacers (not shown) made of resin or inorganic material are sprayed. Of course, a photosensitive resin may be formed by patterning.
[0190]
Then, the active matrix substrate on which the pixel portion and the driver circuit are formed and the counter substrate are attached to each other with a sealant 503. A filler is mixed in the sealing material, and the two substrates are bonded to each other with a uniform interval. The cell gap of the pixel portion is 4.5 μm.
[0191]
Thereafter, a liquid crystal material 504 is injected between both the substrates and completely sealed with a sealant (not shown). A known liquid crystal material may be used for the liquid crystal material 1003. If necessary, the active matrix substrate or the counter substrate is divided into a desired shape. Furthermore, a polarizing plate or the like was appropriately provided using a known technique. And FPC was affixed using the well-known technique. In this way, an active matrix liquid crystal display device is completed.
[0192]
This embodiment can be combined with Embodiment 1 or Embodiment 2.
[0193]
[Example 4]
The liquid crystal display device formed by implementing any one of Embodiments 1 to 3 can be used for various electro-optical devices. That is, the present invention can be applied to all electronic devices in which these electro-optical devices are incorporated in a display unit.
[0194]
Such electronic devices include video cameras, digital cameras, projectors, head-mounted displays (goggles type displays), car navigation systems, car stereos, personal computers, personal digital assistants (mobile computers, mobile phones, electronic books, etc.), etc. Can be mentioned. Examples of these are shown in FIGS.
[0195]
FIG. 5A illustrates a personal computer, which includes a main body 2001, an image input portion 2002, a display portion 2003, a keyboard 2004, and the like. The present invention can be applied to the display portion 2003.
[0196]
FIG. 5B illustrates a video camera, which includes a main body 2101, a display portion 2102, an audio input portion 2103, operation switches 2104, a battery 2105, an image receiving portion 2106, and the like. The present invention can be applied to the display portion 2102.
[0197]
FIG. 5C illustrates a mobile computer, which includes a main body 2201, a camera unit 2202, an image receiving unit 2203, an operation switch 2204, a display unit 2205, and the like. The present invention can be applied to the display portion 2205.
[0198]
FIG. 5D illustrates a goggle type display, which includes a main body 2301, a display portion 2302, an arm portion 2303, and the like. The present invention can be applied to the display portion 2302.
[0199]
FIG. 5E shows a player using a recording medium (hereinafter referred to as a recording medium) on which a program is recorded, and includes a main body 2401, a display portion 2402, a speaker portion 2403, a recording medium 2404, an operation switch 2405, and the like. This player uses a DVD (Digital Versatile Disc), CD, or the like as a recording medium, and can perform music appreciation, movie appreciation, games, and the Internet. The present invention can be applied to the display portion 2402.
[0200]
FIG. 5F illustrates a digital camera, which includes a main body 2501, a display portion 2502, an eyepiece portion 2503, an operation switch 2504, an image receiving portion (not shown), and the like. The present invention can be applied to the display portion 2502.
[0201]
FIG. 6A illustrates a front projector, which includes a projection device 2601, a screen 2602, and the like. The present invention can be applied to a liquid crystal display device 2808 that constitutes a part of the projection device 2601.
[0202]
FIG. 6B shows a rear projector, which includes a main body 2701, a projection device 2702, a mirror 2703, a screen 2704, and the like. The present invention can be applied to a liquid crystal display device 2808 that constitutes a part of the projection device 2702.
[0203]
FIG. 6C is a diagram showing an example of the structure of the projection devices 2601 and 2702 in FIGS. 6A and 6B. The projection devices 2601 and 2702 include a light source optical system 2801, mirrors 2802 and 2804 to 2806, a dichroic mirror 2803, a prism 2807, a liquid crystal display device 2808, a phase difference plate 2809, and a projection optical system 2810. Projection optical system 2810 includes an optical system including a projection lens. Although the present embodiment shows a three-plate type example, it is not particularly limited, and for example, a single-plate type may be used. In addition, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarization function, a film for adjusting a phase difference, an IR film, or the like in the optical path indicated by an arrow in FIG. Good.
[0204]
FIG. 6D illustrates an example of the structure of the light source optical system 2801 in FIG. In this embodiment, the light source optical system 2801 includes a reflector 2811, a light source 2812, lens arrays 2813 and 2814, a polarization conversion element 2815, and a condenser lens 2816. Note that the light source optical system illustrated in FIG. 6D is an example and is not particularly limited. For example, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarization function, a film for adjusting a phase difference, or an IR film in the light source optical system.
[0205]
However, the projector shown in FIG. 6 shows a case where a transmissive electro-optical device is used, and an application example of the reflective electro-optical device is not shown.
[0206]
FIG. 7A illustrates a mobile phone, which includes a main body 2901, an audio output portion 2902, an audio input portion 2903, a display portion 2904, operation switches 2905, an antenna 2906, and the like. The present invention can be applied to the display portion 2904.
[0207]
FIG. 7B illustrates a portable book (electronic book), which includes a main body 3001, display portions 3002 and 3003, a storage medium 3004, operation switches 3005, an antenna 3006, and the like. The present invention can be applied to the display portions 3002 and 3003.
[0208]
FIG. 7C illustrates a display, which includes a main body 3101, a support base 3102, a display portion 3103, and the like. The present invention can be applied to the display portion 3103.
[0209]
As described above, the application range of the present invention is extremely wide and can be applied to electronic devices in various fields. Moreover, the electronic device of a present Example is realizable even if it uses the structure which consists of what combination of Examples 1-3.
[0210]
As described above, the application range of the present invention is extremely wide and can be applied to electronic devices in various fields.
[0211]
【The invention's effect】
The glass substrate has irregularities due to undulations and scratches on the substrate itself. There are various electrical and optical problems just by flattening the interlayer insulating film. For example, interference fringes due to the undulation of the glass substrate occur, and the change in the film thickness of the interlayer film due to the undulation of the glass substrate occurs. Therefore, in the present invention, the insulating film having a refractive index close to that of the glass substrate provided in contact with the glass substrate is subjected to CMP polishing, thereby solving the electrical and optical problems, and achieving high integration corresponding to the multilayer wiring. A structure and a manufacturing method of a possible semiconductor device are provided.
[Brief description of the drawings]
1 is a cross-sectional view illustrating a method for manufacturing an active matrix substrate of Example 1. FIG.
2 is a cross-sectional view showing a method for manufacturing the active matrix substrate of Example 1. FIG.
3 is a top view showing a pixel portion of the active matrix substrate of Embodiment 1. FIG.
4 is a cross-sectional view showing a liquid crystal display device of Example 4. FIG.
FIG. 5 illustrates an example of an electronic apparatus according to a fifth embodiment.
FIG. 6 is a diagram showing an example of an electronic apparatus according to a fifth embodiment.
7 is a diagram illustrating an example of an electronic apparatus according to Embodiment 5. FIG.
8 is a top view showing a manufacturing process of an active matrix substrate of Example 3. FIG.
9A and 9B are a top view and a cross-sectional view illustrating a manufacturing process of an active matrix substrate of Example 3. FIGS.
10A and 10B are a top view and a cross-sectional view illustrating a manufacturing process of an active matrix substrate of Example 3. FIGS.
11 is a perspective view showing an apparatus used for polishing by CMP according to Embodiment 1. FIG.
FIG. 12 is a cross-sectional view showing a conventional method for manufacturing an active matrix substrate.
FIG. 13 is a cross-sectional view illustrating a conventional method for manufacturing an active matrix substrate.
FIG. 14 is a cross-sectional view showing a conventional method for manufacturing an active matrix substrate.
FIG. 15 is a diagram showing the undulation of the surface of a conventional borosilicate glass and interference fringes resulting therefrom.
FIG. 16 is a diagram showing the undulation of the surface of a conventional glass substrate and interference fringes resulting therefrom.
17 is a cross-sectional view showing warpage before and after forming an insulating film on a substrate of the present invention. FIG.

Claims (8)

Form an insulating film in contact with the glass substrate,
Polishing the insulating film by CMP,
The insulating layer, the glass substrate and the refractive index is close, the difference in refractive index between the glass substrate and the insulating film state, and are 0.05 or less,
During the polishing, the glass substrate is sandwiched between a polishing cloth on a rotating surface plate and a polishing head above the polishing cloth, and a pressure applied to the glass substrate is set to 200 gf / cm ² or more and 400 gf / cm ² or less. A method for manufacturing a substrate characterized by the above.   2. The method for manufacturing a substrate according to claim 1, wherein the insulating film is a silicon oxide film or a silicon oxynitride film. Form an insulating film in contact with the glass substrate,
Polishing the insulating film by CMP,
Forming a transistor on the polished insulating film;
The insulating layer, the glass substrate and the refractive index is close, the difference in refractive index between the glass substrate and the insulating film state, and are 0.05 or less,
During the polishing, the glass substrate is sandwiched between a polishing cloth on a rotating surface plate and a polishing head above the polishing cloth, and a pressure applied to the glass substrate is set to 200 gf / cm ² or more and 400 gf / cm ² or less. A method for manufacturing a display device. 4. The method for manufacturing a display device according to claim 3 , wherein the insulating film is a silicon oxide film or a silicon oxynitride film. Forming a first insulating film in contact with the glass substrate;
Polishing the first insulating film by CMP;
Forming a transistor having a semiconductor film, a gate insulating film, and a gate electrode over the polished first insulating film;
Forming a second insulating film on the gate electrode;
Polishing the second insulating film by CMP;
The first insulating film, the difference in refractive index between the glass substrate and the refractive index is near, the said glass substrate first insulating film state, and are 0.05 or less,
When polishing the first insulating film, the glass substrate is sandwiched between a polishing cloth on a rotating surface plate and a polishing head above the polishing cloth, and a pressure applied to the glass substrate is 200 gf / cm ² or more and 400 gf. / Cm ² or less, A method for manufacturing a display device. 6. The method for manufacturing a display device according to claim 5 , wherein the first insulating film is a silicon oxide film or a silicon oxynitride film. Selectively forming a light-shielding film on a glass substrate;
Forming an insulating film so as to cover the light-shielding film;
Polishing the insulating film by CMP,
Forming a semiconductor film on the polished insulating film;
The insulating layer, the glass substrate and the refractive index is close, the difference in refractive index between the glass substrate and the insulating film state, and are 0.05 or less,
During the polishing, the glass substrate is sandwiched between a polishing cloth on a rotating surface plate and a polishing head above the polishing cloth, and a pressure applied to the glass substrate is set to 200 gf / cm ² or more and 400 gf / cm ² or less. A method for manufacturing a display device. 8. The method for manufacturing a display device according to claim 7 , wherein the insulating film is a silicon oxide film or a silicon oxynitride film.

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