JP4725242B2 - Voltage detection device for power conversion system - Google Patents

Description

  In the present invention, self-extinguishing semiconductor elements are connected in series to form upper and lower arms, one end of the upper arm is connected to the anode side of the DC power source, and one end of the lower arm is connected to the cathode side of the DC power source and By connecting to a zero voltage as a reference potential and turning on and off each of the upper and lower arms at the intersection of a signal wave (voltage command value) based on PWM control and a carrier wave, a desired output voltage is supplied to the upper and lower arms. The present invention relates to a voltage detection device for a power conversion system obtained from an intermediate connection point.

  FIG. 16 is a circuit configuration diagram of a voltage detection device for a PWM inverter as this type of power conversion system including the circuit configuration of Patent Document 1 below.

  The PWM inverter 10 includes a self-extinguishing semiconductor element such as an IGBT and an anti-parallel circuit of diodes connected in series, and an inverter circuit 11 having a lower arm, and both ends of the upper and lower arms of the inverter circuit 11. A DC power source 12 comprising a rectifying power source for supplying a DC voltage Edc, a voltage command value generating means 13 for generating a signal wave (voltage command value) for turning on and off the upper and lower arms based on PWM control, A triangular wave generating means 14 for generating a triangular wave as a carrier wave, and a comparison circuit 15 for generating a drive signal for each of the IGBTs based on a comparison calculation result between the voltage command value and the triangular wave.

The voltage detection device 20 for detecting the voltage at the intermediate connection point of the upper and lower arms as the output voltage of the PWM inverter 10 includes a photocoupler circuit 21 for detecting a change in the voltage level at the intermediate connection point, and the photocoupler circuit. For example, a counter circuit 22 that measures a period during which the upper arm is turned on by the output of 21 outputs this measurement value (detection value) as an average value of the output voltage during one period of the carrier wave. Yes.
Japanese Patent Laid-Open No. 2-114890

  In the conventional voltage detection device 20 shown in FIG. 16, as described above, the duty ratio of the output voltage can be derived from the measured value during the period when the upper arm is on and one cycle of the carrier wave.

  However, fluctuations in the DC voltage Edc output from the DC power supply 12 during the period when the upper arm of the inverter circuit 11 is on and fluctuations in the voltage drop due to the energization currents of the upper and lower arms are the voltage detection device 20. There was a problem that it would be a detection error.

  The objective of this invention is providing the voltage detection apparatus of the power conversion system which eliminated the said problem.

In the first invention, self-extinguishing semiconductor elements are connected in series to form upper and lower arms, one end of the upper arm is connected to the anode side of a DC power source, and one end of the lower arm is connected to the DC power source. By connecting to the cathode side and a zero voltage as a reference potential and turning on and off the upper and lower arms at the intersection of a signal wave (voltage command value) based on PWM control and a carrier wave, the desired output voltage is In the power conversion system obtained from the middle connection point of the lower arm,
A first changeover switch that selects and outputs either a value based on the output voltage of the intermediate connection point of the upper and lower arms or the zero voltage; and the intermediate connection point when the upper arm is on. A reference voltage generation circuit that generates a reference voltage corresponding to a value based on the output voltage, a second changeover switch that selects and outputs either the reference voltage or the zero voltage, and an output value of the first changeover switch A subtracting circuit for subtracting the output value of the second changeover switch from the output, an integrating circuit for integrating and outputting the output value of the subtracting circuit, and detecting that the integral calculation value has reached the zero voltage. A comparison circuit that outputs the signal, level detection means that detects and outputs that the upper arm is turned on from a change in the output voltage of the intermediate connection point, and a synchronization signal based on the start point for each start point of the carrier wave. A synchronizing signal generating circuit, and In a section T1 from when the initial signal is issued until the level detecting means outputs an output, the first changeover switch selects a value based on the intermediate connection point and the second changeover switch selects the zero voltage. In the section T2 output by the level detection means and the section T3 from when the section T2 ends until the next synchronization signal is generated, the first selector switch selects a value based on the intermediate connection point. At the same time, the second changeover switch selects the reference voltage, and the first changeover switch selects the zero voltage during the period T4 until the comparison circuit operates after the next synchronization signal is output. At the same time, the second change-over switch measures the sequence control circuit for performing the sequence control for selecting the reference voltage, and the total elapsed time of the section T2 and the section T4. Characterized by using a voltage detecting device for a power conversion system comprising a reference voltage input time measuring counter which outputs the interval T1 as an average value of the output voltage up interval T3.

2nd invention is the said power conversion system,
A first changeover switch that selects and outputs either a value based on the output voltage of the intermediate connection point of the upper and lower arms or the zero voltage; and the intermediate connection point when the upper arm is on. A reference voltage generation circuit that generates a reference voltage corresponding to a value based on the output voltage, a second changeover switch that selects and outputs either the reference voltage or the zero voltage, and an output value of the first changeover switch A subtracting circuit for subtracting the output value of the second changeover switch from the output, an integrating circuit for integrating and outputting the output value of the subtracting circuit, and detecting that the integral calculation value has reached the zero voltage. A comparison circuit that outputs the synchronization signal, a synchronization signal generation circuit that generates a synchronization signal based on the start point for each start point of the carrier wave, a down counter that down-counts one period of the synchronization signal, and a value of the down counter The voltage command value and In a time adjustment circuit that outputs at the intersection, and a section T1 from when the synchronization signal is generated until the time adjustment circuit outputs, the first changeover switch selects a value based on the intermediate connection point and a second value. The selector switch selects the zero voltage, and after the section T1 is finished, the first selector switch selects a value based on the intermediate connection point until the next synchronization signal is generated. The second changeover switch selects the reference voltage, and after the next synchronization signal is output, the first changeover switch selects the zero voltage and the first changeover switch during the period T3 until the comparison circuit operates. 2 is a sequence control circuit for performing sequence control for selecting a reference voltage, and an elapsed time from the section T2 to the section T3 is measured, and a value based on the measured value is set as the section T2. Characterized by using a voltage detecting device for a power conversion system comprising a reference voltage input time measuring counter to output as an average value of the output voltage up interval T2 from.

3rd invention is the said power conversion system,
A first changeover switch that selects and outputs either a value based on the output voltage of the intermediate connection point of the upper and lower arms or the zero voltage; and the intermediate connection point when the upper arm is on. A reference voltage generation circuit that generates a reference voltage corresponding to a value based on the output voltage, a second changeover switch that selects and outputs either the reference voltage or the zero voltage, and an output value of the first changeover switch A subtracting circuit for subtracting the output value of the second changeover switch from the output, an integrating circuit for integrating and outputting the output value of the subtracting circuit, and detecting that the integral calculation value has reached the zero voltage. A comparison circuit that outputs the signal, level detection means that detects and outputs that the upper arm is turned on from a change in the output voltage of the intermediate connection point, and a synchronization signal based on the start point for each start point of the carrier wave. A synchronizing signal generating circuit for generating the same A time adjustment counter that is output when a time based on a measurement time from when the signal is issued until the level detection means outputs, and a section T1 from when the synchronization signal is issued until the time adjustment counter outputs. The first changeover switch selects a value based on the intermediate connection point and the second changeover switch selects the zero voltage, and after the interval T1 is completed, the interval until the next synchronization signal is generated. At T2, the first changeover switch selects a value based on the intermediate connection point, the second changeover switch selects the reference voltage, and after the next synchronization signal is output, the comparison circuit operates. In the interval T3, a sequence control circuit for performing sequence control for selecting the zero voltage in the first changeover switch and selecting the reference voltage in the second changeover switch; A power comprising a reference voltage input time measurement counter that measures an elapsed time from the section T2 to the section T3 and outputs a value based on the measured value as an average value of the output voltage from the section T1 to the section T2. The voltage detection device of the conversion system is used.

4th invention is the voltage detection apparatus of the power conversion system of the said 1st-3rd invention,
Instead of the synchronization signal generation circuit, a synchronization signal estimation means for estimating and outputting a synchronization signal based on the output of the level detection means is provided.

  According to the present invention, by using the so-called double integral type A / D conversion method, the fluctuation of the DC voltage of the DC power source constituting the power conversion system and the fluctuation of the voltage drop due to the energization currents of the upper and lower arms are respectively. In consideration of the above, it is possible to obtain a voltage average value of one carrier cycle when performing PWM control with high accuracy.

  FIG. 1 is a circuit configuration diagram of a voltage detection device for a PWM inverter as a power conversion system showing a first embodiment of the present invention. In FIG. 1, the same function as that of the conventional configuration shown in FIG. 16 is shown. Are denoted by the same reference numerals.

  That is, the PWM inverter 10a is different from the PWM inverter 10 shown in FIG. 16 in that the cathode side of the DC power supply 12 is connected to a zero voltage as a reference potential.

  In addition, the voltage detection device 30 of the PWM inverter 10a constitutes the inverter circuit 11, and outputs the voltage at the intermediate connection point of the lower arm to a desired value suitable for the operation of the voltage detection device. A voltage dividing circuit 31, a changeover switch 32 that selects and outputs either the divided voltage or the zero voltage, and a reference voltage (Vd) corresponding to the divided voltage (Vd) when the upper arm is on. Vref, Vd ≧ Vref), a changeover switch 34 for selecting and outputting either the reference voltage or zero voltage, and an output value of the changeover switch 34 from the output value of the changeover switch 32. A subtracting circuit 35 for subtracting and outputting; an integrating circuit 36 for integrating and outputting the output value of the subtracting circuit 35; and a comparing circuit 37 for detecting and outputting that the integral computing value has reached zero voltage; In order to detect and output that the upper arm is turned on from the change of the divided voltage, as shown in the figure, a level detection means 38 comprising a threshold voltage and a comparison circuit, a synchronization signal generation circuit 39, and A sequence control circuit 40 and a reference voltage input time measurement counter 41 are provided.

  The operation of the voltage detection device 30 will be described below with reference to FIGS.

  FIG. 2 is a waveform diagram for explaining the operation of the PWM control and synchronization signal generating circuit 39 in the PWM inverter 10a.

  That is, the comparison circuit 15 performs a comparison operation between the triangular wave carrier wave (broken line) output from the triangular wave generation unit 14 and the voltage command value (one-dot chain line) output from the voltage command value generation unit 13, and based on the comparison calculation result. By outputting drive signals to the upper arm and the lower arm, the output voltage from the intermediate connection point of the upper and lower arms is as shown by the solid line in the figure. At this time, when the upper arm is on and the lower arm is off, the voltage level is obtained by subtracting the voltage drop at the upper arm from the DC voltage Edc output from the DC power supply 12, and the upper arm is off and the lower arm is on. In the state, the voltage level is obtained by adding the voltage drop at the lower arm to the zero voltage.

  Further, as shown in the figure, the synchronizing signal generating circuit 39 outputs a pulse voltage as a synchronizing signal for each starting point of the triangular wave output from the triangular wave generating means 14.

  FIG. 3 is a waveform diagram for explaining the operation of the voltage detection device 30 in a state where the ON period of the upper arm is relatively short (low duty ratio) in the PWM control described above.

  That is, in the sequence control circuit 40, first, in the section T1 from when the synchronization signal is generated from the synchronization signal generation circuit 39 to when the level detection means 38 outputs, the changeover switch 32 is divided voltage of the voltage dividing circuit 31. And the changeover switch 34 sends a command to select the zero voltage, and then, after the section T2 output by the level detecting means 38 and the section T2 is finished, until the next synchronization signal is issued. In period T3, the changeover switch 32 selects the divided voltage and the changeover switch 34 sends a command to select a reference voltage. Next, after the next synchronization signal is output, the comparison circuit 37 In the interval T4 until the operation, the change-over switch 32 selects the zero voltage and the change-over switch 34 sends a command for selecting the reference voltage. Replacement switch 34, respective output voltage subtraction circuit 35 changes as shown, thus, changes as shown the output of the integrating circuit 36. The reference input time measurement counter 41 measures the total elapsed time (t1) of the section T2 and the section T4 according to a command from the sequence control circuit 40.

At this time, the following number is present between the time (t1), one cycle of the carrier wave (t _CYCLE ), and the voltage average value (Vave) of the divided voltage (Vd) when the upper arm is on. There is one set of relationships.
[Equation 1]
Vave · t _CYCLE = Vref · t1
That is, Vave = Vref (t1 / t _CYCLE ) can be obtained.

  As described above, by deriving Vave, the fluctuation of the DC voltage output from the DC power supply 12 constituting the PWM inverter 10a and the fluctuation of the voltage drop due to the energization currents of the upper and lower arms of the inverter circuit 11 are taken into consideration. The voltage average value of one carrier wave period when performing PWM control can be obtained with high accuracy. Further, since the value obtained by subtracting the reference voltage (Vref) from the divided voltage (Vd) is input to the integration circuit 36 in the section T2 in which the level detection means 38 is operating, the integration circuit at the end of the section T3. Thus, the voltage rise of 37 can be suppressed to a low level, and therefore the time for the interval T4, that is, the time until the output of the integrating circuit 36 reaches zero voltage after the lapse of one carrier wave period can also be reduced.

  FIG. 4 is a waveform diagram for explaining the operation of the voltage detection device 30 in a state where the ON period of the upper arm is relatively long (high duty ratio) in the PWM control described above.

  Since the behavior of the voltage detection device 30 at this time is the same as the behavior described with reference to FIG. 3, the description thereof is omitted here, but at this time also in the section T2 in which the level detection means 38 is operating. Since the value obtained by subtracting the reference voltage (Vref) from the divided voltage (Vd) is input to the integration circuit 36, the voltage increase of the integration circuit 37 at the end of the section T3 can be suppressed low. The time until T4, that is, the time until the output of the integrating circuit 36 reaches zero voltage after one carrier cycle elapses, can also be made small.

  FIG. 5 is a circuit configuration diagram of a voltage detection device for a PWM inverter as a power conversion system showing a second embodiment of the present invention. In this figure, the voltage detection device 30 has the same function as the voltage detection device 30 shown in FIG. Components are denoted by the same reference numerals, and description thereof is omitted here.

  That is, the voltage detection device 50 shown in FIG. 5 includes a down counter 51 and a time adjustment circuit 52 in place of the level detection means 38 shown in FIG. 1, and a sequence control circuit 53 in place of the sequence control circuit 40. It has.

  The operation of the voltage detection device 50 will be described below with reference to FIGS.

  FIG. 6 is a waveform diagram for explaining the operation of the down counter 51 and the time adjustment circuit 52.

  The down counter 51 uses a value corresponding to the peak value of the carrier wave (see FIG. 2) as an initial value, and counts down to zero immediately before the next synchronization signal is generated. At this time, the time adjustment circuit 52 outputs a pulse-like voltage at each intersection of the counter value (solid line) and the voltage command value (one-dot chain line) from the voltage command value generation means 13 of the PWM inverter 10a as shown in the figure. Therefore, the timing at which this pulse voltage is generated is a timing corresponding to the voltage command value.

  FIG. 7 is a waveform diagram for explaining the operation of the voltage detection device 50 in a state where the ON period of the upper arm is relatively short (low duty ratio) in the PWM control described above.

  That is, in the sequence control circuit 53, first, in the section T1 from when the synchronization signal is generated from the synchronization signal generation circuit 39 to when the time adjustment circuit 52 outputs, the changeover switch 32 is divided by the voltage dividing circuit 31. The changeover switch 34 sends a command to select the zero voltage while selecting the voltage, and the changeover switch 32 is set to the divided voltage in the interval T2 until the next synchronization signal is issued after the interval T1 ends. And the changeover switch 34 sends a command to select a reference voltage, and the changeover switch 32 reduces the zero voltage during a period T3 until the comparison circuit 37 operates after the next synchronization signal is output. When the selection switch 34 sends a command for selecting a reference voltage, the output voltages of the changeover switch 32, changeover switch 34, and subtraction circuit 35 are shown in the figure. Uni changed, thus, changes as shown the output of the integrating circuit 36. The reference input time measurement counter 41 measures the total elapsed time (t1) from the section T2 to the section T3 in response to a command from the sequence control circuit 53.

  Based on this time (t1), by deriving the Vave using the equation (1), the fluctuation of the DC voltage output from the DC power supply 12 constituting the PWM inverter 10a and the energization of each of the upper and lower arms of the inverter circuit 11 Taking into account fluctuations in voltage drop due to current, it is possible to obtain a voltage average value of one carrier cycle when performing PWM control with high accuracy. In the section T2 after the operation of the time adjustment circuit 52, a voltage having a polarity substantially opposite to the reference voltage (Vref) is input to the integration circuit 36. Therefore, the time of the section T3, that is, one carrier cycle After the elapse of time, the time until the output of the integrating circuit 36 reaches zero voltage can also be reduced. Further, as compared with the voltage detection device 30, the reference voltage input time measurement counter 41 can obtain the time (t1) by performing only one measurement operation.

  FIG. 8 is a waveform diagram for explaining the operation of the voltage detection device 50 in a state where the ON period of the upper arm is relatively long (high duty ratio) in the PWM control described above.

  Since the behavior of the voltage detection device 50 at this time is the same as the behavior described in FIG. 7, the description thereof is omitted here. In this case, the interval T2 after the time adjustment circuit 52 starts the output operation. Then, since the value obtained by subtracting the reference voltage (Vref) from the divided voltage (Vd) is input to the integration circuit 36, the voltage increase of the integration circuit 37 at the end of the section T2 can be suppressed low. The time during the section T3, that is, the time until the output of the integrating circuit 36 reaches zero voltage after one carrier cycle elapses can be made small.

  7 and 8 with respect to the voltage detection device 50 is about the behavior of the carrier wave at the time of PWM control with the symmetrical triangular wave shown in FIG. 2, but a sawtooth wave or the like can also be used.

  FIG. 9 is a circuit configuration diagram of a voltage detection device for a PWM inverter as a power conversion system showing a third embodiment of the present invention, and in this figure, has the same function as the voltage detection device 30 shown in FIG. Components are denoted by the same reference numerals, and description thereof is omitted here.

  That is, in the voltage detection device 60 shown in FIG. 9, a time adjustment counter 61 is added to the configuration of the voltage detection device 30 shown in FIG. 1, and a sequence control circuit 62 is provided instead of the sequence control circuit 40. .

  The operation of the voltage detection device 60 will be described below with reference to FIGS.

  FIG. 10 is a waveform diagram for explaining the operation of the time adjustment counter 61.

  In this figure, a sawtooth triangular wave as shown in the figure is used as a carrier in consideration of a triangular wave asymmetric with respect to the midpoint of one carrier wave period.

At this time, if the time from when the synchronizing signal is generated by the synchronizing signal generating circuit 39 to the valley of the carrier wave is a, and the time t0 from the synchronizing signal to the output of the level detecting means 38, the a X / a corresponds to the ratio (t _PULSE / t _CYCLE ) between the time t _PULSE in which the level detection means 38 is operating and the one cycle time t _CYCLE of the carrier wave. Therefore, the following formula 2 is obtained.
[Equation 2]
t _PULSE = {(a−t0) / a} · t _CYCLE
The a is a known number in this type of PWM inverter, and the time adjustment counter 61 measures the t0 from the reference voltage Vref and the divided voltage Vd, and then the synchronization signal is generated. A pulsed voltage is output at the timing of t _DELAY time obtained by the following equation (3).
[Equation 3]
t _DELAY = t _CYCLE -t _PULSE (Vd / Vref)
In this PWM inverter 10a, since a symmetrical triangular wave is used as the carrier wave during PWM control, a is 0.5t _CYCLE , and Vd≈Vref is set. When substituting, t _DELAY ≈ 2t0, so that the time adjustment counter 61 outputs when it becomes 2t0.

  FIG. 11 is a waveform diagram for explaining the operation of the voltage detection device 60 in a state where the ON period of the upper arm is relatively short (low duty ratio) in the PWM control described above.

  That is, in the sequence control circuit 62, first, the changeover switch 32 is provided in a section T1 from when the synchronization signal from the synchronization signal generation circuit 39 is issued until the time adjustment counter 61 outputs 2t0 time as shown in the figure. Selects the divided voltage of the voltage dividing circuit 31 and the changeover switch 34 sends a command to select the zero voltage. After the section T1 is finished, the section T2 until the next synchronization signal is issued The changeover switch 32 selects the divided voltage and the changeover switch 34 sends a command for selecting a reference voltage. After the next synchronization signal is output, the section T3 until the comparison circuit 37 operates is The change-over switch 32 selects the zero voltage and the change-over switch 34 sends out a command for selecting the reference voltage. 35 Each of the output voltage changes as shown, thus, changes as the output also shown in the integrating circuit 36. The reference input time measurement counter 41 measures the total elapsed time (t1) from the section T2 to the section T3 in response to a command from the sequence control circuit 53.

  Based on this time (t1), by deriving the Vave using the equation (1), the fluctuation of the DC voltage output from the DC power supply 12 constituting the PWM inverter 10a and the energization of each of the upper and lower arms of the inverter circuit 11 Taking into account fluctuations in voltage drop due to current, it is possible to obtain a voltage average value of one carrier cycle when performing PWM control with high accuracy. In the section T2 after the operation of the time adjustment counter 61, a voltage having a polarity substantially opposite to the reference voltage (Vref) is input to the integration circuit 36. Therefore, the time in the section T3, that is, one carrier cycle After the elapse of time, the time until the output of the integrating circuit 36 reaches zero voltage can also be reduced. Further, as compared with the voltage detection device 30, the reference voltage input time measurement counter 41 can obtain the time (t1) by performing only one measurement operation.

  FIG. 12 is a waveform diagram for explaining the operation of the voltage detection device 60 in a state where the ON period of the upper arm is relatively long (high duty ratio) in the PWM control described above.

  Since the behavior of the voltage detection device 60 at this time is the same as the behavior described in FIG. 11 described above, the description thereof is omitted here, but at this time, the interval after the time adjustment circuit counter 61 starts the output operation Since the value obtained by subtracting the reference voltage (Vref) from the divided voltage (Vd) is input to the integration circuit 36 at T2, the voltage increase of the integration circuit 37 at the end of the section T2 can be suppressed low. The period T3, that is, the time until the output of the integrating circuit 36 reaches zero voltage after one carrier cycle elapses can be made small.

  FIG. 13 is a circuit configuration diagram of a voltage detection device of a PWM inverter as a power conversion system showing a fourth embodiment of the present invention, and in this figure, has the same function as the voltage detection device 30 shown in FIG. Components are denoted by the same reference numerals, and description thereof is omitted here.

  That is, the voltage detection device 30a shown in FIG. 13 includes synchronization signal estimation means 42 instead of the synchronization signal generation circuit 39 shown in FIG.

  The operation of the synchronization signal estimating means 42 will be described below with reference to FIGS.

  FIG. 14 shows a detailed circuit configuration diagram of the synchronization signal estimation means 42. The synchronization signal estimation means 42 includes a level change time measurement counter 42a, a storage register 42b, an arithmetic control circuit 42c, and a synchronization signal generation counter 42d. It has.

  FIG. 15 is a waveform diagram for explaining the operation of the synchronization signal estimating means 42 shown in FIG. 14. First, from the time Ts after the voltage detecting device 30a is activated until the level detecting means 38 starts its operation. The time t1 is measured by the level change time measurement counter 42a, the measured value is stored in the storage register 42b, and the time t2 from the time Ts until the level detecting means 38 finishes the operation is measured. Measured by the counter 42a, this measured value is stored in the storage register 42b, and subsequently the time t3 from the time Ts until the level detecting means 38 starts to operate again is measured by the level change time measuring counter 42a. The measured value is stored in the storage register 42b, and the time from the time Ts to the time when the level detecting means 38 finishes the operation again. The t4 measured by the level change time measuring counter 42a, and stores the measured value in the storage register 42b.

Next, when the time t4 can be obtained, the arithmetic control circuit 42c calculates the times ta and tb corresponding to the intermediate point of the carrier wave from the times t1, t2, t3 and t4 by the following mathematical formula.
[Equation 4]
ta = (t1 + t2) / 2
[Equation 5]
tb = (t3 + t4) / 2
From the above formula, the estimated value t _{CYCLE #} of one carrier cycle time is tb-ta, and therefore the start time of the next carrier wave is the time when the time t5 shown in the following formula has elapsed from the time Ts.
[Equation 6]
t5 = t + (1/2) t _{CYCLE #}
That is, the synchronization signal generation counter 42d outputs a synchronization signal for each estimated value t _{CYCLE #} from the time t5.

  Since the operation of the voltage detection device 30a is the same as that of the voltage detection device 30 described above, the description thereof is omitted here.

  The synchronization signal estimating means 42 can compensate for the estimation error by appropriately performing the above-described detection / calculation while the voltage detection device 30a is operating. Also in the above-described second and third embodiments, the synchronization signal estimating means 42 shown in FIG. 14 can be provided in place of the synchronization signal generating circuit 39.

  Further, in the above-described embodiment, each arm is described as a circuit configuration including an IGBT and a diode anti-parallel circuit. However, an anti-parallel circuit or an anti-blocking type in which a self-extinguishing semiconductor element and a diode are connected in series. The voltage detection device of the present invention can also be used in a power conversion system using an antiparallel circuit of semiconductor elements for each arm.

1 is a circuit configuration diagram of a voltage detection device showing a first embodiment of the present invention. Operation waveform diagram of the synchronizing signal generating circuit shown in FIG. Waveform diagram explaining the operation of FIG. Waveform diagram explaining the operation of FIG. FIG. 3 is a circuit configuration diagram of a voltage detection device showing a second embodiment of the present invention. Operation waveform diagram of down counter and time adjustment circuit shown in FIG. Waveform diagram explaining the operation of FIG. Waveform diagram explaining the operation of FIG. FIG. 3 is a circuit configuration diagram of a voltage detection device showing a third embodiment of the present invention. Operation waveform diagram of the time adjustment counter shown in FIG. Waveform diagram explaining the operation of FIG. Waveform diagram explaining the operation of FIG. FIG. 5 is a circuit configuration diagram of a voltage detection device showing a fourth embodiment of the present invention. Detailed circuit configuration diagram of the synchronization signal estimating means shown in FIG. Waveform diagram for explaining the operation of FIG. Circuit diagram of a voltage detection device showing a conventional example

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10,10a ... PWM inverter, 11 ... DC power supply, 12 ... Inverter circuit, 13 ... Voltage command value generation means, 14 ... Triangle wave generation means, 15 ... Comparison circuit, 20 ... Voltage detection device, 21 ... Photo coupler circuit, 22 ... Counter Circuit, 30, 30a ... Voltage detection device, 31 ... Voltage dividing circuit, 32 ... Changeover switch, 33 ... Reference voltage generation circuit, 34 ... Changeover switch, 35 ... Subtraction circuit, 36 ... Integration circuit, 37 ... Comparison circuit, 38 ... Level detection means, 39 ... synchronization signal generation circuit, 40 ... sequence control circuit, 41 ... reference voltage input time measurement counter, 42 ... synchronization signal estimation means, 50 ... voltage detection device, 51 ... down counter, 52 ... time adjustment circuit, 53 ... Sequence control circuit, 60 ... Voltage detection device, 61 ... Time adjustment counter, 62 ... Sequence control circuit.

Claims (4)

Self-extinguishing semiconductor elements are connected in series to form upper and lower arms, one end of the upper arm is connected to the anode side of the DC power supply, and one end of the lower arm is connected to the cathode side of the DC power supply and a reference potential By connecting to the zero voltage and turning on and off each of the upper and lower arms at the intersection of the signal wave (voltage command value) based on PWM control and the carrier wave, the desired output voltage is changed from the intermediate connection point of the upper and lower arms. In the power conversion system to obtain
A first changeover switch that selects and outputs either a value based on the output voltage of the intermediate connection point of the upper and lower arms or the zero voltage; and the intermediate connection point when the upper arm is on. A reference voltage generation circuit that generates a reference voltage corresponding to a value based on the output voltage, a second changeover switch that selects and outputs either the reference voltage or the zero voltage, and an output value of the first changeover switch A subtracting circuit for subtracting the output value of the second changeover switch from the output, an integrating circuit for integrating and outputting the output value of the subtracting circuit, and detecting that the integral calculation value has reached the zero voltage. A comparison circuit that outputs the signal, level detection means that detects and outputs that the upper arm is turned on from a change in the output voltage of the intermediate connection point, and a synchronization signal based on the start point for each start point of the carrier wave. A synchronizing signal generating circuit for generating,
In a section T1 from when the synchronization signal is generated to when the level detecting means outputs an output, the first selector switch selects a value based on the intermediate connection point and the second selector switch selects the zero voltage. In the section T2 output by the level detection means and in the section T3 from when the section T2 ends until the next synchronization signal is generated, the first changeover switch sets a value based on the intermediate connection point. In addition, the reference voltage is selected by the second changeover switch, and the zero voltage is selected by the first changeover switch during the period T4 after the next synchronization signal is output and before the comparison circuit operates. And a sequence control circuit for performing sequence control for selecting a reference voltage in the second changeover switch;
A reference voltage input time measurement counter that measures the total elapsed time of the section T2 and the section T4 and outputs a value based on the measured value as an average value of the output voltage from the section T1 to the section T3. A voltage detection device for a power conversion system. Self-extinguishing semiconductor elements are connected in series to form upper and lower arms, one end of the upper arm is connected to the anode side of the DC power supply, and one end of the lower arm is connected to the cathode side of the DC power supply and a reference potential By connecting to the zero voltage and turning on and off each of the upper and lower arms at the intersection of the signal wave (voltage command value) based on PWM control and the carrier wave, the desired output voltage is changed from the intermediate connection point of the upper and lower arms. In the power conversion system to obtain
A first changeover switch that selects and outputs either a value based on the output voltage of the intermediate connection point of the upper and lower arms or the zero voltage; and the intermediate connection point when the upper arm is on. A reference voltage generation circuit that generates a reference voltage corresponding to a value based on the output voltage, a second changeover switch that selects and outputs either the reference voltage or the zero voltage, and an output value of the first changeover switch A subtracting circuit for subtracting the output value of the second changeover switch from the output, an integrating circuit for integrating and outputting the output value of the subtracting circuit, and detecting that the integral calculation value has reached the zero voltage. A comparison circuit that outputs the synchronization signal, a synchronization signal generation circuit that generates a synchronization signal based on the start point for each start point of the carrier wave, a down counter that down-counts one period of the synchronization signal, and a value of the down counter The voltage command value and And time adjusting circuit for outputting at an intersection,
In a period T1 from when the synchronization signal is generated to when the time adjustment circuit outputs an output, the first selector switch selects a value based on the intermediate connection point and the second selector switch selects the zero voltage. Then, after the end of the section T1, until the next synchronization signal is generated, the first changeover switch selects a value based on the intermediate connection point and the second changeover switch sets the reference voltage. In the interval T3 from when the next synchronizing signal is output until the comparison circuit operates, the first changeover switch selects the zero voltage and the second changeover switch selects the reference voltage. A sequence control circuit for performing sequence control to
A reference voltage input time measurement counter that measures an elapsed time from the section T2 to the section T3 and outputs a value based on the measured value as an average value of the output voltages from the section T1 to the section T2. A voltage detection device for a power conversion system. Self-extinguishing semiconductor elements are connected in series to form upper and lower arms, one end of the upper arm is connected to the anode side of the DC power supply, and one end of the lower arm is connected to the cathode side of the DC power supply and a reference potential By connecting to the zero voltage and turning on and off each of the upper and lower arms at the intersection of the signal wave (voltage command value) based on PWM control and the carrier wave, the desired output voltage is changed from the intermediate connection point of the upper and lower arms. In the power conversion system to obtain
A first changeover switch that selects and outputs either a value based on the output voltage of the intermediate connection point of the upper and lower arms or the zero voltage; and the intermediate connection point when the upper arm is on. A reference voltage generation circuit that generates a reference voltage corresponding to a value based on the output voltage, a second changeover switch that selects and outputs either the reference voltage or the zero voltage, and an output value of the first changeover switch A subtracting circuit for subtracting the output value of the second changeover switch from the output, an integrating circuit for integrating and outputting the output value of the subtracting circuit, and detecting that the integral calculation value has reached the zero voltage. A comparison circuit for outputting the signal, level detection means for detecting that the upper arm is turned on from a change in the output voltage at the intermediate connection point, and a synchronization signal based on the start point for each start point of the carrier wave A synchronization signal generating circuit for generating And time adjustment counter output when the time based on the time measured until the output level detection means has elapsed since the period signal is emitted,
In a section T1 from when the synchronization signal is generated until the time adjustment counter outputs, the first selector switch selects a value based on the intermediate connection point, and the second selector switch selects the zero voltage. Then, after the end of the section T1, until the next synchronization signal is generated, the first changeover switch selects a value based on the intermediate connection point and the second changeover switch sets the reference voltage. In the interval T3 from when the next synchronizing signal is output until the comparison circuit operates, the first changeover switch selects the zero voltage and the second changeover switch selects the reference voltage. A sequence control circuit for performing sequence control to
A reference voltage input time measurement counter that measures an elapsed time from the section T2 to the section T3 and outputs a value based on the measured value as an average value of the output voltages from the section T1 to the section T2. A voltage detection device for a power conversion system. In the voltage detection apparatus of the power conversion system according to any one of claims 1 to 3,
A voltage detection device for a power conversion system, comprising: synchronization signal estimation means for estimating and outputting a synchronization signal based on the output of the level detection means instead of the synchronization signal generation circuit.

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