JP4717824B2 - Reaction vessel for manufacturing capacitor element, method for manufacturing capacitor element, capacitor element and capacitor - Google Patents

Reaction vessel for manufacturing capacitor element, method for manufacturing capacitor element, capacitor element and capacitor Download PDF

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JP4717824B2
JP4717824B2 JP2006535188A JP2006535188A JP4717824B2 JP 4717824 B2 JP4717824 B2 JP 4717824B2 JP 2006535188 A JP2006535188 A JP 2006535188A JP 2006535188 A JP2006535188 A JP 2006535188A JP 4717824 B2 JP4717824 B2 JP 4717824B2
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capacitor element
reaction vessel
capacitor
constant current
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一美 内藤
克俊 田村
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Showa Denko KK
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G13/00—Apparatus specially adapted for manufacturing capacitors; Processes specially adapted for manufacturing capacitors not provided for in groups H01G4/00 - H01G11/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
    • H01G9/0029—Processes of manufacture
    • H01G9/0032—Processes of manufacture formation of the dielectric layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
    • H01G9/0029—Processes of manufacture
    • H01G9/0036—Formation of the solid electrolyte layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
    • H01G9/004—Details
    • H01G9/022—Electrolytes; Absorbents
    • H01G9/025—Solid electrolytes
    • H01G9/028—Organic semiconducting electrolytes, e.g. TCNQ
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
    • H01G9/004—Details
    • H01G9/04—Electrodes or formation of dielectric layers thereon
    • H01G9/042—Electrodes or formation of dielectric layers thereon characterised by the material

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
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  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Description

本発明は、安定した容量出現率が達成されるコンデンサ素子の製造方法、そのコンデンサ素子製造用反応容器、および前記製造方法または反応容器を用いて製造されるコンデンサ素子並びにコンデンサに関する。  The present invention relates to a capacitor element manufacturing method that achieves a stable capacity appearance rate, a reaction container for manufacturing the capacitor element, a capacitor element manufactured using the manufacturing method or the reaction container, and a capacitor.

パソコン等に使用されるＣＰＵ（中央演算処理装置）の回路等に使用されるコンデンサは、電圧変動を抑え、高リップル（ｒｉｐｐｌｅ）通過時の発熱を低くするために、高容量かつ低ＥＳＲ（等価直列抵抗）であることが求められている。
一般に、ＣＰＵ回路に使用されるコンデンサとしては、アルミニウム固体電解コンデンサや、タンタル固体電解コンデンサが複数個使用されている。
このような固体電解コンデンサは、表面層に微細の細孔を有するアルミニウム箔や、内部に微小な細孔を有するタンタル粉の焼結体を一方の電極（導電体）とし、その電極の表層に形成した誘電体層とその誘電体層上に設けた他方の電極（通常は、半導体層）とから構成されている。
半導体層を他方の電極とするコンデンサの半導体層の形成方法としては、例えば、特許第１８６８７２２号明細書、特許第１９８５０５６号明細書や特許第２０５４５０６号明細書に記載された通電手法により形成する方法がある。各々、表面に誘電体層を設けた導電体を半導体層形成溶液に漬け、導電体側を陽極にして半導体層形成溶液中に用意した外部電極（陰極）との間に電圧を印加する（電流を流す）ことにより半導体層を形成する方法である。
特開平３−２２５１６号公報には、交流に直流バイアス電流を重ねた電流を誘電体層を設けた導電体に流すことにより半導体層を形成する方法が記載されている。また、特開平３−１６３８１６号公報には、誘電体層上の化学重合層に導体を接触させ、その導体を陽極として電解重合により化学重合層上に半導体層を形成する方法が記載されている。これらの方法では、同時に複数個の導電体に半導体層を形成する場合には問題があった。すなわち特開平３−２２５１６号公報に記載の方法では、陰極側にも半導体層が形成され、通電時間が経過するにつれ半導体層の形成具合が変化するという問題点があり、また、複数個の導電体に均一に電流が流れるという保障がなかった。また、特開平３−１６３８１６号公報に記載の方法では、外部に設けた導体を陽極として通電しているために、各々の導電体の内部に均一な半導体層を形成する保障がなかった。とりわけ内部の細孔が小さく大きな形状の導電体では、大きな問題であった。Capacitors used in CPU (Central Processing Unit) circuits used in personal computers, etc. have high capacity and low ESR (equivalent to reduce voltage fluctuation and heat generation when passing through high ripple). Series resistance).
Generally, a plurality of aluminum solid electrolytic capacitors and tantalum solid electrolytic capacitors are used as capacitors used in the CPU circuit.
In such a solid electrolytic capacitor, an aluminum foil having fine pores in the surface layer or a sintered body of tantalum powder having fine pores inside is used as one electrode (conductor), and the surface layer of the electrode is The dielectric layer is formed and the other electrode (usually a semiconductor layer) provided on the dielectric layer.
As a method for forming a semiconductor layer of a capacitor having the semiconductor layer as the other electrode, for example, a method of forming by a current application method described in Japanese Patent No. 1868722, Japanese Patent No. 1985056 and Japanese Patent No. 2054506 There is. In each case, a conductor provided with a dielectric layer on the surface is dipped in a semiconductor layer forming solution, and a voltage is applied between the external electrode (cathode) prepared in the semiconductor layer forming solution with the conductor side as an anode (current is applied). This is a method of forming a semiconductor layer by flowing.
Japanese Patent Laid-Open No. 3-22516 describes a method of forming a semiconductor layer by flowing a current obtained by superimposing a DC bias current on an alternating current through a conductor provided with a dielectric layer. Japanese Patent Application Laid-Open No. 3-163816 discloses a method in which a conductor is brought into contact with a chemical polymerization layer on a dielectric layer, and a semiconductor layer is formed on the chemical polymerization layer by electrolytic polymerization using the conductor as an anode. . These methods have a problem when a semiconductor layer is formed on a plurality of conductors at the same time. That is, the method described in JP-A-3-22516 has a problem that a semiconductor layer is also formed on the cathode side, and the formation of the semiconductor layer changes as the energization time elapses. There was no guarantee that the current would flow uniformly through the body. Further, in the method described in Japanese Patent Laid-Open No. 3-163816, there is no guarantee that a uniform semiconductor layer is formed inside each conductor because a conductor provided outside is energized as an anode. In particular, in the case of a conductor having a small internal pore and a large shape, it was a big problem.

前述した誘電体層を形成した導電体に、通電手法によって半導体層を形成する場合、工業的なレベルで、例えば１度に百個以上の導電体に半導体層を形成する場合、各導電体は必ずしも均質ではなく、また半導体の形成速度も導電体により異なることがあるため、特に多数個の導電体に同時に半導体層を形成する時には、各導電体に流れる電流値が一定せず、作製したコンデンサの半導体層の形成具合が不揃いで安定した容量のコンデンサを作製することが困難な場合があった。
従って、本発明の課題は、通電手法によって複数個の導電体にコンデンサの半導体層を形成する場合に、半導体層の形成が安定した容量分布の狭いコンデンサを得ることのできるコンデンサ素子製造手段（反応容器及び製造方法）を提供することにある。
本発明者等は、前記課題を解決するために鋭意検討した結果、定電流を導電体に供給して半導体層を形成することにより、容量分布の狭いコンデンサ群が得られることを見出し、本発明を完成するに至った。
すなわち、本発明は、以下のコンデンサ素子製造用反応容器、コンデンサ素子の製造方法及びコンデンサ素子、コンデンサを提供するものである。
１．表面に誘電体層を形成した複数個の導電体を同時に反応容器中の電解液に浸漬して通電手法により半導体層を形成するための反応容器であって、反応容器中に個々の導電体に対応する複数の陰極が設けられ、個々の陰極に電気的に接続されている複数の定電流源を有することを特徴とするコンデンサ素子製造用反応容器。
２．複数の定電流源が、複数の定電流ダイオードで構成され、その各カソードどうしが電気的に接続され、各アノードが陰極に接続されている前記１に記載のコンデンサ素子製造用反応容器。
３．反応容器の底部内側に配置された個々の陰極と反応容器の外側に配置された各定電流ダイオードのアノードが接続され、各定電流ダイオードのカソード同士が電気的に接続されて端子に集電される前記１または２に記載のコンデンサ素子製造用反応容器。
４．絶縁性基板の一方の面（表面）に設けられた個々の陰極と絶縁性基板の他方の面（裏面）に配置された各定電流ダイオードがスルーホールを通して電気的に接続され、スルーホールが封口された絶縁性基板を反応容器の底部とする前記１乃至３のいずれかに記載のコンデンサ素子製造用反応容器。
５．陰極板が膜状金属材料である前記４に記載のコンデンサ素子製造用反応容器。
６．前記１乃至５のいずれかに記載のコンデンサ素子製造用反応容器を用いることを特徴とするコンデンサ素子の製造方法。
７．前記１乃至５のいずれかに記載のコンデンサ素子製造用反応容器に電解液を満たし、誘電体層を有する複数個の導電体を前記電解液に漬け、該導電体側を陽極に、反応容器中に設けた個々の陰極を陰極にして通電手法により誘電体層上に半導体層を形成することを特徴とするコンデンサ素子の製造方法。
８．前記６または７に記載の製造方法により作製されたコンデンサ素子群。
９．出現容量分布が、平均容量±２０％の範囲内にある前記８に記載のコンデンサ素子群を用いたコンデンサ。When a semiconductor layer is formed on the conductor formed with the above-described dielectric layer by an energization technique, on an industrial level, for example, when a semiconductor layer is formed on 100 or more conductors at a time, each conductor is Since the semiconductor formation speed may vary depending on the conductor, the current flowing through each conductor is not constant, especially when a semiconductor layer is formed on a large number of conductors at the same time. In some cases, it was difficult to fabricate a capacitor having a stable capacity due to uneven formation of semiconductor layers.
Accordingly, an object of the present invention is to provide a capacitor element manufacturing means (reaction) capable of obtaining a capacitor having a narrow capacitance distribution in which the formation of the semiconductor layer is stable when the semiconductor layer of the capacitor is formed on a plurality of conductors by an energization method. Container and manufacturing method).
As a result of intensive studies to solve the above problems, the present inventors have found that a capacitor group with a narrow capacitance distribution can be obtained by forming a semiconductor layer by supplying a constant current to a conductor. It came to complete.
That is, the present invention provides the following reaction vessel for producing a capacitor element, a method for producing a capacitor element, a capacitor element, and a capacitor.
1. A reaction vessel for forming a semiconductor layer by an energization method by simultaneously immersing a plurality of conductors having a dielectric layer formed on the surface thereof in an electrolytic solution in a reaction vessel, wherein each conductor is formed in the reaction vessel. A reaction vessel for manufacturing a capacitor element, comprising a plurality of constant current sources provided with a plurality of corresponding cathodes and electrically connected to the individual cathodes.
2. 2. The reaction container for manufacturing a capacitor element according to 1 above, wherein the plurality of constant current sources are composed of a plurality of constant current diodes, each cathode is electrically connected, and each anode is connected to the cathode.
3. The individual cathodes arranged inside the bottom of the reaction vessel and the anodes of the constant current diodes arranged outside the reaction vessel are connected, and the cathodes of the constant current diodes are electrically connected to each other and collected at the terminals. 3. The reaction container for producing a capacitor element according to 1 or 2 above.
4). Individual cathodes provided on one surface (front surface) of the insulating substrate and each constant current diode arranged on the other surface (back surface) of the insulating substrate are electrically connected through the through hole, and the through hole is sealed. 4. The reaction container for manufacturing a capacitor element according to any one of 1 to 3, wherein the insulating substrate thus formed is the bottom of the reaction container.
5. 5. The reaction container for producing a capacitor element as described in 4 above, wherein the cathode plate is a film metal material.
6). 6. A method for producing a capacitor element, comprising using the reaction container for producing a capacitor element according to any one of 1 to 5 above.
7). Filling the electrolytic solution into the capacitor element manufacturing reaction vessel according to any one of 1 to 5 above, immersing a plurality of conductors having a dielectric layer in the electrolytic solution, the conductor side as an anode, and into the reaction vessel A method of manufacturing a capacitor element, wherein a semiconductor layer is formed on a dielectric layer by a current application method using each provided cathode as a cathode.
8). 8. A capacitor element group produced by the production method described in 6 or 7 above.
9. The capacitor | condenser using the capacitor | condenser element group of said 8 whose appearance capacity distribution exists in the range of average capacity | capacitance +/- 20%.

本発明で使用される導電体の例として、金属、無機半導体、有機半導体、カーボン、これらの少なくとも１種の混合物、それらの表層に導電体を積層した積層体が挙げられる。
無機半導体の例として、二酸化鉛、二酸化モリブデン、二酸化タングステン、一酸化ニオブ、二酸化スズ、一酸化ジルコニウム等の金属酸化物が挙げられ、有機半導体として、ポリピロール、ポリチオフェン、ポリアニリンおよびこれら高分子骨格を有する置換体、共重合体等の導電性高分子、テトラシアノキノジメタン（ＴＣＮＱ）とテトラチオテトラセンとの錯体、ＴＣＮＱ塩等の低分子錯体が挙げられる。また、表層に導電体を積層した積層体の例としては、紙、絶縁性高分子、ガラス等に前記導電体を積層した積層体が挙げられる。
導電体として、金属を使用する場合、金属の一部を炭化、燐化、ホウ素化、窒化、硫化から選ばれる少なくとも１種の処理を行ってから使用してもよい。
導電体の形状は特に限定されず、箔状、板状、棒状、導電体自身を粉状にして成形または成形後焼結した形状等として用いてもよい。導電体表面を、エッチング等で処理して、微細な細孔を有するようにしておいてもよい。導電体を粉状にして成形体形状または成形後焼結した形状とする場合には、成形時の圧力を適当に選択することにより、成形または焼結後の内部に微小な細孔を設けることができる。
導電体には引き出しリードを直接接続することが可能であるが、導電体を粉状にして成形体形状または成形後焼結した形状とする場合は、成形時に別途用意した引き出しリード線（またはリード箔）の一部を導電体と共に成形し、引き出しリード線（またはリード箔）の成形外部の箇所を、コンデンサの一方の電極の引き出しリードとすることもできる。
また、導電体の一部に後記する半導体層を形成せずに残しておき陽極部とすることもできる。陽極部と半導体層形成部の境界に半導体層の這い上がりを防ぐために絶縁性樹脂を鉢巻状に付着硬化させておいてもよい。
本発明の導電体の好ましい例として、タンタル粉、ニオブ粉、タンタルを主成分とする合金粉、ニオブを主成分とする合金粉、一酸化ニオブ粉等の粉を成形後焼結した内部に微細な空孔が多数存在する焼結体及び表面がエッチング処理されたアルミニウム箔を挙げることができる。
本発明の導電体表面に形成される誘電体層として、Ｔａ２Ｏ５、Ａｌ２Ｏ３、ＴｉＯ２、Ｎｂ２Ｏ５等の金属酸化物から選ばれる少なくとも１つを主成分とする誘電体層、セラミックコンデンサやフィルムコンデンサの分野で従来公知の誘電体層が挙げられる。前者の金属酸化物から選ばれる少なくとも１つを主成分とする誘電体層の場合、金属酸化物の金属元素を有する前記導電体を化成することによって誘電体層を形成すると得られるコンデンサは、極性をもつ電解コンデンサとなる。セラミックコンデンサやフィルムコンデンサで従来公知の誘電体層として、本出願人による、特開昭６３−２９９１９号公報、特開昭６３−３４９１７号公報に記載した誘電体層を挙げることができる。また金属酸化物から選ばれる少なくとも１つを主成分とする誘電体層やセラミックコンデンサやフィルムコンデンサで従来公知の誘電体層を複数積層して使用してもよい。また金属酸化物から選ばれる少なくとも１つを主成分とする誘電体やセラミックコンデンサやフィルムコンデンサで従来公知の誘電体を混合した誘電体層でもよい。
化成によって誘電体層を形成するための具体的な例について説明する。
複数個の導電体を等間隔に接続した長尺金属板を複数枚並列に方向を揃えて金属フレームに配置し、別途用意した化成槽に陽極部またはリード線（リード箔）の一部と導電体を化成液に漬け、金属フレーム側を陽極に、化成槽中の陰極板との間に電圧を所定時間印加し、引き上げ洗浄・乾燥することによって導電体表層に誘電体層が形成される。
一方、本発明のコンデンサの他方の電極としては、有機半導体および無機半導体から選ばれる少なくとも１種の化合物が挙げられるが、ここで前記の化合物を後述する通電手法により形成することが肝要である。
有機半導体の具体例としては、ベンゾピロリン４量体とクロラニルからなる有機半導体、テトラチオテトラセンを主成分とする有機半導体、テトラシアノキノジメタンを主成分とする有機半導体、下記式（１）または（２）で示される繰り返し単位を含む高分子にドーパントをドープした導電性高分子を主成分とした有機半導体が挙げられる。

Figure 0004717824
式（１）および（２）において，Ｒ１〜Ｒ４は、各々独立して水素原子、炭素数１〜６のアルキル基または炭素数１〜６のアルコキシ基を表し、Ｘは酸素、イオウまたは窒素原子を表し、Ｒ５はＸが窒素原子のときのみ存在して水素原子または炭素数１〜６のアルキル基を表し、Ｒ１とＲ２及びＲ３とＲ４は、互いに結合して環状になっていてもよい。
さらに、本発明においては、前記式（１）で示される繰り返し単位を含む高分子として、好ましくは下記式（３）で示される構造単位を繰り返し単位として含む高分子が挙げられる。
Figure 0004717824
式中、Ｒ６及びＲ７は、各々独立して水素原子、炭素数１〜６の直鎖状もしくは分岐状の飽和もしくは不飽和のアルキル基、またはそのアルキル基が互いに任意の位置で結合して、２つの酸素原子を含む少なくとも１つ以上の５〜７員環の飽和炭化水素の環状構造を形成する置換基を表わす。また、前記環状構造には置換されていてもよいビニレン結合を有するもの、置換されていてもよいフェニレン構造のものも含まれる。
このような化学構造を含む導電性高分子は、荷電されており、ドーパントがドープされる。ドーパントは特に限定されず公知のドーパントを使用できる。
ドーパントの好ましい例として、スルホン酸基を有する化合物を挙げることができる。そのような化合物として、ベンゼンスルホン酸、トルエンスルホン酸、ナフタレンスルホン酸、アントラセンスルホン酸、ベンゾキノンスルホン酸、ナフトキノンスルホン酸及びアントラキノンスルホン酸等のアリール基を有するスルホン酸、ブチルスルホン酸、ヘキシルスルホン酸及びシクロヘキシルスルホン酸等のアルキル基を有するスルホン酸、ポリビニルスルホン酸等の各種高分子（重合度２〜２００）スルホン酸、これらスルホン酸の塩（アンモニウム塩、アルカリ金属塩、アルカリ土類金属塩等）を代表例として挙げることができる。これら化合物は、各種置換基を有していてもよいし、スルホン酸基が複数個存在してもよい。また、ドーパントは、複数を同時に使用してもよい。
式（１）乃至（３）で示される繰り返し単位を含む高分子としては、例えば、ポリアニリン、ポリオキシフェニレン、ポリフェニレンサルファイド、ポリチオフェン、ポリフラン、ポリピロール、ポリメチルピロール、およびこれらの置換誘導体や共重合体などが挙げられる。中でもポリピロール、ポリチオフェン及びこれらの置換誘導体（例えば、ポリ（３，４−エチレンジオキシチオフェン）等）が好ましい。
無機半導体の具体例としては、二酸化モリブデン、二酸化タングステン、二酸化鉛、二酸化マンガン等から選ばれる少なくとも１種の化合物が挙げられる。
上記有機半導体および無機半導体として、電導度１０−２〜１０３Ｓ／ｃｍの範囲のものを使用すると、作製したコンデンサのＥＳＲ値が小さくなり好ましい。
前述した半導体層は、純粋な化学反応（溶液反応、気相反応、固液反応およびそれらの組み合わせ）により形成したり、通電手法によって形成したり、あるいはこれらの方法を組み合わせて形成するが、本発明では、半導体層形成工程で少なくとも１回は通電手法を採用する。また、通電手法により半導体層を形成する場合に、少なくとも１回の通電を、通電時に定電流電源（定電流源）により行うことで本発明の目的が達成される。
定電流源としては、前述した表面に誘電体層を有する導電体に定電流で通電できる定電流回路が達成できればよい。例えば、回路が単純で、部品点数が少なくできる定電流ダイオードで構成することが好ましい。定電流ダイオードは、定電流ダイオードとして市販されているものだけでなく、電界効果トランジスタで構成してもよい。それ以外の定電流源としてトランジスタを使用したもの、ＩＣを使用したもの、三端子レギュレーター等を使用したものを挙げることができる。
以下、定電流源として定電流ダイオードを用いた例について説明するが、定電流源はこの例に限定されるものではない。
本発明に係る同時に複数のコンデンサ素子を製造するための反応容器は、反応容器内側の個々の部屋の底部に陰極板が設けられていて、個々の陰極板と各定電流ダイオードのアノードが接続され、さらに各定電流ダイオードのカソード同士が電気的に接続されて端子に集電された構成からなる。化成について前述した誘電体層が形成された複数個の導電体を整列した金属フレームを半導体層形成用電解液が満たされた本発明のコンデンサ素子製造用反応容器の上部に配置し、金属フレームに繋がった複数の導電体をその反応容器内の個々の部屋に設置し、金属フレームと前記定電流ダイオード群の集電端子とに電圧を印加すると、定電流ダイオードのランク（電流規格）に応じた一定の電流が流れる（特定の電流範囲となるように定電流ダイオードを選択してもよい）。この電流により導電体の誘電体層上に半導体層が形成される。定電流ダイオードは、順方向（定電流ダイオードの方向）でアノードからカソードへの方向に規定範囲の電圧を印加すると所定の定電流が流れるが、電流値は、定電流ダイオードのランクを選択するか定電流ダイオードを複数個適当なランクのものを並列または直列と並列の併用使用することにより段階的に変更可能であるので、導電体の大きさや形成する半導体量の所望の値に合わせて定電流ダイオードを選択して任意範囲の定電流を流すことができる。
各定電流ダイオードは、反応容器の個々の部屋の外側に配置しておくと反応容器の底部内側に配置した陰極板との交錯がなく反応容器を小形化することができため好ましい。この場合、反応容器内外にある陰極板と定電流ダイオードとの接続配線による反応容器の穴を樹脂等で塞ぐ（封口する）ことができる。
以下添付図面を参照して本発明の具体的態様について説明する。
図１に、コンデンサ素子製造用反応容器（１）の１例の模式図を示し、図２に本発明の反応容器の陰極板と定電流ダイオードの好ましい配置例の平面図（表面図）を示し、図３に同じく裏面図を示す。
絶縁性基板の片面に印刷技術によって形成された膜状金属材料を陰極板（図示の例では円形）とし、絶縁性基板のスルーホールを通して裏面に印刷配線された所定箇所に定電流ダイオード（３）を配設した後スルーホール部をエポキシ樹脂等の絶縁性樹脂で塞いだ構成のものを挙げることができる。スルホール構造はスルホール内部に印刷配線が施されているために表裏の電気的な接続が容易にできるため好ましい。このようにして複数個の陰極板（２）と各定電流ダイオード（３）が配設された絶縁性基板を反応容器の底部とし、絶縁性基板を囲むように絶縁性樹脂で枠を形成加工した反応容器（１）を使用することができる。また、絶縁性基板の所定箇所に基板と垂直になるように所定高さの枠（６）を設け、反応容器内に各陰極板が入る部屋を複数個作製し、各部屋に半導体層形成用の電解液が満たされる構造とすることもできる。この様な反応容器の個々の部屋に前述した誘電体層が形成された個々の導電体が漬かるように設計することが各導電体に確実に所望の電流を供給できるために好ましい。所定高さの枠の一部または全部に各部屋の底面にある陰極板とのみ電気的に接続された陰極板を予め作製しておいてもよい。
本発明の反応容器の大きさは、一度に作製する導電体の体積と個数、陰極板の大きさに合せて適宜決めることができる。反応容器に温調水を循環可能な外枠を設けておいてもよい。
反応容器の底面に設ける個々の陰極板は、互いに電気的に絶縁され、各陰極板に各１個の導電体（５）の下面が対面するよう設計される。このため陰極板（２）の大きさを使用する導電体の下面より大きくしておくことが望ましい。但し、大きすぎると反応容器の大きさも大きくなり、使用する半導体層形成用の電解液の量が多くなるためコスト的に不利である。この様な理由から、陰極板の大きさは、予備実験によって導電体に充分な半導体層を形成するための電流を通電することができる最小の大きさに決められる。例えば、導電体の下面が直方形の場合、陰極板の大きさは、その直方形面積の１．０１〜３倍程度、好ましくは１．０１〜１．５倍程度がよい。
陰極板の材質としては、半導体層形成用の電解液に非腐食性の導体が使用できる。例えば、鉄合金、銅合金、タンタル，白金等が用いられる。陰極板表面に、電解液非腐食性の導体、例えばニッケルや、金、銀、半田等少なくとも１層がメッキされていてもよい。このようなメッキ層を表面に積層した場合には、腐食性の導体、例えば銅、アルミニウムも使用可能である。
陰極板は、１部屋に複数枚設けることも可能である。この場合は、例えば２つの陰極板が１部屋にあり、２つともその裏面に在る１個の定電流源に接続させることが必要であり、定電流源を２個使うことはない。好ましくは１部屋に入り得る大きさの陰極板を１枚設けるのがよい。
本発明のコンデンサ素子製造用反応容器は、電流吸込み型の定電流源に前記個々の陰極板が電気的に接続されたものである。定電流源を定電流ダイオードを用いて構成する場合は、例えば、複数個の定電流ダイオードの各カソードが電気的に接続されていて、各定電流ダイオードのアノードに前記陰極板が電気的に直列に接続された構成のものが挙げられる。
図１に示すコンデンサ素子製造用反応容器例に基づいてさらに詳しく説明する。反応容器（１）の底部に複数の陰極板（２）が各部屋に独立して存在し、各陰極板に直列に反応容器の底部外側にある定電流ダイオード（３）のアノードが接続されている。各部屋には、部屋の高さを越えないように半導体層形成用の電解液（図示せず）がほぼ等しい高さで満たされる。
図３は、反応容器の底部を外側（裏面）から見た模式図である。定電流ダイオード（３）が複数個並列に等間隔で配置されていて、各定電流ダイオードのカソード側が電気的に接続されて図中左上の集電端子（４）に接続されている。図２は、反応容器を上（表面）から見た模式図である。陰極板（２）が複数個等間隔に配置されている。個々の陰極板は、互いに絶縁され、図３の各定電流ダイオードのアノードに反応容器底部に陰極板と同数設けられたスルーホール（図示せず）を通して接続される。各スルーホールは、絶縁性樹脂やセラミックスで封口されていて反応容器中の電解液が染み出すことは無い。反応容器の上部には、表面に誘電体層を形成した導電体（５）が等間隔で接続された金属板が複数枚、等間隔で配置されて一体化した金属フレームが配設される。各導電体は、反応容器に設けられた各部屋に所定量入れられた電解液中に１個ずつ漬けられる。
次に、上記のコンデンサ素子製造用反応容器を用いて通電手法により半導体層を形成する方法について説明する。
反応容器の各部屋に、部屋の高さを越えないように半導体層形成用の電解液をほぼ等しい高さで満たした後に、金属フレーム（７）に等間隔で配置され表面に誘電体層を形成した導電体を各部屋に１個ずつ漬け、金属フレームを陽極に、反応容器底部外側に配置した集電端子を陰極にして通電手法により半導体層を形成する。
通電により半導体となる原料や、場合によっては前述したドーパント（例えば、アリールスルホン酸または塩、アルキルスルホン酸または塩、各種高分子スルホン酸または塩等の公知のドーパント）が溶解している半導体層形成溶液に通電することにより誘電体層上に半導体層が形成される。通電時間、半導体層形成用液の濃度、ｐＨ、温度、通電電流値、通電電圧値は、使用する導電体の種類、大きさ、質量、所望する半導体層の形成厚み等によって変わるため、予め実験によって条件を決定しておく。通電条件を変えて複数回通電を行うことも可能である。また、導電体の表面に形成されている誘電体層の欠陥を修復するために、途中の任意の時（１回でも複数回でも可）および／または最後に従来公知の再化成操作を行ってもよい。
また、導電体層の表面に形成された誘電体層に電気的な微小欠陥部を作製した後に本発明の方法によって半導体層を形成してもよい。
本発明のコンデンサでは、前述した方法等で形成された半導体層の上にコンデンサの外部引き出しリード（例えば、リードフレーム）との電気的接触をよくするために、電極層を設けてもよい。
電極層は、例えば、導電ペーストの固化、メッキ、金属蒸着、耐熱性の導電樹脂フィルムの付着等により形成することができる。導電ペーストとしては、銀ペースト、銅ペースト、アルミニウムペースト、カーボンペースト、ニッケルペースト等が好ましい。これらは１種を用いても２種以上を用いてもよい。２種以上を用いる場合、混合してもよく、または別々の層として積層してもよい。導電ペーストを適用した後、空気中に放置するか、または加熱して固化せしめる。導電ペーストの固化後の厚みは、１層あたり通常、約０．１〜約２００μｍになる。
導電ペーストは、樹脂と金属等の導電粉を主成分とし、場合によっては樹脂を溶解するための溶媒や樹脂の硬化剤等を含有してもよい。溶媒はペースト固化時に飛散する。
導電ペースト中の樹脂としては、アルキッド樹脂、アクリル樹脂、エポキシ樹脂、フェノール樹脂、イミド樹脂、フッ素樹脂、エステル樹脂、イミドアミド樹脂、アミド樹脂、スチレン樹脂、ウレタン樹脂等の公知の各種樹脂が使用される。導電粉としては、銀、銅、アルミニウム、金、カーボン、ニッケルおよびこれら金属を主成分とする合金の粉、これら金属が表層にあるコート粉やこれらの混合物粉の少なくとも１種が使用される。
導電粉は、通常４０〜９７質量％含まれている。４０質量％未満であると作製した導電ペーストの導電性が小さく、また９７質量％を超えると、導電ペーストの接着性が小さくなる。導電ペーストに前述した半導体層を形成する導電性高分子や金属酸化物の粉を混合して使用してもよい。
メッキとしては、ニッケルメッキ、銅メッキ、銀メッキ、金メッキ、アルミニウムメッキ等が挙げられる。また蒸着金属としては、アルミニウム、ニッケル、銅、金、銀等が挙げられる。
具体的には、例えば半導体層が形成された導電体の上にカーボンペースト、銀ペーストを順次積層しエポキシ樹脂のような材料で封止してコンデンサが構成される。このコンデンサは、導電体に前もって接続された、または後で接続された金属線や金属箔からなるリードを有していてもよい。
以上のような構成の本発明のコンデンサは、例えば、樹脂モールド、樹脂ケース、金属性の外装ケース、樹脂のディッピング、ラミネートフィルムによる外装などの外装により各種用途のコンデンサ製品とすることができる。
これらの中でも、とりわけ樹脂モールド外装を行ったチップ状コンデンサが、小型化と低コスト化が行えるので好ましい。
樹脂モールド外装の場合について具体的に説明すると、本発明のコンデンサは、前記コンデンサ素子の導電体層の一部を、別途用意した一対の対向して配置された先端部を有するリードフレームの一方の先端部に載置し、さらに陽極リードの一部（寸法を合わせるために陽極リードの先端を切断して使用してもよい）を前記リードフレームの他方の先端部に載置し、例えば前者は、導電ペーストの固化で、後者は、溶接で各々電気的・機械的に接合した後、前記リードフレームの先端部の一部を残して樹脂封口し、樹脂封口外の所定部でリードフレームを切断折り曲げ加工（リードフレームが樹脂封口の下面にあってリードフレームの下面または下面と側面のみを残して封口されている場合は、切断加工のみでもよい）して作製される。
前記リードフレームは、前述したように切断加工されて最終的にはコンデンサの外部端子となるが、形状は、箔または平板状であり、材質は鉄、銅、アルミニウムまたはこれら金属を主成分とする合金が使用される。該リードフレームの一部または全部に半田、錫、チタン、金、ニッケル等のメッキが施されていてもよい。リードフレームとメッキとの間に、ニッケルまたは銅等の下地メッキがあってもよい。
前記切断折り曲げ加工後または加工前にリードフレームにこれらの各種メッキを行うこともできる。また、コンデンサ素子を載置接続する前にメッキを行っておいてからさらに封口後の任意の時に再メッキを行うことも可能である。
該リードフレームには、一対の対向して配置された先端部が存在し、先端部間に隙間があることで、各コンデンサ素子の陽極部と陰極部とが絶縁される。
樹脂モールド外装に使用される樹脂の種類として、エポキシ樹脂、フェノール樹脂、アルキッド樹脂等固体電解コンデンサの封止に使用される公知の樹脂が採用できるが、各樹脂とも好ましくは低応力樹脂を使用すると、封止時におきるコンデンサ素子への封止応力の発生を緩和することができるために好ましい。また、樹脂封口するための製造機としては、好ましくはトランスファーマシンが使用される。
このように作製されたコンデンサは、電極層形成時や外装時の熱的および／または物理的な誘電体層の劣化を修復するために、エージング処理を行ってもよい。
エージング方法は、コンデンサに所定の電圧（通常、定格電圧の２倍以内）を印加することによって行われる。エージング時間や温度は、コンデンサの種類、容量、定格電圧によって最適値が異なるので予め実験によって決定されるが、通常、時間は、数分から数日、温度は電圧印加冶具の熱劣化を考慮して３００℃以下で行われる。エージングの雰囲気は、減圧、常圧、加圧下のいずれの条件で行ってもよい。さらに、エージングの雰囲気は、空気中、アルゴン、窒素、ヘリウム等のガス中でもよいが、好ましくは水蒸気中である。エージングは、水蒸気を含む雰囲気中で行い、次に空気中、アルゴン、窒素、ヘリウム等のガス中で行うと誘電体層の安定化が進む場合がある。水蒸気を供給した後に常圧室温に戻し、あるいは、水蒸気を供給した後に１５０〜２５０℃の高温に数分〜数時間放置し余分な水分を除去し前記エージングを行うことも可能である。水蒸気の供給方法の１例として、エージングの炉中に置いた水溜めから熱により水蒸気を供給する方法が挙げられる。
電圧印加方法として、直流、任意の波形を有する交流、直流に重畳した交流やパルス電流等の任意の電流を流すように設計することができる。エージングの途中に一旦電圧印加を止め、再度電圧印加を行うことも可能である。
本発明によって製造されるコンデンサは、半導体層形成を安定した同一条件で行えるため容量が安定している。このためコンデンサ群（同時に作製される多数個のコンデンサ）の容量分布（ばらつき）は、従来品に比較して狭いものとなる。そのため、特定の容量範囲のコンデンサを取得しようとする場合、容量による選別が不要、または選別が必要であったとしても歩留まりが向上する。
また本発明で製造されたコンデンサ群は、パソコン、サーバー、カメラ、ゲーム機、ＤＶＤ、ＡＶ機器、携帯電話等のデジタル機器や、各種電源等の電子機器に利用可能である。Examples of the conductor used in the present invention include a metal, an inorganic semiconductor, an organic semiconductor, carbon, a mixture of at least one of these, and a laminate in which a conductor is stacked on the surface layer thereof.
Examples of inorganic semiconductors include metal oxides such as lead dioxide, molybdenum dioxide, tungsten dioxide, niobium monoxide, tin dioxide, and zirconium monoxide, and organic semiconductors include polypyrrole, polythiophene, polyaniline, and their polymer skeletons. Examples thereof include conductive polymers such as substitution products and copolymers, complexes of tetracyanoquinodimethane (TCNQ) and tetrathiotetracene, and low-molecular complexes such as TCNQ salts. Moreover, as an example of the laminated body which laminated | stacked the conductor on the surface layer, the laminated body which laminated | stacked the said conductor on paper, insulating polymer, glass, etc. is mentioned.
When a metal is used as the conductor, a part of the metal may be used after being subjected to at least one treatment selected from carbonization, phosphation, boronation, nitridation, and sulfidation.
The shape of the conductor is not particularly limited, and may be used as a foil shape, a plate shape, a rod shape, a shape in which the conductor itself is powdered, molded, or sintered after molding. The conductor surface may be processed by etching or the like to have fine pores. When the conductor is powdered to form a molded body or a sintered shape after molding, fine pores should be provided in the interior after molding or sintering by appropriately selecting the pressure during molding. Can do.
The lead can be directly connected to the conductor. However, if the conductor is powdered and formed into a molded body shape or a shape that is sintered after molding, the lead wire (or lead) prepared separately at the time of molding is used. It is also possible to form a part of the foil) together with the conductor, and to place the lead-out lead wire (or lead foil) outside the molding as a lead-out lead for one electrode of the capacitor.
Alternatively, a semiconductor layer which will be described later may be left without forming a part of the conductor to form an anode part. In order to prevent the semiconductor layer from creeping up at the boundary between the anode portion and the semiconductor layer forming portion, an insulating resin may be adhered and cured in a headband shape.
Preferred examples of the conductor of the present invention include tantalum powder, niobium powder, alloy powder mainly composed of tantalum, alloy powder mainly composed of niobium, niobium monoxide powder, etc. And a sintered body having a large number of pores and an aluminum foil whose surface is subjected to etching treatment.
As a dielectric layer formed on the conductor surface of the present invention, a dielectric mainly comprising at least one selected from metal oxides such as Ta 2 O 5 , Al 2 O 3 , TiO 2 , and Nb 2 O 5 Conventionally known dielectric layers in the field of layers, ceramic capacitors and film capacitors can be mentioned. In the case of a dielectric layer mainly composed of at least one selected from the former metal oxides, a capacitor obtained by forming the dielectric layer by forming the conductor having the metal element of the metal oxide has a polarity. Electrolytic capacitor with Examples of conventionally known dielectric layers for ceramic capacitors and film capacitors include dielectric layers described in Japanese Patent Application Laid-Open Nos. 63-29919 and 63-34917 by the present applicant. A plurality of conventionally known dielectric layers may be laminated and used with a dielectric layer mainly composed of at least one selected from metal oxides, ceramic capacitors, and film capacitors. Alternatively, a dielectric layer containing at least one selected from metal oxides as a main component, or a dielectric layer obtained by mixing a conventionally known dielectric with a ceramic capacitor or a film capacitor may be used.
A specific example for forming a dielectric layer by chemical conversion will be described.
A plurality of long metal plates with a plurality of conductors connected at equal intervals are arranged on a metal frame with the direction aligned in parallel, and conductive with the anode part or part of the lead wire (lead foil) in a separately prepared chemical bath The body is immersed in a chemical conversion solution, a voltage is applied for a predetermined time between the metal frame side as the anode and the cathode plate in the conversion tank, and the dielectric layer is formed on the surface of the conductor by lifting, washing and drying.
On the other hand, the other electrode of the capacitor of the present invention includes at least one compound selected from an organic semiconductor and an inorganic semiconductor, but it is important to form the compound by an energization method described later.
Specific examples of the organic semiconductor include an organic semiconductor composed of benzopyrroline tetramer and chloranil, an organic semiconductor mainly composed of tetrathiotetracene, an organic semiconductor mainly composed of tetracyanoquinodimethane, the following formula (1) or Examples thereof include an organic semiconductor mainly composed of a conductive polymer obtained by doping a polymer containing the repeating unit represented by (2) with a dopant.
Figure 0004717824
In the formulas (1) and (2), R 1 to R 4 each independently represent a hydrogen atom, an alkyl group having 1 to 6 carbon atoms or an alkoxy group having 1 to 6 carbon atoms, and X is oxygen, sulfur or Represents a nitrogen atom, R 5 is present only when X is a nitrogen atom and represents a hydrogen atom or an alkyl group having 1 to 6 carbon atoms; R 1 and R 2, and R 3 and R 4 are bonded to each other to form a ring It may be.
Furthermore, in the present invention, the polymer containing a repeating unit represented by the formula (1) is preferably a polymer containing a structural unit represented by the following formula (3) as a repeating unit.
Figure 0004717824
In the formula, R 6 and R 7 are each independently a hydrogen atom, a linear or branched saturated or unsaturated alkyl group having 1 to 6 carbon atoms, or the alkyl group is bonded to each other at an arbitrary position. And a substituent that forms a cyclic structure of at least one 5- to 7-membered saturated hydrocarbon containing two oxygen atoms. The cyclic structure includes those having a vinylene bond which may be substituted and those having a phenylene structure which may be substituted.
A conductive polymer containing such a chemical structure is charged and doped with a dopant. A dopant is not specifically limited, A well-known dopant can be used.
Preferable examples of the dopant include compounds having a sulfonic acid group. Examples of such compounds include benzene sulfonic acid, toluene sulfonic acid, naphthalene sulfonic acid, anthracene sulfonic acid, benzoquinone sulfonic acid, naphthoquinone sulfonic acid and anthraquinone sulfonic acid having an aryl group such as butyl sulfonic acid, hexyl sulfonic acid and Various polymers (polymerization degree 2 to 200) sulfonic acid such as sulfonic acid having alkyl group such as cyclohexyl sulfonic acid, polyvinyl sulfonic acid, salts of these sulfonic acids (ammonium salt, alkali metal salt, alkaline earth metal salt, etc.) Can be cited as a representative example. These compounds may have various substituents, and a plurality of sulfonic acid groups may exist. A plurality of dopants may be used simultaneously.
Examples of the polymer containing the repeating units represented by the formulas (1) to (3) include polyaniline, polyoxyphenylene, polyphenylene sulfide, polythiophene, polyfuran, polypyrrole, polymethylpyrrole, and substituted derivatives and copolymers thereof. Etc. Of these, polypyrrole, polythiophene, and substituted derivatives thereof (for example, poly (3,4-ethylenedioxythiophene)) are preferable.
Specific examples of the inorganic semiconductor include at least one compound selected from molybdenum dioxide, tungsten dioxide, lead dioxide, manganese dioxide and the like.
When the organic semiconductor and the inorganic semiconductor have a conductivity in the range of 10 −2 to 10 3 S / cm, the ESR value of the manufactured capacitor is preferably reduced.
The semiconductor layer described above is formed by a pure chemical reaction (solution reaction, gas phase reaction, solid-liquid reaction, and combinations thereof), formed by an energization method, or a combination of these methods. In the invention, the energization method is adopted at least once in the semiconductor layer forming step. Further, when the semiconductor layer is formed by the energization method, the object of the present invention is achieved by performing energization at least once by a constant current power source (constant current source) during energization.
As the constant current source, it is only necessary to achieve a constant current circuit capable of energizing the conductor having the dielectric layer on the surface with a constant current. For example, it is preferable to use a constant current diode with a simple circuit and a reduced number of parts. The constant current diode may be composed of a field effect transistor as well as a commercially available constant current diode. As other constant current sources, those using a transistor, those using an IC, and those using a three-terminal regulator can be cited.
Hereinafter, an example using a constant current diode as a constant current source will be described, but the constant current source is not limited to this example.
The reaction vessel for simultaneously producing a plurality of capacitor elements according to the present invention is provided with a cathode plate at the bottom of each chamber inside the reaction vessel, and each cathode plate is connected to the anode of each constant current diode. Furthermore, the cathodes of the constant current diodes are electrically connected to each other and collected at the terminals. A metal frame in which a plurality of conductors on which the dielectric layer is formed as described above is formed is arranged on the upper part of the reaction container for manufacturing the capacitor element of the present invention filled with the electrolyte for forming the semiconductor layer. When a plurality of connected conductors are installed in individual rooms within the reaction vessel and a voltage is applied to the metal frame and the current collecting terminal of the constant current diode group, the constant current diode rank (current standard) is met. A constant current flows (a constant current diode may be selected to be in a specific current range). This current forms a semiconductor layer on the dielectric layer of the conductor. A constant current diode flows a predetermined constant current when a voltage in a specified range is applied in the forward direction (in the direction of the constant current diode) from the anode to the cathode. Does the current value select the rank of the constant current diode? It can be changed in stages by using a plurality of constant-current diodes of appropriate rank in parallel or in series and parallel, so the constant current can be adjusted according to the desired size of the conductor and the amount of semiconductor to be formed. A constant current in an arbitrary range can be passed by selecting a diode.
Each constant current diode is preferably arranged outside the individual chamber of the reaction vessel because the reaction vessel can be miniaturized without crossing with the cathode plate arranged inside the bottom of the reaction vessel. In this case, the hole of the reaction vessel by the connection wiring between the cathode plate inside and outside the reaction vessel and the constant current diode can be closed (sealed) with resin or the like.
Hereinafter, specific embodiments of the present invention will be described with reference to the accompanying drawings.
FIG. 1 shows a schematic diagram of an example of a reaction vessel (1) for manufacturing a capacitor element, and FIG. 2 shows a plan view (surface view) of a preferred arrangement example of a cathode plate and a constant current diode of the reaction vessel of the present invention. FIG. 3 also shows a back view.
A film-like metal material formed on one side of an insulating substrate by a printing technique is used as a cathode plate (circular in the example shown), and a constant current diode (3) is placed at a predetermined place printed on the back surface through a through hole of the insulating substrate. And a structure in which the through-hole portion is closed with an insulating resin such as an epoxy resin. The through-hole structure is preferable because printed wiring is provided inside the through-hole, so that electrical connection between the front and back sides can be easily performed. The insulating substrate on which the plurality of cathode plates (2) and the constant current diodes (3) are arranged in this way is used as the bottom of the reaction vessel, and a frame is formed from the insulating resin so as to surround the insulating substrate. The reaction vessel (1) thus prepared can be used. In addition, a frame (6) having a predetermined height is provided at a predetermined position of the insulating substrate so as to be perpendicular to the substrate, and a plurality of chambers in which each cathode plate is placed in the reaction vessel are formed, and a semiconductor layer is formed in each chamber. It can also be set as the structure where the electrolyte solution of this is satisfy | filled. It is preferable to design so that each conductor in which the above-described dielectric layer is formed is immersed in each chamber of such a reaction vessel in order to reliably supply a desired current to each conductor. A cathode plate that is electrically connected only to the cathode plate on the bottom surface of each room on a part or all of the frame having a predetermined height may be prepared in advance.
The size of the reaction vessel of the present invention can be appropriately determined according to the volume and number of conductors produced at one time and the size of the cathode plate. An outer frame capable of circulating temperature-controlled water may be provided in the reaction vessel.
The individual cathode plates provided on the bottom surface of the reaction vessel are electrically insulated from each other, and are designed such that the lower surface of one conductor (5) faces each cathode plate. For this reason, it is desirable to make the size of the cathode plate (2) larger than the lower surface of the conductor to be used. However, if the size is too large, the size of the reaction vessel also increases, and the amount of the electrolyte for forming the semiconductor layer to be used increases, which is disadvantageous in terms of cost. For this reason, the size of the cathode plate is determined to be a minimum size capable of supplying a current for forming a sufficient semiconductor layer on the conductor by a preliminary experiment. For example, when the lower surface of the conductor is rectangular, the size of the cathode plate is about 1.01 to 3 times, preferably about 1.01 to 1.5 times the rectangular area.
As the material of the cathode plate, a non-corrosive conductor can be used for the electrolyte for forming the semiconductor layer. For example, iron alloy, copper alloy, tantalum, platinum or the like is used. The cathode plate surface may be plated with at least one layer of a non-corrosive conductor such as nickel, gold, silver, or solder. When such a plating layer is laminated on the surface, corrosive conductors such as copper and aluminum can also be used.
A plurality of cathode plates can be provided in one room. In this case, for example, two cathode plates are in one room, and both of them need to be connected to one constant current source on the back surface thereof, and two constant current sources are not used. It is preferable to provide one cathode plate having a size capable of entering one room.
In the reaction container for manufacturing a capacitor element of the present invention, the individual cathode plates are electrically connected to a current sink type constant current source. When the constant current source is configured using a constant current diode, for example, each cathode of a plurality of constant current diodes is electrically connected, and the cathode plate is electrically connected in series to the anode of each constant current diode. The thing of the structure connected to is mentioned.
This will be described in more detail based on the example of the reaction vessel for manufacturing the capacitor element shown in FIG. A plurality of cathode plates (2) exist independently in each room at the bottom of the reaction vessel (1), and the anode of the constant current diode (3) outside the bottom of the reaction vessel is connected to each cathode plate in series. Yes. Each room is filled with an electrolyte solution (not shown) for forming a semiconductor layer at substantially the same height so as not to exceed the height of the room.
FIG. 3 is a schematic view of the bottom of the reaction vessel as viewed from the outside (back surface). A plurality of constant current diodes (3) are arranged in parallel at equal intervals, and the cathode side of each constant current diode is electrically connected to the current collecting terminal (4) on the upper left in the figure. FIG. 2 is a schematic view of the reaction container as viewed from above (surface). A plurality of cathode plates (2) are arranged at equal intervals. The individual cathode plates are insulated from each other and connected to the anodes of the respective constant current diodes of FIG. 3 through through holes (not shown) provided in the same number as the cathode plates at the bottom of the reaction vessel. Each through hole is sealed with an insulating resin or ceramic so that the electrolytic solution in the reaction vessel does not ooze out. In the upper part of the reaction vessel, a metal frame in which a plurality of metal plates having conductors (5) having a dielectric layer formed on the surface are connected at equal intervals and arranged at equal intervals is arranged. Each conductor is soaked one by one in an electrolyte solution having a predetermined amount in each room provided in the reaction vessel.
Next, a method for forming a semiconductor layer by an energization method using the above reaction container for manufacturing a capacitor element will be described.
Each chamber of the reaction vessel is filled with an electrolyte for forming a semiconductor layer at substantially the same height so as not to exceed the height of the chamber, and then a dielectric layer is disposed on the surface of the metal frame (7) at equal intervals. A semiconductor layer is formed by an energization method by immersing the formed conductors one by one in each room, using a metal frame as an anode, and a current collecting terminal arranged outside the bottom of the reaction vessel as a cathode.
Formation of a semiconductor layer in which a raw material that becomes a semiconductor when energized or, in some cases, known dopants (eg, known dopants such as aryl sulfonic acid or salt, alkyl sulfonic acid or salt, various polymer sulfonic acid or salt) are dissolved A semiconductor layer is formed on the dielectric layer by energizing the solution. Since the energization time, the concentration of the semiconductor layer forming solution, pH, temperature, energization current value, and energization voltage value vary depending on the type, size, and mass of the conductor used, the desired thickness of the semiconductor layer, etc. The conditions are determined by It is also possible to energize a plurality of times by changing energization conditions. In addition, in order to repair defects in the dielectric layer formed on the surface of the conductor, a conventionally known re-formation operation is performed at any time during the course (can be performed once or multiple times) and / or finally. Also good.
Alternatively, the semiconductor layer may be formed by the method of the present invention after an electrical minute defect is formed in the dielectric layer formed on the surface of the conductor layer.
In the capacitor of the present invention, an electrode layer may be provided on the semiconductor layer formed by the above-described method or the like in order to improve electrical contact with an external lead (for example, a lead frame) of the capacitor.
The electrode layer can be formed, for example, by solidification of a conductive paste, plating, metal deposition, adhesion of a heat-resistant conductive resin film, or the like. As the conductive paste, silver paste, copper paste, aluminum paste, carbon paste, nickel paste and the like are preferable. These may be used alone or in combination of two or more. When using 2 or more types, they may be mixed or laminated as separate layers. After applying the conductive paste, it is left in the air or heated to solidify. The thickness of the conductive paste after solidification is usually about 0.1 to about 200 μm per layer.
The conductive paste contains conductive powder such as resin and metal as main components, and may contain a solvent for dissolving the resin, a curing agent for the resin, or the like depending on the case. The solvent is scattered when the paste is solidified.
As the resin in the conductive paste, various known resins such as alkyd resin, acrylic resin, epoxy resin, phenol resin, imide resin, fluorine resin, ester resin, imidoamide resin, amide resin, styrene resin, and urethane resin are used. . As the conductive powder, at least one of powder of silver, copper, aluminum, gold, carbon, nickel, and an alloy containing these metals as a main component, coat powder having these metals on the surface layer, or a mixture of these powders is used.
The conductive powder is usually contained in an amount of 40 to 97% by mass. When the content is less than 40% by mass, the conductivity of the produced conductive paste is small, and when it exceeds 97% by mass, the adhesion of the conductive paste is reduced. You may mix and use the conductive polymer and metal oxide powder which form the semiconductor layer mentioned above in the electrically conductive paste.
Examples of the plating include nickel plating, copper plating, silver plating, gold plating, and aluminum plating. Examples of the deposited metal include aluminum, nickel, copper, gold, and silver.
Specifically, for example, a carbon paste and a silver paste are sequentially laminated on a conductor on which a semiconductor layer is formed and sealed with a material such as an epoxy resin to form a capacitor. The capacitor may have a lead made of a metal wire or a metal foil connected to the conductor in advance or connected later.
The capacitor of the present invention having the above-described configuration can be made into a capacitor product for various uses by using, for example, a resin mold, a resin case, a metallic outer case, a resin dipping, or an outer case using a laminate film.
Among these, a chip-shaped capacitor with a resin mold is particularly preferable because it can be reduced in size and cost.
Specifically, in the case of the resin mold exterior, the capacitor according to the present invention includes a part of the conductor layer of the capacitor element, and a lead frame having a pair of opposed tip portions separately prepared. It is placed on the tip, and a part of the anode lead (the tip of the anode lead may be cut and used for matching the dimensions) is placed on the other tip of the lead frame. The conductive paste is solidified, and the latter is electrically and mechanically joined by welding, and then the resin is sealed by leaving a part of the tip of the lead frame, and the lead frame is cut at a predetermined portion outside the resin seal. It is manufactured by bending (when the lead frame is on the lower surface of the resin seal and is sealed leaving only the lower surface or the lower surface and side surfaces of the lead frame, it may be cut only).
The lead frame is cut as described above and finally becomes an external terminal of the capacitor. The shape of the lead frame is foil or flat plate, and the material is iron, copper, aluminum, or these metals as a main component. An alloy is used. Part or all of the lead frame may be plated with solder, tin, titanium, gold, nickel, or the like. There may be a base plating such as nickel or copper between the lead frame and the plating.
These various platings can also be performed on the lead frame after or before the cutting and bending process. It is also possible to perform re-plating at any time after sealing after plating before placing and connecting the capacitor element.
The lead frame has a pair of opposed tip portions, and a gap between the tip portions insulates the anode portion and the cathode portion of each capacitor element.
As the type of resin used for the resin mold exterior, known resins used for sealing of solid electrolytic capacitors such as epoxy resin, phenol resin, alkyd resin, etc. can be adopted, but each resin preferably uses a low stress resin. It is preferable because the generation of sealing stress on the capacitor element occurring at the time of sealing can be mitigated. Further, a transfer machine is preferably used as a manufacturing machine for sealing the resin.
The capacitor thus produced may be subjected to an aging treatment in order to repair the deterioration of the thermal and / or physical dielectric layer when the electrode layer is formed or when it is packaged.
The aging method is performed by applying a predetermined voltage (usually within twice the rated voltage) to the capacitor. The aging time and temperature are determined in advance by experiment because optimum values differ depending on the type, capacity, and rated voltage of the capacitor. Usually, the time is several minutes to several days, and the temperature is determined in consideration of the thermal deterioration of the voltage application jig. It is performed at 300 ° C. or lower. The aging atmosphere may be performed under any conditions of reduced pressure, normal pressure, and increased pressure. Further, the aging atmosphere may be air or a gas such as argon, nitrogen, or helium, but is preferably water vapor. If the aging is performed in an atmosphere containing water vapor and then performed in a gas such as air, argon, nitrogen, helium, etc., stabilization of the dielectric layer may proceed. It is possible to return to normal pressure and room temperature after supplying water vapor, or to leave the water at a high temperature of 150 to 250 ° C. for several minutes to several hours after supplying water vapor to remove excess water and perform the aging. One example of a method for supplying water vapor is a method for supplying water vapor by heat from a water reservoir placed in an aging furnace.
As a voltage application method, it can be designed to flow an arbitrary current such as a direct current, an alternating current having an arbitrary waveform, an alternating current superimposed on the direct current, or a pulse current. It is also possible to stop the voltage application once during the aging and apply the voltage again.
The capacitor manufactured according to the present invention has a stable capacitance because the semiconductor layer can be formed under the same stable conditions. For this reason, the capacitance distribution (variation) of the capacitor group (a large number of capacitors manufactured at the same time) is narrower than that of the conventional product. Therefore, when obtaining a capacitor having a specific capacitance range, the yield is improved even if the sorting by the capacitance is unnecessary or the sorting is necessary.
The capacitor group manufactured by the present invention can be used for digital devices such as personal computers, servers, cameras, game machines, DVDs, AV devices, mobile phones, and electronic devices such as various power sources.

図１は、本発明のコンデンサ素子製造用反応容器の１形態の構成を示す模式図である。
図２は、本発明のコンデンサ素子製造用反応容器の１形態の容器底部内面（表面）の構成を示す模式図である。
図３は、本発明のコンデンサ素子製造用反応容器の１形態の容器底部裏面の構成を示す模式図である。
発明を実施するための最良の形態
以下、本発明の具体例についてさらに詳細に説明するが、以下の例により本発明は限定されるものではない。FIG. 1 is a schematic diagram showing the configuration of one embodiment of a reaction vessel for producing a capacitor element of the present invention.
FIG. 2 is a schematic diagram showing the configuration of the inner surface (surface) of the bottom of one form of the reaction container for producing a capacitor element of the present invention.
FIG. 3 is a schematic diagram showing the configuration of the back of the bottom of the container according to one embodiment of the reaction container for producing a capacitor element of the present invention.
BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, specific examples of the present invention will be described in more detail, but the present invention is not limited to the following examples.

１．コンデンサ素子製造用反応容器の作製
長さ３２２ｍｍ、幅２０２ｍｍ、厚さ２ｍｍの銅張りガラスエポキシ板に印刷配線により一方の面（表面）に図３のように直径７ｍｍの銅材の上に金メッキを施した陰極板を長さ方向に３２個、幅方向に２０個間隔を揃え計６４０個作製した。さらに他方の面（裏面）にスルーホールを介して図２のような定電流ダイオードのアノード側と表面の各陰極板とが直列に接続するように印刷配線した。各定電流ダイオードのカソード部は印刷配線のランドに半田接続され、最終的に集電端子に至る配線によって接続した。定電流ダイオードとして石塚電子（株）製Ｆ−１０１から１２０〜１６０μＡのものを選別した。スルーホール部はエポキシ樹脂で埋めた。次に表面の個々の陰極板が１つずつ部屋に入るように高さ２０ｍｍ、幅２ｍｍのガラスエポキシ板を表面に垂直に立て接着樹脂で止め、略同一寸法の小部屋（平面８×８ｍｍ）を６４０個作製し、各部屋の断面が図１で示されるようなコンデンサ素子製造用反応容器を作製した。
２．コンデンサの作製
ＣＶ１０万μＦ・Ｖ／ｇのタンタル焼結体（大きさ４．５×３．０×１．０ｍｍ、質量８４ｍｇ、引き出しリード線０．４０ｍｍφが７ｍｍ表面に出ている。）を導電体として使用した。リード線に後工程の半導体層形成時の溶液はねあがり防止のためテトラフルオロエチレン製ワッシャーを装着させた。このようにした導電体のリード線の上部２ｍｍを長さ３６０ｍｍ幅２０ｍｍ厚さ２ｍｍのステンレス製の板に端から２５ｍｍの位置から１０ｍｍ間隔で方向を揃えて３２個溶接で接続した。同様に導電体を３２個接続したステンレス板を２０枚用意し、各ステンレス板を１０ｍｍ間隔で平行に各先端を一致させて導電体６４０個を同一方向に配設できる金属フレームに取り付けた。別途用意した０．１％燐酸水溶液が入った化成槽上にフレームを設置し、導電体とリード線の一部を水溶液に浸漬するように配置したのち、フレームを陽極に、化成槽中に設けたタンタル板を陰極として１０Ｖを印加し、水溶液を８０℃として６時間化成を行い、槽から引き上げた後、水洗・乾燥して導電体の細孔内部と表面及びリード線の一部にＴａ２Ｏ５からなる誘電体層を形成した。次に、フレームの導電体のみを１％ナフタレン−２−スルホン酸鉄水溶液に漬け、引き上げ、水洗・乾燥することを７回繰り返した後、３％アントラキノン−２−スルホン酸と飽和濃度以上のエチレンジオキシチオフェンを入れた３０％エチレングリコール水溶液を各部屋に同じ高さで配液したコンデンサ素子製造用の反応容器の６４０個の部屋にフレームの６４０個の導電体が各々漬かるように配置し、フレームを陽極に、反応容器の外側底部の集電端子を陰極にして１３．５Ｖで１時間室温で通電し、半導体層を形成した。フレームを引き上げ、水洗・アルコール洗浄・乾燥を行った後に、化成液を０．１％酢酸にした前述の化成槽に導電体とリード線の一部が漬かるように配置して７Ｖ、１５分、８０℃で再化成を行った。フレームを引き上げ、水洗・アルコール洗浄・乾燥を行った。このような半導体層形成、再化成を５回繰り返して最終的な半導体層とした。さらに、フレームをカーボンペースト槽および銀ペースト槽と順に導電体部分が漬かるように設置、および乾燥を行うことにより半導体層上に電極層を積層した。
電極層を形成した各導電体をフレームから取り外し、別途用意した表面に錫メッキした銅合金からなるリードフレームの両先端部の陽極側に導電体のリード線を一部切断除去して載置し、陰極側に導電体の銀ペースト側を載置し、前者はスポット溶接で、後者は銀ペーストで接続した。その後、エポキシ樹脂で封口した後に、リードフレームの切断、折り曲げ加工を行い、大きさ７．３×４．３×１．８ｍｍのチップ状コンデンサを作製した。次いで１１５℃、コンデンサへの印加電圧３．５Ｖで５時間エージングした。得られたコンデンサの出現容量分布は、その平均容量の±１０％の範囲内であった。具体的には、得られたコンデンサは、定格２．５Ｖ容量６８０μＦであり、７２０〜６４５μＦの個数５９４個、７２０〜７５０μＦの個数１７個、６４５〜６１０μＦの個数２９個の容量分布を持っていた。
比較例１：
実施例１において、本発明のコンデンサ素子製造用反応容器を使用せずに、従来の反応容器、すなわち、大きさは同じだが、個々の部屋も個々の陰極板と電流吸出し型の電流源も持たず、容器の下面内部に底面積とほぼ同じ大きさの銅の上に金メッキを施した陰極板を設けた反応容器中で、該陰極板を陰極として通電することによって半導体層を形成した以外は、実施例１と同様にしてチップ状コンデンサを作製した。得られたコンデンサの出現容量分布は、その平均容量の±２０％を超えるものであった。具体的には、得られたコンデンサは、定格２．５Ｖ容量６８０μＦであり、７２０〜６４５μＦの個数３５９個、７２０〜７５０μＦの個数１５個、７５０〜７８０μＦの個数２個、６４５〜６１０μＦの個数１５０個、６１０〜５７５μＦの個数９３個、５７５〜５４０μＦの個数１７個、５４０〜５１０μＦの個数４個の容量分布を持っていた。
実施例１及び比較例１から、実施例１で得られたコンデンサ群は、比較例１で得られたコンデンサ群よりも容量分布が明らかに狭くなっていることがわかる。1. Preparation of reaction vessel for manufacturing capacitor element Gold plating is applied on a copper material having a diameter of 7 mm as shown in FIG. 3 on one side (front surface) of a copper-clad glass epoxy plate having a length of 322 mm, a width of 202 mm, and a thickness of 2 mm. A total of 640 cathode plates were prepared with 32 intervals in the length direction and 20 intervals in the width direction. Furthermore, the other surface (back surface) was printed and wired so that the anode side of the constant current diode as shown in FIG. The cathode portion of each constant current diode was soldered to the land of the printed wiring, and finally connected by wiring reaching the current collecting terminal. A constant current diode was selected from F-101 manufactured by Ishizuka Electronics Co., Ltd., having a density of 120 to 160 μA. The through hole was filled with epoxy resin. Next, a glass epoxy plate with a height of 20 mm and a width of 2 mm is vertically placed on the surface so that each cathode plate on the surface enters into the room, and is fastened with an adhesive resin. 640 were produced, and a reaction vessel for producing a capacitor element was produced in which the cross section of each room was as shown in FIG.
2. Production of Capacitor Conducting a CV 100,000 μF · V / g tantalum sintered body (size 4.5 × 3.0 × 1.0 mm, mass 84 mg, lead wire 0.40 mmφ is exposed on the surface of 7 mm). Used as a body. A tetrafluoroethylene washer was attached to the lead wire to prevent the solution from splashing when the semiconductor layer was formed in the subsequent step. The top 2 mm of the conductor lead wire thus made was connected to a stainless steel plate having a length of 360 mm, a width of 20 mm, and a thickness of 2 mm by welding 32 pieces with the direction aligned at intervals of 10 mm from a position 25 mm from the end. Similarly, 20 stainless steel plates to which 32 conductors were connected were prepared, and each stainless steel plate was attached to a metal frame in which 640 conductors could be arranged in the same direction with their tips aligned in parallel at intervals of 10 mm. Install the frame on the chemical conversion tank containing 0.1% phosphoric acid aqueous solution prepared separately, and place the conductor and part of the lead wire soaked in the aqueous solution, then set the frame as the anode and install in the chemical conversion tank 10 V was applied using the tantalum plate as a cathode, the aqueous solution was formed at 80 ° C. for 6 hours, pulled up from the bath, washed with water and dried to form Ta 2 on the inside of the pores of the conductor, the surface, and part of the lead wires. A dielectric layer made of O 5 was formed. Next, after the conductor of the frame was immersed in 1% aqueous naphthalene-2-sulfonate solution, pulled up, washed with water and dried seven times, 3% anthraquinone-2-sulfonic acid and ethylene at a saturated concentration or higher were used. Arranged so that 640 conductors of the frame are immersed in 640 chambers of a reaction vessel for manufacturing a capacitor element in which 30% ethylene glycol aqueous solution containing dioxythiophene is distributed at the same height in each chamber, Using the frame as the anode and the current collecting terminal at the outer bottom of the reaction vessel as the cathode, current was passed at 13.5 V for 1 hour at room temperature to form a semiconductor layer. After lifting the frame, washing with water, washing with alcohol, and drying, place the conductor and part of the lead wire in the above-mentioned chemical conversion bath with 0.1% acetic acid in 7% for 15 minutes. Re-chemical conversion was performed at 80 ° C. The frame was pulled up, washed with water, washed with alcohol, and dried. Such semiconductor layer formation and re-chemical formation were repeated five times to obtain a final semiconductor layer. Furthermore, the electrode layer was laminated | stacked on the semiconductor layer by installing so that a conductor part might be immersed in a carbon paste tank and a silver paste tank in order, and drying.
Remove the conductors on which the electrode layers are formed from the frame, and place the conductors with the conductor wires partially cut off and placed on the anode side of both ends of the lead frame made of a copper alloy tin-plated on a separately prepared surface. The silver paste side of the conductor was placed on the cathode side, the former was connected by spot welding and the latter was connected by silver paste. Then, after sealing with an epoxy resin, the lead frame was cut and bent to produce a chip capacitor having a size of 7.3 × 4.3 × 1.8 mm. Next, aging was performed at 115 ° C. and a voltage applied to the capacitor of 3.5 V for 5 hours. The appearance capacity distribution of the obtained capacitor was within a range of ± 10% of the average capacity. Specifically, the obtained capacitor had a rated 2.5 V capacity of 680 μF, and had a capacitance distribution of 594 from 720 to 645 μF, 17 from 720 to 750 μF, and 29 from 645 to 610 μF. .
Comparative Example 1:
In Example 1, the reaction vessel for manufacturing the capacitor element of the present invention was not used, but a conventional reaction vessel, that is, the same size, but each room had individual cathode plates and a current sink type current source. In the reaction vessel provided with a cathode plate plated with gold on copper having the same size as the bottom area inside the lower surface of the vessel, except that the semiconductor layer was formed by energizing the cathode plate as a cathode. In the same manner as in Example 1, a chip capacitor was produced. The appearance capacity distribution of the obtained capacitor was more than ± 20% of the average capacity. Specifically, the obtained capacitors have a rated 2.5 V capacity of 680 μF, the number of 359 of 720 to 645 μF, the number of 15 of 720 to 750 μF, the number of 2 of 750 to 780 μF, the number of 645 to 610 μF, 150. , 610-575 μF number 93, 575-540 μF number 17, 540-510 μF number 4 capacitance distribution.
From Example 1 and Comparative Example 1, it can be seen that the capacitance distribution of the capacitor group obtained in Example 1 is clearly narrower than that of the capacitor group obtained in Comparative Example 1.

１．コンデンサ素子製造用反応容器の作製
実施例１で、反応容器の各小部屋の陰極板を印刷技術で作製せずに、各小部屋の底部と側面の底部から高さ１４ｍｍまでに、銀粉９３質量％、エポキシ樹脂７質量％の銀ペーストで厚さ約０．３ｍｍのべた塗り部を描いて陰極板としたこと、定電流ダイオードとして石塚電子（株）製Ｆ−１０１Ｌから６０〜１００μＡのものを選別して使用したこと以外は実施例１と同様の反応容器を作製した。
２．コンデンサの作製
ニオブインゴットの水素脆性を利用して粉砕したニオブ一次粉（平均粒径０．３２μｍ）を造粒し平均粒径１１０μｍのニオブ粉（微粉であるために表面が自然酸化されていて酸素９５０００ｐｐｍ存在する。）を得た。つぎに４５０℃の窒素雰囲気中に放置しさらに７００℃のアルゴン中に放置することにより、窒化量９６００ｐｐｍの一部窒化したニオブ粉（ＣＶ２９８０００μＦ・Ｖ／ｇ）とした。このニオブ粉を０．３７ｍｍφのニオブ線と共に成形した後１２８０℃で焼結することにより、大きさ４．０×３．５×１．７ｍｍ（質量０．０８ｇ。ニオブ線がリード線となり焼結体内部に３．７ｍｍ、外部に８ｍｍ存在する。）の焼結体（導電体）を複数個作製した。次に、導電体を実施例１と同様なステンレス板に同数接続した後、金属フレームに同数配設した。電圧のみを２０Ｖにして化成することにより導電体表面とリード線の一部にＮｂ２Ｏ５を主成分とする誘電体層を形成した。
次いで、コンデンサ素子製造用反応容器を１２℃にコントロールされた低温室に置いた後、実施例１のアントラキノン−２−スルホン酸をピロールに代え、さらに通電電圧と再化成電圧を各々２３Ｖと１４Ｖにし、さらに通電時間を９０分にして反応回数を１１回とした以外は実施例１と同様にして半導体層、電極層を形成し、封止して大きさ７．３×４．３×２．８ｍｍのチップ状固体電解コンデンサを作製した。得られたコンデンサの出現容量分布は、その平均容量の±１５％の範囲内であった。具体的には、得られたコンデンサは、定格４Ｖ容量１０００μＦであり、９５０〜１０５０μＦの個数５７９個、１０５０〜１１００μＦの個数１３個、９５０〜９００μＦの個数４４個、９００〜８５０μＦの個数４個の容量分布を持っていた。
比較例２：
実施例２で、本発明のコンデンサ素子製造用反応容器を使用せずに比較例１で使用した従来の反応容器を使ってコンデンサを作製した以外は、実施例２と同様にしてチップ状固体電解コンデンサを作製した。得られたコンデンサの出現容量分布は、その平均容量の±２０％を超えるものであった。具体的には、得られたコンデンサは、定格４Ｖ容量１０００μＦであり、９５０〜１０５０μＦの個数３６５個、１０５０〜１１００μＦの個数７個、９５０〜９００μＦの個数１７２個、９００〜８５０μＦの個数６８個、８５０〜８００μＦの個数１９個、８００〜７５０μＦの個数６個、７５０〜７００の個数３個の容量分布を持っていた。
実施例２及び比較例２から、実施例２で得られたコンデンサ群は、比較例２で得られたコンデンサ群よりも容量分布が明らかに狭くなっていることがわかる。1. Preparation of reaction vessel for manufacturing capacitor element In Example 1, 93 masses of silver powder was prepared from the bottom of each small chamber and the bottom of the side surface to a height of 14 mm without producing the cathode plate of each small chamber of the reaction vessel by printing technology. %, A solid paste part having a thickness of about 0.3 mm was drawn with a silver paste of 7% by mass of epoxy resin, and a cathode plate with a constant current of 60-100 μA from F-101L made by Ishizuka Electronics Co., Ltd. A reaction vessel similar to that in Example 1 was prepared, except that it was selected and used.
2. Production of Capacitor Niobium primary powder (average particle size 0.32 μm) pulverized by utilizing the hydrogen embrittlement of niobium ingots, and niobium powder with an average particle size of 110 μm (the surface is naturally oxidized due to the fine powder, oxygen 95,000 ppm present). Next, it was left in a nitrogen atmosphere at 450 ° C. and then in argon at 700 ° C. to obtain a partially nitrided niobium powder (CV 298000 μF · V / g) having a nitriding amount of 9600 ppm. This niobium powder was molded together with a 0.37 mmφ niobium wire and then sintered at 1280 ° C., so that the size was 4.0 × 3.5 × 1.7 mm (mass 0.08 g. The niobium wire became a lead wire and sintered. A plurality of sintered bodies (conductors) having 3.7 mm inside and 8 mm outside were produced. Next, the same number of conductors were connected to the same stainless steel plate as in Example 1, and then the same number of conductors were disposed on the metal frame. A dielectric layer containing Nb 2 O 5 as a main component was formed on the surface of the conductor and part of the lead wire by forming only the voltage at 20V.
Next, after placing the reaction vessel for producing the capacitor element in a low temperature chamber controlled at 12 ° C., the anthraquinone-2-sulfonic acid of Example 1 was replaced with pyrrole, and the energization voltage and re-forming voltage were set to 23 V and 14 V, respectively. Further, a semiconductor layer and an electrode layer were formed and sealed in the same manner as in Example 1 except that the energization time was 90 minutes and the number of reactions was 11, and the size was 7.3 × 4.3 × 2. An 8 mm chip-shaped solid electrolytic capacitor was produced. The appearance capacity distribution of the obtained capacitor was within ± 15% of the average capacity. Specifically, the obtained capacitors have a rated 4V capacity of 1000 μF, a number of 579 of 950 to 1050 μF, a number of 13 of 1050 to 1100 μF, a number of 44 of 950 to 900 μF, and a number of 4 of 900 to 850 μF. Had a capacity distribution.
Comparative Example 2:
In Example 2, chip-shaped solid electrolysis was performed in the same manner as in Example 2 except that the capacitor was produced using the conventional reaction vessel used in Comparative Example 1 without using the reaction vessel for producing the capacitor element of the present invention. A capacitor was produced. The appearance capacity distribution of the obtained capacitor was more than ± 20% of the average capacity. Specifically, the obtained capacitor has a rated 4V capacity of 1000 μF, a number of 365 of 950 to 1050 μF, a number of 7 of 1050 to 1100 μF, a number of 172 of 950 to 900 μF, a number of 68 of 900 to 850 μF, The capacitance distribution was 19 in the number of 850 to 800 μF, 6 in the number of 800 to 750 μF, and 3 in the number of 750 to 700.
From Example 2 and Comparative Example 2, it can be seen that the capacitance distribution of the capacitor group obtained in Example 2 is clearly narrower than that of the capacitor group obtained in Comparative Example 2.

本発明は、定電流源を介して通電することにより半導体層を形成するコンデンサ素子製造用反応容器及びコンデンサ素子の製造方法を提供したものであり、本発明によれば、出現容量分布が狭い、出現容量が平均容量±２０％の範囲に入る容量分布を有するコンデンサ群を得ることができる。  The present invention provides a capacitor element manufacturing reaction container and a capacitor element manufacturing method for forming a semiconductor layer by energization through a constant current source, and according to the present invention, the appearance capacity distribution is narrow, A capacitor group having a capacitance distribution in which the appearing capacitance falls within the range of the average capacitance ± 20% can be obtained.

Claims (9)

表面に誘電体層を形成した複数個の導電体を同時に反応容器中の電解液に浸漬して通電手法により半導体層を形成するための反応容器であって、反応容器中に個々の導電体に対応する個々の部屋が複数設けられていて、個々の部屋に陰極が設けられ、個々の陰極に電気的に接続されている複数の定電流源を有することを特徴とするコンデンサ素子製造用反応容器。A reaction vessel for forming a semiconductor layer by an energization method by simultaneously immersing a plurality of conductors having a dielectric layer formed on the surface thereof in an electrolytic solution in a reaction vessel, wherein each conductor is formed in the reaction vessel. A reaction container for manufacturing a capacitor element, comprising a plurality of corresponding individual chambers, a cathode in each room, and a plurality of constant current sources electrically connected to the respective cathodes . 複数の定電流源が、複数の定電流ダイオードで構成され、その各カソードどうしが電気的に接続され、各アノードが陰極に接続されている請求項１に記載のコンデンサ素子製造用反応容器。  The reaction container for manufacturing a capacitor element according to claim 1, wherein the plurality of constant current sources are composed of a plurality of constant current diodes, each cathode is electrically connected, and each anode is connected to the cathode. 反応容器の底部内側に配置された個々の陰極と反応容器の外側に配置された各定電流ダイオードのアノードが接続され、各定電流ダイオードのカソード同士が電気的に接続されて端子に集電される請求項１または２に記載のコンデンサ素子製造用反応容器。  The individual cathodes arranged inside the bottom of the reaction vessel are connected to the anodes of the constant current diodes arranged outside the reaction vessel, and the cathodes of the constant current diodes are electrically connected to each other and collected at the terminals. The reaction container for manufacturing a capacitor element according to claim 1 or 2. 絶縁性基板の一方の面（表面）に設けられた個々の陰極と絶縁性基板の他方の面（裏面）に配置された各定電流ダイオードがスルーホールを通して電気的に接続され、スルーホールが封口された絶縁性基板を反応容器の底部とする請求項１乃至３のいずれかに記載のコンデンサ素子製造用反応容器。  Individual cathodes provided on one surface (front surface) of the insulating substrate and each constant current diode arranged on the other surface (back surface) of the insulating substrate are electrically connected through the through hole, and the through hole is sealed. The reaction container for manufacturing a capacitor element according to any one of claims 1 to 3, wherein the insulating substrate formed is a bottom of the reaction container. 陰極板が膜状金属材料である請求項４に記載のコンデンサ素子製造用反応容器。  The reaction vessel for manufacturing a capacitor element according to claim 4, wherein the cathode plate is a film metal material. 請求項１乃至５のいずれかに記載のコンデンサ素子製造用反応容器を用いることを特徴とするコンデンサ素子の製造方法。  A method for producing a capacitor element, comprising using the reaction container for producing a capacitor element according to claim 1. 請求項１乃至５のいずれかに記載のコンデンサ素子製造用反応容器に電解液を満たし、誘電体層を有する複数個の導電体を前記電解液に漬け、該導電体側を陽極に、反応容器中に設けた個々の陰極を陰極にして通電手法により誘電体層上に半導体層を形成することを特徴とするコンデンサ素子の製造方法。  A reaction vessel for manufacturing a capacitor element according to any one of claims 1 to 5 is filled with an electrolytic solution, and a plurality of conductors having a dielectric layer are immersed in the electrolytic solution, the conductor side being an anode, A method for producing a capacitor element, comprising forming a semiconductor layer on a dielectric layer by an energization method using individual cathodes provided on the cathode as cathodes. 請求項６または７に記載の製造方法により作製されたコンデンサ素子群。  A capacitor element group produced by the production method according to claim 6. 出現容量分布が、平均容量±２０％の範囲内にある請求項８に記載のコンデンサ素子群を用いたコンデンサ。  The capacitor using the capacitor element group according to claim 8, wherein the appearance capacity distribution is within a range of an average capacity of ± 20%.
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