JP4676692B2 - Display unit - Google Patents

Description

  The present invention relates to a display unit, and more particularly to a display unit that displays predetermined information by controlling lighting of a plurality of display elements.

An information display device having this type of display unit is formed by arranging a plurality of display units having a plurality of display elements arranged in a matrix. This display unit has, for example, a display element group arranged by 16 elements (rows) * 16 elements (columns) and 24 elements (rows) * 24 elements (columns). A serial signal is output to the display unit, and the serial signal is sequentially shifted by a plurality of shift register circuits, so that display control of all the display elements can be performed in one system. . On the other hand, if one shift register circuit fails, the entire display unit cannot be controlled, and the entire display unit must be turned off.
In this way, when one unit is turned off, for example, in an information display device that displays a single character using a display unit of 3 units (rows) * 3 (columns) units, it is 1/9 of a character. There was a problem that the part would be lost and this would interfere with reading.

On the other hand, when there is a failure display unit and display data for displaying characters or the like is input using the display unit, the display unit is turned off while the display unit is turned off. There has been proposed a technique for newly generating display data in which characters to be displayed are translated to an adjacent normal display unit (for example, see Patent Document 1).
According to such a configuration, since it is possible to display without losing characters or the like, it is possible to provide a highly reliable information display device that is hardly affected by a failure of the shift register circuit.
JP-A-7-199851

  However, in the information display device including the above-described conventional display unit, since the unit of extinction is one display unit as a whole, it is necessary to shift characters and the like for at least one display unit. Therefore, characters or the like cannot be translated unless the display data has at least one display unit margin. Therefore, there is a problem that the above method cannot be applied to display data with a narrow margin. Further, when a plurality of failure display units exist at the same time, there is a problem that display data that can be further applied is limited.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a display unit capable of reading display contents even when a shift register circuit is out of order.

To achieve the above object, includes a display element group arranged a display element comprising a single or a plurality of color light emitting sources in a matrix, a display unit for based rather on the display data at the same display element group The display subunits provided for each of the plurality of groups obtained by dividing the display element group, and the display elements belonging to the group corresponding to the display subunits, which are provided for each display subunit, are turned on / off . a display element driving circuit for controlling on the basis of the display data, and the failure detection circuit for a fault detection signal indicating a failure of the display element driving circuit for detecting for each of the display sub-unit, the display in which the fault detection signal is detected a control and monitoring unit for turning off only the display elements belonging to the group corresponding to the sub-unit, as well as provided with a, belonging to each of the groups The display element constitutes a plurality of rows or a plurality of columns in the display element group, and the display of the other group is between the rows or columns of the display elements of the same group. An interval is provided in which there are rows or columns formed by the elements .

  In the invention according to claim 1 configured as described above, the display unit includes a display element group, and the display element group includes a plurality of display elements arranged in a dot matrix. In this display element group, by individually controlling lighting of a plurality of display elements, it is possible to display characters, symbols, and the like based on the input display data in dots. The display element is not limited to a single color light source, and may include a plurality of color light sources.

In the display element group, a plurality of display elements are arranged in a dot matrix shape, and a plurality of groups of the display elements are formed by dividing them. The display subunit is provided for each group. The control monitoring unit generates a display signal which is a serial signal capable of controlling the driving of each display element from the display data. This display signal is output to the display subunit. By disposing a display element driving circuit for each display subunit, it becomes possible to perform drive control of the display element for each display subunit. In other words, the drive control of the display element can be performed for each group. Specifically, the display element driving circuit includes a shift register circuit, which shifts and stores the display signal, and generates a parallel signal to control lighting and extinction of each display element. To do.

On the other hand, a failure detection circuit capable of detecting a failure detection signal indicating a failure of the display element driving circuit for each of the display subunits is provided. The detected failure detection signal is output to the control monitoring unit. When the failure detection signal is input in the control monitoring unit, the control monitoring unit is capable of failure to turn off only the display elements belonging to the group corresponding to the display sub-unit was detected.

In other words, it is possible to detect a failure in units of the display subunits and perform a turn-off control in units of the display subunits. As a result, in the display element group of the display unit, only the display elements belonging to the group corresponding to the display subunit in which a failure is detected are turned off . Therefore, since the entire display element group is not turned off , it is not difficult to read characters, symbols, etc. displayed in dots on the display surface. Further, the number of the display elements belonging to the group is smaller than the number of the display elements included in the display element group of the display unit. Therefore, if the display subunits are connected in parallel, the number of bits of the display signal for controlling the display element can be reduced. Therefore, high-speed response is improved, and control capable of following dynamic lighting can be realized.

As described above, in order to turn off only the display elements belonging to the group corresponding to the display subunit in which a failure is detected, a signal instructing the display subunit drive circuit of the display subunit to be turned off is separately provided. Output.

Further, the upper Symbol control monitoring unit outputs the check data at least "1" consisting of "0" is added to the display data, the fault detection circuit from the response signal of the shift register circuit for the check data The failure detection signal may be generated .

Oite the above configuration, the control monitoring unit to each of the display element driving circuit connected in series the display subunits, the check data consisting of "0" and at least "1" is added to the display data Output. Then, by generating the failure detection signal from the response signal to the check data of the shift register circuit, it is detected whether or not there is an abnormality in the shift register circuit. Since the data necessary for the failure detection proposed in the present invention is at least 2 bits, the failure detection can be performed quickly. Further, by adding the check data to the display data and outputting it, a failure can be detected while displaying. Therefore, the display is not stopped for a long time for failure detection.

Further, the upper Symbol group constitutes a row or column in the display element group.
In the above-described configuration , in the display element group in which the display elements are arranged in a dot matrix, the group configures a row or a column of a unit with less movement of characters, symbols, and the like due to a failure.

Further, when the upper Symbol control monitoring unit that the fault detection signal is input, and outputs the OFF signals to the display sub-unit the failure detection signal has been detected, the group corresponding to the display sub-unit the new display data that avoids lighting of the display device generates, may be configured to output display data the product belonging to.
In the above configuration , by generating new display data that avoids lighting of the display elements belonging to the group corresponding to the display subunit in which a failure is detected, the display elements belonging to the group by the turn-off signal Even if is turned off, it is possible to prevent the reading from being affected.

Further, the upper Symbol control monitoring unit, a new display data by translating the characters or the like to output to the display sub-unit adjacent the signal to be lighted in the display sub-unit in which the failure detection signal has been detected Is generated.
In the above-described configuration , by shifting a part of characters or the like, it is possible to generate new display data that avoids lighting of the display elements belonging to the group corresponding to the display subunit in which a failure is detected. .

Further, the upper Symbol group constitute a plurality of rows or columns in the display element group. In addition, the number of the display elements corresponding to the interval between adjacent rows or columns in the same group corresponds to the width of a line of characters or the like displayed and parallel to the rows or columns constituting the group. More than the number of the display elements. Therefore, a line such as a character does not include two or more rows or two or more columns that are parallel to the line and constitute the group. That is, even if the display elements belonging to the group are turned off , a line of characters or the like is not lost by the light- off dots in two rows or two or more parallel rows. Therefore, the legibility of lines such as characters and designs is not greatly impaired.

As described above, the present invention can provide an example of division of a display element group of a unit with little movement of characters and the like, and is an information display device that does not easily interfere with the interpretation of characters and symbols even if a failure occurs. Can be provided.
Moreover, according to the invention concerning Claim 2, failure detection can be performed rapidly .
Further, according to the invention according to claim 3, it can be displayed without missing characters and the like.
Further, according to the invention according to claim 4, Ru can be displayed without missing characters or the like by a simple process.

Here, embodiments of the present invention will be described in the following order.
(1) Configuration of information display device:
(2) Configuration of display unit:
(3) Operation of display subunit:
(4) Fault detection circuit:
(5) Display element arrangement example 1:
(6) Arrangement example 2 of display element:
(7) Summary:

(1) Configuration of information display device:
FIG. 1 is a diagram showing an entire display surface of an information display device to which a display unit according to the present invention is applied. In the figure, on the display surface 11 of the information display apparatus 10 according to the present embodiment, 18 display units 20 are arranged in a matrix of 3 rows and 6 columns, and the 18 display units 20 are used. Thus, predetermined information can be displayed. Here, as shown in FIG. 2, the display unit 20 has 16 rows and 16 columns of display elements 21 arranged in a matrix, forming a so-called display element group. The display element 21 is provided with one yellow-green LED as a light emitting element. The above display is performed by lighting control of each yellow-green LED.

  However, the light emitting element provided in the display element 21 is not limited to the yellow-green LED, and may be a red LED or a blue LED, and is not limited to a single color, and two or three color light emitting elements are accommodated in one LED unit. It may be capable of displaying a plurality of display colors. The light emitting element is not limited to the LED, and may be a light emitting element other than the LED. Further, in the present embodiment, the information display device 10 is configured by the display unit 20 of 3 rows and 6 columns, but, of course, this aspect is not limited to this and can be appropriately changed. Further, the display unit 20 is configured by the display element 21 of 16 rows and 16 columns, but is not limited to this mode and can be changed as appropriate.

(2) Configuration of display unit:
As described above, in the present embodiment, a configuration is adopted in which a total of 256 display elements 21 in 16 rows and 16 columns are arranged in the display element group of the display unit 20. The 256 display elements 21 in the display element group are driven and controlled by display element driving circuits provided in each of the four display subunits 22 shown in FIGS. In the present embodiment, lighting control of 64 display elements 21 can be performed by a display element driving circuit provided in one display subunit. That is, one display subunit is responsible for driving the 64 display elements 21. A set of 64 display elements 21 that can be controlled to be turned on by the display subunit is referred to as a group in the display element group.

  Here, FIG. 3 shows a block diagram showing an internal configuration of the display unit 20 in the present embodiment. In the figure, each display unit 20 includes a control monitoring unit 23, and four display subunits 22 are connected in parallel to the control monitoring unit 23. Each display unit 20 is provided with a failure detection circuit 50 that receives check data from each of the four display subunits 22 and outputs a failure detection signal to the control monitoring unit 23. The control monitoring unit 23 is connected to a controller 27 that controls the entire information display device 10. The controller 27 includes a transmission / reception unit 24 that transmits and receives display data from the outside, a display data storage unit 26 that temporarily stores display data to be displayed on the information display device 10, and a CPU 25 that executes various calculations. . The controller 27 performs a process of editing display data stored in advance in the display data storage unit 26 according to a control signal received from the outside and then converting the display data into a serial signal. The display data storage unit 26 also stores a display item table, a character code table, a character font, a design pattern, and the like for generating the display data.

  If necessary, the display data stored in the element unit corresponding to all display elements directly received from the outside is stored in the display data storage unit 26, and the display data is converted into a serial signal. Then, a display signal including the display data for driving the four display subunits 22 is generated from the converted serial signal and the arrangement address of each display element 21, and the display signal is transferred to each display unit 20. The In the present embodiment, one controller 27 is provided in the entire information display device 10, but a configuration in which the controller 27 is provided for each display unit 20 may be used.

FIG. 4 is a block diagram showing the internal configuration of the display subunit 22. In the figure, the display subunit 22 includes a display element driving circuit 40 including a driver circuit 41, a latch circuit 42, and a shift register circuit 43. The 64 display elements 21 constituting one group are connected in parallel to the driver circuit 41, respectively. The display subunit 22 is supplied with a turn-off signal, a latch signal, display data, a transfer clock signal, and check data from the control monitoring unit 23 on the left side (input side) in the block diagram. The check data is input from the control monitoring unit 23 to the shift register circuit 43, and the check data is output to the failure detection circuit 50 as a response signal shifted by the shift register circuit 43.

(3) Operation of display subunit:
The operation of the display subunit 22 shown in FIG. 4 will be described below. The turn-off signal is a signal input to the driver circuit 41 and is either “1” or “0”. When the turn-off signal is “1”, the driver circuit 41 becomes operable and each display element 21 can be turned on based on the display data stored in the latch circuit 42. On the other hand, when the turn-off signal is “0”, the driver circuit 41 becomes inoperable and all the display elements 21 are turned off regardless of the presence or absence of display data stored in the latch circuit 42.

  The latch signal is input to the latch signal input terminal of the latch circuit 42, and controls the timing at which the latch circuit 42 acquires display data from the shift register circuit 43. The shift register circuit 43 shifts and stores the data portion of the 64 display elements 21 that the display subunit 22 is responsible for driving among the display data expressed by serial signals, and also stores the stored data in parallel. The signal is output to the latch circuit 42 as a signal. In this embodiment, the shift register circuit 43 has a storage capacity for 64 bits (64 stages) and can shift by 64 bits.

  The transfer clock is input to the shift register circuit 43 and controls the drive timing of the shift register circuit 43. Since the shift register circuit 43 is provided in 64 stages, the display data is shifted by 64 bits by the transfer clock of 64 cycles. That is, in order to store the display data for controlling the lighting of the 64 display elements 21, a time corresponding to 64 set clock cycles is required. Therefore, a high-frequency transfer clock is required for dynamic lighting that requires high-speed data transmission. Since the display unit 20 of this embodiment is provided with the display subunits 22 in parallel, the display data can be as short as 64 bits. Therefore, high-speed dynamic lighting can be realized without increasing the transfer clock frequency.

  In this embodiment, the data output from the control monitoring unit 23 to the shift register circuit 43 is a 2-bit data consisting of “1” and “0” at the head of 64-bit display data for driving 64 display elements 21. It is formed by adding check data. FIG. 5 is a timing chart schematically showing output data composed of display data and check data. In the figure, output data output to the shift register circuit 43 is formed by superimposing 64-bit display data and 2-bit check data, and has 66 bits as a whole. The transfer clock stops oscillating every 66 clocks after the display data is output to the shift register circuit 43. At this time, the display data of the rear 64 bits is stored in each stage of the shift register circuit 43. Therefore, the stored display data can be stored in the latch circuit 42 by a latch signal inputted thereafter. That is, the lighting control of the display element 21 based on the display data can be performed.

  On the other hand, since the number of stages of the shift register circuit 43 is 64, the check data, which is the first 2 bits, is output from the shift register circuit 43 to the failure detection circuit 50 at this time. The check data output to the failure detection circuit 50 passes through the shift register circuit 43. If the shift register circuit 43 is normal, the failure detection circuit 50 serves as a normal response signal composed of “1” and “0”. Is output. On the other hand, if the shift register circuit 43 is faulty, it is output to the fault detection circuit 50 as an illegal response signal consisting of “1”, “1”, or “0”, “0”. In the present embodiment, failure detection is performed by outputting a response signal of such check data to the shift register circuit 43 to the failure detection circuit 50.

  Accordingly, check data to be added to display data for failure detection only needs 2 bits, so that high-speed dynamic lighting is not prevented. Further, since display data is output together with the check data, it is possible to perform normal display while performing failure detection. Therefore, lighting does not stop for a long time for failure detection. In the figure, display data whose data is all “1” is illustrated, but the contents of the display data differ depending on the display. Details of the failure detection circuit 50 will be described below.

(4) Fault detection circuit:
The failure detection circuit 50 shown in FIG. 3 receives check data returned from each display subunit 22 and generates a failure detection signal for each display subunit 22. FIG. 6 shows a circuit diagram of the failure detection circuit 50. In the figure, the failure detection circuit 50 comprises a counter 51, a decoder 52, AND gates 53a to 53d, 57, 58a to 58d, an OR gate 54, and flip-flops 55, 56, 59a to 59d. . The output points 0 to 3 of the decoder 52 are represented as E, F, G, and H, the output point of the OR gate 54 is represented as I, the output point of the flip-flop 55 is represented as J, and the output point of the flip-flop 56 is represented as K. The output point of the AND gate 57 is expressed as L, and the output points of the AND gates 58a to 58d are expressed as M, N, O, and P, respectively.

  7 to 9 show the signals at the parts E, F, G, H, I, J, K, L, M, N, O, and P of the failure detection circuit 50, the transfer clock, the latch signal, and the failure. The detection signals 1 to 4 are shown by a timing chart. Since the counter 51 and the decoder 52 are driven by the latch signal, a decode signal in which “1” appears in one cycle of the latch signal in order at the output points E, F, G, and H of the decoder 52 is generated. Has been. The OR gate 54 synthesizes the check data output from the shift register circuits 43a to 43d of each display subunit 22 and the display data, but is provided with AND gates 53a to 53d driven by the decode signal upstream. Check data and display data are input only from the AND gates 53a to 53d whose decode signal is “1”.

  That is, check data and display data output from each of the four shift register circuits 43a to 43d can be sequentially combined based on the period of the latch signal. Therefore, the combined data at the output point I of the OR gate 54 is composed of check data output from the shift register circuit 43a in the period of the first latch signal, and output from the shift register circuit 43b in the period of the second latch signal. Check data output from the shift register circuit 43c in the third latch signal cycle, and check data output from the shift register circuit 43d in the fourth latch signal cycle. The data consists of

  Here, in the example shown in the timing charts of FIGS. 7 to 9, the shift register circuit 43b fails and the signal “0” is always output, and the shift register circuit 43d also fails and the signal “1” is always output. The operation will be described assuming that is output. FIG. 7 shows the operation in the period of the first and third latch signals in which the check data as response signals output from the shift register circuits 43a and 43c appear in the composite data, and FIG. 8 shows the output from the shift register circuit 43b. 9 shows the operation in the period of the second latch signal in which the check data as the response signal appears in the composite data, and FIG. 9 shows the check data as the response signal output from the shift register circuit 43d in the composite data 4 The operation in the period of the second latch signal is shown.

  In FIG. 7, since the shift register circuits 43a and 43c are normal, check data “1” and “0” appear as response signals at the output point I. On the other hand, in FIG. 8, check data “0” and “0” appear as response signals at the output point I. Similarly, in FIG. 9, at the output point I, check data “1” and “1” appear as response signals.

  The combined data is shifted by one transfer clock at each of the flip-flops 55 and 56. Therefore, the signals at the output points I, J, and K of the OR gate 54 and the flip-flops 55 and 56 are shifted by one transfer clock. The AND gate 57 inverts the output signal of the flip-flop 55, inputs the output signal of the flip-flop 56, and inverts the result. Therefore, the output is “0” only when the output signal of the flip-flop 55 is “0” and the output signal of the flip-flop 56 is “1”, and when a signal having a combination other than that is input, the output is “1”. Since the transfer clock stops at 66 clocks, the state where the first bit of the check data appears at the output point K and the second bit appears at the output point J is maintained.

  As shown in FIG. 7, the check data output from the normal shift register circuits 43a and 43c appear as response signals “1” and “0”. The combination that the output signal of 55 is “0” and the output signal of the flip-flop 55 is “1” occurs, and “0” is output to the output point L of the AND gate 57. On the other hand, as shown in FIG. 8, since the check data output from the failed shift register circuit 43b appears as response signals “0” and “0”, even if they are shifted by one clock of the transfer clock, the flip-flop The output signal of 55 is “0”, the output signal of the flip-flop 55 is “0”, and “1” is output to the output point L of the AND gate 57. Further, as shown in FIG. 9, since the check data output from the failed shift register circuit 43d appears as response signals “1” and “1”, even if these are shifted by one clock of the transfer clock, the flip-flop The output signal of 55 is “1” and the output signal of the flip-flop 55 is “1”. In this case, “1” is output to the output point L of the AND gate 57.

  That is, “0” is not output to the output point L of the AND gate 57 unless the check data as the response signals of the shift register circuits 43a to 43d appear in the order of “1” and “0”. The combined data generated as described above is input to each of the AND gates 58a to 58d. The decode signal is input to the other input terminal of each of the AND gates 58a to 58d. Therefore, the data corresponding to the first cycle of the latch signal of the composite data at the output point L appears at the output point M (FIG. 7) of the AND gate 58a, and the data corresponding to the second cycle of the latch signal is from the AND gate 58b. Data appearing at the output point N (FIG. 8) and corresponding to the third period of the latch signal appears at the output point O (FIG. 7) of the AND gate 58c, and data corresponding to the fourth period of the latch signal is AND gate. It appears at an output point P (FIG. 9) of 58d.

  Therefore, the signal corresponding to the check data as the response signal of the shift register circuit 43a is included in the signal output from the AND gate 58a, and the signal corresponding to the check data as the response signal of the shift register circuit 43b is output from the AND gate 58b. The signal corresponding to the check data as the response signal of the shift register circuit 43c is included in the signal output from the AND gate 58c and corresponds to the check data as the response signal of the shift register circuit 43d. The signal is included in the signal output from the AND gate 58d.

Output signals from the AND gates 58a to 58d are input to flip-flops 59a to 59d driven by latch signals. Here, since the signal corresponding to the check data output from the normal shift register circuits 43a and 43c is “0” as described above, the failure detection signals 1 and 3 are always “0” as shown in FIG. Become. On the other hand, since the signal corresponding to the check data output from the failed shift register circuits 43b and 43d is “1” as described above, “1” is added to the failure detection signals 2 and 4 as shown in FIGS. Will appear. Therefore, when a signal “1” is detected from the failure detection signals 1 to 4, it can be detected that the corresponding shift register circuits 43 a to 43 d are out of order. That is, the failure detection circuit 50 enables failure detection in units of the display subunit 22. The failure detection signal generated as described above is output to the control monitoring unit 23 as shown in FIG. Then, the control monitoring unit 23 outputs the turn-off signal “0” to the failed display subunit 22.

(5) Display element arrangement example 1:
In the present embodiment, one display subunit 22 can drive a group composed of 64 display elements 21, and the groups of display elements 21 are arranged in a matrix of display units 20. It is possible to arbitrarily set which part of the display element group is allocated. FIG. 10 shows an example of the arrangement. In the figure, display elements 21 arranged in a matrix of display units 20 are shown, and the identification codes A to D of display subunits 22 for driving the display elements 21 are shown at the coordinates of each display element 21. ing.

In this arrangement example, the groups A to D of the display elements 21 that are driven by the respective display subunits 22 constitute a block of 16 rows and 4 columns. Now, assuming that the shift register circuit 43 of the display subunit 22 responsible for driving the group A of the display elements 21 has failed, the failure detection circuit 50 detects a failure in the display subunit 22 corresponding to the group A as described above. Then, the control monitoring unit 23 outputs the turn-off signal “0” only to the display subunit 22 corresponding to the group A, and turns off the display subunit 22. FIG. 11 shows the state of characters displayed on the display surface at this time. In the figure, the display element group (16 rows and 16 columns) provided with the display unit 20 having the display subunit 22 in which the character “ad” is displayed in the display element 45 rows and 39 columns dot matrix, of which the central portion is broken. ). In the present embodiment, a dot matrix of 45 rows and 39 columns is a display area for one character, and a blank space of 9 dots is secured between each character. Only the portion of group A in the display unit 20 is turned off due to a failure.

In the figure, each dot (display element 21) is indicated by symbols ●, ○, ×, Δ, and the meaning of each symbol is as follows.
●: Dot that should be lit up, dot that can be lit ○: Dot that does not need to be lit, dot that can be lit ×: Dot that should be lit up originally, and cannot be turned on by turn- off instruction △: Not lit up originally A dot that cannot be turned on by a turn- off instruction, and therefore a dot (display element 21) belonging to group A for which the turn-off instruction is given to the corresponding display subunit 22 corresponds to a symbol of x or Δ. .

The X dot that should originally constitute a part of the character is not lit, and a part of the character is lost. However, since the area occupying the entire character of the portion indicated by group A is relatively small, there is not much trouble in reading. In other words, even if the light is turned off in a block of 16 rows and 4 columns, characters are not lost to such an extent that the interpretation is hindered. However, in this embodiment, the CPU 25 performs predetermined image processing and calculates the position where the display subunit 22 in which the character is broken does not fall within the group in charge of driving, thereby further improving the legibility. FIG. 12 shows a display screen in a state where the image processing is performed. In the figure, the character "ad" is shifted to the right and up by two dots, and part of it protrudes to the right and top margins. In this way, the character “adic” can be displayed without completely losing the character.

The flow of the image processing will be described below with reference to the flowchart shown in FIG. First, the failed display subunit 22 is turned off in step S110. Specifically, the failure detection circuit 50 identifies the failed display subunit 22 and outputs the turn-off signal “0” to the display subunit 22 where the failure is detected. In step S 120, new display data is received from the transmission / reception unit 24, and the display data is stored in the display data storage unit 26. The display data includes at least address information corresponding to all the display elements 21 arranged on the display surface 11 of the information display device 10 and lighting / non-lighting instruction information for all the display elements 21. This is display data corresponding to the display element. Of course, it is not necessary that the display data corresponding to the display element as described above is received at the time of reception by the transmission / reception unit 24, and a configuration in which a character code or the like is converted into display data corresponding to the display element after reception may be employed. . On the other hand, the address on the display surface 11 of each display element 21 included in the group corresponding to the failed display subunit 22 can also be specified from the connection status of the display unit 20 and the display subunit 22.

In step S130, it is detected whether or not there is display data instructed to be lit at the address of the display element 21 corresponding to the failed display subunit 22. That is, it is determined whether the dots that can not be turned on by the off instructions dot should originally be turned indicated by × present in FIG. 11. In the example of the figure, since x exists, the process proceeds from step S130 to step S140, and the minimum movement amount is calculated. On the other hand, if there is no display data to be lit at the address of the display element 21 belonging to the group corresponding to the failed display subunit 22, the display data is output to each display subunit 22 without being edited in step S170. To do. This is because even if the display signal is output as it is, all the display elements 21 whose addresses are originally intended to be lit can be turned on, and a display result according to the display data can be obtained.

  The minimum amount of movement in step S140 refers to characters, symbols, etc. to be displayed in order to prevent the display data instructed to be lit at the address of the display element 21 belonging to the group corresponding to the failed display subunit 22. It means the minimum translation distance. In the example shown in FIG. 11, if “ad” is moved right and up by two dots, the overlap between the group A and the character “ad” can be eliminated. After the minimum movement amount is calculated in this way, it is determined in step S150 whether or not the minimum movement amount in each direction is smaller than the number of dots that is half the margin. In the example shown in FIG. 11, since a 9-dot margin is secured, it is determined whether the minimum movement amount of 2 dots is less than 4.5 dots. In this case, since the minimum movement amount of 2 dots is smaller, display data in which “advance” is moved to the right and up by 2 dots is created in step S160 and updated in the display data storage unit.

  Then, the display data updated in step S170 is output to each display subunit 22. By doing so, it is possible to realize a display in which a part of characters is not lost as shown in FIG. Further, by restricting the amount of movement of characters to be less than half the margin, even when adjacent characters move in the opposite direction, adjacent characters do not overlap. Therefore, even if a plurality of display subunits 22 fail at the same time, the legibility is not extremely deteriorated. Further, by making the width and height of the group of the display elements 21 that the display subunit 22 is responsible for driving smaller than half of the margin, it is possible to improve the legibility by reliably moving within the margin.

  On the other hand, if it is determined in step S150 that the minimum movement amount is greater than half the margin, the display data is output to each display subunit 22 without editing the display data in step S170. In this case, as shown in FIG. 11, a part of the character is lost. However, even in this case, the area occupied by the entire character of the portion indicated by group A is relatively small, and therefore can be read sufficiently. However, in the case of a character, since the above-described 9-dot margin is present between the characters, it is possible to display the character without any defect by setting the position of the failed display subunit 22 as the margin position. . In the above embodiment, when one character is moved, other characters may be moved to adjust the overall character balance.

  In the present embodiment, the CPU 25 of the controller 27 exemplifies that the image processing of the display data for all the display units 20 is performed at once. However, each display unit 20 individually has a CPU, a display data storage unit, A transmission / reception unit may be provided to individually perform image processing. In this case, it is necessary to perform matching image processing between adjacent display units. For example, when one character is displayed by nine display units, when a display subunit of any display unit fails, image processing for shifting a predetermined dot character in the display subunit including the failed display subunit is performed. In addition, it is preferable that the other eight display units that display the same character also perform image processing for shifting the predetermined dot character in the same manner. If the transmission / reception unit provided in each display unit can exchange information such as failure information of the display subunits in other display units that share characters and the like and whether or not shift is possible, image processing is mainly performed by each display unit. Even if it is performed, the entire character can be shifted as described above.

(6) Arrangement example 2 of display element:
FIG. 14 shows a second arrangement example of the groups in the display element group of the display unit 20. In this arrangement example, the groups A to D of the display elements 21 driven by the display subunits 22 are each composed of four rows each having a length of 16 dots, and the interval between adjacent rows is 3 dots. It has been. Also in this arrangement example, if the display subunit 22 in charge of the group C fails, the display mode is as shown in FIG. In the same figure, although a part of “ad” is missing, the extinguished group C is distributed in four rows, so that it is easy to read. In particular, in this arrangement example, since the interval between adjacent rows is 3 dots, even if one dot row is turned off in a line in the row direction constituted by 3 dots wide, two or more dot rows are turned off simultaneously. There is no. Therefore, there is no big trouble in the interpretation of the line in the row direction constituting the character.

  Also in this arrangement example, the readability can be further improved by performing predetermined image processing. FIG. 16 shows a display screen in a state where the image processing is performed. In the figure, the character "ad" is shifted downward by 2 dots. By doing so, the legibility can be further improved. Hereinafter, the flow of the image processing will be described with reference to the flowchart shown in FIG. Steps S210 to S220 are the same as steps S110 to S120 in the previous arrangement example, and a description thereof will be omitted.

  In step S230, it is determined whether or not the address of the display element 21 that the faulty display subunit 22 is responsible for driving exists at the address where the line in the row direction constituting the character or the like is drawn. Here, it is necessary to specify at which address the line in the row direction parallel to the dots of the group C in the row shape is drawn. For example, in the present embodiment, since the width of a line constituting a character is 3 dots, a line in the row direction is displayed when lighting display data that is 3 dots continuous in the column direction is 10 dots or more in the row direction. It may be determined that the address is specified. In the example shown in FIG. 15, the line in the row direction that conflicts with the group C has 26 dots consecutive addresses that are instructed to light at least 3 dots in the column direction. It can be determined that this is the case.

  If it is determined in step S230 that the address of the display element 21 belonging to the group C in which the faulty display subunit 22 is responsible for driving exists at the address where the line in the row direction is drawn, step S240 is executed. In step S240, by updating the display data obtained by translating characters and the like up and down, a line in the row direction does not exist at the address of the display element 21 that the failed display subunit 22 is responsible for driving. Here, in this embodiment, due to the relationship between the 3 dots between each line in the group and the width of the characters constituting the characters, the moving amount of the characters is always within 2 dots. Therefore, it is not necessary to compare the minimum movement amount and the margin. Further, since the interval between the four rows constituting the group C is 3 dots with respect to the line width of 3 dots, the line in the row direction is arranged between the rows of the group C as shown in FIG. be able to. Therefore, the required movement amount can be minimized.

(7) Summary:
As described above, in the information display device according to the present invention, it is possible to perform failure detection and turn-off control in units of the display subunit 22 that is responsible for driving a group obtained by subdividing the display element group of the display unit 20. It has become. Therefore, even if one display subunit 22 fails, only the display elements belonging to the group corresponding to the display subunit 22 can be turned off . That is, since the entire display element group of the display unit 20 is not turned off, it is difficult for the legibility to be disturbed.

It is the figure which showed the whole display surface of the information display apparatus to which the display unit concerning this invention is applied. It is the figure which showed the arrangement | sequence state of the display element. It is a block diagram of an information display device. It is the block diagram which showed the internal structure of the display subunit. It is a timing chart which shows display data and a transfer clock. It is a circuit diagram of a failure detection circuit. It is a timing chart which shows operation | movement of a failure detection circuit. It is a timing chart which shows operation | movement of a failure detection circuit. It is a timing chart which shows operation | movement of a failure detection circuit. It is a schematic diagram which shows distribution of each group concerning the example 1 of arrangement | positioning. It is the figure which showed the display state of the display surface concerning the example 1 of arrangement | positioning. It is the figure which showed the display state of the display surface concerning the example 1 of arrangement | positioning. It is a flowchart which shows the flow of an image process. It is a schematic diagram which shows distribution of each group concerning the example 2 of arrangement | positioning. It is the figure which showed the display state of the display surface concerning the example 2 of an arrangement | positioning. It is the figure which showed the display state of the display surface concerning the example 2 of an arrangement | positioning. It is a flowchart which shows the flow of an image process.

Explanation of symbols

DESCRIPTION OF SYMBOLS 20 ... Display unit 21 ... Display element 22 ... Display subunit 23 ... Control monitoring part 50 ... Failure detection circuit 25 ... CPU
24 ... Transmitting / receiving unit 26 ... Display data storage unit 40 ... Display element drive circuit 41 ... Driver circuit 42 ... Latch circuit 43 ... Shift register circuit A, B, C, D ... Group

Claims (4)

Comprising a display element group arranged a display element comprising a single or a plurality of color light emitting sources in a matrix, a display unit for based rather on the display data at the same display element group,
A display subunit provided for each of a plurality of groups obtained by dividing the display element group ;
A display element driving circuit that is arranged for each display subunit and controls lighting and extinction of the display elements belonging to the group corresponding to the display subunit based on the display data ;
A failure detection circuit for detecting, for each display subunit, a failure detection signal indicating a failure of the display element driving circuit;
A control and monitoring unit for turning off only the display elements belonging to the group corresponding to the display sub-unit in which the failure detection signal has been detected,
And having
The display elements belonging to each of the groups constitute a plurality of rows or a plurality of columns in the display element group, and between the rows or columns constituted by the display elements of the same group, A display unit, characterized in that an interval in which a row or a column constituted by the display elements of the group exists is provided . The control monitoring unit adds check data including at least “1” and “0” to the display data and outputs the check data.
2. The display unit according to claim 1, wherein the failure detection circuit generates the failure detection signal from a response signal of the display element driving circuit with respect to the check data. The control monitoring unit with turns off only the display elements belonging to the group corresponding to the display sub-unit in which the failure detection signal has been detected,
Wherein the new display data that avoids lighting of the display elements belonging to the group corresponding to the display sub-units in any one of claims 1 or said claim 2, characterized in that the output to the display sub-unit Display unit. The control monitoring unit outputs new display data in which characters, symbols, and the like are translated so that a signal to be lit in the display subunit in which the failure detection signal is detected is output to the adjacent display subunit. display unit according to the claim 3, characterized in that to produce.

Images