JP4667737B2 - Method for forming metal pillar - Google Patents

Method for forming metal pillar Download PDF

Info

Publication number
JP4667737B2
JP4667737B2 JP2003398412A JP2003398412A JP4667737B2 JP 4667737 B2 JP4667737 B2 JP 4667737B2 JP 2003398412 A JP2003398412 A JP 2003398412A JP 2003398412 A JP2003398412 A JP 2003398412A JP 4667737 B2 JP4667737 B2 JP 4667737B2
Authority
JP
Japan
Prior art keywords
plasma
electrode
metal
opening
thick film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2003398412A
Other languages
Japanese (ja)
Other versions
JP2005159194A (en
Inventor
和久 高尾
彰彦 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Ohka Kogyo Co Ltd
Original Assignee
Tokyo Ohka Kogyo Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Ohka Kogyo Co Ltd filed Critical Tokyo Ohka Kogyo Co Ltd
Priority to JP2003398412A priority Critical patent/JP4667737B2/en
Publication of JP2005159194A publication Critical patent/JP2005159194A/en
Application granted granted Critical
Publication of JP4667737B2 publication Critical patent/JP4667737B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Description

本発明は、ICパターン面上やチップ基板上に電極や導線となる金属柱を形成する方法に関する。   The present invention relates to a method for forming a metal column serving as an electrode or a conductive wire on an IC pattern surface or a chip substrate.

ICパターン面上にはバンプと称される高さ20μm程度の金属柱が電極として形成されている。またワイヤボンディングの代わりにチップ自体に高さ100μm程度の金属柱を複数本設け、この金属柱を介してICチップを基板に搭載するようにしている。   On the IC pattern surface, a metal column called a bump having a height of about 20 μm is formed as an electrode. Further, instead of wire bonding, a plurality of metal columns having a height of about 100 μm are provided on the chip itself, and the IC chip is mounted on the substrate through the metal columns.

これら金属柱は集積回路形成技術を応用して形成される。具体的には、図3(a)〜(d)に示すように、基板やICパターン面上に厚くレジスト膜を形成し、このレジスト膜表面に所定のパターンマスクを重ねて酸素ガスプラズマでエッチングを行い、このエッチングによって形成された開口内にめっきによって金属を充填し、この後レジスト膜をアッシングするようにしている。   These metal pillars are formed by applying integrated circuit formation technology. Specifically, as shown in FIGS. 3A to 3D, a thick resist film is formed on the surface of the substrate or IC pattern, and a predetermined pattern mask is overlaid on the resist film surface and etched with oxygen gas plasma. Then, the opening formed by this etching is filled with metal by plating, and then the resist film is ashed.

また、エッチングを行うためのプラズマとしては、容量結合型プラズマ(CCP:Capacitive Coupled Plasma)と誘導結合型プラズマ(ICP:Inductive Coupled Plasma)があり、容量結合型プラズマは平行平板電極、対をなすシート状電極によって発生し、誘導結合型プラズマは一端が高周波電源に接続されたコイル状電極によって発生する。容量結合型プラズマは低温域におけるエッチングレートに優れるが被処理物に対するダメージが大きく、誘導結合型プラズマは高温域におけるエッチングレートに優れ、ダメージが小さいが、低温域におけるエッチングレートに劣る。   Etching plasma includes capacitively coupled plasma (CCP) and inductively coupled plasma (ICP), which is a pair of parallel plate electrodes. The inductively coupled plasma is generated by a coiled electrode having one end connected to a high frequency power source. The capacitively coupled plasma has an excellent etching rate in a low temperature range, but has a large damage to the object to be processed. The inductively coupled plasma has an excellent etching rate in a high temperature range and small damage, but is inferior in an etching rate in a low temperature range.

上記したバンプ等となる金属柱はアスペクト比が高い。このため図3(b)に示すように、パターン形成時に開口となるべき底部にレジスト膜やスカムが残ることがある。このままめっき処理を行うと、図3(d)に示すようにスカムの部分が抜けた金属柱が形成され導通不良を起こしたり、めっきが成長不良を起こすため、酸素ガスプラズマによる軽度のアッシング、即ちディスカム処理を行うことが考えられる。アスペクトの高いパターンについてディスカム処理を行うことに関しては、特許文献1および特許文献2に開示されている。   The metal column that becomes the bump or the like has a high aspect ratio. For this reason, as shown in FIG. 3B, a resist film or a scum may remain on the bottom portion to be an opening at the time of pattern formation. If the plating process is carried out as it is, a metal column having a scum portion is formed as shown in FIG. 3 (d), which causes poor conduction, and the plating causes poor growth. It is conceivable to perform a discaming process. Patent Document 1 and Patent Document 2 disclose that the discum processing is performed on a pattern having a high aspect.

特許第−2623672号公報 第2頁右欄8〜15行Japanese Patent No.-2623672, page 2, right column, lines 8 to 15 特許第−2522088号公報 第3頁左欄2〜5行、第3頁右欄2〜3行Japanese Patent No. 25222088, page 3, left column, lines 2-5, page 3, right column, lines 2-3

ディスカム処理を行うためのプラズマとしては誘導結合型プラズマ(ICP)を用いると、高温処理のためパターン形状が崩れてしまう。そこで、特許文献1にあっては平行平板型電極(容量結合型プラズマ)を用い、特許文献2にあっては反応性イオンエッチング装置を用いると記載されている。   If inductively coupled plasma (ICP) is used as the plasma for performing the discum treatment, the pattern shape is destroyed due to the high temperature treatment. Therefore, Patent Document 1 describes that a parallel plate type electrode (capacitive coupling type plasma) is used, and Patent Document 2 describes that a reactive ion etching apparatus is used.

特許文献1や特許文献2に開示される平行平板型電極或いはダイレクト電極を用いて、アスペクト比の高いパターンのディスカム処理を行うと、ダメージが大きくまた均一性も悪い結果となった。   Using a parallel plate type electrode or a direct electrode disclosed in Patent Document 1 or Patent Document 2 and performing a discaming process with a pattern having a high aspect ratio resulted in large damage and poor uniformity.

上記課題を解決するため本発明は、ICパターン面上または基板面上に厚膜レジストを形成し、この厚膜レジストに露光および現像を施して金属柱となる開口を形成し、次いで酸素ガスプラズマによってディスカム処理を行い、めっき処理にて前記開口内に金属を充填した後、厚膜レジストを除去することで金属柱とするにあたり、前記ディスカム処理に、上半部をプラズマ発生空間とし下半部をプラズマ処理空間としたダウンストリーム型のプラズマ処理装置であって、プラズマ発生用電極として一方のシート状電極の凸部が他方のシート状電極の凹部に入り込む櫛歯状電極を用い、ディスカム処理時に開口の側壁を荒らすようにした。   In order to solve the above-mentioned problems, the present invention forms a thick film resist on an IC pattern surface or a substrate surface, and exposes and develops the thick film resist to form openings serving as metal columns, and then oxygen gas plasma. When the metal column is formed by removing the thick film resist after the metal is filled in the opening by plating, the upper half is used as the plasma generation space, and the lower half is used as the plasma generation space. Is a downstream type plasma processing apparatus using a comb-like electrode in which the convex part of one sheet-like electrode enters the concave part of the other sheet-like electrode as a plasma generating electrode, The side wall of the opening was roughened.

ダウンストリーム型のプラズマ処理装置のうち、特にプラズマ発生用電極として一方のシート状電極の凸部が他方のシート状電極の凹部に入り込む櫛歯状電極を用いることで、一対のシート状電極の隙間に沿ってプラズマが均一に発生するため、他の容量結合型プラズマに比べて酸素ガスを分解する効率が高くなり、大量の酸素ラジカルが生成され、低温でのアッシングが可能になる。   Among the downstream type plasma processing apparatuses, a comb-like electrode in which the convex portion of one sheet-like electrode enters into the concave portion of the other sheet-like electrode is used as a plasma generating electrode. Since the plasma is generated uniformly along the line, the efficiency of decomposing oxygen gas is higher than that of other capacitively coupled plasmas, a large amount of oxygen radicals are generated, and ashing at a low temperature becomes possible.

尚、開口の底部にスカムが残っている場合には、開口側壁を荒らすのと同時に当該スカムも分解ガス化する。   When scum remains at the bottom of the opening, the scum is decomposed and gasified at the same time as the opening side wall is roughened.

本発明によれば、バンプ等のアスペクト比の高い金属柱を、成長異常や形状異常を生じることなく、ICパターン面上や基板表面に形成することができる。したがって、回路の積層などを効果的に行うことができる。   According to the present invention, a metal column having a high aspect ratio such as a bump can be formed on the IC pattern surface or the substrate surface without causing abnormal growth or abnormal shape. Therefore, it is possible to effectively stack circuits.

また本発明によれば低温処理が可能となるので、ホトレジストの熱収縮によるパターン形状の変形(例えば開口の拡大)を抑制でき、現像後のパターン形状を維持することができ、また、耐熱性の低いレジストにも適用可能となる。特に膜厚が20μmを超えるようなレジストは耐熱性が低いものが多く、本発明方法は有利である。
更に、金属の酸化抑制やバンプのファインピッチ化への対応が可能である。
Further, according to the present invention, low-temperature processing is possible, so that deformation of the pattern shape due to thermal contraction of the photoresist (for example, enlargement of the opening) can be suppressed, the pattern shape after development can be maintained, and heat resistance can be maintained. Applicable to low resists. In particular, many resists having a film thickness exceeding 20 μm have low heat resistance, and the method of the present invention is advantageous.
Further, it is possible to cope with metal oxidation suppression and bump fine pitch.

以下に本発明の実施例を添付図面に基づいて説明する。図1は本発明方法を工程順に説明した図、図2はディスカム処理に用いるプラズマ処理装置の全体図である。   Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a diagram for explaining the method of the present invention in the order of steps, and FIG.

ICパターン面上や基板表面に形成した厚膜(20μm以上)のレジスト膜に露光と現像を施して、金属をめっきするための開口を有するレジストパターンを形成する。この開口にはスカムが残っている場合と残っていない場合がある。
用いるレジストとしては、例えばPMER−LA900(東京応化工業製)或いはCA−1000(東京応化工業製)が適当である。
A thick resist film (20 μm or more) resist film formed on the IC pattern surface or the substrate surface is exposed and developed to form a resist pattern having openings for plating metal. This opening may or may not have scum.
As the resist to be used, for example, PMER-LA900 (manufactured by Tokyo Ohka Kogyo) or CA-1000 (manufactured by Tokyo Ohka Kogyo) is appropriate.

次いで、上記レジストパターンに図2に示すダウンストリーム型のプラズマ処理装置を用いて軽度のアッシングを施す。プラズマ処理装置は、ベース1上にチャンバー2を配置している。このチャンバー2は上半部をプラズマ発生空間とし下半部をプラズマ処理空間としている。   Next, the resist pattern is lightly ashed using a downstream type plasma processing apparatus shown in FIG. In the plasma processing apparatus, a chamber 2 is disposed on a base 1. The chamber 2 has an upper half as a plasma generation space and a lower half as a plasma processing space.

プラズマ発生空間の外側には一対の櫛歯状電極4,5を配置している。これら櫛歯状電極4,5はシート状をなすとともに一方の電極4の凸部が他方の電極5の凹部に入り込むように取付けられ、一方の電極は高周波電源6に接続され、他方の電極5はアースされている。またプラズマ処理空間には下方からアースされたテーブル7が臨み、このテーブル7上に被処理物である半導体ウェーハWなどがセットされる。   A pair of comb-like electrodes 4 and 5 are arranged outside the plasma generation space. The comb-like electrodes 4 and 5 are formed in a sheet shape and are attached so that the convex portion of one electrode 4 enters the concave portion of the other electrode 5. One electrode is connected to the high frequency power source 6, and the other electrode 5 Is grounded. Further, a table 7 grounded from below faces the plasma processing space, and a semiconductor wafer W or the like to be processed is set on the table 7.

以上において、反応ガス導入口8から酸素ガスを導入して電源を入れると、櫛歯状電極4,5の隙間に沿った部分でプラズマが均一に発生し、酸素ガスが分解されプラズマ発生空間3aで酸素ラジカルが生成される。生成された酸素ラジカルは下方のプラズマ処理空間3bに導かれ、この酸素ラジカルによってディスカム処理を行う。即ち、酸素ラジカルによってスカムが存在している場合にはスカムは分解され、またスカムの有無に拘らず開口の側壁は荒らされる。   In the above, when oxygen gas is introduced from the reaction gas inlet 8 and the power is turned on, plasma is uniformly generated along the gaps between the comb-like electrodes 4 and 5, and the oxygen gas is decomposed and the plasma generation space 3a. To generate oxygen radicals. The generated oxygen radicals are guided to the lower plasma processing space 3b, and a discum treatment is performed by the oxygen radicals. That is, when scum is present due to oxygen radicals, the scum is decomposed, and the side wall of the opening is roughened regardless of the presence or absence of scum.

上記ディスカム処理の条件としては、例えば、テーブル7の温度を80℃とし、導入する酸素ガスのチャンバー内圧力を300ミリトール、高周波600Wとする。終点はスカムの量とアッシングレートから時間を算出し、スカムの量が多少ばらついてもよいように処理時間を算出した時間よりも少し多めに設定する。こうすることで、スカムを完全に除去できるようにした。   As conditions for the discaming process, for example, the temperature of the table 7 is set to 80 ° C., the pressure of the introduced oxygen gas in the chamber is set to 300 mTorr, and the high frequency is set to 600 W. For the end point, the time is calculated from the amount of scum and the ashing rate, and the processing time is set slightly longer than the calculated time so that the amount of scum may vary. In this way, scum can be completely removed.

次いで、めっき液に漬けることで、前記開口内に金属(金、銅、アルミなど)を充填し、その後レジスト膜をアッシングによって除去し、金属柱を得る。このめっき工程において、開口の側壁が適度に荒れているため、めっきの密着性が向上するので、レジストパターンに沿った良好な形状のバンプを得ることができる。   Next, the opening is filled with metal (gold, copper, aluminum, etc.) in the opening, and then the resist film is removed by ashing to obtain a metal column. In this plating step, since the side wall of the opening is moderately roughened, the adhesion of plating is improved, so that a bump having a good shape along the resist pattern can be obtained.

本発明方法を工程順に説明した図Diagram explaining the method of the present invention in the order of steps ディスカム処理に用いるプラズマ処理装置の全体図Overall view of plasma processing equipment used for discum treatment 従来の問題点を説明した図A diagram explaining conventional problems

符号の説明Explanation of symbols

1…ベース、2…チャンバー、3a…プラズマ発生空間、3b…プラズマ処理空間4,5…櫛歯状電極、6…高周波電源、7…テーブル、8…反応ガス導入口、W…被処理物。   DESCRIPTION OF SYMBOLS 1 ... Base, 2 ... Chamber, 3a ... Plasma generation space, 3b ... Plasma processing space 4, 5 ... Comb-shaped electrode, 6 ... High frequency power supply, 7 ... Table, 8 ... Reaction gas inlet, W ... To-be-processed object.

Claims (1)

ICパターン面上または基板面上に厚膜レジストを形成し、この厚膜レジストに露光および現像を施して金属柱となる開口を形成し、次いで酸素ガスプラズマによってディスカム処理を行い、めっき処理にて前記開口内に金属を充填した後、厚膜レジストを除去するようにした金属柱の形成方法において、前記ディスカム処理に、上半部をプラズマ発生空間とし下半部をプラズマ処理空間としたダウンストリーム型のプラズマ処理装置であって、プラズマ発生用電極として一方のシート状電極の凸部が他方のシート状電極の凹部に入り込む櫛歯状電極を用い、前記ディスカム処理の温度条件はテーブル温度を80℃、導入する酸素ガスのチャンバー内圧力を300ミリトール、印加する高周波を600Wとし、またディスカム処理時間はスカム量のばらつきを考慮して算出した時間よりも長く設定してスカムを完全に除去し、前記ディスカム処理と同時に開口の側壁を荒らすことを特徴とする金属柱の形成方法。 A thick film resist is formed on the IC pattern surface or the substrate surface, and this thick film resist is exposed and developed to form an opening to be a metal pillar, and then a discum process is performed by oxygen gas plasma, and a plating process is performed. In the method for forming a metal column in which the thick film resist is removed after filling the metal into the opening, the discumbing process is performed downstream with the upper half as a plasma generation space and the lower half as a plasma processing space. a type of plasma processing apparatus, the convex portion of one of the sheet electrode as a plasma generating electrode using the comb-shaped electrode which enters the recess of the other sheet-like electrode, the temperature conditions of the descum process table temperature 80 ° C., the pressure in the chamber 300 mTorr oxygen gas introduced, the applied high frequency and 600W, also descum processing time Ska Is set longer than the time calculated in consideration of the variation in the amount of scum was completely removed, the descum process simultaneously with forming method of the metal posts, characterized in that roughening the side walls of the opening.
JP2003398412A 2003-11-28 2003-11-28 Method for forming metal pillar Expired - Fee Related JP4667737B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003398412A JP4667737B2 (en) 2003-11-28 2003-11-28 Method for forming metal pillar

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003398412A JP4667737B2 (en) 2003-11-28 2003-11-28 Method for forming metal pillar

Publications (2)

Publication Number Publication Date
JP2005159194A JP2005159194A (en) 2005-06-16
JP4667737B2 true JP4667737B2 (en) 2011-04-13

Family

ID=34723263

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003398412A Expired - Fee Related JP4667737B2 (en) 2003-11-28 2003-11-28 Method for forming metal pillar

Country Status (1)

Country Link
JP (1) JP4667737B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8637392B2 (en) 2010-02-05 2014-01-28 International Business Machines Corporation Solder interconnect with non-wettable sidewall pillars and methods of manufacture

Also Published As

Publication number Publication date
JP2005159194A (en) 2005-06-16

Similar Documents

Publication Publication Date Title
JP5833600B2 (en) Method and apparatus for etching features in a silicon layer
TWI705498B (en) Method for etching features in dielectric layers
CN103105744A (en) Etch features with reduced line edge roughness
US20070075038A1 (en) Vertical profile fixing
CN101421830A (en) Infinitely selective photoresist mask etch
JP2010109373A (en) Bi-layer, tri-layer mask cd control
TW380285B (en) Methods for reducing plasma-induced charging damage
TW589403B (en) Mechanism for bow reduction and critical dimension control in etching silicon dioxide using hydrogen-containing additive gases in fluorocarbon gas chemistry
TW312812B (en)
TW468226B (en) Improved methods and apparatus for etching a conductive layer to improve yield
US20090008803A1 (en) Layout of dummy patterns
JP2005526395A (en) Plasma generator with baffle plate
JP4667737B2 (en) Method for forming metal pillar
TWI598954B (en) Method for etching with controlled wiggling
TW434454B (en) Etching process for organic anti-reflective coating
US6921493B2 (en) Method of processing substrates
JPH08227873A (en) Manufacture of semiconductor device
JP2917993B1 (en) Dry etching method
JP2000054164A (en) Method for working insulating material and resist material used for worked insulating material by the method
JPH02162730A (en) Manufacture of semiconductor device
JP2008218553A (en) Semiconductor device and its manufacturing method
KR100190376B1 (en) Forming method for metal wiring in semiconductor device
JP4620964B2 (en) Metal film pattern forming method
KR100252916B1 (en) Corrosion inhibiting method for aluminum alloy film
JP2023109496A (en) Etching method and plasma processing device

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20060407

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20080514

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20080520

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20081111

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20081219

A911 Transfer of reconsideration by examiner before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A911

Effective date: 20090119

A912 Removal of reconsideration by examiner before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A912

Effective date: 20090417

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20101214

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20110112

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140121

Year of fee payment: 3

R150 Certificate of patent (=grant) or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

LAPS Cancellation because of no payment of annual fees