JP4665935B2 - Manufacturing method of semiconductor wafer - Google Patents

Manufacturing method of semiconductor wafer Download PDF

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JP4665935B2
JP4665935B2 JP2007120829A JP2007120829A JP4665935B2 JP 4665935 B2 JP4665935 B2 JP 4665935B2 JP 2007120829 A JP2007120829 A JP 2007120829A JP 2007120829 A JP2007120829 A JP 2007120829A JP 4665935 B2 JP4665935 B2 JP 4665935B2
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substrate
susceptor
single crystal
silicon single
counterbore
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隆治 河野
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Shin Etsu Handotai Co Ltd
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Description

本発明は、導体ウェーハの製造方法に関する。 The present invention relates to a method of manufacturing a semi-conductor wafer.

従来から、サセプタにより支持させたシリコン単結晶基板(以下、半導体基板或いは基板と略称することがある。)を加熱装置により成長温度に加熱するとともに、基板の主表面上にガス供給装置により原料ガスを供給することによって、該基板の主表面上に薄膜を気相成長して半導体ウェーハを製造する方法が知られている。 Conventionally, a silicon single crystal substrate (hereinafter sometimes abbreviated as a semiconductor substrate or a substrate) supported by a susceptor is heated to a growth temperature by a heating device, and a source gas is formed on a main surface of the substrate by a gas supply device. A method of manufacturing a semiconductor wafer by vapor-depositing a thin film on the main surface of the substrate is known.

このような製造方法に用いられる気相成長装置には、いわゆる枚葉式の気相成長装置あるいはバレル型(シリンダー型)気相成長装置等のように、基板を主表面側と主裏面側との双方から加熱しつつ気相成長を行うタイプ(以下、タイプ1)のもの(主裏面側からの加熱はサセプタを介して行う)と、いわゆるパンケーキ型の気相成長装置等のように、サセプタを介して基板を主裏面側からのみ加熱しつつ気相成長を行うタイプ(以下、タイプ2)のものとがある。   The vapor phase growth apparatus used in such a manufacturing method includes a substrate having a main surface side and a main back surface side, such as a so-called single wafer type vapor phase growth apparatus or a barrel type (cylinder type) vapor phase growth apparatus. Such as a type that performs vapor phase growth while heating from both (hereinafter referred to as type 1) (heating from the main back side is performed through a susceptor), a so-called pancake type vapor phase growth apparatus, and the like, There is a type in which vapor phase growth is performed while heating the substrate only from the main back surface side through a susceptor (hereinafter referred to as type 2).

このうち、タイプ2の場合、図6に示すように、基板Wを支持するサセプタ101の下側に加熱装置(例えば、高周波誘導加熱コイル)102が配され、該加熱装置102により、サセプタ101を介して基板Wを主裏面側から加熱する。このため、気相成長の際には、基板Wの下部が上部に比べて大きく熱膨張するので、図6に示すように、基板Wが中心部ほど下側に凸となるように反り返る。従って、このように反り返った状態時にも基板Wにサセプタ101を好適にフィットさせて、サセプタ101から基板Wへの熱伝導量を面内で均一にするために、図6に示すように、サセプタ101の座ぐり103は、周縁部から中心に向かうほど大きく凹む凹曲面形状に窪まされている。   Among these, in the case of type 2, as shown in FIG. 6, a heating device (for example, a high frequency induction heating coil) 102 is disposed below the susceptor 101 that supports the substrate W, and the susceptor 101 is moved by the heating device 102. The substrate W is heated from the main back surface side. For this reason, during vapor phase growth, the lower portion of the substrate W is thermally expanded more than the upper portion, so that the substrate W warps so as to protrude downward toward the center as shown in FIG. Therefore, in order to make the susceptor 101 fit suitably to the substrate W even in the state of warping in this way and to make the amount of heat conduction from the susceptor 101 to the substrate W uniform in the plane, as shown in FIG. The counterbore 103 of 101 is recessed in the concave curved surface shape which becomes large as it goes to a center from a peripheral part.

他方、タイプ1の場合、例えば図5に示すように、サセプタ111に対し主表面側と主裏面側との双方に加熱装置112(例えばハロゲンランプ)を配し、これら加熱装置112により、基板Wを主表面側と主裏面側との双方から加熱する。このため、基板Wは、表裏方向において殆ど熱分布を生じないので、気相成長の際にも殆どフラットに維持される。
従って、タイプ1の場合のサセプタ111の座ぐり113は、図5に示すように平面に形成されている(例えば、特許文献1参照)。
特開2003−142412号公報
On the other hand, in the case of Type 1, for example, as shown in FIG. 5, heating devices 112 (for example, halogen lamps) are arranged on both the main surface side and the main back surface side with respect to the susceptor 111. Is heated from both the main surface side and the main back side. For this reason, since the substrate W hardly generates heat distribution in the front and back directions, the substrate W is maintained almost flat even during vapor phase growth.
Therefore, the counterbore 113 of the susceptor 111 in the case of type 1 is formed in a plane as shown in FIG. 5 (see, for example, Patent Document 1).
JP 2003-1442412 A

しかしながら、上記タイプ1の場合、基板Wの主裏面が、平面である座ぐり113の底面に接触状態となるため、該主裏面に座ぐり113の底面との接触跡が形成されて、基板Wの外観に影響を及ぼすことがある。このことは、特に、基板Wの主裏面にも鏡面研磨処理が施されている場合(両面ミラーの基板を用いる場合)に問題となる。   However, in the case of the above type 1, the main back surface of the substrate W is in contact with the bottom surface of the counterbore 113, which is a flat surface, so that a contact mark with the bottom surface of the counterbore 113 is formed on the main back surface. May affect the appearance. This becomes a problem particularly when the main back surface of the substrate W is also subjected to mirror polishing (when a double-sided mirror substrate is used).

この発明は、上記のような問題点を解決するためになされたもので、半導体基板を主表面側からと主裏面側からとの双方から加熱して気相成長を行う場合に、基板の主裏面に接触跡が形成されてしまうことを防止可能な導体ウェーハの製造方法を提供することを目的とする。 The present invention has been made to solve the above-described problems. When the semiconductor substrate is heated from both the main surface side and the main back side to perform vapor phase growth, the main substrate is used. and to provide a method of manufacturing a semi-conductor wafer capable prevented that the contact mark is formed on the back surface.

上記課題を解決するため、本発明の半導体ウェーハの製造方法は、
両面が鏡面研磨処理された直径300mmのシリコン単結晶基板の主表面上にシリコン単結晶薄膜を気相成長させて半導体ウェーハを製造する半導体ウェーハの製造方法において、
シリコン単結晶基板を主表面側からと主裏面側からとの双方から加熱して行う気相成長の際に該シリコン単結晶基板を支持するサセプタとして、
当該サセプタに対しシリコン単結晶基板を位置決めさせるための座ぐりを有し、
該座ぐりの底面が、周縁部から中心に向かうほど次第に窪まされていることにより、前記加熱の際におけるシリコン単結晶基板の撓み形状よりも窪まされており、
この底面とシリコン単結晶基板との最大距離が、シリコン単結晶基板を加熱しないで支持した状態で0.35mm以上、0.45mm未満となるように、該底面が窪まされているサセプタ
を用いるとともに、
前記座ぐりとして、シリコン単結晶基板を支持する外周側部分と、該外周側部分の内側に該外周側部分よりも窪んだ状態に形成された内周側部分とを有する二段構成をなすものを用い、
前記サセプタにより支持させたシリコン単結晶基板を、主表面側と該サセプタを介して主裏面側との双方から加熱しながら、該シリコン単結晶基板の主表面上にシリコン単結晶薄膜を気相成長させることを特徴としている
In order to solve the above problems, a method for manufacturing a semiconductor wafer of the present invention includes:
In a semiconductor wafer manufacturing method of manufacturing a semiconductor wafer by vapor-phase growth of a silicon single crystal thin film on a main surface of a silicon single crystal substrate having a diameter of 300 mm and having both surfaces subjected to mirror polishing,
As a susceptor for supporting the silicon single crystal substrate during vapor phase growth performed by heating the silicon single crystal substrate from both the main surface side and the main back surface side,
Having a counterbore for positioning the silicon single crystal substrate with respect to the susceptor,
The bottom face of the counterbore is gradually recessed from the peripheral edge toward the center, thereby being recessed from the bent shape of the silicon single crystal substrate during the heating,
The susceptor in which the bottom surface is recessed so that the maximum distance between the bottom surface and the silicon single crystal substrate is 0.35 mm or more and less than 0.45 mm when the silicon single crystal substrate is supported without heating.
And using
The counterbore has a two-stage structure having an outer peripheral side portion that supports the silicon single crystal substrate and an inner peripheral side portion that is formed inside the outer peripheral side portion so as to be recessed from the outer peripheral side portion. Use
The silicon single crystal substrate is supported by said susceptor, with heating from both the main back side over a main surface side and the susceptor, vapor phase growth of a silicon single crystal thin film on the main surface of the silicon single crystal substrate It is characterized by letting .

本発明の半導体ウェーハの製造方法によれば、座ぐりの底面が、気相成長の加熱の際における基板の撓み形状よりも窪まされているので、基板を主表面側からと主裏面側からとの双方から加熱して気相成長を行う場合に、基板が、加熱によりその中心部が座ぐりに近づく方向に僅かに撓んだとしても、基板の主裏面と座ぐり底面とを非接触状態に維持することができる。よって、両面が鏡面研磨処理された基板の主裏面に、座ぐり底面との接触跡が形成されてしまうことを好適に防止しつつ、基板の主表面上に薄膜を気相成長させて半導体ウェーハを製造することができる。
しかし、座ぐりと基板との間隔があまりにも大きいと、該間隔に気相成長の際に用いる水素が大量に侵入してしまう結果、該水素により基板の主裏面がエッチングされてしまい、該主裏面に形成されている微少なキズが目立つようになってしまうことがある。従って、座ぐりが有する窪みは大きければ良い(座ぐりが単に深ければ良い)というものではない。
このような事情に対し、座ぐりの底面が周縁部から中心に向かうほど次第に窪まされているサセプタ、或いは、傾斜面状部を有するサセプタとすれば、基板との接触を防止しつつも、周縁部における基板と座ぐりとの間隔を狭くすることができる。よって、該間隔への水素の侵入を抑制できる結果、該水素による基板主裏面のエッチングも抑制できるので、該主裏面に微少なキズが形成されていても、このキズが目立つようになってしまうことを防止できる。
According to the method for manufacturing a semiconductor wafer of the present invention, the bottom face of the counterbore is recessed from the bent shape of the substrate at the time of heating in vapor phase growth, so that the substrate is separated from the main surface side and the main back surface side. When performing vapor phase growth by heating from both sides, even if the substrate is slightly bent in the direction in which the central part approaches the counterbore due to heating, the main back surface and the counterbore bottom surface of the substrate are brought into a non-contact state. Can be maintained. Therefore, a semiconductor wafer is obtained by vapor-phase-growing a thin film on the main surface of the substrate while preferably preventing contact traces with the counterbore bottom surface from being formed on the main back surface of the substrate whose both surfaces are mirror-polished. Can be manufactured .
However, if the distance between the counterbore and the substrate is too large, a large amount of hydrogen used for vapor phase growth enters the gap, and as a result, the main back surface of the substrate is etched by the hydrogen, and the main back surface Small scratches formed on the surface may become noticeable. Therefore, it is not necessary that the recess of the counterbore is large (the counterbore is simply deep).
For such circumstances, if the susceptor is gradually recessed toward the center from the peripheral edge, or a susceptor having an inclined surface portion, the peripheral edge while preventing contact with the substrate. The distance between the substrate and the spot facing can be reduced. Therefore, as a result of suppressing the penetration of hydrogen into the gap, the etching of the main back surface of the substrate due to the hydrogen can also be suppressed. Therefore, even if a slight scratch is formed on the main back surface, this scratch becomes conspicuous. Can be prevented.

また、特に、二段構成をなす座ぐりにおいて、内周側部分の底面とシリコン単結晶基板との最大距離が、シリコン単結晶基板を加熱しないで支持した状態で0.35mm以上、0.45mm未満となるように、該内周側部分の底面が窪まされている場合、基板と座ぐりとの間隔を全面において狭くすることができる。よって、該間隔への水素の侵入をより一層抑制できる。従って、基板の主裏面に形成されている微少なキズが目立つようになってしまうことをより好適に防止できる。 In particular, in a two-stage counterbore, the maximum distance between the bottom surface of the inner peripheral portion and the silicon single crystal substrate is 0.35 mm or more and 0.45 mm in a state where the silicon single crystal substrate is supported without heating. When the bottom surface of the inner peripheral side portion is recessed so as to be less, the distance between the substrate and the counterbore can be reduced over the entire surface. Therefore, it is possible to further suppress the entry of hydrogen into the interval. Therefore, it is possible to more suitably prevent the minute scratches formed on the main back surface of the substrate from becoming conspicuous.

ところで、サセプタは、例えば、グラファイトからなる本体部の表面にSiC(炭化珪素)をコーティングすることにより構成されている。そして、本体部にSiCをコーティングする際には、本体部を高温に加熱する。本体部は、この加熱により大きく反り返るが、この反り返り量の予測は困難であるため該反り返り量を加熱量により制御することは極めて困難である。勿論、反り返り量は、本体部が大寸法であるほど大きいため、直径の大きなサセプタであるほど平坦に形成することが困難であるという問題もある。
このような事情に対し、本発明で用いられるサセプタによれば、座ぐり底面(の少なくとも一部)を、周縁部から中心に向かうほど基板から遠ざかる曲面状に窪んだ状態に形成すればよいため、座ぐりを平坦に形成する必要がある場合よりもサセプタの製造が容易となり、例えば直径300mmの半導体ウェーハを支持するサセプタのように、比較的大寸法のサセプタであっても好適に製造することが可能となる。
By the way, the susceptor is configured, for example, by coating SiC (silicon carbide) on the surface of a main body portion made of graphite. And when coating SiC with a main-body part, a main-body part is heated to high temperature. The main body is greatly warped by this heating, but since it is difficult to predict the amount of warping, it is extremely difficult to control the amount of warping by the amount of heating. Of course, the amount of warping is larger as the main body is larger in size, so that there is a problem that it is difficult to form a flatter as the susceptor has a larger diameter.
For such a situation, according to the susceptor used in the present invention , the bottom face of the counterbore (at least a part thereof) may be formed in a state of being recessed in a curved shape that is further away from the substrate toward the center from the peripheral edge. The susceptor can be manufactured more easily than the case where the counterbore needs to be formed flat. For example, a susceptor having a relatively large size such as a susceptor supporting a semiconductor wafer having a diameter of 300 mm can be preferably manufactured. Is possible.

また、本発明で用いられるサセプタは、シリコン単結晶基板を支持する主表面に対し裏面が、該裏面の中心部ほど窪むように、反り返った全体姿勢をなす盤状に形成されていることこと、換言すれば、シリコン単結晶基板を支持する主表面の中心部ほど突出するように反り返った全体姿勢をなす盤状に形成されている場合にも適用することができる。
この場合、サセプタが、反り返った全体姿勢に形成されていても良いので、つまり、全体姿勢が平板状となるように形成する必要がないので、平板状に形成する必要がある場合よりもサセプタの製造が容易となり、例えば直径300mmの半導体ウェーハを支持するサセプタのように、比較的大寸法のサセプタであっても好適に製造することが可能となる。
In addition, the susceptor used in the present invention is formed in a disk shape having a curved overall posture so that the back surface of the main surface supporting the silicon single crystal substrate is recessed toward the center of the back surface. In this case, the present invention can also be applied to a case where the main surface supporting the silicon single crystal substrate is formed in a disk shape having an overall posture that warps so as to protrude.
In this case, since the susceptor may be formed in a warped overall posture, that is, it is not necessary to form the whole posture in a flat plate shape. Manufacturing becomes easy, and even a susceptor having a relatively large size, such as a susceptor that supports a semiconductor wafer having a diameter of 300 mm, can be preferably manufactured.

また、本発明の半導体ウェーハの製造方法によれば、基板の主裏面に接触跡を形成することなく、両面が鏡面研磨処理された基板の主表面上に薄膜を気相成長させて半導体ウェーハを製造することができる。 Further, according to the semiconductor wafer manufacturing method of the present invention, a thin film is vapor-phase grown on the main surface of the substrate whose both surfaces are mirror-polished without forming contact marks on the main back surface of the substrate. Can be manufactured.

以下、図面を参照して、本発明に係る実施の形態について説明する。   Hereinafter, embodiments of the present invention will be described with reference to the drawings.

〔第1の実施の形態〕
先ず、サセプタの構成について説明する。
図1に示す本実施の形態のサセプタ1は、基板Wを主表面側からと主裏面側からとの双方から加熱して行う気相成長の際に該基板Wを支持するものである。
このサセプタ1は、例えば平板な円盤状に概略構成されている。
サセプタ1は、基板Wの支持状態で、該基板Wを当該サセプタ1に対し位置決めさせるための座ぐり2を、上面に有している。この座ぐり2は、基板Wの直径よりも内径が若干大きく設定された平面視円形の凹部である。
ただし、本実施形態のサセプタ1の座ぐり2は、基板Wを支持する円環状の外周側部分21と、該外周側部分21の内側に該外周側部分21よりも窪んだ状態に形成された平面視円形の内周側部分22とを有する二段構成をなしている。
このうち、外周側部分21は、基板Wの周縁部あるいは面取部を好適に支持可能となるように、例えば平面に形成されている。
他方、内周側部分22の底面22aは、例えば、周縁部から中心に向かうほど次第に深くなるよう凹曲面状に窪まされている。
ただし、該内周側部分22の底面22aの窪み形状は、気相成長の加熱の際における基板Wの撓み形状よりも深く設定されている。すなわち、座ぐり2の底面は、気相成長の加熱の際における基板Wの撓み形状よりも窪まされている。
なお、基板Wを加熱しないでサセプタ1により支持した状態における座ぐり2の内周側部分22の底面22aと基板Wの主裏面との最大距離Dは、0.35mm以上、0.45mm未満となるように、例えば0.4mm以下に設定されている。
このようなサセプタ1は、例えば、グラファイトからなる本体部の表面にSiC(炭化珪素)をコーティングすることにより構成されている。
[First Embodiment]
First, the configuration of the susceptor will be described.
The susceptor 1 of the present embodiment shown in FIG. 1 supports the substrate W during vapor phase growth performed by heating the substrate W from both the main surface side and the main back surface side.
The susceptor 1 is schematically configured in a flat disk shape, for example.
The susceptor 1 has a counterbore 2 on the upper surface for positioning the substrate W with respect to the susceptor 1 while the substrate W is supported. This counterbore 2 is a circular recess in plan view with an inner diameter set slightly larger than the diameter of the substrate W.
However, the counterbore 2 of the susceptor 1 of the present embodiment is formed in an annular outer peripheral side portion 21 that supports the substrate W, and in a state of being recessed from the outer peripheral side portion 21 inside the outer peripheral side portion 21. A two-stage configuration having a circular inner peripheral side portion 22 in plan view is formed.
Among these, the outer peripheral side portion 21 is formed in a flat surface, for example, so that the peripheral edge portion or the chamfered portion of the substrate W can be suitably supported.
On the other hand, the bottom surface 22a of the inner peripheral side portion 22 is recessed in a concave curved shape so as to gradually become deeper from the peripheral edge toward the center, for example.
However, the concave shape of the bottom surface 22a of the inner peripheral side portion 22 is set deeper than the bent shape of the substrate W at the time of heating in vapor phase growth. That is, the bottom surface of the spot facing 2 is recessed from the bent shape of the substrate W during the heating in the vapor phase growth.
The maximum distance D between the bottom surface 22a of the inner peripheral side portion 22 of the counterbore 2 and the main back surface of the substrate W in a state where the substrate W is supported by the susceptor 1 without being heated is 0.35 mm or more and less than 0.45 mm. For example, it is set to 0.4 mm or less.
Such a susceptor 1 is configured, for example, by coating SiC (silicon carbide) on the surface of a main body portion made of graphite.

次に、半導体ウェーハの製造装置の構成について説明する。
図2に示すように、半導体ウェーハの製造装置10は、基板W(例えばシリコン単結晶基板)の主表面上に薄膜(例えばシリコン単結晶薄膜)を気相成長させるための装置であり、反応容器11と、この反応容器11内に配された上記サセプタ1と、このサセプタ1を気相成長の際に回転駆動させる駆動装置(図示略)と、サセプタ1の上下に配され反応容器11内を加熱するための加熱装置13(例えばハロゲンランプ)等を備えて概略構成されている。
反応容器11内には、矢印A方向に沿ってガス(原料ガスおよびキャリアガスを含む気相成長用ガス)が導入され、反応容器11内からは、矢印B方向に沿って排気されるようになっている。
Next, the configuration of the semiconductor wafer manufacturing apparatus will be described.
As shown in FIG. 2, a semiconductor wafer manufacturing apparatus 10 is an apparatus for vapor-phase growth of a thin film (for example, a silicon single crystal thin film) on a main surface of a substrate W (for example, a silicon single crystal substrate), and a reaction vessel 11, the susceptor 1 disposed in the reaction vessel 11, a driving device (not shown) for rotating the susceptor 1 during vapor phase growth, and the reaction vessel 11 disposed above and below the susceptor 1. A heating apparatus 13 (for example, a halogen lamp) for heating is generally provided.
Gas (gas phase growth gas containing source gas and carrier gas) is introduced into the reaction vessel 11 along the arrow A direction, and exhausted along the arrow B direction from the reaction vessel 11. It has become.

次に、半導体ウェーハの製造方法について説明する。
先ず、基板Wを支持したサセプタ1を反応容器11内に配し、このサセプタ1を回転させながら、加熱装置13により反応容器11内の基板Wを加熱するとともに、反応容器11内にガスを導入することで、該ガスを基板Wの主表面上に供給して、該基板Wの主表面上に薄膜を気相成長させ、半導体ウェーハを製造することができる。
なお、気相成長の際の基板Wの加熱は、該基板Wの主表面側とサセプタ1を介して該基板Wの主裏面側との双方から行う。
また、基板Wとしては、例えば、両面が鏡面研磨処理されたもの(両面ミラーの基板)を用いる。
Next, a method for manufacturing a semiconductor wafer will be described.
First, the susceptor 1 that supports the substrate W is placed in the reaction vessel 11, and while rotating the susceptor 1, the substrate W in the reaction vessel 11 is heated by the heating device 13 and gas is introduced into the reaction vessel 11. Thus, the gas can be supplied onto the main surface of the substrate W, and a thin film can be vapor-phase grown on the main surface of the substrate W to manufacture a semiconductor wafer.
The substrate W during the vapor phase growth is heated from both the main surface side of the substrate W and the main back surface side of the substrate W through the susceptor 1.
Further, as the substrate W, for example, a substrate whose both surfaces are mirror-polished (a substrate of a double-sided mirror) is used.

ところで、気相成長の際には、基板Wが、加熱によりその中心部が座ぐり2の内周側部分22の底面22aに近づく方向に僅かに撓むことがある。
これに対し、本実施形態のサセプタ1は、座ぐり2の内周側部分22の底面(座ぐり底面)22aが、気相成長の加熱の際における基板Wの撓み形状よりも窪まされているので、このように加熱によって基板Wが撓んだとしても、基板Wの主裏面が底面22aに接触してしまうことを防止できる。よって、基板Wの主裏面に座ぐり2との接触跡が形成されてしまうことを好適に防止できる。
しかも、座ぐり2の内周側部分22の底面22aが、周縁部から中心に向かうほど次第に窪まされているため、該周縁部における基板Wと底面22aとの間隔を中心部よりも狭くすることができる。よって、該底面22aと基板Wとの非接触状態を保ちつつも、該間隔への水素(キャリアガスとして用いる)の侵入を抑制できる。この結果、該水素による基板W主裏面のエッチングも抑制できるので、該主裏面に微少なキズが形成されていたとしても、このキズが目立つようになってしまうことを防止できる。
従って、両面ミラーの基板Wを用いて半導体ウェーハを製造する場合にも、該基板Wの主裏面に底面22aとの接触跡を形成してしまうことを防止できる。
なお、基板Wの主裏面に形成されている微少なキズは、研磨工程にて形成される研磨キズであると考えられ、水素エッチングにより目立つようになると考えられる。
By the way, during vapor phase growth, the substrate W may be slightly bent in the direction in which the central portion approaches the bottom surface 22a of the inner peripheral side portion 22 of the spot facing 2 due to heating.
On the other hand, in the susceptor 1 of this embodiment, the bottom surface (the counterbore bottom surface) 22a of the inner peripheral side portion 22 of the counterbore 2 is recessed from the bent shape of the substrate W during the vapor phase growth heating. Therefore, even if the substrate W is bent by the heating as described above, the main back surface of the substrate W can be prevented from coming into contact with the bottom surface 22a. Therefore, it is possible to suitably prevent the contact trace with the spot facing 2 from being formed on the main back surface of the substrate W.
Moreover, since the bottom surface 22a of the inner peripheral side portion 22 of the spot facing 2 is gradually depressed toward the center from the peripheral edge portion, the distance between the substrate W and the bottom surface 22a at the peripheral edge portion is made narrower than the central portion. Can do. Therefore, it is possible to suppress the penetration of hydrogen (used as a carrier gas) into the gap while maintaining the non-contact state between the bottom surface 22a and the substrate W. As a result, the etching of the main back surface of the substrate W due to the hydrogen can also be suppressed, so that even if a slight scratch is formed on the main back surface, the scratch can be prevented from becoming noticeable.
Therefore, even when a semiconductor wafer is manufactured using the substrate W of the double-sided mirror, it is possible to prevent the contact trace with the bottom surface 22a from being formed on the main back surface of the substrate W.
It should be noted that minute scratches formed on the main back surface of the substrate W are considered to be polishing scratches formed in the polishing process, and are conspicuous by hydrogen etching.

次に、本実施形態の好適な実施例を説明する。
<実施例>
本発明者は、直径300mmの基板を支持可能で、基板Wを加熱しないで支持した状態における基板Wの主裏面と座ぐり2の内周側部分22の底面22aとの最大距離が0.4mmとなるように構成した本実施の形態のサセプタ1と、該最大距離が0.35mmとなるように構成したサセプタ1とを各々作成した。
そして、これらサセプタ1を各々用いて、両面ミラーの基板Wとしてのシリコン単結晶基板の主表面上に、水素雰囲気中1130℃で、薄膜としてのシリコン単結晶薄膜を気相成長させて、半導体ウェーハとしてのシリコンエピタキシャルウェーハを製造した。
この製造したシリコンエピタキシャルウェーハの主裏面を外観検査すると、前記最大距離が0.4mmのサセプタ1を用いた場合と、同0.35mmのサセプタ1を用いた場合で、ともに目立つキズは発見されなかった。
Next, a preferred example of this embodiment will be described.
<Example>
The inventor can support a substrate having a diameter of 300 mm, and the maximum distance between the main back surface of the substrate W and the bottom surface 22a of the inner peripheral side portion 22 of the counterbore 2 in a state where the substrate W is supported without heating is 0.4 mm. The susceptor 1 of the present embodiment configured to be as follows and the susceptor 1 configured to have a maximum distance of 0.35 mm were prepared.
Then, using each of these susceptors 1, a silicon single crystal thin film as a thin film is vapor-phase grown at 1130 ° C. in a hydrogen atmosphere on the main surface of a silicon single crystal substrate as a substrate W of a double-sided mirror, and a semiconductor wafer As a silicon epitaxial wafer.
When the main back surface of the manufactured silicon epitaxial wafer was visually inspected, no noticeable scratches were found both when the susceptor 1 having the maximum distance of 0.4 mm was used and when the susceptor 1 having the same 0.35 mm was used. It was.

<比較例>
また、本発明者は、比較例として、前記最大距離が0.45mmである他は上記の実施例と同様のサセプタと、前記最大距離が0.7mmである他は上記の実施例と同様のサセプタとを各々作成し、これらサセプタを用いて、上記の実施例と同様の条件で半導体ウェーハ(つまりシリコンエピタキシャルウェーハ)を製造した。
この製造したシリコンエピタキシャルウェーハの主裏面を外観検査すると、前記最大距離が0.45mmのサセプタを用いた場合には、目立つキズが発見された。また、前記最大距離が0.7mmのサセプタを用いた場合には、目立つキズがより多く発見された。
<Comparative example>
In addition, as a comparative example, the inventor has the same susceptor as in the above example except that the maximum distance is 0.45 mm, and the same as in the above example except that the maximum distance is 0.7 mm. Each susceptor was prepared, and using these susceptors, a semiconductor wafer (that is, a silicon epitaxial wafer) was manufactured under the same conditions as in the above-described example.
When the main back surface of the manufactured silicon epitaxial wafer was visually inspected, a noticeable scratch was found when the susceptor having the maximum distance of 0.45 mm was used. Further, when a susceptor having the maximum distance of 0.7 mm was used, more conspicuous scratches were found.

このような実施例と比較例との検討から明らかなように、本実施の形態のサセプタ1は、基板Wを加熱しないで支持した状態における基板Wの主裏面と座ぐり2の内周側部分22の底面22aとの最大距離が0.4mm以下となるように構成すれば、該底面22aと基板Wとの間隔への水素の侵入を抑制でき、該水素による基板主裏面のエッチングも抑制できる。
よって、基板Wの主裏面に元々微少なキズが形成されていても、このキズが半導体ウェーハの製造後において目立つようになってしまうことを防止できる。
As is clear from the examination of such an example and a comparative example, the susceptor 1 of the present embodiment is such that the main back surface of the substrate W and the inner peripheral side portion of the counterbore 2 in a state where the substrate W is supported without being heated. If the maximum distance between the bottom surface 22a and the bottom surface 22a is 0.4 mm or less, hydrogen can be prevented from entering the space between the bottom surface 22a and the substrate W, and etching of the main back surface of the substrate due to the hydrogen can also be suppressed. .
Therefore, even if a minute flaw is originally formed on the main back surface of the substrate W, it can be prevented that the flaw becomes noticeable after the production of the semiconductor wafer.

以上のような実施の形態によれば、座ぐり2の底面22aが、気相成長の加熱の際における基板Wの撓み形状よりも窪まされているので、基板Wが、加熱によりその中心部が座ぐり2に近づく方向に僅かに撓んだとしても、基板Wの主裏面と座ぐり2の底面22aとを非接触状態に維持することができる。よって、基板Wの主裏面に接触跡が形成されてしまうことを好適に防止できる。
しかも、座ぐり2の底面22aが周縁部から中心に向かうほど次第に窪まされているため、周縁部における基板Wと座ぐり2との間隔を狭くすることができる。よって、該間隔への水素の侵入を抑制できる結果、該水素による基板主裏面のエッチングも抑制できるので、該主裏面に微少なキズが形成されていても、このキズが目立つようになってしまうことを防止できる。
また、特に、内周側部分22の底面22aと基板Wとの最大距離Dが、基板Wを加熱しないで支持した状態で0.35mm以上、0.45mm未満、例えば0.4mm以下となるように、該底面22aが窪まされているので、基板Wと座ぐり2との間隔への水素の侵入を確実に抑制できる。
According to the embodiment as described above, since the bottom surface 22a of the spot facing 2 is recessed from the bending shape of the substrate W during the vapor phase growth heating, the central portion of the substrate W is heated. Even if it slightly bends in the direction approaching the counterbore 2, the main back surface of the substrate W and the bottom surface 22a of the counterbore 2 can be maintained in a non-contact state. Therefore, it is possible to suitably prevent contact marks from being formed on the main back surface of the substrate W.
In addition, since the bottom surface 22a of the spot facing 2 is gradually depressed toward the center from the peripheral edge, the distance between the substrate W and the counterbore 2 at the peripheral edge can be reduced. Therefore, as a result of suppressing the penetration of hydrogen into the gap, the etching of the main back surface of the substrate due to the hydrogen can also be suppressed. Therefore, even if a slight scratch is formed on the main back surface, this scratch becomes conspicuous. Can be prevented.
In particular, the maximum distance D between the bottom surface 22a of the inner peripheral portion 22 and the substrate W is 0.35 mm or more and less than 0.45 mm, for example, 0.4 mm or less when the substrate W is supported without being heated. In addition, since the bottom surface 22a is recessed, the entry of hydrogen into the gap between the substrate W and the counterbore 2 can be reliably suppressed.

なお、上記の第1の実施の形態では、座ぐり2の底面22aが、周縁部から中心に向かうほど凹曲面状に次第に窪まされている(ドーム状に窪まされている)例について説明したが、本発明はこれに限らず、座ぐり2の底面が、気相成長の加熱の際における基板Wの撓み形状よりも窪まされていれば、その他の如何なる形状であっても、基板Wの主裏面と座ぐり2の底面22aとを非接触状態に維持することができるので、基板Wの主裏面に接触跡が形成されることを防止できる。
具体的には、例えば、座ぐりの底面が、倒立円錐状(ただし、上面に比べて高さが極めて小さい)に窪まされていても良い。
或いは、座ぐりの底面が、倒立円錐台状に窪まされていても良い。すなわち、座ぐりの底面の一部は、周縁部から中心に向かうほど次第に窪む傾斜面状部(例えば、倒立円錐台状の窪みにおける側周面に相当)となっているとともに、該底面のうちで該傾斜面状部よりも中央寄りの部位(例えば、倒立円錐台状の窪みにおける平面部に相当)は、該傾斜面状部の最深部以上の深さ(窪みが倒立円錐台状の場合、傾斜面状部の最深部と等しい深さ)に設定されていても良い。
また、例えば、上記のような二段構成の座ぐりの場合などは、座ぐり2の底面22aが、気相成長の加熱の際における基板Wの撓み形状よりも窪まされていれば、該底面22aが平面に形成されていても良い。ただし、この場合、周縁部における底面22aと基板Wとの間隔が大きくなるため、基板Wがエッチングされやすくなる上、底面22aが平面であるため、サセプタが大寸法の場合、該サセプタを製造し難い。
また、例えば、上記のような二段構成の座ぐりの場合などは、座ぐり2の底面22aが、隆起していても良い。ただし、この場合も、周縁部における底面22aと基板Wとの間隔が大きくなるため、基板Wがエッチングされやすくなる上、基板周縁部の温度が中心部に比べて低くなるのでスリップが発生しやすくなる。
In the first embodiment, the example has been described in which the bottom surface 22a of the spot facing 2 is gradually recessed into a concave curved surface (recessed into a dome shape) from the peripheral edge toward the center. The present invention is not limited to this, and the bottom surface of the counterbore 2 may be in any other shape as long as the bottom surface of the counterbore 2 is recessed from the bent shape of the substrate W during the vapor phase growth heating. Since the back surface and the bottom surface 22a of the spot facing 2 can be maintained in a non-contact state, contact traces can be prevented from being formed on the main back surface of the substrate W.
Specifically, for example, the bottom surface of the spot facing may be recessed in an inverted conical shape (however, the height is extremely smaller than the top surface).
Alternatively, the bottom face of the counterbore may be recessed in an inverted truncated cone shape. That is, a part of the bottom face of the counterbore is an inclined surface-like part gradually recessed toward the center from the peripheral part (for example, corresponding to a side peripheral surface in the inverted frustoconical depression). The portion closer to the center than the inclined surface portion (e.g., corresponding to the flat surface portion of the inverted truncated cone-shaped recess) is deeper than the deepest portion of the inclined surface portion (when the recess is an inverted truncated cone shape) And a depth equal to the deepest portion of the inclined surface portion.
Further, for example, in the case of the counterbore of the two-stage configuration as described above, if the bottom surface 22a of the counterbore 2 is recessed from the bent shape of the substrate W during the vapor phase growth heating, the bottom surface 22a May be formed in a plane. However, in this case, since the distance between the bottom surface 22a and the substrate W at the peripheral edge is increased, the substrate W is easily etched, and the bottom surface 22a is flat. Therefore, when the susceptor is large, the susceptor is manufactured. hard.
Further, for example, in the case of a counterbore having a two-stage structure as described above, the bottom surface 22a of the counterbore 2 may be raised. However, in this case as well, the gap between the bottom surface 22a and the substrate W at the peripheral portion becomes large, so that the substrate W is easily etched, and the temperature at the peripheral portion of the substrate is lower than that at the central portion, so that slip is likely to occur. Become.

〔第2の実施の形態〕
第2の実施の形態では、上記第1の実施の形態と同様の構成要素には同一の符号を付し、その説明を省略する。
図3に示す第2の実施の形態のサセプタ30は、直線に引かれた仮想線Lとの比較から分かるように、基板Wを支持する主表面31に対し裏面32が、該裏面32の中心部ほど窪むように反り返った全体姿勢をなす盤状に形成されている。
このサセプタ30の主表面31には、上記の第1の実施の形態と同様の座ぐり2が形成されている。
この第2の実施の形態によれば、サセプタ30が、反り返った全体姿勢に形成されていても良い。つまり、全体姿勢が平板状となるように形成する必要がない。よって、平板状に形成する必要がある場合よりもサセプタ30の製造が容易となり、例えば直径300mmの半導体ウェーハを支持するサセプタのように、比較的大寸法のサセプタであっても好適に製造することが可能となる。
[Second Embodiment]
In the second embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.
In the susceptor 30 of the second embodiment shown in FIG. 3, as can be seen from the comparison with the imaginary line L drawn in a straight line, the back surface 32 is the center of the back surface 32 with respect to the main surface 31 that supports the substrate W. It is formed in a board shape that forms an overall posture that warps in such a manner that it is depressed as the portion is formed.
A counterbore 2 similar to that in the first embodiment is formed on the main surface 31 of the susceptor 30.
According to the second embodiment, the susceptor 30 may be formed in a warped overall posture. That is, it is not necessary to form the entire posture to be flat. Therefore, the susceptor 30 can be manufactured more easily than the case where it is necessary to form it in a flat plate shape. For example, even a susceptor having a relatively large size such as a susceptor that supports a semiconductor wafer having a diameter of 300 mm can be preferably manufactured. Is possible.

なお、上記の各実施の形態では、座ぐり2が二段構成をなす例について説明したが、これに限らず、例えば、図4に示すサセプタ40のように、座ぐり2が一段であっても良い。図4に示す例の場合、座ぐり2は、その底面2aが基板Wに対し円状に線接触状態となって該基板Wを支持する。   In each of the above-described embodiments, the example in which the counterbore 2 has a two-stage configuration has been described. However, the present invention is not limited thereto, and for example, the counterbore 2 has one stage as in the susceptor 40 illustrated in FIG. Also good. In the case of the example shown in FIG. 4, the counterbore 2 supports the substrate W with its bottom surface 2 a in a circular line contact state with the substrate W.

第1の実施の形態のサセプタを示す模式的な正面断面図である。It is typical front sectional drawing which shows the susceptor of 1st Embodiment. 半導体ウェーハの製造装置を示す模式的な正面断面図である。It is typical front sectional drawing which shows the manufacturing apparatus of a semiconductor wafer. 第2の実施の形態のサセプタを示す模式的な正面断面図である。It is a typical front sectional view showing a susceptor of a 2nd embodiment. 座ぐりが一段の例を示す模式的な正面図である。It is a typical front view which shows the example in which the spot face is one step. 従来の気相成長装置(タイプ1)を示す模式的な正面断面図である。It is typical front sectional drawing which shows the conventional vapor phase growth apparatus (type 1). 従来の気相成長装置(タイプ2)を示す模式的な正面断面図である。It is typical front sectional drawing which shows the conventional vapor phase growth apparatus (type 2).

符号の説明Explanation of symbols

1 サセプタ
2 座ぐり
21 外周側部分
22 内周側部分
22a 内周側部分の底面(座ぐり底面)
30 サセプタ
40 サセプタ
W 半導体基板
D 最大距離
DESCRIPTION OF SYMBOLS 1 Susceptor 2 Counterbore 21 Outer peripheral part 22 Inner peripheral part 22a Bottom surface of inner peripheral part (bottom face of counterbore)
30 Susceptor 40 Susceptor W Semiconductor substrate D Maximum distance

Claims (1)

両面が鏡面研磨処理された直径300mmのシリコン単結晶基板の主表面上にシリコン単結晶薄膜を気相成長させて半導体ウェーハを製造する半導体ウェーハの製造方法において、
シリコン単結晶基板を主表面側からと主裏面側からとの双方から加熱して行う気相成長の際に該シリコン単結晶基板を支持するサセプタとして、
当該サセプタに対しシリコン単結晶基板を位置決めさせるための座ぐりを有し、
該座ぐりの底面が、周縁部から中心に向かうほど次第に窪まされていることにより、前記加熱の際におけるシリコン単結晶基板の撓み形状よりも窪まされており、
この底面とシリコン単結晶基板との最大距離が、シリコン単結晶基板を加熱しないで支持した状態で0.35mm以上、0.45mm未満となるように、該底面が窪まされているサセプタ
を用いるとともに、
前記座ぐりとして、シリコン単結晶基板を支持する外周側部分と、該外周側部分の内側に該外周側部分よりも窪んだ状態に形成された内周側部分とを有する二段構成をなすものを用い、
前記サセプタにより支持させたシリコン単結晶基板を、主表面側と該サセプタを介して主裏面側との双方から加熱しながら、該シリコン単結晶基板の主表面上にシリコン単結晶薄膜を気相成長させることを特徴とする半導体ウェーハの製造方法。
In a semiconductor wafer manufacturing method of manufacturing a semiconductor wafer by vapor-phase growth of a silicon single crystal thin film on a main surface of a silicon single crystal substrate having a diameter of 300 mm and having both surfaces subjected to mirror polishing,
As a susceptor for supporting the silicon single crystal substrate during vapor phase growth performed by heating the silicon single crystal substrate from both the main surface side and the main back surface side,
Having a counterbore for positioning the silicon single crystal substrate with respect to the susceptor,
The bottom face of the counterbore is gradually recessed from the peripheral edge toward the center, thereby being recessed from the bent shape of the silicon single crystal substrate during the heating,
The susceptor in which the bottom surface is recessed so that the maximum distance between the bottom surface and the silicon single crystal substrate is 0.35 mm or more and less than 0.45 mm when the silicon single crystal substrate is supported without heating.
And using
The counterbore has a two-stage structure having an outer peripheral side portion that supports the silicon single crystal substrate and an inner peripheral side portion that is formed inside the outer peripheral side portion so as to be recessed from the outer peripheral side portion. Use
The silicon single crystal substrate is supported by said susceptor, with heating from both the main back side over a main surface side and the susceptor, vapor phase growth of a silicon single crystal thin film on the main surface of the silicon single crystal substrate A method for producing a semiconductor wafer, comprising:
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JPS6366925A (en) * 1986-05-27 1988-03-25 ジエミニ リサ−チ,インコ−ポレイテツド Improved susceptor in cvd reaction chamber
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JPH09115840A (en) * 1995-10-17 1997-05-02 Hitachi Electron Eng Co Ltd Wafer tray for cvd system
JPH11329983A (en) * 1998-05-12 1999-11-30 Sumitomo Metal Ind Ltd Method for forming film by cvd and device therefor
JP2002502117A (en) * 1998-02-02 2002-01-22 シリコン ヴァレイ グループ サーマル システムズ リミテッド ライアビリティ カンパニー Wafer carrier and semiconductor device for semiconductor substrate processing

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JPH06326078A (en) * 1993-05-10 1994-11-25 Tokyo Electron Ltd Heat treatment device
JPH09115840A (en) * 1995-10-17 1997-05-02 Hitachi Electron Eng Co Ltd Wafer tray for cvd system
JP2002502117A (en) * 1998-02-02 2002-01-22 シリコン ヴァレイ グループ サーマル システムズ リミテッド ライアビリティ カンパニー Wafer carrier and semiconductor device for semiconductor substrate processing
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