JP4655029B2 - Light emitting device and method for manufacturing semiconductor light emitting element - Google Patents

Description

  The present invention relates to a semiconductor light emitting element, a method for manufacturing the same, and a light emitting device including the semiconductor light emitting element.

  2. Description of the Related Art In recent years, a technique for manufacturing a light emitting device by mounting many bare chips of semiconductor light emitting elements typified by light emitting diodes (hereinafter referred to as “LED (Light Emitting Diode)”) on a circuit board has been used. Such light emitting devices are being used for automobile headlights, backlights for liquid crystal display devices, and the like, and higher luminance and smaller size are required for the light emitting devices and LED bare chips.

  In Patent Document 1, by mounting a plurality of light emitting elements inserted into a plurality of through holes formed in a three-dimensional substrate, the distance between the light emitting elements is reduced, and the electronic component having these light emitting elements is miniaturized. Techniques to do this are disclosed.

  In the light emitting element of Patent Document 2, the light emitted from the top surface of the light emitting element is blocked by the electrode by providing the electrode of the light emitting element only on the bottom surface (that is, the surface facing the circuit board). Is prevented. Thereby, the brightness | luminance of a light emitting element is improved. Also disclosed is a technique for improving the luminance of the light emitting element by concentrating the light emitted from the side face of the light emitting element by arranging the reflector in the vicinity of the side face of the light emitting element.

  In the light-emitting device of Patent Document 3, in the cup in which the light-emitting element is accommodated, a light reflecting portion is provided on the bottom surface of the cup and on the side surface of the cup that is provided apart from the light-emitting element. A technique for improving the luminance of a light-emitting device by providing a reflection portion on an electrode is also disclosed.

  On the other hand, in Patent Document 4, a part of the side surface of the n-type transparent substrate of the diode is tilted from a direction perpendicular to the n-type epitaxial layer and the p-type epitaxial layer, so that it is compared with a normal rectangular parallelepiped diode. A technique for suppressing light absorption inside the n-type transparent substrate and improving the light extraction rate from the diode is disclosed.

The semiconductor light emitting device of Patent Document 5 has an inverted quadrangular frustum shape whose upper surface and bottom surface are rectangular, and an upper window layer formed by a conductive transparent substrate above and below the n-type epitaxial layer and the p-type epitaxial layer, and A bottom window layer is provided. In the semiconductor light emitting device, light is extracted only from the upper surface of the semiconductor light emitting device by coating the inclined side surface with a thin film having high reflectivity. In Patent Document 5, it is also proposed that a part of the thin film on the side surface of the semiconductor light emitting element is an electric ohmic contact portion (electrode).
JP 2003-179268 A JP-A-11-161197 JP 2006-41133 A JP 58-34985 A Japanese Patent Laid-Open No. 10-341035

  By the way, in the electronic component of patent document 1, the high brightness | luminance of a light emitting element is not considered, and in the light-emitting device of patent document 2 and patent document 3, the light reflection part is provided in the position away from the light emitting element. Therefore, the light emitting device is increased in size.

  In the diode of Patent Document 4, the overall light extraction rate including the light from the side surface of the diode can be relatively greatly improved, but the light extraction rate on one main surface side of the diode is improved. There is a limit to increasing the brightness of a diode in a light emitting device that emits light in one direction. Further, in the semiconductor light emitting device of Patent Document 5, since the upper window layer and the bottom window layer are formed above and below the n-type epitaxial layer and the p-type epitaxial layer, the manufacture of the semiconductor light emitting device is complicated.

  The present invention has been made in view of the above-described problems, and has as its main object to realize high luminance and downsizing of a light emitting device.

The invention according to claim 1 is a light emitting device, wherein an element upper surface which is a rectangular light emitting surface, a rectangular element lower surface parallel to the element upper surface and smaller than the element upper surface, and four element side surfaces An inverted square frustum-shaped semiconductor light emitting element having a rectangular opening, a rectangular inner bottom surface smaller than the opening, and an inverted square frustum-shaped cavity having four inner surfaces, The semiconductor light emitting device comprises: a cavity substrate inserted into the cavity with the lower surface of the device and the four device side surfaces facing the inner bottom surface and the four inner side surfaces of the cavity, and the semiconductor light emitting device A rectangular base material upper surface, a rectangular base material lower surface parallel to the base material upper surface and smaller than the upper surface of the base material, and an inverted square frustum-shaped light-transmitting element base having four base material side surfaces Before material A multilayer semiconductor layer having a first semiconductor layer, a light emitting layer and a second semiconductor layer, which are sequentially stacked on the lower surface of the element base, and a first reflective layer which is formed on the lower surface of the element and reflects light from the light emitting layer And a second reflective layer that is formed on the four element side surfaces and reflects light from the light emitting layer, wherein the first reflective layer is opposite to the element base of the second semiconductor layer. The second semiconductor layer is electrically connected to a first substrate electrode formed on the inner bottom surface of the cavity, and the second reflective layer connects the first semiconductor layer to the cavity. A light emitting device characterized in that the light emitting device is electrically connected to a second substrate electrode formed on any one of four inner surfaces.

The invention according to claim 2 is the light emitting device according to claim 1, wherein a protruding electrode bonded to the first substrate electrode of the cavity substrate is formed on the first reflective layer. A light emitting device characterized by the above.

Invention of Claim 3 is a light-emitting device of Claim 1 or 2, Comprising: Between the said 1st board | substrate electrode and the said semiconductor light-emitting device, The said 2nd board | substrate electrode, and the said semiconductor light-emitting element, The light emitting device is characterized in that a conductive metal paste or a solder paste is filled in between.

The invention according to claim 4 is the light emitting device according to claim 3, wherein the cavity substrate separates a region including the first substrate electrode and a region including the second substrate electrode in the cavity. Thus, the light emitting device includes an insulating convex portion extending linearly.

The invention according to claim 5 is the light emitting device according to any one of claims 1 to 4, wherein the cavity substrate is located at a boundary between the inner bottom surface of the cavity and the four inner side surfaces. A light-emitting device comprising a groove portion continuously formed along the same.

The invention according to claim 6 is a light emitting device, wherein the upper surface of the element is a rectangular light emitting surface, the lower surface of the rectangular element parallel to the upper surface of the element and smaller than the upper surface of the element, and the side surfaces of the four elements An inverted square frustum-shaped semiconductor light emitting element having a rectangular opening, a rectangular inner bottom surface smaller than the opening, and an inverted square frustum-shaped cavity having four inner surfaces, The semiconductor light emitting device comprises: a cavity substrate inserted into the cavity with the lower surface of the device and the four device side surfaces facing the inner bottom surface and the four inner side surfaces of the cavity, and the semiconductor light emitting device A rectangular base material upper surface, a rectangular base material lower surface parallel to the base material upper surface and smaller than the upper surface of the base material, and an inverted square frustum-shaped light-transmitting element base having four base material side surfaces Before material A multilayer semiconductor layer having a first semiconductor layer, a light emitting layer, and a second semiconductor layer, which are sequentially laminated on the upper surface of the element substrate, and a first reflective layer that is formed on the lower surface of the element and reflects light from the light emitting layer And a second reflective layer that is formed on the four element side surfaces and reflects light from the light emitting layer,
Further, the second semiconductor layer includes a translucent electrode layer that is in contact with the main surface of the second semiconductor layer opposite to the element base and is electrically connected to the second reflective layer, and the second reflective layer includes: The second semiconductor layer and the translucent electrode layer are electrically connected to a first substrate electrode formed on one of the four inner surfaces of the cavity, and the first reflective layer and the second reflective layer At least one of the light emitting devices is characterized in that the first semiconductor layer is electrically connected to a second substrate electrode formed on one of the inner bottom surface and the four inner side surfaces of the cavity.

The invention according to claim 7 is the light emitting device according to claim 6, wherein the first reflective layer electrically connects the first semiconductor layer to the second substrate electrode, and the first reflective layer. The light emitting device is characterized in that a protruding electrode bonded to the second substrate electrode is formed on the layer.

Invention of Claim 8 is a light-emitting device of Claim 6 or 7, Comprising: Between the said 1st board | substrate electrode and the said semiconductor light-emitting element, and the said 2nd board | substrate electrode and the said semiconductor light-emitting element, The light emitting device is characterized in that a conductive metal paste or a solder paste is filled in between.

The invention according to claim 9 is the light emitting device according to claim 8 , wherein the cavity substrate separates a region including the first substrate electrode and a region including the second substrate electrode in the cavity. Thus, the light emitting device includes an insulating convex portion extending linearly.

A tenth aspect of the present invention is the light emitting device according to any one of the sixth to ninth aspects , wherein the cavity substrate is located at a boundary between the inner bottom surface and the four inner side surfaces of the cavity. A light-emitting device comprising a groove portion continuously formed along the same.

The invention according to claim 11 is an inverted quadrangular frustum having an element upper surface which is a rectangular light emitting surface, a rectangular element lower surface which is parallel to the element upper surface and smaller than the element upper surface, and four element side surfaces. And a) a step of sequentially laminating a first semiconductor layer, a light emitting layer, and a second semiconductor layer on one main surface of a planar light-transmitting element substrate; B) The second semiconductor layer, the light emitting layer, the first semiconductor layer, and a part of the element base material are cut out from the second semiconductor layer side so that the cross section has a substantially triangular shape and a lattice shape. Forming a plurality of arranged grooves, c) forming a reflective layer on the surfaces of a plurality of quadrangular pyramid-shaped protrusions surrounded by the plurality of grooves, and d) Polishing from the opposite side of the plurality of protrusions, separating the plurality of protrusions from each other A step of obtaining a plurality of semiconductor light emitting elements Te is a manufacturing method of the semiconductor light emitting device characterized by comprising a.

The invention according to claim 12 is the method for manufacturing a semiconductor light emitting device according to claim 11, wherein an insulating layer is provided on the surface of the plurality of protrusions between the step b) and the step c). A step of forming, wherein the reflective layer has conductivity, and is electrically connected to the first semiconductor layer and the element substrate and insulated from the second semiconductor layer; A method of manufacturing a semiconductor light emitting device, comprising: a portion electrically connected to the second semiconductor layer and insulated from the first semiconductor layer and the device substrate.

According to a thirteenth aspect of the present invention, there is provided an inverted quadrangular frustum having an element upper surface that is a rectangular light emitting surface, a rectangular element lower surface that is parallel to the element upper surface and smaller than the element upper surface, and four element side surfaces. And a) a step of sequentially laminating a first semiconductor layer, a light emitting layer, and a second semiconductor layer on one main surface of a planar light-transmitting element substrate; B) a step of laminating a translucent electrode layer on the second semiconductor layer; c) a step of attaching an adhesive holding member from the translucent electrode layer side; and d) the element substrate side. From the element substrate, the first semiconductor layer, the light emitting layer, the second semiconductor element, the translucent electrode layer, and a part of the holding member, the cross section has a substantially triangular shape and a lattice. Forming a plurality of grooves arranged in a shape, and e) on the holding member And a step of forming a reflective layer on the surface of the plurality of quadrangular pyramid-shaped projections surrounded by the plurality of grooves, and f) a plurality of semiconductor light emitting elements by peeling the plurality of projections from the holding member A method for manufacturing a semiconductor light emitting device.

According to the first to tenth aspects of the present invention, it is possible to achieve high brightness and downsizing of the light emitting device. In the inventions of claims 1 and 6 , the light emitting device can be further downsized. In the invention of claim 1 , the heat dissipation of the semiconductor light emitting device can be improved, and in the invention of claim 6 , the area of the light emitting layer of the semiconductor light emitting device can be increased.

In the second and seventh aspects of the invention, the first substrate electrode can be reliably bonded to the first reflective layer . In the third and eighth aspects of the invention, the reliability of electrical connection between the semiconductor light emitting element and the cavity substrate can be improved.

According to the ninth aspect of the present invention, the first substrate electrode and the second substrate electrode can be reliably insulated. According to the fifth and tenth aspects of the present invention, the semiconductor light emitting device can be easily mounted on the cavity substrate.

In the invention of claims 11 to 13 , a high-luminance and small-sized semiconductor light emitting device can be easily manufactured.

  FIG. 1 is a plan view of the light-emitting device 1 according to the first embodiment of the present invention, and FIG. 2 is a cross-sectional view of the light-emitting device 1 cut at the position AA in FIG. As shown in FIG. 1 and FIG. 2, the light emitting device 1 includes a cavity substrate 2 that is a three-dimensional wiring board (so-called MID (Molded Interconnect Device)) in which a cavity 21 (that is, a recess) is formed, and a cavity of the cavity substrate 2. The semiconductor light emitting device 3 mounted in the semiconductor device 21 and the phosphor layer 4 covering the opening 211 of the cavity 21 in which the semiconductor light emitting device 3 is inserted are provided. In the following description, for the sake of convenience, the phosphor layer 4 side in FIG. 2 will be described as the upper side, and the cavity substrate 2 side as the lower side, but the vertical direction does not necessarily coincide with the direction of gravity.

  FIG. 3 is a plan view showing the cavity substrate 2, and FIG. 4 is a cross-sectional view of the cavity substrate 2 cut at a position BB in FIG. As shown in FIGS. 3 and 4, the cavity 21 has an inverted square frustum shape having a rectangular opening 211, a rectangular inner bottom surface 212 smaller than the opening 211, and four inner side surfaces 213. The center of the opening 211 of the cavity 21 and the center of the inner bottom surface 212 coincide in plan view, and the four trapezoidal inner side surfaces 213 of the cavity 21 are respectively directed from the edge of the opening 211 toward the edge of the inner bottom surface 212. It has an inclined surface. In the cavity substrate 2, the groove 214 is continuously formed along all the boundaries between the inner bottom surface 212 and the four inner side surfaces 213 of the cavity 21.

  As shown in FIG. 4, in the cavity substrate 2, the first substrate electrode 22 (hereinafter referred to as “p substrate electrode 22”) that is electrically connected to the p-type semiconductor layer 323 (see FIG. 6) of the semiconductor light emitting element 3. ) Is formed on the inner bottom surface 212 of the cavity 21 and is electrically connected to the n-type semiconductor layer 321 (see FIG. 6) of the semiconductor light emitting device 3 (hereinafter referred to as “n substrate electrode”). 23 ”is formed on the four inner side surfaces 213 in the cavity 21. The p substrate electrode 22 and the n substrate electrode 23 are formed by performing gold plating on the copper wiring on the substrate body formed of resin, ceramic, glass epoxy, or the like. The substrate body may be formed of a metal material having a composite layer or enamel layer on the surface.

  As shown in FIGS. 3 and 4, the inner bottom surface 212 of the cavity 21 has a region including the p substrate electrode 22 in the cavity 21 and the n substrate electrode 23 around the p substrate electrode 22 that is rectangular in plan view. An annular insulating convex portion 24 extending linearly is formed so as to isolate the region including the. In the light emitting device 1, as shown in FIG. 4, the n substrate electrode 23 and the p substrate electrode 22 are respectively connected to the electrode 252 formed on the back surface side of the cavity substrate 2 through the through hole 251 formed in the cavity substrate 2. The electrodes 252 are electrically connected to the external substrate.

  FIG. 5 is a plan view showing the semiconductor light emitting element 3, and FIG. 6 is a cross-sectional view of the semiconductor light emitting element 3 taken along the line CC in FIG. In the present embodiment, the semiconductor light emitting element 3 is an LED (Light Emitting Diode) that emits blue light having a wavelength of 400 nm to 500 nm.

  As shown in FIGS. 5 and 6, the semiconductor light emitting device 3 includes a device upper surface 301 that is a rectangular light emitting surface, a rectangular device lower surface 302 that is parallel to the device upper surface 301 and smaller than the device upper surface 301, and an element It is an inverted quadrangular truncated pyramid shape having four element side surfaces 303 which are inclined surfaces inclined from the edge of the upper surface 301 toward the edge of the element lower surface 302. When the semiconductor light emitting element 3 is inserted into the cavity 21 of the cavity substrate 2 (see FIGS. 3 and 4), the four element side surfaces 303 of the semiconductor light emitting element 3 are the four inner side surfaces 213 of the cavity 21 (see FIGS. 3 and 4). 4), the lower surface 302 of the element faces the inner bottom surface 212 of the cavity 21.

  As shown in FIG. 6, the semiconductor light emitting device 3 includes a transparent substrate 31 that is a light transmissive element substrate, and a multilayer semiconductor layer 32 provided on the transparent substrate 31. The transparent base material 31 includes a rectangular base material upper surface 311, a rectangular base material lower surface 312 that is parallel to the base material upper surface 311 and smaller than the base material upper surface 311, and the edge of the base material upper surface 311 to the base material lower surface 312. It is an inverted quadrangular frustum shape having four base material side surfaces 313 which are inclined surfaces inclined toward the edge. In the present embodiment, the substrate upper surface 311 of the transparent substrate 31 is the light emitting surface of the semiconductor light emitting element 3 (that is, the element upper surface 301). The multilayer semiconductor layer 32 formed on the substrate lower surface 312 of the n-type transparent substrate 31 is an n-type semiconductor layer 321 that is a first semiconductor layer sequentially stacked on the substrate lower surface 312, and emits light. A layer 322 and a p-type semiconductor layer 323 which is a second semiconductor layer are included.

  The semiconductor light-emitting element 3 includes a light-transmitting insulating layer 33 formed on the element lower surface 302 and the element side surface 303, and a main layer formed on the element lower surface 302 opposite to the transparent substrate 31 of the p-type semiconductor layer 323. A p-electrode layer 34 that is electrically connected to the p-type semiconductor layer 323 by contacting the surface, four element side surfaces 303 (that is, four base material side surfaces 313 of the transparent base material 31, and a multilayer semiconductor layer) The n-electrode layer 35 is formed on the four side surfaces 324) of 32 and electrically connected to the n-type semiconductor layer 321 through the transparent substrate 31. As shown in FIG. 5, the p-electrode layer 34 has a rectangular shape in plan view. In FIG. 5, the insulating layer 33 is not shown for convenience of illustration, and the p-electrode layer 34 and the n-electrode layer 35 are hatched in parallel (the same applies to FIGS. 12 and 13).

  In the semiconductor light emitting element 3, each angle θ between the base material upper surface 311 of the transparent base material 31 shown in FIG. 6 and the four base material side surfaces 313 (that is, the base material upper surface 311 passing through the center of the base material upper surface 311). The angle in the cross section perpendicular to the substrate upper surface 311 including the vertical center line and passing through the center of the edge between each substrate side surface 313 and the substrate upper surface 311 is 30 ° or more and 60 ° or less. In this form, the angle is 45 °.

  The thickness of the transparent substrate 31 in the vertical direction is preferably 50 μm or more and 300 μm or less. By setting the thickness of the transparent substrate 31 to 50 μm or more, it is possible to sufficiently ensure the strength of the transparent substrate 31 at the time of manufacturing the semiconductor light emitting element 3. By setting the thickness to 300 μm or less, the transparent substrate 31 It is possible to sufficiently ensure the translucency of 31. In the present embodiment, the transparent substrate 31 has a thickness of 100 μm. The thickness of the multilayer semiconductor layer 32 is preferably 5 μm or more and 10 μm or less. In FIG. 6, for convenience of illustration, the thickness of each layer of the multilayer semiconductor layer 32 is drawn larger than the actual thickness, and the thickness of the insulating layer 33, the p electrode layer 34, and the n electrode layer 35 is drawn larger than the actual thickness. (The same applies to other cross-sectional views).

The transparent substrate 31 is made of a gallium nitride compound semiconductor (In _a Al _b Ga _1-ab N (where 0 ≦ a ≦ 1, 0 ≦ b ≦ 1, 0 ≦ a + b ≦ 1) (In: indium, Al : Aluminum, Ga: gallium, N: nitrogen)), and in this embodiment, it is formed of GaN (gallium nitride) doped with Si (silicon).

  The n-type semiconductor layer 321 of the multilayer semiconductor layer 32 is formed of an n-type gallium nitride compound semiconductor (for example, GaN, AlGaN, InGaN, InAlGaN), and preferably an n-type such as Si or Ge (germanium). Impurities are doped. In the present embodiment, the n-type semiconductor layer 321 is made of GaN doped with Si, and has a laminated structure in which a plurality of layers having different composition ratios and doping concentrations are laminated.

  The thickness of the n-type semiconductor layer 321 is preferably 100 nm or more and 5 μm or less. By setting the thickness of the n-type semiconductor layer 321 to 100 nm or more, the etching accuracy required when the n-type semiconductor layer 321 is formed can be reduced, and the manufacture of the semiconductor light-emitting element 3 can be facilitated. By doing so, it is possible to prevent the time required for forming the n-type semiconductor layer 321 from becoming excessively long and to shorten the time required for manufacturing the semiconductor light emitting element 3. In this embodiment, the thickness of the n-type semiconductor layer 321 is 2 μm.

The light emitting layer 322 is formed of a gallium nitride-based compound semiconductor having a smaller band gap than the n-type semiconductor layer 321 and the p-type semiconductor layer 323. For example, the well layer formed of InGaN or GaN and the well layer Also, a multi-quantum well structure in which barrier layers formed of GaN, AlGaN, InGaN, InAlGaN or the like having a large band gap are alternately stacked. In the present embodiment, a well layer with a thickness of 2 nm formed of In _0.15 Ga _0.85 N and a barrier layer with a thickness of 15 nm formed of GaN are alternately stacked.

The p-type semiconductor layer 323 is formed of a p-type gallium nitride compound semiconductor (for example, GaN, AlGaN, InGaN, InAlGaN), preferably Mg (magnesium), Zn (zinc), Cd (cadmium), or the like. A p-type impurity such as C (carbon) is doped. In this embodiment, the p-type semiconductor layer 323 is made of Al _0.05 Ga _0.95 N doped with Mg, and has a stacked structure in which a plurality of layers having different composition ratios and doping concentrations are stacked. Is done.

  The thickness of the p-type semiconductor layer 323 is preferably 50 nm or more and 500 nm or less. By setting the thickness of the p-type semiconductor layer 323 to 50 nm or more, it is possible to suppress the intrusion into the light-emitting layer 322 due to migration of the constituent metal of the p-type semiconductor layer 323 and to achieve a long lifetime of the semiconductor light-emitting element 3. In addition, by setting the thickness to 500 nm or less, a voltage drop in the p-type semiconductor layer 323 can be suppressed and the operating voltage of the semiconductor light emitting element 3 can be reduced. In this embodiment, the thickness of the p-type semiconductor layer 323 is 200 nm.

The insulating layer 33 is formed of an insulator such as SiN (silicon nitride) or SiO ₂ (silicon oxide). The thickness of the insulating layer 33 is preferably 100 nm or more and 1 μm or less. When the thickness of the insulating layer 33 is 100 nm or more, sufficient insulation can be ensured, and when the thickness is 1 μm or less, the insulating layer 33 is prevented from becoming excessively thick and the semiconductor light emitting device 3 can be reduced in size, and the time required for manufacturing the semiconductor light emitting element 3 can be shortened.

  The p electrode layer 34 is made of a metal such as Al, Au (gold), Ag (silver), Cu (copper), Ni (nickel), Pt (platinum), Rh (rhodium), Ti (titanium), Mo (molybdenum), etc. Or an alloy containing any one of the metal and V (vanadium), Cr (chromium), etc., and disposed between the transparent substrate 31 and the p electrode layer 34 as shown in FIG. The light emitted from the light emitting layer 322 of the multilayer semiconductor layer 32 is reflected toward the inside of the semiconductor light emitting element 3. The p electrode layer 34 may be formed of the above metal or alloy alone, or may have a multilayer structure in which these metal layers are stacked (the same applies to the n electrode layer 35).

  The thickness of the p electrode layer 34 is preferably 100 nm or more and 5 μm or less (more preferably 500 nm or more and 5 μm or less). By setting the thickness of the p electrode layer 34 to 100 nm or more, it is possible to sufficiently ensure the impact resistance of the p electrode layer 34 when the semiconductor light emitting element 3 is mounted on the cavity substrate 2, and to be 5 μm or less. As a result, the p-electrode layer 34 can be prevented from becoming excessively thick and the semiconductor light-emitting element 3 can be downsized, and the time required for manufacturing the semiconductor light-emitting element 3 can be shortened.

  In the present embodiment, the p-electrode layer 34 is in contact with a metal layer (hereinafter referred to as “Al layer”) having a thickness of 800 nm formed of Al having high reflectivity, and the p-type semiconductor layer 323 of the Al layer. A contact layer with a thickness of 100 nm formed of Ti or Mo is provided at the site. The thickness of the contact layer is preferably 1 nm or more and 1 μm or less. In the p-electrode layer 34, Ni or the like bonded to the p-substrate electrode 22 on the opposite side of the Al semiconductor layer 32 (that is, the side facing the p-substrate electrode 22 (see FIG. 4) of the cavity substrate 2). A bonding layer having a thickness of about 100 nm may be formed of Au, Ti, or the like. Further, it is also preferable to provide an Ag layer or Rh layer having a high reflectivity like Al, instead of the Al layer.

  The n-electrode layer 35 is formed from the four element side surfaces 303 to the element lower surface 302 of the semiconductor light emitting element 3, and covers the entire substrate side surface 313 of the transparent substrate 31 and the entire side surface 324 of the multilayer semiconductor layer 32. The n electrode layer 35 is electrically connected to the n-type semiconductor layer 321 of the multilayer semiconductor layer 32 by contacting the four substrate side surfaces 313 of the conductive transparent substrate 31. On the element side surface 303 of the semiconductor light emitting element 3, the insulating layer 33 is in contact with the entire four side surfaces 324 of the multilayer semiconductor layer 32 between the n electrode layer 35 and the multilayer semiconductor layer 32, and the n electrode layer 35 is multilayered. The contact with the semiconductor layer 32 is prevented.

  On the element lower surface 302 of the semiconductor light emitting element 3, the n electrode layer 35 is provided separately from the p electrode layer 34 and covers the vicinity of the edge of the multilayer semiconductor layer 32 around the p electrode layer 34. A recess 36 is formed between the n-electrode layer 35 and the p-electrode layer 34 to be fitted with the insulating protrusion 24 (see FIGS. 3 and 4) provided on the inner bottom surface 212 of the cavity 21 of the cavity substrate 2. The In the semiconductor light emitting device 3, the insulating layer 33 that contacts the entire four side surfaces 324 of the multilayer semiconductor layer 32 is formed so as to extend to the device lower surface 302. The n-type electrode layer 35 and the p-type of the multilayer semiconductor layer 32 are also formed on the device lower surface 302. The semiconductor layer 323 is insulated.

  As with the p electrode layer 34, the n electrode layer 35 is made of a metal such as Al, Au, Ag, Cu, Ni, Pt, Rh, Ti, Mo, an alloy containing any of the metal and V, Cr, or the like. The light emitted from the light emitting layer 322 of the multilayer semiconductor layer 32 is reflected toward the inside of the semiconductor light emitting element 3. That is, in the semiconductor light emitting device 3, the p electrode layer 34 and the n electrode layer 35 have the first reflective layer and the first reflective layer that reflect the light emitted from the light emitting layer 322 of the multilayer semiconductor layer 32 toward the inside of the semiconductor light emitting device 3. 2 reflective layers.

  Here, when the first reflection layer and the second reflection layer are combined and regarded as the reflection layer of the semiconductor light emitting element 3, the reflection layer has conductivity, and the transparent base material 31 and the n-type semiconductor layer 321 are connected to each other. An n electrode layer 35 that is electrically connected and insulated from the p-type semiconductor layer 323, and is electrically connected to the p-type semiconductor layer 323 and insulated from the transparent base material 31 and the n-type semiconductor layer 321. And a p-electrode layer 34 which is a portion to be formed. In the semiconductor light emitting element 3, the area of the reflective layer, that is, the total area of the first reflective layer (p electrode layer 34) and the second reflective layer (n electrode layer 35) is preferably the element lower surface 302 of the semiconductor light emitting element 3. The total area of the four element side surfaces 303 is 70% or more and 100% or less.

  The thickness of the n electrode layer 35 is preferably 100 nm or more and 5 μm or less (more preferably 500 nm or more and 5 μm or less), similarly to the p electrode layer 34. By setting the thickness of the n electrode layer 35 to 100 nm or more, it is possible to sufficiently ensure the impact resistance of the n electrode layer 35 when the semiconductor light emitting element 3 is mounted on the cavity substrate 2, and to be 5 μm or less. As a result, the n-electrode layer 35 can be prevented from becoming excessively thick and the semiconductor light-emitting element 3 can be reduced in size, and the time required for manufacturing the semiconductor light-emitting element 3 can be shortened.

  Similar to the p electrode layer 34, the n electrode layer 35 includes an Al layer having a thickness of 800 nm and a contact layer having a thickness of 100 nm formed of Ti or Mo at a portion of the Al layer in contact with the p-type semiconductor layer 323. . In the n electrode layer 35, Ni or the Ni substrate bonded to the n substrate electrode 23 is opposite to the transparent substrate 31 of the Al layer (that is, the side facing the n substrate electrode 23 (see FIG. 4) of the cavity substrate 2). A bonding layer having a thickness of about 100 nm may be formed of Au, Ti, or the like. Further, it is also preferable to provide an Ag layer or Rh layer having a high reflectivity like Al, instead of the Al layer.

  Next, a method for manufacturing the semiconductor light emitting element 3 will be described. FIG. 7 is a diagram showing a flow of manufacturing the semiconductor light emitting device 3, and FIG. A thru | or FIG. G is a cross-sectional view showing the semiconductor light emitting device 3 under manufacturing.

  When the semiconductor light emitting device 3 is manufactured, first, FIG. As shown in A, a planar light-transmitting wafer 831 that becomes the transparent base material 31 of the semiconductor light-emitting element 3 after manufacture is prepared, and the n-type semiconductor layer 321 after manufacture is formed on one main surface of the wafer 831, A first layer 8321, a second layer 8322, and a third layer 8323, which become the light emitting layer 322 and the p-type semiconductor layer 323, are sequentially stacked (step S11). In the following description, for the sake of convenience, the wafer 831, the first layer 8321, the second layer 8322, and the third layer 8323 are respectively named “transparent substrate”, “n-type semiconductor layer”, which are names after manufacturing the semiconductor light emitting element 3. They are referred to as “light-emitting layer” and “p-type semiconductor layer” (the same applies to the insulating layer, the p-electrode layer, and the n-electrode layer. The same applies to the third embodiment).

  Subsequently, in an apparatus used for dicing a wafer, a p-type semiconductor layer 8323, a light emitting layer 8322, an n-type semiconductor layer 8321, and a transparent substrate are formed from the p-type semiconductor layer 8323 side by a dicing blade whose tip is inclined in a V shape. By cutting off a portion of the material 831, FIG. As shown in B, a plurality of grooves 801 having a substantially triangular cross section and arranged in a grid are formed (step S12).

Next, a SiO ₂ film is formed on the entire surface of the quadrangular frustum-shaped protrusion surrounded by the plurality of grooves 801 by vapor deposition, and then the film is subjected to masking and wet etching. Unnecessary portions of the film are removed, and FIG. As shown to C, the insulating layer 833 is formed in the surface of the some projection part 802 (step S13).

  When the insulating layer 833 is formed, the deposition of the metal film on the entire surface of the plurality of protrusions 802 and the masking and wet etching on the metal film are repeated, so that FIG. As shown in D, a p-electrode layer 834 and an n-electrode layer 835 are formed on the surfaces of the plurality of protrusions 802, which are the reflective layers (that is, the first reflective layer and the second reflective layer) of the semiconductor light emitting element 3. (Step S14).

  When the reflective layer is formed, FIG. As shown in E, the plurality of protrusions 802 are held from the opposite side of the transparent base 831 by a holding member 803 (for example, glass or silicon) having the same shape as the transparent base 831 in plan view. An adhesive layer 804 is formed on the main surface of the holding member 803, and the plurality of protrusions 802 are pasted on the adhesive layer 804 (step S15).

  Then, the transparent substrate 831 is polished from the side opposite to the plurality of protrusions 802 (that is, the back grinding is applied to the main surface of the transparent substrate 831 opposite to the holding member 803), and FIG. As shown in F, a part of the transparent substrate 831 is removed, and the plurality of protrusions 802 are separated from each other, whereby a plurality of semiconductor light emitting elements 3 are obtained (step S16). At this time, the plurality of semiconductor light emitting elements 3 are attached to the adhesive layer 804 independently of each other on the holding member 803. Thereafter, the adhesive layer 804 is irradiated with ultraviolet rays to reduce the adhesive strength of the adhesive layer 804, and then FIG. As indicated by G, the semiconductor light emitting device 3 is adsorbed by the die pick head 805 and peeled off from the adhesive layer 804. With the above-described manufacturing method, the semiconductor light emitting device 3 can be manufactured easily and with high accuracy, and the manufactured semiconductor light emitting device 3 is guided to an inspection process.

  Next, the manufacture of the light emitting device 1 for mounting the semiconductor light emitting element 3 on the cavity substrate 2 will be described. FIG. A and FIG. B is a cross-sectional view showing the light emitting device 1 in the process of manufacture. When the light emitting device 1 is manufactured, FIG. As shown in A, the thermosetting conductive metal paste 20 (for example, Ag paste or Au paste on the p substrate electrode 22 and the n substrate electrode 23 of the cavity substrate 2, in the present embodiment, Ag paste) is applied. A solder paste may be used instead of the conductive metal paste 20.

  Subsequently, FIG. As shown in B, when the semiconductor light emitting element 3 held by the heating tool 806 is inserted into the cavity 21 and pressed against the cavity substrate 2, the p electrode layer 34 and the p substrate electrode of the semiconductor light emitting element 3 are pressed. 22 and between the n electrode layer 35 and the n substrate electrode 23 of the semiconductor light emitting element 3 are filled with the conductive metal paste 20. At this time, the concave portions 36 (see FIG. 6) of the semiconductor light emitting element 3 are fitted into the insulating convex portions 24 provided between the p substrate electrode 22 and the n substrate electrode 23 of the cavity substrate 2, so that both the substrate electrodes The upper conductive metal paste 20 is prevented from coming into contact. Further, the conductive metal paste 20 protruding from between the n-electrode layer 35 and the n-substrate electrode 23 is accommodated in the groove 214 formed in the cavity 21 (see FIG. 3).

  Next, the conductive metal paste 20 is heated and cured through the semiconductor light emitting element 3 by the heating tool 806, so that the semiconductor light emitting element 3 is bonded to the cavity substrate 2 and electrically connected thereto (that is, Implemented). Thereafter, the phosphor layer 4 shown in FIG. 2 is formed on the semiconductor light emitting element 3, and the manufacture of the light emitting device 1 is completed.

  As described above, in the light emitting device 1, the element upper surface 301 of the inverted square pyramid-shaped semiconductor light emitting element 3 is the light emitting surface, and the surface of the semiconductor light emitting element 3 other than the light emitting surface (that is, the element lower surface 302). The first reflection layer and the second reflection layer (that is, the p electrode layer 34 and the n electrode layer 35) are provided on the four element side surfaces 303). As a result, of the light emitted from the light emitting layer 322 of the multilayer semiconductor layer 32, the light that travels to other than the light emitting surface is reflected by the first reflecting layer and the second reflecting layer and emitted from the light emitting surface. As a result, high brightness of the semiconductor light emitting element 3 can be realized.

  Further, in the semiconductor light emitting element 3, since the first reflective layer and the second reflective layer are provided on the surface of the semiconductor light emitting element 3, compared with a semiconductor light emitting element having a reflector provided apart from the element surface. The semiconductor light emitting element 3 can also be reduced in size. In order to ensure sufficient luminance while reducing the size of the semiconductor light emitting element 3, the total area of the first reflective layer and the second reflective layer is the total area of the element lower surface 302 of the semiconductor light emitting element 3 and the entire four element side surfaces 303. It is preferable to be 70% or more (100% or less).

  In the semiconductor light emitting device 3, the light emitted from the light emitting layer 322 is provided by providing the transparent base material 31 only on one side of the multilayer semiconductor layer 32, as compared with the semiconductor light emitting device having the transparent base material on both sides of the multilayer semiconductor layer. Can be suppressed from being absorbed inside the transparent substrate, and further increase in luminance of the semiconductor light emitting device 3 can be realized. In addition, the ratio of the transparent base material in the entire semiconductor light emitting element 3 can be reduced to reduce the size of the semiconductor light emitting element 3, and the manufacturing of the semiconductor light emitting element 3 can be simplified.

  The light-emitting device 1 includes a cavity substrate having the inverted square frustum-shaped semiconductor light emitting element 3 that is increased in luminance and reduced in size as described above, and the inverted square frustum-shaped cavity 21 into which the semiconductor light emitting element 3 is inserted. 2 is provided. Thereby, high brightness and miniaturization of the light emitting device 1 can be realized.

  From the viewpoint of increasing the light emitting surface to increase the brightness of the semiconductor light emitting element 3 and the light emitting device 1, the substrate upper surface 311 of the transparent substrate 31 and the four substrate side surfaces 313 of the semiconductor light emitting element 3 The respective angles θ between them are preferably 60 ° or less, and from the viewpoint of realizing miniaturization of the semiconductor light emitting element 3 and the light emitting device 1 by reducing the light emitting surface, the angle θ is 30 It is preferable that the angle is not less than °.

  In the semiconductor light emitting device 3, a p electrode layer 34 that connects the p-type semiconductor layer 323 of the multilayer semiconductor layer 32 to an external electrode (that is, the p substrate electrode 22 of the cavity substrate 2) is formed on the lower surface 302 of the device to form the light emitting layer. An n-electrode layer that also serves as a first reflective layer that reflects light from 322 and connects the n-type semiconductor layer 321 of the multilayer semiconductor layer 32 to an external electrode (that is, the n-substrate electrode 23 of the cavity substrate 2). 35 also serves as a second reflecting layer that is formed on the element side surface 303 and reflects light from the light emitting layer 322. As a result, the semiconductor light emitting element 3 can be further downsized and the light emitting device 1 can be further downsized as compared with a semiconductor light emitting element in which an electrode layer separate from the first reflective layer and the second reflective layer is provided. be able to. Further, the p-electrode layer 34 and the n-electrode layer 35 are provided in a portion other than the element upper surface 301 that is the light emission surface, so that the light emitted from the light emitting layer 322 is blocked by the electrode layer on the light emission surface. Is prevented. As a result, the brightness of the semiconductor light emitting element 3 can be increased.

  In the semiconductor light emitting device 3, the p-electrode layer is not necessarily the entirety of the first reflection layer formed on the lower surface 302 of the device, which is part of the path that electrically connects the p-type semiconductor layer 323 to the p-substrate electrode 22. 34, and the entire second reflection layer formed on the element side surface 303 is part of a path for electrically connecting the n-type semiconductor layer 321 to the n-substrate electrode 23. It is not necessary to be 35.

  In the semiconductor light emitting device 3, the first reflective layer has at least a part of the path that electrically connects the p-type semiconductor layer 323 to the p-substrate electrode 22, and the second reflective layer includes the n-type semiconductor layer 321 n. By having at least a part of the path electrically connected to the substrate electrode 23, the semiconductor light emitting element 3 can be reduced in size, and the light emitting device 1 can be further reduced in size. In this case, the n electrode layer 35 is formed on any one of the four element side surfaces 303 of the semiconductor light emitting element 3, and the n substrate electrode 23 is formed on any one of the four inner side surfaces 213 of the cavity 21. It will face the electrode layer 35.

  By the way, since the multilayer semiconductor layer of the semiconductor light emitting device is very thin, on the side surface of the multilayer semiconductor layer, the n electrode layer is connected only to the n type semiconductor layer without contacting the p type semiconductor layer, or the p electrode layer is n type. In order to connect only to the p-type semiconductor layer without contacting the semiconductor layer, high-precision control is required in forming the n-electrode layer and the p-electrode layer. On the other hand, an insulating layer 33 in contact with the four side surfaces 324 of the multilayer semiconductor layer 32 is provided around the multilayer semiconductor layer 32 of the semiconductor light emitting element 3 according to the present embodiment. Each of the electrode layers 35 is electrically connected to the p-type semiconductor layer 323 and the n-type semiconductor layer 321 by directly or indirectly contacting a portion other than the side surface 324 of the multilayer semiconductor layer 32. Thereby, the formation of the p electrode layer 34 and the n electrode layer 35 can be simplified, and the p electrode layer 34, the n electrode layer 35, and the multilayer semiconductor layer 32 can be reliably insulated at portions other than the connection portions.

  In the multilayer semiconductor layer 32 of the semiconductor light emitting element 3, the n-type semiconductor layer 321 is provided on the transparent base material 31 side, and the lower main surface of the p-type semiconductor layer 323 (that is, the side opposite to the light emitting layer 322). Most of the main surface is in contact with the p-electrode layer 34. As described above, when the p-electrode layer 34 is connected to the p-type semiconductor layer 323 having a higher electric resistance and less current flow than the n-type semiconductor layer 321, the p-type semiconductor layer 323 and the p-electrode layer 34 are directly connected. Furthermore, by ensuring a large contact area between the p-type semiconductor layer 323 and the p-electrode layer 34, a current can be efficiently applied to the p-type semiconductor layer 323, and the semiconductor light-emitting element 3 and the light-emitting device 1 Luminous efficiency can be improved.

  In the light emitting device 1, the conductive metal paste 20 is filled between the p substrate electrode 22 and the p electrode layer 34 of the semiconductor light emitting element 3 and between the n substrate electrode 23 and the n electrode layer 35 of the semiconductor light emitting element 3. As a result, the reliability of electrical connection between the semiconductor light emitting element 3 and the cavity substrate 2 can be improved. Further, by providing the insulating protrusion 24 between the p substrate electrode 22 and the n substrate electrode 23, the conductive metal paste 20 applied on the p substrate electrode 22 and the conductivity applied on the n substrate electrode 23. Contact with the conductive metal paste 20 can be reliably prevented, and the p substrate electrode 22 and the n substrate electrode 23 can be reliably insulated. Further, by storing the surplus of the conductive metal paste 20 generated when the semiconductor light emitting element 3 is mounted in the groove 214 formed in the cavity 21, the p substrate electrode 22 and the n substrate electrode 23 are more reliably connected. Can be insulated.

  By the way, in the case of a cavity substrate in which no groove is formed at the boundary between the inner bottom surface and the inner side surface of the cavity, the cavity before reaching the design position when the semiconductor light emitting device is inserted into the cavity due to manufacturing errors of the cavity. There is a possibility that the edge of the semiconductor light emitting element comes into contact with the above boundary, and the semiconductor light emitting element cannot be mounted at a desired position. On the other hand, in the light emitting device 1 according to the present embodiment, since the groove 214 is continuously formed along the boundary between the inner bottom surface 212 and the four inner side surfaces 213 of the cavity 21, The contact between the edge and the boundary is prevented, and the influence due to the manufacturing error of the cavity 21 can be suppressed. As a result, the semiconductor light emitting element 3 can be easily attached to the cavity substrate 2.

  In the light emitting device 1, the semiconductor light emitting element 3 is not necessarily mounted on the cavity substrate 2 via the conductive metal paste 20. For example, the p substrate electrode 22 and the n substrate electrode 23 in the cavity 21 An ultrasonic wave that presses the semiconductor light emitting element 3 against the cavity substrate 2 while applying ultrasonic vibration to the semiconductor light emitting element 3 in a state where the p electrode layer 34 and the n electrode layer 35 of the semiconductor light emitting element 3 are in direct contact with each other. It may be performed by bonding.

  FIG. 10 is a cross-sectional view showing another preferred example of the semiconductor light emitting element of the light emitting device 1. In the semiconductor light emitting element 3a shown in FIG. 10, a protruding electrode 39 (so-called bump) protruding downward is formed of Au on the p electrode layer 34 which is the first reflective layer. The semiconductor light emitting element 3a is mounted on the cavity substrate 2 (see FIG. 2) by the above-described ultrasonic bonding, and the protruding electrode 39 is bonded to the p substrate electrode 22 (see FIG. 4) at the time of mounting.

  In a light-emitting device, the semiconductor light-emitting element and the cavity are usually arranged such that the four element side surfaces of the semiconductor light-emitting element are in contact with the four inner side surfaces (upper substrate electrodes) of the cavity so that the semiconductor light-emitting element is positioned at a predetermined position. Is determined. Therefore, it is necessary that the lower surface of the element also contacts the inner bottom surface (upper substrate electrode) of the cavity while the four element side surfaces of the semiconductor light emitting element are in contact with the four inner surfaces of the cavity. For this reason, high shape accuracy is required in the manufacture of semiconductor light emitting devices and cavities.

  On the other hand, in the semiconductor light emitting element 3a, the four element side surfaces 303 of the semiconductor light emitting element 3a are in contact with the n substrate electrodes 23 (see FIG. 4) on the four inner side surfaces 213 of the cavity 21, and Even if there is a slight gap between the p-electrode layer 34 of 302 and the p-substrate electrode 22 on the inner bottom surface 212 of the cavity 21 (see FIG. 4), the protruding electrode 39 formed on the p-electrode layer 34 Thus, the p-electrode layer 34 that is the first reflective layer can be reliably bonded to the p-substrate electrode 22. In the semiconductor light emitting device 3a, since the p electrode layer 34 is formed of Al having a high spreadability, a slip line is formed on the surface of the p electrode layer 34 when the protruding electrode 39 is formed of Au wire. The new surface and Au are firmly bonded. The semiconductor light emitting element 3a may be bonded to the cavity substrate 2 through a conductive metal paste or a solder paste.

  Next, a light emitting device according to a second embodiment of the invention will be described. FIG. 11 is a cross-sectional view showing a light emitting device 1a according to the second embodiment, and FIG. 12 is a plan view showing a semiconductor light emitting element 3b of the light emitting device 1a. As shown in FIG. 12, in the semiconductor light emitting device 3b, the p electrode layer 34 is formed on two of the device lower surface 302 and the four device side surfaces 303, and the n electrode layer 35 is the remaining two of the four device side surfaces 303. Formed. Other configurations are substantially the same as those of the light-emitting device 1 shown in FIGS. 1 to 6, and the same reference numerals are given in the following description. Further, the manufacturing method of the semiconductor light emitting element 3b and the mounting method to the cavity substrate 2 are the same as those in the first embodiment.

  As shown in FIG. 11, in the cavity substrate 2 of the light emitting device 1a, the p substrate electrode 22 joined to the p electrode layer 34 of the semiconductor light emitting element 3b is formed by the inner bottom surface 212 of the cavity 21 and the p electrode layer 34. Formed on the two inner side surfaces 213 facing the two element side surfaces 303 (see FIG. 12), and the n substrate electrode 23 joined to the n electrode layer 35 is formed on the other two inner side surfaces 213. Yes. In the cavity 21, an insulating convex portion 24 extending linearly is formed between the p substrate electrode 22 and the n substrate electrode 23 so as to isolate the region including the p substrate electrode 22 and the region including the n substrate electrode 23. Is formed.

  As shown in FIG. 12, in the semiconductor light emitting device 3b, the n electrode layer 35 and the p electrode layer 34 are provided apart from each other and insulated from each other. A recess 36 is formed between the n electrode layer 35 and the p electrode layer 34 so as to be fitted to the insulating protrusion 24 (see FIG. 11) of the cavity substrate 2. Further, in the element side surface 303 on which the p electrode layer 34 is provided, as shown in FIG. 11, the insulating layer 33 is provided in contact with the base material side surface 313 of the transparent base material 31 and the entire side surface 324 of the multilayer semiconductor layer 32. The p electrode layer 34 is prevented from contacting the transparent substrate 31 and the multilayer semiconductor layer 32. As in the first embodiment, the insulating layer 33 is in contact with the entire four side surfaces 324 of the multilayer semiconductor layer 32, and the n electrode layer 35 and the multilayer semiconductor also on the element side surface 303 where the n electrode layer 35 is provided. The contact with the layer 32 is prevented. The n electrode layer 35 is in contact with the two base material side surfaces 313 of the transparent base material 31, and on the n-type semiconductor layer 321 of the multilayer semiconductor layer 32 via the transparent base material 31, as in the first embodiment. Electrically connected. Further, the p-electrode layer 34 is electrically connected to the p-type semiconductor layer 323 by being in contact with the main surface of the p-type semiconductor layer 323 opposite to the transparent substrate 31 as in the first embodiment. The

  In the semiconductor light emitting element 3b, the light emitted from the light emitting layer 322 of the multilayer semiconductor layer 32 toward the element other than the element upper surface 301 that is the light emitting surface is reflected by the p electrode layer 34 on the element lower surface 302 shown in FIG. Then, it is reflected by the portion provided on the element side surface 303 of the p electrode layer 34 and the n electrode layer 35 on the element side surface 303. That is, in the semiconductor light emitting device 3 b, the portion on the element lower surface 302 of the p electrode layer 34 becomes the first reflective layer formed on the element lower surface 302, and the portion on the element side surface 303 of the p electrode layer 34 and the n electrode layer 35. Is the second reflective layer formed on the four element side surfaces 303.

  In the light emitting device 1a according to the second embodiment, similarly to the first embodiment, in the semiconductor light emitting element 3b in which the transparent substrate 31 is provided only on one side of the multilayer semiconductor layer 32, the element lower surfaces 302 and 4 are arranged. By providing the p-electrode layer 34 and the n-electrode layer 35 serving as the first reflection layer and the second reflection layer on one element side surface 303, it is possible to realize high brightness and downsizing of the semiconductor light emitting element 3b and the light emitting device 1a. Can do.

  As described above, in the light emitting device, normally, the four element side surfaces of the semiconductor light emitting element are in contact with the four inner side surfaces (upper substrate electrodes) of the cavity so that the semiconductor light emitting element is positioned at a predetermined position. The shapes of the semiconductor light emitting device and the cavity are determined. In the light emitting device 1a, in particular, since both the p electrode layer 34 and the n electrode layer 35 are formed on the four element side surfaces 303 of the semiconductor light emitting element 3b, the p substrate electrode 22 and the n substrate electrode 23 of the cavity substrate 2 are used. It is possible to reliably join the p-electrode layer 34 and the n-electrode layer 35 of the semiconductor light emitting element 3b (that is, two portions of the second reflective layer that are insulated from each other).

  In the cavity substrate 2, the p substrate electrode 22 may be formed on any one of the four inner surfaces 213 in addition to the inner bottom surface 212 of the cavity 21. At this time, in the four element side surfaces 303 which are the second reflective layers of the semiconductor light emitting element 3b, the p electrode layer 34 is provided at a portion facing the p substrate electrode 22 on the inner side surface 213 of the cavity 21, and the other portions. Is insulated from the n-electrode layer 35 (that is, the portion bonded to the n-substrate electrode 23). Even in this case, similarly to the above, the p substrate electrode 22 and the n substrate electrode 23 of the cavity substrate 2 can be reliably bonded to the p electrode layer 34 and the n electrode layer 35 of the semiconductor light emitting element 3b.

  Next, a light emitting device according to a third embodiment of the invention will be described. FIG. 13 is a plan view showing the semiconductor light emitting element 3c of the light emitting device according to the third embodiment, and FIG. 14 is a cross-sectional view of the semiconductor light emitting element 3c cut at the position DD in FIG. It is. As shown in FIG. 14, in the semiconductor light emitting device 3 c, the multilayer semiconductor layer 32 is formed on the base material upper surface 311 of the transparent base material 31, and the n-type semiconductor layer 321, the light emitting layer 322, and The p-type semiconductor layers 323 are stacked in this order. In the semiconductor light emitting device 3 c, the light-transmitting property that is in contact with the main surface of the p-type semiconductor layer 323 opposite to the transparent base 31 on the multilayer semiconductor layer 32 and is electrically connected to the p-type semiconductor layer 323. The transparent electrode layer 37 is provided. Other configurations are substantially the same as those of the light-emitting device 1 shown in FIGS. 1 to 6, and the same reference numerals are given in the following description.

  As shown in FIGS. 13 and 14, in the semiconductor light emitting device 3 c, the p electrode layer 34 is formed on two of the four device side surfaces 303, and the n electrode layer 35 is the remaining two of the four device side surfaces 303 and It is formed on the lower surface 302 of the element. In the semiconductor light emitting device 3c, the n electrode layer 35 and the p electrode layer 34 are provided apart from each other and insulated from each other. A recess 36 is formed between the n electrode layer 35 and the p electrode layer 34 so as to be fitted to the insulating protrusion 24 (see FIG. 11) of the cavity substrate 2.

  As shown in FIG. 14, in the element side surface 303 on which the p electrode layer 34 is provided, the insulating layer 33 is provided in contact with the base material side surface 313 of the transparent base material 31 and the entire side surface 324 of the multilayer semiconductor layer 32. The electrode layer 34 is prevented from contacting the transparent base material 31 and the multilayer semiconductor layer 32. As in the first embodiment, the insulating layer 33 is in contact with the entire four side surfaces 324 of the multilayer semiconductor layer 32, and the n electrode layer 35 and the multilayer semiconductor also on the element side surface 303 where the n electrode layer 35 is provided. The contact with the layer 32 is prevented.

The n electrode layer 35 is in contact with the two base material side surfaces 313 of the transparent base material 31, and on the n-type semiconductor layer 321 of the multilayer semiconductor layer 32 via the transparent base material 31, as in the first embodiment. Electrically connected. Further, the p electrode layer 34 is connected to the transparent electrode layer 37 via a connection portion 38 formed of Au in the vicinity of the edge of the element upper surface 301, thereby forming the p-type semiconductor layer 323 via the transparent electrode layer 37. Electrically connected. The transparent electrode layer 37 is formed by sputtering vapor deposition of ITO (indium tin oxide), ZnO (zinc oxide), Ga ₂ O ₃ (gallium oxide) or the like, and the thickness in the vertical direction is preferably 50 nm or more and 500 nm. It is as follows.

  In the semiconductor light emitting element 3 c, the light emitted from the light emitting layer 322 of the multi-layer semiconductor layer 32 toward the element other than the element upper surface 301 that is the light emitting surface is reflected by the n electrode layer 35 on the element lower surface 302, At 303, the light is reflected by the portion provided on the element side surface 303 of the n-electrode layer 35 and the p-electrode layer 34. That is, in the semiconductor light emitting device 3 c, the portion of the n-electrode layer 35 on the device lower surface 302 becomes the first reflective layer formed on the device lower surface 302, and the portion of the n-electrode layer 35 on the device side surface 303 and the p-electrode layer 34. Is the second reflective layer formed on the four element side surfaces 303. In other words, the reflective layers (the first reflective layer and the second reflective layer) of the semiconductor light emitting element 3c have conductivity and are electrically connected to the transparent substrate 31 and the n-type semiconductor layer 321. The n-electrode layer 35 which is a part insulated from the p-type semiconductor layer 323 and the transparent electrode layer 37, and the transparent substrate 31 and the n-type semiconductor layer are electrically connected to the p-type semiconductor layer 323 and the transparent electrode layer 37. , And a p-electrode layer 34 that is a part insulated from 321.

  Next, a method for manufacturing the semiconductor light emitting element 3c will be described. 15 is a diagram showing a flow of manufacturing the semiconductor light emitting device 3c. A to FIG. H is a cross-sectional view showing the semiconductor light emitting device 3c under manufacturing. When the semiconductor light emitting device 3c is manufactured, first, FIG. As shown in A, a flat light-transmitting transparent base material 831 that becomes the transparent base material 31 of the semiconductor light emitting device 3c after the manufacture is prepared, and an n-type semiconductor layer is formed on one main surface of the transparent base material 831. 8321, the light emitting layer 8322, and the p-type semiconductor layer 8323 are laminated | stacked in order (step S21).

  Subsequently, after an Au film is formed on the entire surface of the p-type semiconductor layer 8323 by vapor deposition, unnecessary portions of the film are removed by performing masking and wet etching on the film. . As shown in B, a connection portion 838 is formed in part on the p-type semiconductor layer 8323. And FIG. As shown in C, the transparent electrode layer 837 is laminated on the p-type semiconductor layer 8323 and the connection portion 838 (step S22).

  When the transparent electrode layer 837 is formed, a holding member 803 having the same shape as the transparent base material 831 in plan view is attached to the transparent electrode layer 837 via the adhesive layer 804 formed on the main surface, and the holding member By 803, the transparent substrate 831, the n-type semiconductor layer 8321, the light emitting layer 8322, the p-type semiconductor layer 8323, the connection portion 838, and the transparent electrode layer 837 are held (step S23).

  Next, in an apparatus used for wafer dicing, a transparent substrate 831, an n-type semiconductor layer 8321, a light emitting layer 8322, and a p-type semiconductor layer are formed from the transparent substrate 831 side by a dicing blade whose tip is inclined in a V shape. 8323, the transparent electrode layer 837, and a part of the adhesive layer 804 are excised, so that FIG. As shown in D, a plurality of grooves 801 having a substantially triangular cross section and arranged in a grid are formed (step S24).

Next, a SiO ₂ film is formed on the entire surface of the quadrangular frustum-shaped protrusion surrounded by the plurality of grooves 801 by vapor deposition, and then the film is subjected to masking and wet etching. Unnecessary portions of the film are removed, and FIG. As shown to E, the insulating layer 833 is formed in the surface of the some projection part 802 (step S25).

  When the insulating layer 833 is formed, the deposition of the metal film on the entire surface of the plurality of protrusions 802, and the masking and wet etching on the metal film are repeated, so that FIG. As shown in F, a p-electrode layer 834 and an n-electrode layer 835 are formed on the surfaces of the plurality of protrusions 802, which are the reflective layers (that is, the first reflective layer and the second reflective layer) of the semiconductor light emitting element 3c. (Step S26). However, in this state, the p-electrode layer 834 and the n-electrode layer 835 formed on each protrusion 802 are formed on the adjacent protrusions 802 at the bottom of the groove 801 around each protrusion 802. The electrode layer 834 and the n electrode layer 835 are continuous. Therefore, FIG. As indicated by G, the continuous portion of the electrode layer at the bottom of the groove 801 is cut away by a dicing blade.

  And after irradiating ultraviolet rays with respect to the adhesion layer 804 and reducing the adhesive force of the adhesion layer 804, FIG. As indicated by H, a plurality of semiconductor light emitting elements 3c are obtained by the plurality of protrusions 802 being sequentially adsorbed and separated from the adhesive layer 804 by the die pick head 805 (step S27).

  As described above, in the light emitting device according to the third embodiment, in the semiconductor light emitting element 3c in which the transparent substrate 31 is provided only on one side of the multilayer semiconductor layer 32, as in the first embodiment. The p-electrode layer 34 and the n-electrode layer 35 serving as the first reflection layer and the second reflection layer are provided on the element lower surface 302 and the four element side surfaces 303, thereby increasing the brightness of the semiconductor light emitting element 3c and the light emitting device 1a. Miniaturization can be realized.

  In the semiconductor light emitting device 3c, the entire first reflective layer formed on the lower surface 302 of the device necessarily electrically connects the n-type semiconductor layer 321 to the n substrate electrode 23 (see FIG. 11) of the cavity substrate 2. It is not necessary to use the n electrode layer 35 that is a part of the path, and the entire second reflective layer formed on the element side surface 303 is composed of the n electrode layer 35, the p-type semiconductor layer 323, and the transparent electrode layer. There is no need to use the p electrode layer 34 as a part of a path for electrically connecting 37 to the p substrate electrode 22 (see FIG. 11).

  In the semiconductor light emitting element 3c, the second reflective layer has at least a part of a path that electrically connects the p-type semiconductor layer 323 and the transparent electrode layer 37 to the p substrate electrode 22, and the first reflective layer and the second reflective layer When at least one of the layers has at least a part of a path that electrically connects the n-type semiconductor layer 321 to the n substrate electrode 23, the semiconductor light emitting element 3c and the light emitting device can be downsized. In this case, the n electrode layer 35 is formed on either the element lower surface 302 of the semiconductor light emitting element 3 c and the four element side surfaces 303, and the n substrate electrode 23 includes the inner bottom surface 212 of the cavity 21 and the four inner side surfaces 213. (Refer to FIG. 11) and facing the n-electrode layer 35. The p electrode layer 34 is formed on one of the four element side surfaces 303 of the semiconductor light emitting element 3c, and the p substrate electrode 22 is formed on one of the four inner side surfaces 213 of the cavity 21 to form the p electrode. It will face the layer 34.

  In the multilayer semiconductor layer 32 of the semiconductor light emitting device 3c, the n-type semiconductor layer 321 is provided on the transparent base material 31 side as in the first embodiment, and the main surface on the upper side of the p-type semiconductor layer 323 (that is, Most of the main surface opposite to the light emitting layer 322 is in contact with the transparent electrode layer 37. As described above, when the p-electrode layer 34 is connected to the p-type semiconductor layer 323 having a higher electric resistance and less current flow than the n-type semiconductor layer 321 through the transparent electrode layer 37, the p-type semiconductor layer 323 and the transparent layer are transparent. By directly connecting the electrode layer 37 and further ensuring a large contact area between the p-type semiconductor layer 323 and the transparent electrode layer 37, a current can be efficiently applied to the p-type semiconductor layer 323, and semiconductor light emission The luminous efficiency of the element 3c and the light emitting device 1 can be improved.

  In the light emitting device according to the third embodiment, in particular, the area of the light emitting layer 322 can be increased by arranging the multilayer semiconductor layer 32 of the semiconductor light emitting element 3c on the base material upper surface 311 of the transparent base material 31. In addition, the brightness of the semiconductor light emitting element 3c can be further increased.

  On the other hand, in the light emitting device 1 according to the first embodiment, the multilayer semiconductor layer 32 of the semiconductor light emitting element 3 is disposed on the base material lower surface 312 (that is, the cavity substrate 2 side) of the transparent base material 31 and the cavity substrate 2. Is in contact with. For this reason, the heat generated in the multilayer semiconductor layer 32 during light emission can be quickly released to the outside through the cavity substrate 2 having high thermal conductivity, and the heat dissipation of the light emitting device 1 can be improved. As a result, troubles of the light emitting device 1 due to heat generation can be reliably prevented, and the reliability of the light emitting device 1 can be improved. In particular, in the light emitting device 1, since the p electrode layer 34 and the n electrode layer 35 of the semiconductor light emitting element 3 are mainly formed of Al having high thermal conductivity, the heat dissipation can be further improved.

  FIG. 17 is a cross-sectional view showing another preferred example of the semiconductor light emitting device. A semiconductor light emitting element 3d shown in FIG. 17 is directed downward at a portion on the element lower surface 302 of the n electrode layer 35, which is a path for electrically connecting the n-type semiconductor layer 321 and the transparent substrate 31 to the n substrate electrode. A protruding electrode 39 (so-called bump) is formed. When the semiconductor light emitting element 3d is mounted, the protruding electrode 39 is bonded to the n substrate electrode of the cavity substrate.

  Next, a light emitting device according to a fourth embodiment of the invention will be described. FIG. 18 is a cross-sectional view showing a semiconductor light emitting element 3e of the light emitting device according to the fourth embodiment. The semiconductor light emitting element 3e is an LED that emits red light. As shown in FIG. 18, the semiconductor light emitting element 3 e includes an inverted square pyramid-shaped transparent base material 31, and a multilayer semiconductor layer 32 formed on the base material lower surface 312 of the transparent base material 31. Includes a p-type semiconductor layer 323, a light emitting layer 322, and an n-type semiconductor layer 321 that are sequentially stacked on the substrate lower surface 312 of the p-type transparent substrate 31. The configuration of the cavity substrate on which the semiconductor light emitting element 3e is mounted is almost the same as that of the cavity substrate 2 according to the first embodiment (see FIGS. 3 and 4).

  A first insulating layer 33 that is in contact with the entire side surface of the multilayer semiconductor layer 32 is formed on the element side surface 303 of the semiconductor light emitting element 3e, and the main surface on the first insulating layer 33 and below the n-type semiconductor layer 321 ( That is, an n-electrode layer 35 that connects the n-type semiconductor layer 321 and the n-substrate electrode of the cavity substrate is formed on the main surface opposite to the light-emitting layer 322. In the semiconductor light emitting device 3e, the n electrode layer 35 is in direct contact with the n type semiconductor layer 321 of the multilayer semiconductor layer 32, whereby the n electrode layer 35 and the n type semiconductor layer 321 are electrically connected.

  A second insulating layer 33 a is formed on the n electrode layer 35 in the vicinity of the edge of the n electrode layer 35 on the base material side surface 313. In the element side surface 303, a p-electrode layer 34 is formed from the edge of the substrate side surface 313 on the substrate upper surface 311 side to the second insulating layer 33 a, and the multilayer semiconductor layer is interposed via the p-type transparent substrate 31. 32 p-type semiconductor layers 323 are electrically connected.

  The thickness in the vertical direction of the transparent substrate 31 is preferably 50 μm or more and 500 μm or less, and the thicknesses of the p-type semiconductor layer 323, the light emitting layer 322, and the n-type semiconductor layer 321 are preferably 100 nm or more and 2 μm or less, respectively. 1 nm or more and 100 nm or less, and 1 μm or more and 5 μm or less.

The transparent substrate 31 is composed of a gallium phosphide-based compound semiconductor (In _a Ga _b Al _1- abP (where 0 ≦ a ≦ 1, 0 ≦ b ≦ 1, 0 ≦ a + b ≦ 1) (P: phosphorus) In this embodiment, it is formed of GaP (gallium phosphide) doped with Zn or Mg. The p-type semiconductor layer 323 of the multilayer semiconductor layer 32 is formed of a p-type gallium phosphide compound semiconductor (for example, InGaAlP), and is preferably doped with a p-type impurity such as Zn or Mg. The light emitting layer 322 is formed of a gallium phosphide-based compound semiconductor having a smaller band gap than the n-type semiconductor layer 321 and the p-type semiconductor layer 323, and a plurality of well layers and a plurality of barrier layers are alternately stacked. It is a multi-quantum well structure. The n-type semiconductor layer 321 is formed of an n-type gallium phosphide compound semiconductor (for example, InGaAlP), and is preferably doped with an n-type impurity such as Si or Se (selenium). The materials, thicknesses, and the like of the first insulating layer 33, the second insulating layer 33a, the p electrode layer 34, and the n electrode layer 35 are the same as those in the first embodiment.

  In the semiconductor light emitting element 3 e, the light that is emitted from the light emitting layer 322 of the multilayer semiconductor layer 32 toward the part other than the element upper surface 301 that is the light emitting surface is reflected by the n electrode layer 35 on the element lower surface 302, At 303, the light is reflected by the portion provided on the element side surface 303 of the n-electrode layer 35 and the p-electrode layer 34. That is, in the semiconductor light emitting device 3e, the portion of the n-electrode layer 35 on the device lower surface 302 becomes the first reflective layer formed on the device lower surface 302, and the portion of the n-electrode layer 35 on the device side surface 303 and the p-electrode layer 34. Is the second reflective layer formed on the four element side surfaces 303. Thereby, high brightness and miniaturization of the semiconductor light emitting element 3e can be realized.

  Further, since the n-electrode layer 35 and the p-electrode layer 34 partially overlap with each other via the second insulating layer 33a on the element side surface 303, the reflection is reflected on the four element side surfaces 303 and the entire element lower surface 302 of the semiconductor light emitting element 3e. A layer is provided (that is, the area of the reflective layer becomes equal to the total area of the element lower surface 302 and the element side surface 303), and further increase in luminance of the semiconductor light emitting element 3e is realized.

  In the semiconductor light emitting element 3 (see FIG. 6) according to the first embodiment, the area of the reflective layer is made equal to the total area of the element lower surface 302 and the element side surface 303 as in the semiconductor light emitting element 3e. Further, it is possible to further increase the brightness of the semiconductor light emitting element 3. Specifically, a second insulating layer is provided on the recess 36 provided at the boundary between the p-electrode layer 34 and the n-electrode layer 35 and the p-electrode layer 34 in the vicinity of the recess 36 shown in FIG. The n-electrode layer 35 is provided up to the second insulating layer. That is, on the element lower surface 302 of the semiconductor light emitting element 3 (that is, on the first reflective layer), the p electrode layer 34 and the n electrode layer 35 partially overlap with each other via the second insulating layer. As described above, when the area of the reflective layer is made equal to the total area of the element lower surface 302 and the element side surface 303, the position where the p electrode layer 34 and the n electrode layer 35 partially overlap is the element lower surface which is the first reflective layer. It is only necessary to be provided on at least one of 302 and the element side surface 303 which is the second reflective layer.

  As mentioned above, although embodiment of this invention has been described, this invention is not limited to the said embodiment, A various change is possible.

  For example, in the transparent base material 31, four base material side surfaces 313 are respectively closer to the upper base material side surface 3131 and the base material upper surface 311 than the upper base material side surface 3131, as in the semiconductor light emitting element 3 f shown in FIG. 19. The structure may include a lower base material side surface 3132 having a small angle therebetween. Thereby, the semiconductor light emitting element can be further miniaturized, and further miniaturization of the light emitting device can be realized. In the semiconductor light emitting device according to the above embodiment, the device upper surface 301 does not necessarily have to be a square, and may be, for example, a rectangle. In this case, the energy loss in the element in the direction parallel to the short side of the element upper surface 301 is reduced, and the reduction amount is larger than the increase in the energy loss of the light in the direction parallel to the long side of the element upper surface 301. Therefore, the light emission efficiency of the semiconductor light emitting device can be improved.

  In the semiconductor light emitting devices according to the first to third embodiments, an intermediate layer formed of a gallium nitride compound semiconductor is provided between the light emitting layer 322 and the p-type semiconductor layer 323 of the multilayer semiconductor layer 32. Also good. The thickness of the intermediate layer is preferably 1 nm or more and 50 nm or less. Similarly, in the semiconductor light emitting device 3e according to the fourth embodiment, an intermediate layer formed of a gallium phosphide-based compound semiconductor may be provided between the light emitting layer 322 and the p-type semiconductor layer 323.

  The p electrode layer 34 and the n electrode layer 35 are formed of an appropriate metal material capable of obtaining a high reflectance in accordance with the wavelength of light emitted from the light emitting layer 322, the material of the transparent substrate 31, and the like. Each of the electrode layers may have a single-layer structure made of one kind of metal material or a laminated structure made of a plurality of kinds of metal materials. Further, the p electrode layer 34 and the n electrode layer 35 are not necessarily limited to metals, and may be formed of a conductor other than metal, such as graphite or conductive plastic. Note that an insulating layer having a high reflectance (for example, an insulating layer having a multilayer structure) may be formed to be a part of the first reflective layer and the second reflective layer.

  In the semiconductor light emitting device, the first reflective layer on the device lower surface 302 and the second reflective layer on the device side surface 303 do not necessarily have an electrode layer. For example, in the semiconductor light emitting device 3 according to the first embodiment, the first reflective layer is the p-electrode layer 34, and the second reflective layer is not used for electrical connection between the semiconductor light emitting device 3 and the cavity substrate 2. It may be formed of metal or other material. In this case, a small electrode layer is formed on the substrate upper surface 311 of the transparent substrate 31, and the n-type semiconductor layer 321 is electrically connected to the substrate electrode by wire bonding, for example, via the electrode layer and the transparent substrate 31. Connected. At this time, by forming the electrode layer on the upper surface of the base material 311 with Al having a high spreadability, a slip line is formed on the surface of the electrode layer at the time of ultrasonic bonding with the Au wire in wire bonding, and the new surface of the Al electrode layer The Au wire is firmly bonded. As a reflection layer not used for electrical connection between the semiconductor light emitting element and the cavity substrate 2 as described above, it is formed of silicon nitride, silicon oxide, zinc oxide, titanium oxide, zirconium oxide, tantalum oxide, niobium oxide, vanadium oxide, or the like. An insulating dielectric multilayer film may be used.

  The insulating layer 33 is not necessarily in contact with the entire side surface 324 of the multilayer semiconductor layer 32. For example, when the n electrode layer 35 can be formed with high accuracy, the n electrode layer 35 may be formed so as to be in contact with the side surface of the n type semiconductor layer 321 while being insulated from the p type semiconductor layer 323. (The same applies to the p electrode layer 34). In this case, the transparent base material 31 may be formed of a material having low conductivity such as sapphire or SiC (silicon carbide).

  In the manufacture of the semiconductor light emitting device 3 according to the first embodiment, the plurality of protrusions 802 are held by the flexible holding member 803 in step S15, and the plurality of protrusions 802 are polished during polishing in step S16. After polishing until just before separation, the holding member 803 may be bent to break between the plurality of protrusions 802 to obtain a plurality of semiconductor light emitting elements 3.

  In the semiconductor light emitting device 3c according to the third embodiment, instead of the transparent electrode layer 37, a very thin (for example, a thickness of 50 nm or less) translucent electrode layer formed of a metal such as Ni is provided. May be. Alternatively, the electrode layer may be formed in a mesh shape or a stripe shape so that light is transmitted (passed) through an opening (that is, a region where no electrode layer is present). In such a mesh-like or stripe-like transparent electrode layer, the width of each of the plurality of linear electrodes forming the mesh or stripe is preferably 10 μm or more and 100 μm or less. The pitch is preferably 50 μm or more and 500 μm or less. Furthermore, instead of the transparent electrode layer 37, a translucent electrode layer provided with a plurality of circular or polygonal openings may be provided. The diameter of the opening is preferably 10 μm or more and 500 μm or less.

  Instead of the connection part 38 of the semiconductor light emitting device 3c according to the third embodiment, a p-type semiconductor layer 323, a light emitting layer 322, n in the vicinity of the edge of the device upper surface 301 as in the semiconductor light emitting device 3g shown in FIG. A trench 38 a penetrating the type semiconductor layer 321, the transparent base material 31 and the insulating layer 33 is formed, and the p electrode layer 34 on the transparent electrode layer 37 and the element side surface 303 is connected via a connection structure provided in the trench 38 a. And may be electrically connected. The connection structure in the trench 38a includes an insulating outer layer formed by CVD (Chemical Vapor Deposition) or the like, and a conductive inner layer formed by vapor deposition or plating.

  In the manufacture of the light emitting device according to the above-described embodiment, when the semiconductor light emitting element is mounted on the cavity substrate 2, an anisotropic conductive resin film or a different material is provided between the semiconductor light emitting element and the inner bottom surface 212 of the cavity 21. After applying a filler such as a conductive resin paste (in the case where a protruding electrode is provided on the element lower surface 302 of the semiconductor light emitting element, it may be a nonconductive resin film or a nonconductive resin paste). Ultrasonic bonding or pressure bonding may be performed. In addition, the semiconductor light emitting element is cavity-bonded by pressing the Au electrode layer provided on the semiconductor light emitting element toward the Au substrate electrode provided on the cavity substrate in a plasma atmosphere to metal-bond the electrode layer and the substrate electrode. It may be mounted on a substrate.

The configurations of the semiconductor light-emitting element and the light-emitting device according to the above embodiment are not necessarily applied only to LEDs that emit blue or red light, and light-emitting devices including the LEDs, and have various wavelength bands. The present invention may be applied to a semiconductor light emitting element such as an LED that emits light, and a light emitting device including the semiconductor light emitting element. In this case, the material of the transparent substrate 31 of the semiconductor light emitting element is appropriately selected in consideration of the cost and the like according to the wavelength band of the emitted light. For example, if the wavelength band of light is 200 nm or more, AlN (aluminum nitride) can be used as the transparent substrate 31. Further, Ga ₂ O ₃ if the wavelength band of light is 290 nm or more, GaN or ZnO if it is 360 nm or more, SiC if it is 380 nm or more, GaP if it is 560 nm or more, GaAs (gallium arsenide) if it is 800 nm or more. Can be used as the transparent substrate 31.

  INDUSTRIAL APPLICABILITY The present invention can be used for a semiconductor light emitting element and a light emitting device including the semiconductor light emitting element. It can be used for various purposes. For example, indoor lighting, in-vehicle lamps, car headlights, liquid crystal display backlights, traffic lights, optical communication devices, infrared cameras and strobes, mobile phone keypads, sterilization lamps for medical equipment and air purifiers, and photocatalysts It can be used for lamps and the like.

The top view of the light-emitting device which concerns on 1st Embodiment Cross section of light emitting device Plan view of cavity substrate Cross section of cavity substrate Plan view of semiconductor light emitting device Cross section of semiconductor light emitting device The figure which shows the flow of manufacture of a semiconductor light emitting element Sectional view showing a semiconductor light-emitting element in production Sectional view showing a semiconductor light-emitting element in production Sectional view showing a semiconductor light-emitting element in production Sectional view showing a semiconductor light-emitting element in production Sectional view showing a semiconductor light-emitting element in production Sectional view showing a semiconductor light-emitting element in production Sectional view showing a semiconductor light-emitting element in production Sectional view showing a light emitting device under production Sectional view showing a light emitting device under production Sectional drawing which shows the other example of a semiconductor light-emitting device Sectional drawing of the light-emitting device which concerns on 2nd Embodiment Plan view of semiconductor light emitting device The top view of the semiconductor light-emitting device of the light-emitting device concerning 3rd Embodiment Cross section of semiconductor light emitting device The figure which shows the flow of manufacture of a semiconductor light emitting element Sectional view showing a semiconductor light-emitting element in production Sectional view showing a semiconductor light-emitting element in production Sectional view showing a semiconductor light-emitting element in production Sectional view showing a semiconductor light-emitting element in production Sectional view showing a semiconductor light-emitting element in production Sectional view showing a semiconductor light-emitting element in production Sectional view showing a semiconductor light-emitting element in production Sectional view showing a semiconductor light-emitting element in production Sectional drawing which shows the other example of a semiconductor light-emitting device Sectional drawing of the semiconductor light-emitting device of the light-emitting device concerning 4th Embodiment Sectional drawing which shows the other example of a semiconductor light-emitting device Sectional drawing which shows the other example of a semiconductor light-emitting device

Explanation of symbols

DESCRIPTION OF SYMBOLS 1,1a Light-emitting device 2 Cavity substrate 3,3a-3g Semiconductor light-emitting element 20 Conductive metal paste 21 Cavity 22 P substrate electrode 23 n substrate electrode 24 Insulation convex part 31 Transparent base material 32 Multilayer semiconductor layer 33 (1st) Insulation layer 33a Second insulating layer 34 p electrode layer 35 n electrode layer 37 transparent electrode layer 39 bump electrode 211 opening 212 inner bottom surface 213 inner side surface 214 groove 301 element upper surface 302 element lower surface 303 element side surface 311 substrate upper surface 312 substrate lower surface 313 substrate Side surface 321 n-type semiconductor layer 322 Light-emitting layer 323 p-type semiconductor layer 324 Side surface 801 Groove portion 802 Projection portion 803 Holding member 831 Transparent substrate 833 Insulating layer 834 p-electrode layer 835 n-electrode layer 837 Transparent-electrode layer 8321 n-type semiconductor layer 8322 Light-emitting Layer 8323 p-type semiconductor layer S11 to S16, S 21 to S27 steps

Claims (13)

A light emitting device,
An element upper surface which is a rectangular light emitting surface, a rectangular element lower surface parallel to the element upper surface and smaller than the element upper surface, and an inverted square frustum-shaped semiconductor light emitting element having four element side surfaces;
A rectangular opening, a rectangular inner bottom surface smaller than the opening, and an inverted quadrangular pyramid-shaped cavity having four inner surfaces are formed, and the semiconductor light emitting element includes the lower surface of the element and the four A cavity substrate inserted into the cavity with an element side face facing the inner bottom surface and the four inner side surfaces of the cavity, and
The semiconductor light emitting element is
A rectangular base material upper surface, a rectangular base material lower surface parallel to the base material upper surface and smaller than the upper surface of the base material, and an inverted square frustum-shaped light-transmitting element base material having four base material side surfaces When,
A multilayer semiconductor layer having a first semiconductor layer, a light emitting layer and a second semiconductor layer, which are sequentially laminated on the lower surface of the element substrate;
A first reflective layer that is formed on the lower surface of the element and reflects light from the light emitting layer;
A second reflective layer formed on the four element side surfaces and reflecting light from the light emitting layer ,
The first reflective layer is in contact with a main surface of the second semiconductor layer opposite to the element base, and the second semiconductor layer is electrically connected to a first substrate electrode formed on the inner bottom surface of the cavity. Connected to
The light emitting device, wherein the second reflective layer electrically connects the first semiconductor layer to a second substrate electrode formed on any one of the four inner surfaces of the cavity. The light-emitting device according to claim 1 ,
A projecting electrode bonded to the first substrate electrode of the cavity substrate is formed on the first reflective layer. The light-emitting device according to claim 1 or 2 ,
A light emitting device, wherein a conductive metal paste or a solder paste is filled between the first substrate electrode and the semiconductor light emitting element and between the second substrate electrode and the semiconductor light emitting element. The light-emitting device according to claim 3 ,
The light emitting device according to claim 1, wherein the cavity substrate includes an insulating protrusion extending linearly so as to isolate a region including the first substrate electrode and a region including the second substrate electrode in the cavity. The light-emitting device according to any one of claims 1 to 4 ,
The light emitting device , wherein the cavity substrate includes a groove portion continuously formed along a boundary between the inner bottom surface and the four inner side surfaces of the cavity. A light emitting device,
An element upper surface which is a rectangular light emitting surface, a rectangular element lower surface parallel to the element upper surface and smaller than the element upper surface, and an inverted square frustum-shaped semiconductor light emitting element having four element side surfaces;
A rectangular opening, a rectangular inner bottom surface smaller than the opening, and an inverted quadrangular pyramid-shaped cavity having four inner surfaces are formed, and the semiconductor light emitting element includes the lower surface of the element and the four A cavity substrate inserted into the cavity with an element side face facing the inner bottom surface and the four inner side surfaces of the cavity, and
The semiconductor light emitting element is
A rectangular base material upper surface, a rectangular base material lower surface parallel to the base material upper surface and smaller than the upper surface of the base material, and an inverted square frustum-shaped light-transmitting element base material having four base material side surfaces When,
A multilayer semiconductor layer having a first semiconductor layer, a light emitting layer and a second semiconductor layer, which are sequentially stacked on the upper surface of the element substrate;
A first reflective layer that is formed on the lower surface of the element and reflects light from the light emitting layer;
A second reflective layer formed on the four element side surfaces and reflecting light from the light emitting layer,
Furthermore, a translucent electrode layer that is in contact with the main surface of the second semiconductor layer opposite to the element base and is electrically connected to the second reflective layer,
The second reflective layer is electrically connected to the first substrate electrode formed on any one of the four inner surfaces of the cavity, the second semiconductor layer and the translucent electrode layer ,
At least one of the first reflective layer and the second reflective layer electrically connects the first semiconductor layer to a second substrate electrode formed on one of the inner bottom surface and the four inner side surfaces of the cavity. light-emitting device characterized in that it is. The light-emitting device according to claim 6 ,
The first reflective layer is electrically connected to the first semiconductor layer on the second substrate electrode,
A projecting electrode to be joined to the second substrate electrode is formed on the first reflective layer. The light-emitting device according to claim 6 or 7 ,
A light emitting device, wherein a conductive metal paste or a solder paste is filled between the first substrate electrode and the semiconductor light emitting element and between the second substrate electrode and the semiconductor light emitting element. The light-emitting device according to claim 8 ,
The light emitting device according to claim 1, wherein the cavity substrate includes an insulating protrusion extending linearly so as to isolate a region including the first substrate electrode and a region including the second substrate electrode in the cavity. The light emitting device according to any one of claims 6 to 9 ,
The light emitting device , wherein the cavity substrate includes a groove portion continuously formed along a boundary between the inner bottom surface and the four inner side surfaces of the cavity. A method of manufacturing a semiconductor light emitting device having an inverted quadrangular truncated pyramid shape having a rectangular light emitting surface, an element upper surface, a rectangular element lower surface parallel to the element upper surface and smaller than the element upper surface, and four element side surfaces. There,
a) a step of sequentially laminating a first semiconductor layer, a light emitting layer, and a second semiconductor layer on one main surface of a planar light-transmitting element substrate;
b) The second semiconductor layer, the light emitting layer, the first semiconductor layer, and a part of the element base material are cut out from the second semiconductor layer side so that the cross section is substantially triangular and arranged in a lattice shape Forming a plurality of grooves formed,
c) forming a reflective layer on the surface of the plurality of quadrangular pyramid-shaped projections surrounded by the plurality of grooves;
d) polishing the element substrate from a side opposite to the plurality of protrusions, and separating the plurality of protrusions from each other to obtain a plurality of semiconductor light emitting elements;
The manufacturing method of the semiconductor light-emitting device characterized by the above-mentioned. It is a manufacturing method of the semiconductor light emitting element according to claim 11 ,
A step of forming an insulating layer on the surfaces of the plurality of protrusions between the step b) and the step c);
The reflective layer has electrical conductivity; and
A portion electrically connected to the first semiconductor layer and the element substrate and insulated from the second semiconductor layer;
A portion electrically connected to the second semiconductor layer and insulated from the first semiconductor layer and the element substrate;
The manufacturing method of the semiconductor light-emitting device characterized by the above-mentioned. A method of manufacturing a semiconductor light emitting device having an inverted quadrangular truncated pyramid shape having a rectangular light emitting surface, an element upper surface, a rectangular element lower surface parallel to the element upper surface and smaller than the element upper surface, and four element side surfaces. There,
a) a step of sequentially laminating a first semiconductor layer, a light emitting layer, and a second semiconductor layer on one main surface of a planar light-transmitting element substrate;
b) laminating a translucent electrode layer on the second semiconductor layer;
c) attaching the adhesive holding member from the translucent electrode layer side;
d) From the element substrate side, the element substrate, the first semiconductor layer, the light emitting layer, the second semiconductor element, the translucent electrode layer, and a part of the holding member are cut away so that a cross section is obtained. Forming a plurality of grooves that are substantially triangular and arranged in a lattice pattern;
e) forming a reflective layer on the surfaces of the plurality of quadrangular pyramid-shaped projections surrounded by the plurality of grooves on the holding member;
f) obtaining a plurality of semiconductor light emitting elements by peeling the plurality of protrusions from the holding member;
The manufacturing method of the semiconductor light-emitting device characterized by the above-mentioned.