JP4652666B2 - 分散メモリ並列マルチノード・コンピュータでの多次元高速フーリエ変換の効率的な実施 - Google Patents
分散メモリ並列マルチノード・コンピュータでの多次元高速フーリエ変換の効率的な実施 Download PDFInfo
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Description
W. H. Press、S. A. Teukolsky、W. A.Vetterling、Brian P Flannery、「Numerical Recipes in Fortran」、Cambridge UniversityPress, 1986, 1992, ISBN: 0-521-43064-X、490〜529頁
Claims (13)
- ネットワークを介して通信する複数のノードを含むマルチノード・コンピュータ・システムで当初に分配される複数の要素を含む多次元配列の多次元高速フーリエ変換(FFT)を実施する方法であって、
(a)前記マルチノード・コンピュータ・システムが、前記多次元FFTの第1の次元の1次元FFTを実施するために、前記配列の前記複数の要素を第1次元で前記コンピュータ・システムの前記複数のノードにまたがって前記ネットワークを介して分配することと、
(b)前記複数のノードの各ノードが、分配された前記配列の前記要素に対して前記第1次元で前記第1の1次元FFTを実行することと、
(c)前記各ノードが、各ノードの1次元FFT変換された要素の単一の配列要素を第2次元で前記ネットワークを介する前記コンピュータ・システムの自ノードを除くすべての他のノードのそれぞれに分配することであって、当該分配の実行順序が前記すべての他のノードがランダムに配列された実行順序であるように分配することである「すべて対すべて」分配を介して再分配することと、
(d)各ノードが再分配された前記配列の要素に対する前記多次元FFTの第2の次元の1次元FFTを前記第2次元で実行することと
を含む、多次元FFTを実施する方法。 - 前記方法が、さらに、
各ノードが前記配列の前記要素の単一の配列要素を、前記ネットワークを介する前記コンピュータ・システムのすべての他のノードに分配するランダムな順序での「すべて対すべて」分配を介して第3次元で再分配するステップと、
各ノードが再分配された前記配列の要素に対して前記第3次元で1次元FFTを実行するステップと、
前記マルチノード・コンピュータ・システムが、ノードにまたがるランダムな順序で前記配列の前記要素を再分配する前記ステップおよび各ノードで後続の次元について前記再分配された要素に対して前記1次元FFTを実行する前記ステップとを繰り返すステップと
を含む、請求項1に記載の多次元FFTを実施する方法。 - 前記方法が、前記マルチノード・コンピュータ・システムが、各ノードの前記1次元FFT変換された要素を再分配するために他のノードのランダムな順序を生成するステップを含む、請求項1に記載の多次元FFTを実施する方法。
- 前記複数の要素のそれぞれが、複数の総パケットを介して前記コンピュータ・システムのノードの間で再分配される、請求項3に記載の多次元FFTを実施する方法。
- 前記方法が、さらに、
各ノードが複数の出力キューを設けるステップと、
前記各ノードが、他のノードごとに、各繰返し中に前記複数の総パケットの少なくとも1つのパケットを出力キューに出力するステップと
を含む、請求項4に記載の多次元FFTを実施する方法。 - 前記方法が、さらに、
前記各ノードが、複数の注入先入れ先出し(FIFO)バッファを設けるステップであって、各FIFOバッファが、前記ネットワーク上の少なくとも特定の方向でパケットを送出する、ステップと、
前記各ノードが、前記複数の出力キューを通して各キューの頭部にあるパケットの識別を繰り返すステップと、
前記各ノードが、各キューの頭部にある前記パケットに関連する可能な経路指定方向を得るステップと、
前記各ノードが、前記パケットを、各キューの頭部から、前記パケットに関連する前記可能な経路指定方向の1つの最も満杯でないFIFOバッファに移動するステップと
を含む、請求項5に記載の多次元FFTを実施する方法。 - ネットワークを介して通信する複数のノードを含むマルチノード・コンピュータ・システムで当初に分配される複数の要素を含む多次元配列の多次元高速フーリエ変換(FFT)を実施するシステムであって、
(a)前記多次元FFTの第1の次元の1次元FFTを実施するために、前記配列の前記複数の要素を第1次元で前記コンピュータ・システムの前記複数のノードにまたがって前記ネットワークを介して分配する手段と、
(b)各ノードで、分配された前記配列の前記要素に対して前記第1次元で前記第1の1次元FFTを実行する手段と、
(c)各ノードで、1次元FFT変換された要素の単一の配列要素を第2次元で前記ネットワークを介する前記コンピュータ・システムの自ノードを除くすべての他のノードのそれぞれに分配することであって、当該分配の実行順序が前記すべての他のノードがランダムに配列された実行順序であるように分配することである「すべて対すべて」分配を介して再分配する手段と、
(d)各ノードで、再分配された前記配列の要素に対する前記多次元FFTの第2の次元の1次元FFTを前記第2次元で実行する手段と
を含む、多次元FFTを実施するシステム。 - 前記システムが、さらに、
各ノードで、前記配列の前記要素の単一の配列要素を、前記ネットワークを介する前記コンピュータ・システムのすべての他のノードに分配することであって、当該分配の実行順序が前記すべての他のノードがランダムに配列された実行順序であるように分配することである「すべて対すべて」分配を介して第3次元で再分配する手段と、
各ノードで、再分配された前記配列の要素に対して前記第3次元で1次元FFTを実行する手段と、
ノードにまたがるランダムな順序で前記配列の前記要素を再分配する前記ステップおよび各ノードで後続の次元について前記再分配された要素に対して前記1次元FFTを実行する前記ステップとを繰り返す手段と
を含む、請求項7に記載の多次元FFTを実施するシステム。 - 前記システムが、各ノードの前記1次元FFT変換された要素を再分配するために他のノードのランダムな順序を生成する手段を含む、請求項7に記載の多次元FFTを実施するシステム。
- 前記複数の要素のそれぞれが、複数の総パケットを介して前記コンピュータ・システムのノードの間で再分配される、請求項9に記載の多次元FFTを実施するシステム。
- 前記システムが、さらに、
各ノードで複数の出力キューを設ける手段と、
各ノードで、他のノードごとに、各繰返し中に前記複数の総パケットの少なくとも1つのパケットを出力キューに出力する手段と
を含む、請求項10に記載の多次元FFTを実施するシステム。 - 前記システムが、さらに、
前記各ノードで、複数の注入先入れ先出し(FIFO)バッファを設ける手段であって、各FIFOバッファが、前記ネットワーク上の少なくとも特定の方向でパケットを送出する、手段と、
ノードで前記複数の出力キューを通して各キューの頭部にあるパケットの識別を繰り返す手段と、
前記各ノードで、各キューの頭部にある前記パケットに関連する可能な経路指定方向を得る手段と、
前記各ノードで、前記パケットを、各キューの頭部から、前記パケットに関連する前記可能な経路指定方向の1つの最も満杯でないFIFOバッファに移動する手段と
を含む、請求項11に記載の多次元FFTを実施するシステム。 - 請求項1乃至6のいずれか1項に記載の方法の各ステップを前記マルチノード・コンピュータに実行させるためのコンピュータプログラム。
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PCT/US2002/005574 WO2002069097A2 (en) | 2001-02-24 | 2002-02-25 | Efficient implementation of a multidimensional fast fourier transform on a distributed-memory parallel multi-node computer |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008117044A (ja) * | 2006-11-01 | 2008-05-22 | Oki Electric Ind Co Ltd | 2次元高速フーリエ変換演算方法及び2次元高速フーリエ変換演算装置 |
CA2437036A1 (en) * | 2001-02-24 | 2002-09-06 | International Business Machines Corporation | Efficient implementation of a multidimensional fast fourier transform on a distributed-memory parallel multi-node computer |
US20060095485A1 (en) * | 2004-10-30 | 2006-05-04 | Moore George S | System and method for permuting a vector |
CN100422975C (zh) * | 2005-04-22 | 2008-10-01 | 中国科学院过程工程研究所 | 一种面向粒子方法的并行计算系统 |
US20060241928A1 (en) * | 2005-04-25 | 2006-10-26 | International Business Machines Corporation | Load balancing by spatial partitioning of interaction centers |
GB2425860A (en) * | 2005-05-05 | 2006-11-08 | Advanced Risc Mach Ltd | Multi-dimensional fast fourier transform |
EP2013772B1 (en) * | 2006-04-28 | 2018-07-11 | Qualcomm Incorporated | Multi-port mixed-radix fft |
US8082289B2 (en) | 2006-06-13 | 2011-12-20 | Advanced Cluster Systems, Inc. | Cluster computing support for application programs |
US8325633B2 (en) * | 2007-04-26 | 2012-12-04 | International Business Machines Corporation | Remote direct memory access |
US7889657B2 (en) * | 2007-05-04 | 2011-02-15 | International Business Machines Corporation | Signaling completion of a message transfer from an origin compute node to a target compute node |
US7948999B2 (en) * | 2007-05-04 | 2011-05-24 | International Business Machines Corporation | Signaling completion of a message transfer from an origin compute node to a target compute node |
US7890670B2 (en) * | 2007-05-09 | 2011-02-15 | International Business Machines Corporation | Direct memory access transfer completion notification |
US7779173B2 (en) * | 2007-05-29 | 2010-08-17 | International Business Machines Corporation | Direct memory access transfer completion notification |
US8037213B2 (en) | 2007-05-30 | 2011-10-11 | International Business Machines Corporation | Replenishing data descriptors in a DMA injection FIFO buffer |
US7765337B2 (en) * | 2007-06-05 | 2010-07-27 | International Business Machines Corporation | Direct memory access transfer completion notification |
US8018951B2 (en) | 2007-07-12 | 2011-09-13 | International Business Machines Corporation | Pacing a data transfer operation between compute nodes on a parallel computer |
US8478834B2 (en) * | 2007-07-12 | 2013-07-02 | International Business Machines Corporation | Low latency, high bandwidth data communications between compute nodes in a parallel computer |
US20090031001A1 (en) * | 2007-07-27 | 2009-01-29 | Archer Charles J | Repeating Direct Memory Access Data Transfer Operations for Compute Nodes in a Parallel Computer |
US7890597B2 (en) * | 2007-07-27 | 2011-02-15 | International Business Machines Corporation | Direct memory access transfer completion notification |
US8959172B2 (en) * | 2007-07-27 | 2015-02-17 | International Business Machines Corporation | Self-pacing direct memory access data transfer operations for compute nodes in a parallel computer |
JP2009104300A (ja) * | 2007-10-22 | 2009-05-14 | Denso Corp | データ処理装置及びプログラム |
US9225545B2 (en) * | 2008-04-01 | 2015-12-29 | International Business Machines Corporation | Determining a path for network traffic between nodes in a parallel computer |
US9009350B2 (en) * | 2008-04-01 | 2015-04-14 | International Business Machines Corporation | Determining a path for network traffic between nodes in a parallel computer |
US8694570B2 (en) * | 2009-01-28 | 2014-04-08 | Arun Mohanlal Patel | Method and apparatus for evaluation of multi-dimensional discrete fourier transforms |
DE112010003810B4 (de) * | 2009-11-16 | 2019-02-21 | International Business Machines Corporation | Verfahren, Programm und paralleles Computersystem für die Planung einer Vielzahl von Berechnungsverfahren einschließlich All-to-All Kommunikation (A2A) zwischen einer Vielzahl von Knoten (Prozessoren), die ein Netzwerk formen |
US8544026B2 (en) * | 2010-02-09 | 2013-09-24 | International Business Machines Corporation | Processing data communications messages with input/output control blocks |
JP5238791B2 (ja) | 2010-11-10 | 2013-07-17 | 株式会社東芝 | 転送機能を有するメモリノードを相互に接続したストレージ装置及びデータ処理方法 |
US8949453B2 (en) | 2010-11-30 | 2015-02-03 | International Business Machines Corporation | Data communications in a parallel active messaging interface of a parallel computer |
US8949328B2 (en) | 2011-07-13 | 2015-02-03 | International Business Machines Corporation | Performing collective operations in a distributed processing system |
US8930962B2 (en) | 2012-02-22 | 2015-01-06 | International Business Machines Corporation | Processing unexpected messages at a compute node of a parallel computer |
US10048991B2 (en) * | 2013-07-01 | 2018-08-14 | Hitachi, Ltd. | System and method for parallel processing data blocks containing sequential label ranges of series data |
US20160105494A1 (en) * | 2014-10-08 | 2016-04-14 | Interactic Holdings, Llc | Fast Fourier Transform Using a Distributed Computing System |
US10084860B2 (en) * | 2015-04-09 | 2018-09-25 | Electronics And Telecommunications Research Institute | Distributed file system using torus network and method for configuring and operating distributed file system using torus network |
CN104820581B (zh) * | 2015-04-14 | 2017-10-10 | 广东工业大学 | 一种fft和ifft逆序数表的并行处理方法 |
US10116557B2 (en) | 2015-05-22 | 2018-10-30 | Gray Research LLC | Directional two-dimensional router and interconnection network for field programmable gate arrays, and other circuits and applications of the router and network |
KR102452945B1 (ko) * | 2015-08-27 | 2022-10-11 | 삼성전자주식회사 | 푸리에 변환을 수행하는 방법 및 장치 |
KR102526750B1 (ko) * | 2015-12-17 | 2023-04-27 | 삼성전자주식회사 | 푸리에 변환을 수행하는 방법 및 장치 |
US10587534B2 (en) | 2017-04-04 | 2020-03-10 | Gray Research LLC | Composing cores and FPGAS at massive scale with directional, two dimensional routers and interconnection networks |
CN107451097B (zh) * | 2017-08-04 | 2020-02-11 | 中国科学院软件研究所 | 国产申威26010众核处理器上多维fft的高性能实现方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5644517A (en) * | 1992-10-22 | 1997-07-01 | International Business Machines Corporation | Method for performing matrix transposition on a mesh multiprocessor architecture having multiple processor with concurrent execution of the multiple processors |
US5583990A (en) * | 1993-12-10 | 1996-12-10 | Cray Research, Inc. | System for allocating messages between virtual channels to avoid deadlock and to optimize the amount of message traffic on each type of virtual channel |
JP3675537B2 (ja) * | 1995-11-29 | 2005-07-27 | 富士通株式会社 | 高速フーリエ変換を行うメモリ分散型並列計算機およびその方法 |
JP3129398B2 (ja) * | 1997-01-08 | 2001-01-29 | 日本電気株式会社 | 8点×8点2次元逆離散コサイン変換回路およびそれを実現するマイクロプロセッサ |
JPH11143860A (ja) * | 1997-11-07 | 1999-05-28 | Matsushita Electric Ind Co Ltd | 直交変換装置 |
US6073154A (en) * | 1998-06-26 | 2000-06-06 | Xilinx, Inc. | Computing multidimensional DFTs in FPGA |
JP4057729B2 (ja) | 1998-12-29 | 2008-03-05 | 株式会社日立製作所 | フーリエ変換方法およびプログラム記録媒体 |
CA2437036A1 (en) * | 2001-02-24 | 2002-09-06 | International Business Machines Corporation | Efficient implementation of a multidimensional fast fourier transform on a distributed-memory parallel multi-node computer |
US7788310B2 (en) * | 2004-07-08 | 2010-08-31 | International Business Machines Corporation | Multi-dimensional transform for distributed memory network |
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CN1493042A (zh) | 2004-04-28 |
IL157518A0 (en) | 2004-03-28 |
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WO2002069097A2 (en) | 2002-09-06 |
WO2002069097A3 (en) | 2002-10-24 |
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JP2004536371A (ja) | 2004-12-02 |
AU2002252086A1 (en) | 2002-09-12 |
CA2437036A1 (en) | 2002-09-06 |
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