JP4637566B2 - Masking spacer and manufacturing method thereof - Google Patents

Description

  The present invention relates to a masking spacer used when a reflecting mirror added to a semiconductor laser element for optical pickup is formed as a thin film by vapor deposition or sputtering.

  As shown in FIG. 4, the chip-shaped semiconductor laser device 6 is formed on both side surfaces of a prismatic wafer 12 composed of an active material layer and a p-type cladding layer and an n-type cladding layer sandwiched therebetween. The electrode 8 is provided, and includes a reflecting mirror made of a pair of thin films formed on opposing surfaces (cleavage surfaces) in which the laminated structure is shown as a cross section, and is amplified by stimulated emission in the active material layer. By extracting a part of the light, laser light with excellent directivity can be obtained. The quality of the thin film formed by vapor deposition is important because the quality of the laser beam and the presence or absence of high output are affected by the uniformity of the thickness of the thin film as the reflecting mirror and the deposition state of the film.

As an example of a conventional manufacturing method of the semiconductor laser device 6, as shown in FIG. 5, a prismatic wafer 12 at the previous stage to be cut into chips is set in a concave groove 13a of a jig 13, and the main surface 12a on the upper part A masking plate 111 made of silicon is placed on the side surface 12a and the end surface 12b of the prismatic wafer 12 that is not covered with the masking plate 111, and a film made of a thin film such as SiO ₂ acts as a reflecting mirror for amplifying laser light. This method is disclosed (for example, see Patent Document 1).

As another method, as shown in FIG. 6, a plurality of H-shaped masking plates 111 and prismatic wafers 12 are alternately sandwiched to mask the prismatic wafers 12, and the prismatic wafers 12 are H-shaped masking plates 111. A film forming method is also disclosed in which a thin film such as SiO ₂ is used as a reflecting mirror for amplifying laser light in a portion not covered with (see, for example, Patent Document 2).

Further, as shown in FIG. 7, a plurality of prismatic wafers 12 are placed on a flat jig 13, covered with a masking plate 111 every even column, and the jig 13 and the masking plate 111 are opened. A film forming method is also disclosed in which a thin film such as SiO ₂ acts as a reflecting mirror for amplifying laser light in a portion not covered with (see, for example, Patent Document 3).

Also, recently, for the sake of workability and efficiency, as shown in FIG. 8, the prismatic wafer 12 and the mask in the previous stage in which the chip-shaped semiconductor laser element is scratched and cut to a desired size by slicing or dicing are masked. A method of forming the thin film on the end face 12b of the prismatic wafer 12 from the upper portion by vapor deposition or sputtering is performed by holding the spacers 11 alternately. At this time, the thin film is applied to the side face 12a of the prismatic wafer 12. As the masking spacer 11 for preventing wraparound, a prismatic one similar to the prismatic wafer 12 is used. It is known to form a thin film by alternately arranging the thin films. As the masking spacer 11 in this case, since a certain degree of flatness is required, a silicon wafer substrate in which the flatness is secured at a submicron level is formed in a prismatic shape by a known slicing process. .
JP-A-1-55891 JP-A-11-163460 JP 2003-332675 A

  However, in the method disclosed in Patent Document 1, the masking plate 111 serves only to prevent the thin film from entering the side surface 12a, and substantially covers the one groove 13a side from above the masking plate 111 with another cover. Since the film is formed only on the other concave groove 13a side, it is necessary to invert the prismatic wafer 12 after the film formation on one side, and at this time, the corners of the prismatic wafer 12 are easily damaged, and the film is formed. Since the thin film thus connected is connected to the bottom surface of the concave groove 13a by the prismatic wafer 12, the film quality cannot be stabilized because the film is not finely divided at the time of inversion or separation.

  In addition, the method disclosed in Patent Document 2 uses an H-shaped spacer 111, and as described in Patent Document 1, it is not necessary to invert the film after film formation, but the film is formed even in the sandwiched gap portion. As a result, there is a problem that the electrode surface is covered and the occurrence of poor conduction frequently occurs.

  Furthermore, the method disclosed in Patent Document 3 does not cause a thin film to wrap around when forming a reflecting mirror on the back surface, which is the electrode surface of the prismatic wafer 12 that is in contact with the jig 13, and further from the jig. There was a problem that the film forming part was damaged during the separation.

  Furthermore, in the method shown in FIG. 8, since the prismatic wafer 12 is formed on the jig 13 to form a film, the problem that the prismatic wafer 12 in contact with the jig is damaged, and the bottom surface can be easily formed. There was a problem of contamination because cleaning was impossible. Further, since the boundary between the both side surfaces 11a and both end surfaces 11b of the masking spacer 11 is edge-shaped, there is a problem that the reflecting mirror is damaged during separation without an appropriate amount of wrapping around the electrode surface of the reflecting mirror. This damage to the reflecting mirror has an effect such as irregular reflection during the amplification of the laser beam, adversely affecting the intensity at the time of laser oscillation, leading to deterioration of the laser beam quality.

  As the above conventional masking material, silicon was mainly used. However, due to mechanical impact due to handling or the like, defects were generated in a cleaved manner along the crystal axis. Particles were also generated, which caused problems in terms of the quality of the film serving as a reflecting mirror by adhering to the prismatic wafer.

  As a countermeasure against particles, a hollow sputtering method can be considered to avoid contact with the jig or to stabilize the film thickness, but the masking spacers are held alternately with the prismatic wafer. Since the thin film is formed and deposited from above by vapor deposition or sputtering, the influence of the plasma density difference is reduced and the film thickness is required to be uniform. It is necessary to match with high accuracy. In order to ensure this dimensional accuracy, a masking spacer made of silicon or ceramics that has been subjected to polishing and slicing will be used, but both sides of the masking spacer holding the prismatic wafer are smooth surfaces, and therefore The grip effect was weak, and there was a problem that a prismatic wafer or a masking spacer dropped during sputtering in a hollow space.

  Further, since both side surfaces of the masking spacer are polished surfaces, there is a problem that particles are likely to be generated by contacting the prismatic wafer.

  The present invention has been made in view of the above circumstances, and a thin film to be a reflecting mirror is uniformly formed on both surfaces of a prismatic wafer, which is a previous stage of a semiconductor laser element, on a formation film deposition surface and is inexpensively masked. An object is to provide a spacer.

  The masking spacer of the present invention is a ceramic masking spacer that sandwiches each prismatic wafer from both side surfaces in order to form a thin film on both end faces of a prismatic wafer to be a chip-like semiconductor element. The ceramic particles protrude from both side surfaces that come into contact with the prismatic wafer, have a surface roughness Ra of 0.3 to 0.9 μm, and both end surfaces are polished surfaces.

  In addition, a boundary portion between both side surfaces and both end surfaces of the masking spacer is formed in an R surface shape.

  Furthermore, the ceramic is characterized by comprising 96.0% by mass or more of alumina as a main component.

  The masking spacer manufacturing method of the present invention is a method for manufacturing the above-mentioned ceramic masking spacer, wherein a ceramic molded body having a plurality of grooves opened on one main surface is fired to obtain a ceramic plate, and the ceramic plate is By polishing from both main surfaces, it is characterized in that it is a piece divided by the groove.

  The masking spacer of the present invention sandwiches both side surfaces of the prismatic wafer in the step of manufacturing a semiconductor element by forming a thin film to be a reflecting mirror by vapor deposition or sputtering on both end faces of the prismatic wafer. Because the ceramic particles protrude on both side surfaces that come into contact with the prismatic wafer, the surface roughness Ra is a burned surface having a surface roughness Ra of 0.3 to 0.9 μm, and both end surfaces are polished surfaces. Even if the masking spacer comes into contact with a jig or the like, the ceramic particles are protruded from both side surfaces of the masking spacer that comes into contact with the prismatic wafer without being largely cleaved. Since the surface serves as a protrusion of ceramic particles, generation of particles can be prevented. At the same time, since the surface roughness Ra of both sides is 0.3 to 0.9 μm, a large number of prismatic wafers are alternately held by the masking spacers in order to form a thin film to be a reflecting mirror. However, since it has a sufficient grip effect even if it is suspended in the hollow, it can prevent the problem of dropping, and it is not necessary to form a thin film by contacting it on a jig. The problem of fouling or damage can be prevented. In addition, since the both side surfaces are burnt skin surfaces, there is no particle destruction surface due to polishing or the like, so that generation of particles can be prevented. Further, since both end surfaces are polished surfaces, the height dimensional accuracy of both end surfaces is high. Therefore, when the side surfaces of the masking spacers and the side surfaces of the prismatic wafer are alternately brought into contact and sandwiched, The heights of both end faces of each prismatic wafer are uniform, the plasma density difference due to the thin film formation hardly occurs, and the film thickness variation of the thin films formed on both end faces of the prismatic wafer can be reduced.

  In addition, since the masking spacer of the present invention has a R-shaped boundary between both side surfaces and both end surfaces of the masking spacer, a thin film from the end surface of the prismatic wafer to the electrode surface is formed in the thin film formation of the prismatic wafer. Can be made uniform, and for this reason, the prismatic wafer and the masking spacer are separated after the thin film is formed. In this case, damage such as peeling of the thin film on both end faces of the prismatic wafer can be prevented.

  Furthermore, since the masking spacer of the present invention is made of ceramics whose main component is alumina of 96.0% by mass or more, even if the thin film adhered after use as a masking spacer is removed with a strong acidic chemical. Due to the strong chemical resistance, the surface is less rough and can therefore be reused.

  Furthermore, in the method for producing a masking spacer according to the present invention, a ceramic molded body having a plurality of grooves opened on one main surface is fired to obtain a ceramic plate, the ceramic plate is polished from both main surfaces, Since the manufacturing method is to divide into pieces, it is possible to prevent deformation and warpage at the time of firing of the ridges that are later divided into pieces and serve as masking spacers. Projecting and a surface roughness Ra of 0.3 to 0.9 μm can be obtained. Further, since both main surfaces of the ceramic plate are polished to divide into individual pieces, the height dimensional accuracy of both end faces of the masking spacer can be obtained, and a large amount can be produced, resulting in high production efficiency. Since breakage can be prevented before it is divided into individual pieces, the yield can be improved.

  As shown in FIG. 2, the masking spacer 1 according to the present invention has the above prismatic wafers 2 from both side surfaces 2a in order to form the thin film 7 on both end faces 2b of the prismatic wafer 2 to be chip-like semiconductor elements. Hold it.

  As shown in FIG. 1, the masking spacer 1 of the present invention has both end faces 1 b aligned so that the height h is substantially the same as the deposition surface of the thin film 7 of the prismatic wafer 2. The side surface 1a of the masking spacer 1 and the side surface 2a of the prismatic wafer 2 are alternately arranged so as to cover the opposite side surfaces 2a. And the thin film 7 is formed in the both end surfaces 1b and the corner | angular part 1d by the vapor deposition method or the sputtering method with the both end surfaces 2b of the prismatic wafer 2. Thereafter, the masking spacer 1 and the prismatic wafer 2 are separated, and the prismatic wafer 2 can be cut into lengths to obtain an optical waveguide element (not shown) which is a chip-shaped semiconductor element. Although not shown in detail in FIG. 1, the prismatic wafer 2 is provided on the outer side with an active material layer, a p-type cladding layer and an n-type cladding layer laminated so as to sandwich the active material layer. In the laminated structure including the formed electrodes, the side surface 2a is an electrode, the opposing end face 2b in which the laminated structure appears as a cross-section is a cleavage plane, and the reflector is used as a semiconductor laser element on the deposition surface of the thin film 7 It will be.

  Here, FIG. 1 is an embodiment of the masking spacer of the present invention, (a) is a perspective view, (b) is a plan view thereof, and (c) is a partial cross-sectional view in which the surface of the side surface is enlarged. It is shown.

  The masking spacer 1 of the present invention is rounded so that the ceramic particles 3 protrude from both side surfaces 1a in contact with the prismatic wafer 2 and the original particle 3 of the ceramic hard layer main component is not broken or scraped. The surface roughness Ra is a burned surface with a surface roughness Ra of 0.3 to 0.9 μm, and both end surfaces 1b are polished surfaces.

If the prismatic wafer 2 is, for example, a GaAs compound, its linear expansion coefficient is 7.6 × 10 ⁻⁶ / ° C., and the prismatic wafer 2 and the end face 2 b of the masking spacer 1 when the thin film 7 is deposited, In order to make the height h of 1b uniform, if the masking spacer 1 is made of ceramics, the difference in linear expansion coefficient can be made to be 1.0 × 10 ⁻⁶ / ° C. or less. Due to the thermal expansion due to the processing heat during the deposition, the variation in the height h between the prismatic wafer 2 and the masking spacer 1 is suppressed, and therefore, the occurrence of a plasma density difference is unlikely to occur and the variation in the film thickness of the thin film 7 is suppressed. it can. The ceramic set to such a linear expansion coefficient is preferably made of ceramics such as alumina, Altic, cermet, steatite, etc., and if it is a GaN compound used for a blue laser with a short wavelength, this linear expansion coefficient Since it is about 4.2 × 10 ⁻⁶ / ° C., a silicon carbide ceramic or the like can be selected to obtain a more approximate linear expansion coefficient.

  In addition, when a special function such as chemical resistance, especially acid resistance, is required to make the material recyclable, it is a high purity ceramic with relatively excellent chemical resistance and heat resistance. It is preferable to use an alumina-based material or silicon carbide ceramic.

  Since the masking spacer 1 of the present invention is made of the above-described ceramics, the conventionally used masking spacer made of silicon has a problem that, for example, a cleaved defect occurs when it comes into contact with a jig or the like. However, if it is made of the above-mentioned ceramics, there is no similar defect. Furthermore, since the ceramic particles 3 protrude from both side surfaces 1a of the masking spacer 1 that contacts the side surface 2a of the prismatic wafer 2, the portion that substantially contacts the side surface 2a of the prismatic wafer 2 is the protruding portion of the ceramic particles 3. Become. For example, if both side surfaces 1a of the masking spacer 1 are polished surfaces, as shown in FIG. 1 (c), there is no protrusion of the ceramic particles 3 retaining the original shape, and an intragranular fracture surface of the ceramic particles 3 (not shown). When the side surface 1b comes into contact with the side surface 2b of the prismatic wafer 2, particles are generated frequently, and the particles adhere to the adherend surface of the thin film 7. As a result, when this prismatic wafer 2 is used as a semiconductor laser element, foreign matter is mixed into the reflective film, causing a problem that it is difficult to obtain a high-power laser beam due to irregular reflection during light amplification. is there.

  Further, both side surfaces 1a of the masking spacer 1 which are in contact with the prismatic wafer 2 are rounded so that the ceramic particles 3 protrude, and the hard particle main particles 3 of the ceramic particles are not broken or scraped. As described above, a thin film is formed on both end faces 2b of the prismatic wafer 2 by vapor deposition or the like. In order to deposit 7, the side surface 1 a of the masking spacer 1 and the side surface 2 a of the prismatic wafer 2 are alternately sandwiched and suspended in a hollow space to ensure a sufficient grip effect. The problem of dropping the held prismatic wafer 2 does not occur.

  If the surface roughness Ra of both side surfaces 1a of the masking spacer 1 is less than 0.3 μm, a sufficient grip force cannot be obtained, so that the prismatic wafer 2 and the masking spacer 1 fall and scatter to hold the sputtered film. In addition, if the surface roughness Ra exceeds 0.9 μm, the electrodes formed on both side surfaces 2a of the prismatic wafer 2 are damaged due to the unevenness of the surface, causing a problem of conduction failure. To do. A more preferable surface roughness Ra is 0.3 to 0.6 μm.

  Accordingly, when the masking spacers 1 are alternately arranged in close contact with the opposite side surfaces 2a of the prismatic wafer 2 in such a manner, it is possible to sandwich them uniformly without gaps. Moreover, it can arrange | position, without damaging the side surface 2a which the prismatic wafer 2 opposes. When the average surface roughness Ra is less than 0.25 μm, vacuum suction is also likely to occur, and the work of separating the masking spacer 1 and the prismatic wafer 2 becomes difficult. The edge part which is a boundary part of 2a will be damaged, and the possibility of causing chipping and cracking in the thin film 7 at the same time is increased. If the average surface roughness Ra exceeds 0.9 μm, the opposing side surface 2b of the prismatic wafer 2 and the thin film 3 deposited on the cleaved surface 2a tend to be damaged.

  The surface roughness was measured with an SE-3300 surface roughness meter manufactured by Kosaka Seisakusho, at a speed of 0.1 mm / sec. , Cut off 0.8 mm, measurement length 0.8 mm. In addition, the measurement of surface roughness Ra shall be 5 each, and the average value is used as data.

  Here, when the ceramic particles 3 protrude from the surface of the side surface 1a of the masking spacer 1, the prismatic wafer 2 can be held hollow without dropping with a relatively light holding force, and the protruding ceramic particles 3 Has a rounded original shape, and since it is not an angular shape, it can be held without damaging the electrode surface of the prismatic wafer.

  At the same time, since both end surfaces 1b are polished surfaces, both side surfaces of the masking spacer 1 and the prismatic wafer 2 when the side surface 1a of the masking spacer 1 and the side surface 2a of the prismatic wafer 2 are alternately brought into contact with each other are sandwiched. The heights h of the surfaces 1b and 2b are uniform, the plasma density difference due to the formation of the thin film hardly occurs, and the film thickness variation of the thin film 7 formed on the both end surfaces 2b of the prismatic wafer 2 can be reduced.

  The polished surface means a state in which the ceramic particles 3 of the hard layer appearing on the surface are aligned in a straight line. In this case, the ceramic particles 3 of the hard layer are partially broken or scraped. It often shows that the original rounded shape does not remain.

  Moreover, it is preferable that the masking spacer 1 of this invention makes the boundary part 1c of both the side surfaces 1a and both end surfaces 1b into R surface shape.

  If the boundary portion 1c has an edge shape, the thin film 7 does not wrap around the side surfaces 1b and 2b, and as a result, when the prismatic wafer 2 and the masking spacer 1 are separated, there is a possibility that the thin film 7 is peeled off. Therefore, it is desirable that the boundary portion 1c between the both side surfaces 1a and the both end surfaces 1b of the masking spacer 1 has an R-surface shape. If it is R-plane, since the thin film 7 is deposited along the R-plane, the boundary between the prismatic wafer 2 and the masking spacer 1 is not a straight line. Is less likely to occur.

  In addition, the preferable curvature radius of R surface of the said boundary part 1c is 5-30 micrometers from the relationship of prevention with a reflecting film (insulating film) to an electrode. The boundary 1c may be a C-plane or a stepped chamfer, but an R-plane is preferable to ensure the strength of the masking spacer 1.

  Furthermore, the masking spacer 1 of the present invention preferably contains 96% by mass or more of alumina as a main component.

  This is because even if the thin film adhered after use is removed with a strong acidic chemical, the chemical resistance is strong, so that the surface is less rough and can be reused. It is possible to ensure chemical resistance, particularly acid resistance, used when peeling and cleaning the film deposited during reuse. For example, if the alumina purity is less than 96% by mass, vitreous acid (HF) used as a cleaning liquid will be violated by vitreous matter intervening at grain boundaries, resulting in problems of particle dropout and strength deterioration. To do.

  Next, the manufacturing method of the masking spacer 1 of this invention is demonstrated.

  As shown in the perspective view of FIG. 3 (a), the manufacturing method of the masking spacer 1 of the present invention produces the ceramic molded body 4 ′ having a plurality of rectangular grooves 4c opened in one main surface 4a. The ceramic molded body 4 ′ is fired at a predetermined temperature to produce the ceramic plate 4. Next, in the manufacturing method, the ceramic plate 4 is polished from both the main surfaces 4a and 4b, so that the ceramic plate 4 is divided by the rectangular groove 4c and the individual piece 5 shown in the perspective view of FIG.

  More specifically, the molding method for forming a plurality of rectangular grooves 4c on one main surface 4a of a ceramic molded body 4 '(not shown below) includes an inverted rectangular punch die and a flat plate. By using the other punch die, the above-mentioned rectangular ceramic molded body 4 'is obtained by pressure forming up and down, and the ceramic plate 4 can be produced by firing this ceramic molded body 4'. .

  In the ceramic molded body 4 ′, as shown in FIG. 3A, the ratio of the groove depth d and the thickness t1 of the groove-free portion is set to 1: 1 to 1: 1.5 with respect to the entire thickness t. As a result, warpage and deformation during firing can be prevented, and the amount of polishing during separate polishing can be suppressed. In addition, baking is obtained by keeping at about 1600-1700 degreeC for 2 hours in a well-known atmospheric atmosphere furnace, and it can suppress a deformation | transformation by installing and baking the groove part 4c on an upper surface.

  Next, the obtained ceramic plate 4 is polished in the thickness t direction, and there are the following three methods of polishing. (1) Polishing is performed so that the flatness is within 15 μm from the main surface 4a side where the groove 4c is opened, and then the thickness that becomes the height h of the masking spacer 1 later is set to 10 μm from the other main surface 4b side. Polishing is performed in order to divide into individual pieces 5 so as to be within accuracy. (2) The above polishing is performed simultaneously from both main surface sides 4a and 4b. (3) The above polishing is performed first from the main surface side 4b where the groove 4c is not open, and after dividing into pieces 5, the other main surface 4a is polished. Any of the above methods may be used, but the method (1) is more preferable if productivity and breakage due to handling are prevented to obtain a high yield.

  As the polishing method, from the viewpoint of productivity and ease of recovery when separated, the ceramic plate 4 is attached to a jig on a flat plate with flatness, and each of the main polishing methods is performed by the method (1). The surfaces 4a and 4b may be polished with a surface grinder.

  In addition, the both side surfaces 1a of the masking spacer 1 of the present invention become a burnt surface by the above-described manufacturing method. In order to set the surface roughness Ra to 0.3 to 0.9 μm, the raw material of the ceramic powder to be used is used. It can be controlled by controlling the particle size pulverization and keeping time in the maximum temperature range during firing. In addition, in order to make the ceramic particles protrude in a rounded original state, by keeping the maximum temperature range for about 1 hour at the firing temperature, the particles are rounded due to the effect of surface tension due to a slight liquid phase. It can be made to protrude in the state of being tinged.

  Next, a method of forming an R-plane shape at the boundary 1c between the both side surfaces 1a and both end surfaces 1b of the masking spacer 1 will be described. (Hereinafter not shown) Each prismatic masking spacer 1 divided into individual pieces 5 is attached to an angled jig, and the corners are polished by a known buffing to form an R surface on the boundary 1c. The shape can be formed. The preferable radius of curvature of the R-plane is in the range of 5 to 30 μm, which can prevent the electrodes of the prismatic wafer from being covered.

Example 1
Examples of the present invention will be described below.

  First, an elongated rod-like masking spacer 1 as shown in FIG. The manufacturing method is as follows. The ceramic molded body 4 'shown in FIG. 3 is filled with a raw material having an alumina purity of 99% in a predetermined die-shaped mold frame, and is pressed up and down with a rectangular mold punch and a flat punch. Formed. At this time, the alumina purity after sintering was 99%, the width D of the ceramic plate 4 after firing of the ceramic molded body 4 ′ was 35 mm, the length L was 35 mm, the thickness t was 1.5 mm, and the groove width D1 was 0.00. 6 mm, the protrusion width D2 was 0.28 mm, the groove depth d was 0.6 mm, and the number of grooves 4c formed was 31.

  The fired ceramic plate 4 is first attached with wax onto an alumina substrate having a flatness (within 0.5 μm) with the main surface 4a where the groove 4c is open as the upper surface, and the groove The main surface 4a side with the opening 4c is polished by 0.2 mm with a # 325 standard diamond wheel using a surface grinder. After that, the wax is peeled off, and the main surface 4a side where the polished groove 4c is opened is again attached to the alumina substrate with the wax, and similarly using a surface grinding machine with a # 325 standard diamond wheel. The sample of the embodiment of the present invention was manufactured by polishing and separating until the height h on the end face 1c side of the masking spacer 1 was 0.22 mm.

  In addition, the sample group which set the surface roughness Ra of the both side surfaces 1a of the masking spacer 1 which is a baking surface to 0.2 μm by controlling the particle size of the alumina raw material powder and the keeping temperature at the time of firing is the same as A. Set the sample group set to 0.3 μm to B, set the sample group set to 0.4 μm to C, set the sample group set to 0.6 μm to D, set the sample group set to 0.9 μm to E, and set to 1.0 μm. The obtained sample group is F, and in each sample group, the molded and fired ceramic plates 4 are three sheets, and therefore, the masking spacers 1 that are divided and polished by polishing are 120 pieces each.

  Moreover, the sample group G used as the comparative example was produced with the manufacturing method of the masking spacer 11 made from the conventional ceramic. In the molding method, a plate-shaped ceramic molded body formed by filling a predetermined mortar-shaped mold frame with a raw material having an alumina purity of 99% and pressurizing with a flat plate upper and lower punches at 1600 ° C. in the atmosphere. After baking for 2 hours in an atmosphere furnace, using a double-sided lapping machine, polishing the upper and lower surfaces with the # 800 standard GC abrasive grains, then affixing wax to the carbon jig, dicing mine Was used to slice and polish with a # 140 regular diamond wheel to produce a bar-shaped masking spacer. The number of samples in the comparative example was also 120.

  About the obtained each sample group, the surface state of the both side surfaces 1a and 11a of the masking spacers 1 and 11 was analyzed. The surface state was confirmed by SEM (1500 times), and the state of the surface particles on the side surface 1a was observed. As a result, it was observed whether the alumina particles on the surface were in an original state and the protrusions were not covered with glass or the like. Note that the number of samples observed was three.

  Next, the surface roughness Ra of the side surfaces 1a and 11a was measured under the following conditions. The measuring machine was a SE-3300 surface roughness meter manufactured by Kosaka Seisakusho at a speed of 0.1 mm / sec, a cutoff of 0.8 mm, and a measurement length of 0.8 mm. The surface roughness Ra was measured for each of the five, and the average value was used as data.

  Further, the yield in 120 polishing steps for each of the masking spacers 1 and 11 and the required time in the case of the present invention when the required time for polishing 100 in the sample group G as a comparative example is set to 100 (%) ).

The results are shown in Table 1.

  As can be seen from the results in Table 1, since the surfaces of both side surfaces 11a of the masking spacer 11 of Comparative Example G manufactured by the conventional manufacturing method are manufactured by the polished surface, the alumina particles are intragranular fracture surfaces, Moreover, the vitreous surrounding the periphery also exhibits a surface state broken by polishing.

  On the other hand, the surface state of both side surfaces 1a of the samples A to F of the masking spacer 1 which is an example produced by the manufacturing method of the present invention is such that the original alumina particles protrude and the skirt of the protruding alumina particles is glassy. It is the surrounding skin surface.

  Moreover, the yield in the polishing process of the comparative example was about 80%, but the yield of the example was about 96 to 99%, which was a high yield.

  Furthermore, when the polishing time required for producing 100 masking spacers 1 and 11 is 100%, according to the production method of the present invention, the production can be made in a time of 20 to 30% and the productivity is greatly increased. It can be seen that it can be improved.

(Example 2)
Next, a particle confirmation test and a grip effect confirmation test were performed using the masking spacers 1 and 11 obtained in Example 1. Because the particles may stick to the thin film deposition surface that becomes the reflecting mirror of the prismatic wafer when particles are generated from the masking spacer when the prismatic wafer is held by the masking spacer, It is necessary to reduce the number of particles, and this is a test for that evaluation. Further, the grip effect is for confirming whether or not a problem such as dropping when forming a thin film by hollowly holding a large number of prismatic wafers alternately with a masking spacer.

  The particle number confirmation test was performed for each sample group A to G, and 100 samples were put together in a nylon net and immersed in a beaker containing 1000 cc of pure water. Table 2 shows the number of particles of 0.5 μm or more mixed by applying a sound wave, which is measured by the PMC sensor.

  Next, the grip effect confirmation test was conducted by using an actual ECR sputtering apparatus (type in which the sample is suspended from the upper side), in which 100 samples of the masking spacer and the prismatic wafer are alternately sandwiched by 1 MPa from both sides. ) For 20 minutes (heated up to 250 ° C.), and then whether or not the device was dropped when the device was opened was evaluated 50 times for each sample group.

The results are shown in Table 2.

  The sample group G of the comparative example has a remarkably large number of particles from the side surface of about 80,000, but it can be seen that the number of particles of the sample groups A to F of the example greatly decreases to 1/10 or less. In particular, when the surface roughness Ra of the side surface is 0.6 μm or less, it can be further reduced to 1/20 or less of the comparative example.

  On the other hand, in the grip effect confirmation test, the fall occurrence rate of Comparative Example G is as high as 18%, but in Example A, it is halved by 8%, B is further reduced by 2%, and C, D, E, and F are fallen. Did not occur.

  From the above results, the side surface of the masking spacer that abuts on the prismatic wafer is a burnt surface rather than the polished surface, and ceramic particles protrude from the surface, so that the generation of particles can be remarkably reduced. It can be seen that the roughness Ra is preferably 0.9 μm or less, and more preferably, the surface roughness Ra of the sample group D is 0.6 μm or less. Further, when viewed from the drop occurrence rate, the example in which the prismatic wafer is gripped by the protruding ceramic particle surface has a low drop occurrence rate, and if the surface roughness Ra is 0.3 μm or more, the drop occurrence rate is It can be seen that it can be almost 0%.

  From the above, the side surface of the masking spacer is a burnt skin surface from which ceramic particles protrude, and the surface roughness Ra is preferably 0.3 to 0.9 μm, more preferably 0.3 to 0.6 μm. .

(Example 3)
Next, a test was conducted in which a masking spacer 1 was used to form a thin film by sandwiching a prismatic wafer by using the masking spacer and the presence or absence of an R surface at the boundary 1c between both side surfaces 1a and both end surfaces 1b.

  Here, as the masking spacer used, the sample group C produced in Example 1 was used, and an R surface was formed by buffing at the boundary portion 1c. In addition, the radius of curvature average value (n = 5) of the R surface is 1.2 μm, sample group C1, the radius of curvature average value 5 μm is sample group C2, the radius of curvature average value 18 μm is sample group C3, and the radius of curvature average value 30 μm is sample. A group C4 was prepared, and 100 of each were produced.

  Next, 100 prismatic wafers having the same height were alternately held by the masking spacers, and a thin film was formed on both end faces 1b of the flying spacers and the prismatic wafers by sputtering.

For sputtering, an ECR method was used, and a SiO ₂ film having a thickness of 140 nm was formed as a thin film at 250 ° C. Then, the amount of the thin film wrapping around the side surface of the obtained prismatic wafer was observed and measured with a 3000 times SEM photograph. Similarly, the damage state of the film at the time of separation was similarly expressed as NG in which the film was cracked to the end face 2b region in 3,000 times SEM photographs as NG.

The above results are shown in Table 3.

  From the above results, if the boundary portion 1c of the masking spacer is R-shaped, the thin film wraps around the side surface on which the electrode of the abutting prismatic wafer is formed, and the masking spacer increases as the wrap-around amount increases. It can be seen that damage such as peeling of the thin film on the end face of the prismatic wafer that occurs when the prismatic wafer is separated from the prism can be reduced.

  However, if the amount of wraparound of the thin film to the electrode surface of the prismatic wafer is too large, it may cause electrode conduction failure, and if the radius of curvature is small, the damage rate of the thin film during separation is high. Thus, it can be seen that the preferred radius of curvature of the R-plane is 5 to 30 μm.

Example 4
Next, a confirmation test was performed assuming that the masking spacer was reused.

  The manufacturing method of the present invention in Example 1 was made in three levels, with sample group H having an alumina purity of 99% by mass, sample group I having 96% by mass, and sample group J having 95% by mass. It was a book.

  100 samples of each of the above sample groups were weighed in advance, and then dipped in hydrofluoric acid warmed to 60 ° C. for 12 hours, then pulled up and again weighed.

  Then, the amount of change in weight (%) by hydrofluoric acid = (weight after treatment−weight before treatment) / weight before treatment was obtained.

The results are shown in Table 4.

  As can be seen from the above results, the sample group J having an alumina purity of less than 96% by mass has a high weight change due to hydrofluoric acid, whereas when the alumina purity is 96% by mass or more, the weight change is reduced. , 99 mass% or more, it can be seen that it is slightly affected.

  From this, if the masking spacer is made of ceramics of 96% by mass or more of alumina, more preferably 99% by mass or more of alumina, even if the thin film adhering to the masking spacer is removed with a strongly acidic chemical such as hydrofluoric acid, Since the masking baser is only slightly degraded, it can be reused.

(A) is a perspective view which shows an example of the masking spacer of this invention, (b) is the sectional drawing, (c) is a cross-sectional schematic diagram which shows the state of the ceramic particle | grains of a side surface. FIG. 2 is a schematic cross-sectional view of thin film deposition on a prismatic wafer using the masking spacer of the present invention. These show an example of the manufacturing method of the masking spacer of this invention, (a) is a perspective view of a ceramic molded object and a ceramic board, (b) is a perspective view of a piece. It is sectional drawing of the conventional semiconductor element. It is sectional drawing which shows the manufacturing method of the conventional semiconductor element. It is a perspective view which shows the manufacturing method of the conventional semiconductor element. It is a top view which shows the manufacturing method of the conventional semiconductor element. It is sectional drawing which shows the manufacturing method of the conventional semiconductor element.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1, 11 ... Masking spacer 1a, 11a ... Side surface 1b, 11b ... End surface 1c ... Boundary part 1d ... Corner part 2, 12 ... Square columnar wafer 2a ... Side face 2b ··· End face 3 ··· Ceramic particles 4 '··· Ceramic body 4 · · · Ceramic plate 4a ··· One main surface 4b ··· The other main surface 4c ... Groove 5... Individual piece 6... Semiconductor laser element 7... Thin film 8. ... Masking plate

Claims (4)

In order to form a thin film on both end faces of a prismatic wafer serving as a chip-like semiconductor element, a ceramic masking spacer for holding each prismatic wafer from both side faces, both sides contacting the prismatic wafer A masking spacer, characterized in that the surface is a burned skin surface with ceramic particles protruding, a surface roughness Ra of 0.3 to 0.9 μm, and both end surfaces are polished surfaces. 2. The ceramic masking spacer according to claim 1, wherein a boundary portion between both side surfaces and both end surfaces is formed in an R shape. The masking spacer according to claim 1 or 2, wherein the ceramic is mainly composed of 96.0% by mass or more of alumina. A method for manufacturing a masking spacer according to any one of claims 1 to 3, wherein a ceramic plate having a plurality of grooves opened on one main surface is fired to obtain a ceramic plate, and the ceramic plate is formed on both main surfaces. A manufacturing method of a masking spacer, characterized in that it is separated into pieces by the groove by polishing.

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