JP4626148B2 - 復号または署名作成におけるべき乗剰余算の計算方法 - Google Patents

復号または署名作成におけるべき乗剰余算の計算方法 Download PDF

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Publication number
JP4626148B2
JP4626148B2 JP2004001602A JP2004001602A JP4626148B2 JP 4626148 B2 JP4626148 B2 JP 4626148B2 JP 2004001602 A JP2004001602 A JP 2004001602A JP 2004001602 A JP2004001602 A JP 2004001602A JP 4626148 B2 JP4626148 B2 JP 4626148B2
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processing unit
mod
randomized
unit
public key
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JP2004001602A
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Japanese (ja)
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JP2005195829A (ja
JP2005195829A5 (enExample
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勝幸 桶屋
剛 高木
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Hitachi Ltd
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Hitachi Ltd
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Priority to JP2004001602A priority Critical patent/JP4626148B2/ja
Priority to EP04016352A priority patent/EP1553720B1/en
Priority to DE602004023811T priority patent/DE602004023811D1/de
Priority to US10/893,523 priority patent/US7512231B2/en
Publication of JP2005195829A publication Critical patent/JP2005195829A/ja
Publication of JP2005195829A5 publication Critical patent/JP2005195829A5/ja
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/723—Modular exponentiation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7219—Countermeasures against side channel or fault attacks
    • G06F2207/7223—Randomisation as countermeasure against side channel attacks
    • G06F2207/7233—Masking, e.g. (A**e)+r mod n

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Storage Device Security (AREA)
JP2004001602A 2004-01-07 2004-01-07 復号または署名作成におけるべき乗剰余算の計算方法 Expired - Fee Related JP4626148B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2004001602A JP4626148B2 (ja) 2004-01-07 2004-01-07 復号または署名作成におけるべき乗剰余算の計算方法
EP04016352A EP1553720B1 (en) 2004-01-07 2004-07-12 Modular exponentiation method in decryption or signature generation
DE602004023811T DE602004023811D1 (de) 2004-01-07 2004-07-12 Verfahren zur modularen Potenzierung zur Entschlüsselung bzw. zur Erzeugung von digitalen Signaturen
US10/893,523 US7512231B2 (en) 2004-01-07 2004-07-19 Computation method for modular exponentiation operation in decryption or signature generation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004001602A JP4626148B2 (ja) 2004-01-07 2004-01-07 復号または署名作成におけるべき乗剰余算の計算方法

Publications (3)

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JP2005195829A JP2005195829A (ja) 2005-07-21
JP2005195829A5 JP2005195829A5 (enExample) 2007-02-22
JP4626148B2 true JP4626148B2 (ja) 2011-02-02

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JP2004001602A Expired - Fee Related JP4626148B2 (ja) 2004-01-07 2004-01-07 復号または署名作成におけるべき乗剰余算の計算方法

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US (1) US7512231B2 (enExample)
EP (1) EP1553720B1 (enExample)
JP (1) JP4626148B2 (enExample)
DE (1) DE602004023811D1 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2015171A1 (fr) * 2007-06-29 2009-01-14 Gemplus Procédé cryptographique comprenant une exponentiation modulaire sécurisée contre les attaques à canaux cachés sans la connaissance de l'exposant public, cryptoprocesseur pour la mise en oeuvre du procédé et carte à puce associée
FR2977953A1 (fr) * 2011-07-13 2013-01-18 St Microelectronics Rousset Protection d'un calcul d'exponentiation modulaire par addition d'une quantite aleatoire
FR3015076B1 (fr) * 2013-12-17 2016-02-05 Oberthur Technologies Generation de cles cryptographiques
FR3015079B1 (fr) * 2013-12-17 2016-02-05 Oberthur Technologies Verification d'integrite de paire de cles cryptographiques
CN105099684B (zh) * 2014-05-08 2019-08-16 国民技术股份有限公司 一种模幂运算的处理方法、装置及密码设备
US11343071B2 (en) * 2016-02-05 2022-05-24 Micro Focus Llc Extended ciphertexts
KR101982237B1 (ko) * 2017-03-06 2019-05-24 고려대학교 산학협력단 클라우드 컴퓨팅 환경에서의 속성 기반 암호화를 이용한 데이터 공유 방법 및 시스템
KR102003936B1 (ko) * 2019-02-18 2019-07-29 주식회사 에이티이엔지 해킹방지용 데이터 전송 케이블
US11249726B2 (en) 2019-09-10 2022-02-15 Intel Corporation Integrated circuits with modular multiplication circuitry
CN111352609B (zh) * 2020-03-05 2022-06-14 青岛大学 一种基于边缘计算的分布式外包模幂运算方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0697687A4 (en) * 1994-03-07 2000-09-20 Nippon Telegraph & Telephone METHOD AND SYSTEM FOR PROVIDING AUTHENTICATION PROTOCOL BASED ON ZERO KNOWLEDGE
US6411715B1 (en) * 1997-11-10 2002-06-25 Rsa Security, Inc. Methods and apparatus for verifying the cryptographic security of a selected private and public key pair without knowing the private key
DE69834431T3 (de) * 1998-01-02 2009-09-10 Cryptography Research Inc., San Francisco Leckresistentes kryptographisches verfahren und vorrichtung
JP4317607B2 (ja) * 1998-12-14 2009-08-19 株式会社日立製作所 情報処理装置、耐タンパ処理装置
JP4083925B2 (ja) * 1999-06-24 2008-04-30 株式会社日立製作所 情報処理装置、カード部材および情報処理システム
JP2002247025A (ja) * 2001-02-22 2002-08-30 Hitachi Ltd 情報処理装置
DE10143728B4 (de) * 2001-09-06 2004-09-02 Infineon Technologies Ag Vorrichtung und Verfahren zum Berechnen eines Ergebnisses einer modularen Exponentiation
JP4086503B2 (ja) * 2002-01-15 2008-05-14 富士通株式会社 暗号演算装置及び方法並びにプログラム
EP1540880B1 (de) * 2002-09-11 2006-03-08 Giesecke & Devrient GmbH Geschützte kryptographische berechnung
TW586086B (en) * 2002-12-27 2004-05-01 Ind Tech Res Inst Method and apparatus for protecting public key schemes from timing, power and fault attacks

Also Published As

Publication number Publication date
EP1553720B1 (en) 2009-10-28
US7512231B2 (en) 2009-03-31
DE602004023811D1 (de) 2009-12-10
JP2005195829A (ja) 2005-07-21
EP1553720A1 (en) 2005-07-13
US20050147241A1 (en) 2005-07-07

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